From 3cc630564e1ee9cca211ec0f14ef34cab30f21ed Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Wed, 27 May 2015 11:25:12 +0300 Subject: ARM: BCM63xx: fix an error path in bcm63xx_pmb_power_on_cpu() We need to unlock and unmap some resourses before returning. Fixes: 3f2a43c98d72 ('ARM: BCM63xx: Add secondary CPU PMB initialization sequence') Signed-off-by: Dan Carpenter Signed-off-by: Florian Fainelli --- arch/arm/mach-bcm/bcm63xx_pmb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-bcm/bcm63xx_pmb.c b/arch/arm/mach-bcm/bcm63xx_pmb.c index c39752b85b92..de061ec5a479 100644 --- a/arch/arm/mach-bcm/bcm63xx_pmb.c +++ b/arch/arm/mach-bcm/bcm63xx_pmb.c @@ -150,7 +150,7 @@ int bcm63xx_pmb_power_on_cpu(struct device_node *dn) */ ret = bpcm_rd(base, addr, ARM_CONTROL, &ctrl); if (ret) - return ret; + goto out; if (ctrl & CPU_RESET_N(cpu)) { pr_info("PMB: CPU%d is already powered on\n", cpu); -- cgit v1.2.3 From 7dc95b40f599293aedf30432749ad25b51549041 Mon Sep 17 00:00:00 2001 From: Ray Jui Date: Thu, 28 May 2015 18:09:14 -0700 Subject: ARM: BCM: Enable NAND support for iProc SoCs Select CONFIG_MTD_NAND_BRCMNAND for all iProc SoCs Signed-off-by: Ray Jui Signed-off-by: Florian Fainelli --- arch/arm/mach-bcm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 8b11f44bb36e..1268e352048f 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -19,6 +19,7 @@ config ARCH_BCM_IPROC select ARCH_REQUIRE_GPIOLIB select ARM_AMBA select PINCTRL + select MTD_NAND_BRCMNAND help This enables support for systems based on Broadcom IPROC architected SoCs. The IPROC complex contains one or more ARM CPUs along with common -- cgit v1.2.3 From fbf4e262bb505a76c5cba227fcb2f4ea657d9921 Mon Sep 17 00:00:00 2001 From: Kevin Cernekee Date: Tue, 25 Nov 2014 16:49:53 -0800 Subject: bus: brcmstb_gisb: Honor the "big-endian" and "native-endian" DT properties On chips strapped for BE, we'll need to use ioread32be/iowrite32be instead of ioread32/iowrite32. Signed-off-by: Kevin Cernekee Signed-off-by: Florian Fainelli --- drivers/bus/brcmstb_gisb.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/bus/brcmstb_gisb.c b/drivers/bus/brcmstb_gisb.c index 738612c45266..f364fa4d24eb 100644 --- a/drivers/bus/brcmstb_gisb.c +++ b/drivers/bus/brcmstb_gisb.c @@ -91,6 +91,7 @@ static const int gisb_offsets_bcm7445[] = { struct brcmstb_gisb_arb_device { void __iomem *base; const int *gisb_offsets; + bool big_endian; struct mutex lock; struct list_head next; u32 valid_mask; @@ -108,7 +109,10 @@ static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg) if (offset == -1) return 1; - return ioread32(gdev->base + offset); + if (gdev->big_endian) + return ioread32be(gdev->base + offset); + else + return ioread32(gdev->base + offset); } static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg) @@ -117,7 +121,11 @@ static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg) if (offset == -1) return; - iowrite32(val, gdev->base + reg); + + if (gdev->big_endian) + iowrite32be(val, gdev->base + reg); + else + iowrite32(val, gdev->base + reg); } static ssize_t gisb_arb_get_timeout(struct device *dev, @@ -296,6 +304,7 @@ static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev) return -EINVAL; } gdev->gisb_offsets = of_id->data; + gdev->big_endian = of_device_is_big_endian(dn); err = devm_request_irq(&pdev->dev, timeout_irq, brcmstb_gisb_timeout_handler, 0, pdev->name, -- cgit v1.2.3 From 8820949d21eab614c02419e79385e16f1429b0e7 Mon Sep 17 00:00:00 2001 From: Gregory Fong Date: Thu, 28 May 2015 19:14:09 -0700 Subject: ARM: brcmstb: Select ARCH_WANT_OPTIONAL_GPIOLIB Select ARCH_WANT_OPTIONAL_GPIOLIB from BRCMSTB to allow GPIOLIB and GPIO_BRCMSTB to be enabled. Signed-off-by: Gregory Fong Signed-off-by: Florian Fainelli --- arch/arm/mach-bcm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 1268e352048f..e9184feffc4e 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -145,6 +145,7 @@ config ARCH_BRCMSTB select BRCMSTB_GISB_ARB select BRCMSTB_L2_IRQ select BCM7120_L2_IRQ + select ARCH_WANT_OPTIONAL_GPIOLIB help Say Y if you intend to run the kernel on a Broadcom ARM-based STB chipset. -- cgit v1.2.3 From b35d2e561ea711626749fcb511637f0e4604ff18 Mon Sep 17 00:00:00 2001 From: Gregory Fong Date: Thu, 28 May 2015 19:14:10 -0700 Subject: ARM: brcmstb: Add default gpio number Out of the brcmstb SoCs that I know, BCM3390 has the largest numbers of GPIOs, with its - 320 "peripheral" GPIOs - 5*32 = 160 UPG GPIOs (counting unused lines, which do get counted) - 2*32 = 64 UPG AON GPIOs (counting unused lines) Total: 544 I suspect that the upper limit will only need to be higher in the future, so set it to 1024. Signed-off-by: Gregory Fong Signed-off-by: Florian Fainelli --- arch/arm/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 45df48ba0b12..401a2db8ed9f 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1477,7 +1477,8 @@ config ARM_PSCI # selected platforms. config ARCH_NR_GPIO int - default 1024 if ARCH_SHMOBILE || ARCH_TEGRA || ARCH_ZYNQ + default 1024 if ARCH_BRCMSTB || ARCH_SHMOBILE || ARCH_TEGRA || \ + ARCH_ZYNQ default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 || \ SOC_DRA7XX || ARCH_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 default 416 if ARCH_SUNXI -- cgit v1.2.3