From 764dee47e2c1ed828c8a51cbf58f89b5e3ded11b Mon Sep 17 00:00:00 2001 From: Lorenzo Bianconi Date: Tue, 19 Oct 2021 07:11:40 +0800 Subject: mt76: sdio: move common code in mt76_sdio module Move sdio common code in mt76_sdio module. This is a preliminary patch to support mt7921s devices. Co-developed-by: Sean Wang Signed-off-by: Sean Wang Signed-off-by: Lorenzo Bianconi Signed-off-by: Felix Fietkau --- drivers/net/wireless/mediatek/mt76/Makefile | 2 +- drivers/net/wireless/mediatek/mt76/mt76.h | 16 + drivers/net/wireless/mediatek/mt76/mt7615/Makefile | 2 +- drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h | 4 - drivers/net/wireless/mediatek/mt76/mt7615/sdio.c | 279 ++--------------- drivers/net/wireless/mediatek/mt76/mt7615/sdio.h | 115 ------- .../net/wireless/mediatek/mt76/mt7615/sdio_mcu.c | 6 +- .../net/wireless/mediatek/mt76/mt7615/sdio_txrx.c | 334 --------------------- drivers/net/wireless/mediatek/mt76/sdio.c | 265 ++++++++++++++++ drivers/net/wireless/mediatek/mt76/sdio.h | 115 +++++++ drivers/net/wireless/mediatek/mt76/sdio_txrx.c | 328 ++++++++++++++++++++ 11 files changed, 748 insertions(+), 718 deletions(-) delete mode 100644 drivers/net/wireless/mediatek/mt76/mt7615/sdio.h delete mode 100644 drivers/net/wireless/mediatek/mt76/mt7615/sdio_txrx.c create mode 100644 drivers/net/wireless/mediatek/mt76/sdio.h create mode 100644 drivers/net/wireless/mediatek/mt76/sdio_txrx.c diff --git a/drivers/net/wireless/mediatek/mt76/Makefile b/drivers/net/wireless/mediatek/mt76/Makefile index 94efe3c29053..79ab850a45a2 100644 --- a/drivers/net/wireless/mediatek/mt76/Makefile +++ b/drivers/net/wireless/mediatek/mt76/Makefile @@ -14,7 +14,7 @@ mt76-$(CONFIG_PCI) += pci.o mt76-$(CONFIG_NL80211_TESTMODE) += testmode.o mt76-usb-y := usb.o usb_trace.o -mt76-sdio-y := sdio.o +mt76-sdio-y := sdio.o sdio_txrx.o CFLAGS_trace.o := -I$(src) CFLAGS_usb_trace.o := -I$(src) diff --git a/drivers/net/wireless/mediatek/mt76/mt76.h b/drivers/net/wireless/mediatek/mt76/mt76.h index a28e5c0a158f..8dc4bbaca15d 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76.h +++ b/drivers/net/wireless/mediatek/mt76/mt76.h @@ -1248,6 +1248,22 @@ int mt76s_init(struct mt76_dev *dev, struct sdio_func *func, int mt76s_alloc_rx_queue(struct mt76_dev *dev, enum mt76_rxq_id qid); int mt76s_alloc_tx(struct mt76_dev *dev); void mt76s_deinit(struct mt76_dev *dev); +void mt76s_sdio_irq(struct sdio_func *func); +void mt76s_txrx_worker(struct mt76_sdio *sdio); +int mt76s_hw_init(struct mt76_dev *dev, struct sdio_func *func); +u32 mt76s_rr(struct mt76_dev *dev, u32 offset); +void mt76s_wr(struct mt76_dev *dev, u32 offset, u32 val); +u32 mt76s_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val); +u32 mt76s_read_pcr(struct mt76_dev *dev); +void mt76s_write_copy(struct mt76_dev *dev, u32 offset, + const void *data, int len); +void mt76s_read_copy(struct mt76_dev *dev, u32 offset, + void *data, int len); +int mt76s_wr_rp(struct mt76_dev *dev, u32 base, + const struct mt76_reg_pair *data, + int len); +int mt76s_rd_rp(struct mt76_dev *dev, u32 base, + struct mt76_reg_pair *data, int len); struct sk_buff * mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data, diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/Makefile b/drivers/net/wireless/mediatek/mt76/mt7615/Makefile index 83f9861ff522..2b97b9dde477 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/Makefile +++ b/drivers/net/wireless/mediatek/mt76/mt7615/Makefile @@ -17,4 +17,4 @@ mt7615e-$(CONFIG_MT7622_WMAC) += soc.o mt7663-usb-sdio-common-y := usb_sdio.o mt7663u-y := usb.o usb_mcu.o -mt7663s-y := sdio.o sdio_mcu.o sdio_txrx.o +mt7663s-y := sdio.o sdio_mcu.o diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h b/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h index 437f14f06e63..77bd59813d47 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h @@ -569,10 +569,6 @@ int mt7663_usb_sdio_register_device(struct mt7615_dev *dev); int mt7663u_mcu_init(struct mt7615_dev *dev); /* sdio */ -u32 mt7663s_read_pcr(struct mt7615_dev *dev); int mt7663s_mcu_init(struct mt7615_dev *dev); -void mt7663s_txrx_worker(struct mt76_worker *w); -void mt7663s_rx_work(struct work_struct *work); -void mt7663s_sdio_irq(struct sdio_func *func); #endif diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c b/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c index ff1e62035f37..14108e3fadda 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c @@ -14,8 +14,8 @@ #include #include +#include "../sdio.h" #include "mt7615.h" -#include "sdio.h" #include "mac.h" #include "mcu.h" @@ -24,200 +24,19 @@ static const struct sdio_device_id mt7663s_table[] = { { } /* Terminating entry */ }; -static u32 mt7663s_read_whisr(struct mt76_dev *dev) +static void mt7663s_txrx_worker(struct mt76_worker *w) { - return sdio_readl(dev->sdio.func, MCR_WHISR, NULL); -} - -u32 mt7663s_read_pcr(struct mt7615_dev *dev) -{ - struct mt76_sdio *sdio = &dev->mt76.sdio; - - return sdio_readl(sdio->func, MCR_WHLPCR, NULL); -} - -static u32 mt7663s_read_mailbox(struct mt76_dev *dev, u32 offset) -{ - struct sdio_func *func = dev->sdio.func; - u32 val = ~0, status; - int err; - - sdio_claim_host(func); - - sdio_writel(func, offset, MCR_H2DSM0R, &err); - if (err < 0) { - dev_err(dev->dev, "failed setting address [err=%d]\n", err); - goto out; - } - - sdio_writel(func, H2D_SW_INT_READ, MCR_WSICR, &err); - if (err < 0) { - dev_err(dev->dev, "failed setting read mode [err=%d]\n", err); - goto out; - } - - err = readx_poll_timeout(mt7663s_read_whisr, dev, status, - status & H2D_SW_INT_READ, 0, 1000000); - if (err < 0) { - dev_err(dev->dev, "query whisr timeout\n"); - goto out; - } - - sdio_writel(func, H2D_SW_INT_READ, MCR_WHISR, &err); - if (err < 0) { - dev_err(dev->dev, "failed setting read mode [err=%d]\n", err); - goto out; - } - - val = sdio_readl(func, MCR_H2DSM0R, &err); - if (err < 0) { - dev_err(dev->dev, "failed reading h2dsm0r [err=%d]\n", err); - goto out; - } - - if (val != offset) { - dev_err(dev->dev, "register mismatch\n"); - val = ~0; - goto out; - } - - val = sdio_readl(func, MCR_D2HRM1R, &err); - if (err < 0) - dev_err(dev->dev, "failed reading d2hrm1r [err=%d]\n", err); - -out: - sdio_release_host(func); - - return val; -} - -static void mt7663s_write_mailbox(struct mt76_dev *dev, u32 offset, u32 val) -{ - struct sdio_func *func = dev->sdio.func; - u32 status; - int err; - - sdio_claim_host(func); - - sdio_writel(func, offset, MCR_H2DSM0R, &err); - if (err < 0) { - dev_err(dev->dev, "failed setting address [err=%d]\n", err); - goto out; - } - - sdio_writel(func, val, MCR_H2DSM1R, &err); - if (err < 0) { - dev_err(dev->dev, - "failed setting write value [err=%d]\n", err); - goto out; - } - - sdio_writel(func, H2D_SW_INT_WRITE, MCR_WSICR, &err); - if (err < 0) { - dev_err(dev->dev, "failed setting write mode [err=%d]\n", err); - goto out; - } - - err = readx_poll_timeout(mt7663s_read_whisr, dev, status, - status & H2D_SW_INT_WRITE, 0, 1000000); - if (err < 0) { - dev_err(dev->dev, "query whisr timeout\n"); - goto out; - } - - sdio_writel(func, H2D_SW_INT_WRITE, MCR_WHISR, &err); - if (err < 0) { - dev_err(dev->dev, "failed setting write mode [err=%d]\n", err); - goto out; - } - - val = sdio_readl(func, MCR_H2DSM0R, &err); - if (err < 0) { - dev_err(dev->dev, "failed reading h2dsm0r [err=%d]\n", err); - goto out; - } - - if (val != offset) - dev_err(dev->dev, "register mismatch\n"); - -out: - sdio_release_host(func); -} - -static u32 mt7663s_rr(struct mt76_dev *dev, u32 offset) -{ - if (test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) - return dev->mcu_ops->mcu_rr(dev, offset); - else - return mt7663s_read_mailbox(dev, offset); -} - -static void mt7663s_wr(struct mt76_dev *dev, u32 offset, u32 val) -{ - if (test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) - dev->mcu_ops->mcu_wr(dev, offset, val); - else - mt7663s_write_mailbox(dev, offset, val); -} - -static u32 mt7663s_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val) -{ - val |= mt7663s_rr(dev, offset) & ~mask; - mt7663s_wr(dev, offset, val); - - return val; -} - -static void mt7663s_write_copy(struct mt76_dev *dev, u32 offset, - const void *data, int len) -{ - const u32 *val = data; - int i; - - for (i = 0; i < len / sizeof(u32); i++) { - mt7663s_wr(dev, offset, val[i]); - offset += sizeof(u32); - } -} - -static void mt7663s_read_copy(struct mt76_dev *dev, u32 offset, - void *data, int len) -{ - u32 *val = data; - int i; - - for (i = 0; i < len / sizeof(u32); i++) { - val[i] = mt7663s_rr(dev, offset); - offset += sizeof(u32); - } -} + struct mt76_sdio *sdio = container_of(w, struct mt76_sdio, + txrx_worker); + struct mt76_dev *mdev = container_of(sdio, struct mt76_dev, sdio); + struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); -static int mt7663s_wr_rp(struct mt76_dev *dev, u32 base, - const struct mt76_reg_pair *data, - int len) -{ - int i; - - for (i = 0; i < len; i++) { - mt7663s_wr(dev, data->reg, data->value); - data++; - } - - return 0; -} - -static int mt7663s_rd_rp(struct mt76_dev *dev, u32 base, - struct mt76_reg_pair *data, - int len) -{ - int i; - - for (i = 0; i < len; i++) { - data->value = mt7663s_rr(dev, data->reg); - data++; + if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { + queue_work(mdev->wq, &dev->pm.wake_work); + return; } - - return 0; + mt76s_txrx_worker(sdio); + mt76_connac_pm_unref(&dev->mphy, &dev->pm); } static void mt7663s_init_work(struct work_struct *work) @@ -231,66 +50,6 @@ static void mt7663s_init_work(struct work_struct *work) mt7615_init_work(dev); } -static int mt7663s_hw_init(struct mt7615_dev *dev, struct sdio_func *func) -{ - u32 status, ctrl; - int ret; - - sdio_claim_host(func); - - ret = sdio_enable_func(func); - if (ret < 0) - goto release; - - /* Get ownership from the device */ - sdio_writel(func, WHLPCR_INT_EN_CLR | WHLPCR_FW_OWN_REQ_CLR, - MCR_WHLPCR, &ret); - if (ret < 0) - goto disable_func; - - ret = readx_poll_timeout(mt7663s_read_pcr, dev, status, - status & WHLPCR_IS_DRIVER_OWN, 2000, 1000000); - if (ret < 0) { - dev_err(dev->mt76.dev, "Cannot get ownership from device"); - goto disable_func; - } - - ret = sdio_set_block_size(func, 512); - if (ret < 0) - goto disable_func; - - /* Enable interrupt */ - sdio_writel(func, WHLPCR_INT_EN_SET, MCR_WHLPCR, &ret); - if (ret < 0) - goto disable_func; - - ctrl = WHIER_RX0_DONE_INT_EN | WHIER_TX_DONE_INT_EN; - sdio_writel(func, ctrl, MCR_WHIER, &ret); - if (ret < 0) - goto disable_func; - - /* set WHISR as read clear and Rx aggregation number as 16 */ - ctrl = FIELD_PREP(MAX_HIF_RX_LEN_NUM, 16); - sdio_writel(func, ctrl, MCR_WHCR, &ret); - if (ret < 0) - goto disable_func; - - ret = sdio_claim_irq(func, mt7663s_sdio_irq); - if (ret < 0) - goto disable_func; - - sdio_release_host(func); - - return 0; - -disable_func: - sdio_disable_func(func); -release: - sdio_release_host(func); - - return ret; -} - static int mt7663s_probe(struct sdio_func *func, const struct sdio_device_id *id) { @@ -307,13 +66,13 @@ static int mt7663s_probe(struct sdio_func *func, .update_survey = mt7615_update_channel, }; static const struct mt76_bus_ops mt7663s_ops = { - .rr = mt7663s_rr, - .rmw = mt7663s_rmw, - .wr = mt7663s_wr, - .write_copy = mt7663s_write_copy, - .read_copy = mt7663s_read_copy, - .wr_rp = mt7663s_wr_rp, - .rd_rp = mt7663s_rd_rp, + .rr = mt76s_rr, + .rmw = mt76s_rmw, + .wr = mt76s_wr, + .write_copy = mt76s_write_copy, + .read_copy = mt76s_read_copy, + .wr_rp = mt76s_wr_rp, + .rd_rp = mt76s_rd_rp, .type = MT76_BUS_SDIO, }; struct ieee80211_ops *ops; @@ -341,7 +100,7 @@ static int mt7663s_probe(struct sdio_func *func, if (ret < 0) goto error; - ret = mt7663s_hw_init(dev, func); + ret = mt76s_hw_init(mdev, func); if (ret) goto error; diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/sdio.h b/drivers/net/wireless/mediatek/mt76/mt7615/sdio.h deleted file mode 100644 index 03877d89e152..000000000000 --- a/drivers/net/wireless/mediatek/mt76/mt7615/sdio.h +++ /dev/null @@ -1,115 +0,0 @@ -/* SPDX-License-Identifier: ISC */ -/* Copyright (C) 2020 MediaTek Inc. - * - * Author: Sean Wang - */ - -#ifndef __MT76S_H -#define __MT76S_H - -#define MT_PSE_PAGE_SZ 128 - -#define MCR_WCIR 0x0000 -#define MCR_WHLPCR 0x0004 -#define WHLPCR_FW_OWN_REQ_CLR BIT(9) -#define WHLPCR_FW_OWN_REQ_SET BIT(8) -#define WHLPCR_IS_DRIVER_OWN BIT(8) -#define WHLPCR_INT_EN_CLR BIT(1) -#define WHLPCR_INT_EN_SET BIT(0) - -#define MCR_WSDIOCSR 0x0008 -#define MCR_WHCR 0x000C -#define W_INT_CLR_CTRL BIT(1) -#define RECV_MAILBOX_RD_CLR_EN BIT(2) -#define MAX_HIF_RX_LEN_NUM GENMASK(13, 8) -#define RX_ENHANCE_MODE BIT(16) - -#define MCR_WHISR 0x0010 -#define MCR_WHIER 0x0014 -#define WHIER_D2H_SW_INT GENMASK(31, 8) -#define WHIER_FW_OWN_BACK_INT_EN BIT(7) -#define WHIER_ABNORMAL_INT_EN BIT(6) -#define WHIER_RX1_DONE_INT_EN BIT(2) -#define WHIER_RX0_DONE_INT_EN BIT(1) -#define WHIER_TX_DONE_INT_EN BIT(0) -#define WHIER_DEFAULT (WHIER_RX0_DONE_INT_EN | \ - WHIER_RX1_DONE_INT_EN | \ - WHIER_TX_DONE_INT_EN | \ - WHIER_ABNORMAL_INT_EN | \ - WHIER_D2H_SW_INT) - -#define MCR_WASR 0x0020 -#define MCR_WSICR 0x0024 -#define MCR_WTSR0 0x0028 -#define TQ0_CNT GENMASK(7, 0) -#define TQ1_CNT GENMASK(15, 8) -#define TQ2_CNT GENMASK(23, 16) -#define TQ3_CNT GENMASK(31, 24) - -#define MCR_WTSR1 0x002c -#define TQ4_CNT GENMASK(7, 0) -#define TQ5_CNT GENMASK(15, 8) -#define TQ6_CNT GENMASK(23, 16) -#define TQ7_CNT GENMASK(31, 24) - -#define MCR_WTDR1 0x0034 -#define MCR_WRDR0 0x0050 -#define MCR_WRDR1 0x0054 -#define MCR_WRDR(p) (0x0050 + 4 * (p)) -#define MCR_H2DSM0R 0x0070 -#define H2D_SW_INT_READ BIT(16) -#define H2D_SW_INT_WRITE BIT(17) - -#define MCR_H2DSM1R 0x0074 -#define MCR_D2HRM0R 0x0078 -#define MCR_D2HRM1R 0x007c -#define MCR_D2HRM2R 0x0080 -#define MCR_WRPLR 0x0090 -#define RX0_PACKET_LENGTH GENMASK(15, 0) -#define RX1_PACKET_LENGTH GENMASK(31, 16) - -#define MCR_WTMDR 0x00b0 -#define MCR_WTMCR 0x00b4 -#define MCR_WTMDPCR0 0x00b8 -#define MCR_WTMDPCR1 0x00bc -#define MCR_WPLRCR 0x00d4 -#define MCR_WSR 0x00D8 -#define MCR_CLKIOCR 0x0100 -#define MCR_CMDIOCR 0x0104 -#define MCR_DAT0IOCR 0x0108 -#define MCR_DAT1IOCR 0x010C -#define MCR_DAT2IOCR 0x0110 -#define MCR_DAT3IOCR 0x0114 -#define MCR_CLKDLYCR 0x0118 -#define MCR_CMDDLYCR 0x011C -#define MCR_ODATDLYCR 0x0120 -#define MCR_IDATDLYCR1 0x0124 -#define MCR_IDATDLYCR2 0x0128 -#define MCR_ILCHCR 0x012C -#define MCR_WTQCR0 0x0130 -#define MCR_WTQCR1 0x0134 -#define MCR_WTQCR2 0x0138 -#define MCR_WTQCR3 0x013C -#define MCR_WTQCR4 0x0140 -#define MCR_WTQCR5 0x0144 -#define MCR_WTQCR6 0x0148 -#define MCR_WTQCR7 0x014C -#define MCR_WTQCR(x) (0x130 + 4 * (x)) -#define TXQ_CNT_L GENMASK(15, 0) -#define TXQ_CNT_H GENMASK(31, 16) - -#define MCR_SWPCDBGR 0x0154 - -struct mt76s_intr { - u32 isr; - struct { - u32 wtqcr[8]; - } tx; - struct { - u16 num[2]; - u16 len[2][16]; - } rx; - u32 rec_mb[2]; -} __packed; - -#endif diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/sdio_mcu.c b/drivers/net/wireless/mediatek/mt76/mt7615/sdio_mcu.c index 517419bb7772..f76986c807ab 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/sdio_mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/sdio_mcu.c @@ -10,11 +10,11 @@ #include #include +#include "../sdio.h" #include "mt7615.h" #include "mac.h" #include "mcu.h" #include "regs.h" -#include "sdio.h" static int mt7663s_mcu_init_sched(struct mt7615_dev *dev) { @@ -63,7 +63,7 @@ static int __mt7663s_mcu_drv_pmctrl(struct mt7615_dev *dev) sdio_writel(func, WHLPCR_FW_OWN_REQ_CLR, MCR_WHLPCR, NULL); - ret = readx_poll_timeout(mt7663s_read_pcr, dev, status, + ret = readx_poll_timeout(mt76s_read_pcr, &dev->mt76, status, status & WHLPCR_IS_DRIVER_OWN, 2000, 1000000); if (ret < 0) { dev_err(dev->mt76.dev, "Cannot get ownership from device"); @@ -111,7 +111,7 @@ static int mt7663s_mcu_fw_pmctrl(struct mt7615_dev *dev) sdio_writel(func, WHLPCR_FW_OWN_REQ_SET, MCR_WHLPCR, NULL); - ret = readx_poll_timeout(mt7663s_read_pcr, dev, status, + ret = readx_poll_timeout(mt76s_read_pcr, &dev->mt76, status, !(status & WHLPCR_IS_DRIVER_OWN), 2000, 1000000); if (ret < 0) { dev_err(dev->mt76.dev, "Cannot set ownership to device"); diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/sdio_txrx.c b/drivers/net/wireless/mediatek/mt76/mt7615/sdio_txrx.c deleted file mode 100644 index 04f4c89b7499..000000000000 --- a/drivers/net/wireless/mediatek/mt76/mt7615/sdio_txrx.c +++ /dev/null @@ -1,334 +0,0 @@ -// SPDX-License-Identifier: ISC -/* Copyright (C) 2020 MediaTek Inc. - * - * Author: Felix Fietkau - * Lorenzo Bianconi - * Sean Wang - */ - -#include -#include -#include - -#include -#include -#include - -#include "../trace.h" -#include "mt7615.h" -#include "sdio.h" -#include "mac.h" - -static int mt7663s_refill_sched_quota(struct mt76_dev *dev, u32 *data) -{ - u32 ple_ac_data_quota[] = { - FIELD_GET(TXQ_CNT_L, data[4]), /* VO */ - FIELD_GET(TXQ_CNT_H, data[3]), /* VI */ - FIELD_GET(TXQ_CNT_L, data[3]), /* BE */ - FIELD_GET(TXQ_CNT_H, data[2]), /* BK */ - }; - u32 pse_ac_data_quota[] = { - FIELD_GET(TXQ_CNT_H, data[1]), /* VO */ - FIELD_GET(TXQ_CNT_L, data[1]), /* VI */ - FIELD_GET(TXQ_CNT_H, data[0]), /* BE */ - FIELD_GET(TXQ_CNT_L, data[0]), /* BK */ - }; - u32 pse_mcu_quota = FIELD_GET(TXQ_CNT_L, data[2]); - u32 pse_data_quota = 0, ple_data_quota = 0; - struct mt76_sdio *sdio = &dev->sdio; - int i; - - for (i = 0; i < ARRAY_SIZE(pse_ac_data_quota); i++) { - pse_data_quota += pse_ac_data_quota[i]; - ple_data_quota += ple_ac_data_quota[i]; - } - - if (!pse_data_quota && !ple_data_quota && !pse_mcu_quota) - return 0; - - sdio->sched.pse_mcu_quota += pse_mcu_quota; - sdio->sched.pse_data_quota += pse_data_quota; - sdio->sched.ple_data_quota += ple_data_quota; - - return pse_data_quota + ple_data_quota + pse_mcu_quota; -} - -static struct sk_buff *mt7663s_build_rx_skb(void *data, int data_len, - int buf_len) -{ - int len = min_t(int, data_len, MT_SKB_HEAD_LEN); - struct sk_buff *skb; - - skb = alloc_skb(len, GFP_KERNEL); - if (!skb) - return NULL; - - skb_put_data(skb, data, len); - if (data_len > len) { - struct page *page; - - data += len; - page = virt_to_head_page(data); - skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, - page, data - page_address(page), - data_len - len, buf_len); - get_page(page); - } - - return skb; -} - -static int mt7663s_rx_run_queue(struct mt76_dev *dev, enum mt76_rxq_id qid, - struct mt76s_intr *intr) -{ - struct mt76_queue *q = &dev->q_rx[qid]; - struct mt76_sdio *sdio = &dev->sdio; - int len = 0, err, i; - struct page *page; - u8 *buf; - - for (i = 0; i < intr->rx.num[qid]; i++) - len += round_up(intr->rx.len[qid][i] + 4, 4); - - if (!len) - return 0; - - if (len > sdio->func->cur_blksize) - len = roundup(len, sdio->func->cur_blksize); - - page = __dev_alloc_pages(GFP_KERNEL, get_order(len)); - if (!page) - return -ENOMEM; - - buf = page_address(page); - - err = sdio_readsb(sdio->func, buf, MCR_WRDR(qid), len); - if (err < 0) { - dev_err(dev->dev, "sdio read data failed:%d\n", err); - put_page(page); - return err; - } - - for (i = 0; i < intr->rx.num[qid]; i++) { - int index = (q->head + i) % q->ndesc; - struct mt76_queue_entry *e = &q->entry[index]; - - len = intr->rx.len[qid][i]; - e->skb = mt7663s_build_rx_skb(buf, len, round_up(len + 4, 4)); - if (!e->skb) - break; - - buf += round_up(len + 4, 4); - if (q->queued + i + 1 == q->ndesc) - break; - } - put_page(page); - - spin_lock_bh(&q->lock); - q->head = (q->head + i) % q->ndesc; - q->queued += i; - spin_unlock_bh(&q->lock); - - return i; -} - -static int mt7663s_rx_handler(struct mt76_dev *dev) -{ - struct mt76_sdio *sdio = &dev->sdio; - struct mt76s_intr *intr = sdio->intr_data; - int nframes = 0, ret; - - ret = sdio_readsb(sdio->func, intr, MCR_WHISR, sizeof(*intr)); - if (ret < 0) - return ret; - - trace_dev_irq(dev, intr->isr, 0); - - if (intr->isr & WHIER_RX0_DONE_INT_EN) { - ret = mt7663s_rx_run_queue(dev, 0, intr); - if (ret > 0) { - mt76_worker_schedule(&sdio->net_worker); - nframes += ret; - } - } - - if (intr->isr & WHIER_RX1_DONE_INT_EN) { - ret = mt7663s_rx_run_queue(dev, 1, intr); - if (ret > 0) { - mt76_worker_schedule(&sdio->net_worker); - nframes += ret; - } - } - - nframes += !!mt7663s_refill_sched_quota(dev, intr->tx.wtqcr); - - return nframes; -} - -static int mt7663s_tx_pick_quota(struct mt76_sdio *sdio, bool mcu, int buf_sz, - int *pse_size, int *ple_size) -{ - int pse_sz; - - pse_sz = DIV_ROUND_UP(buf_sz + sdio->sched.deficit, MT_PSE_PAGE_SZ); - - if (mcu) { - if (sdio->sched.pse_mcu_quota < *pse_size + pse_sz) - return -EBUSY; - } else { - if (sdio->sched.pse_data_quota < *pse_size + pse_sz || - sdio->sched.ple_data_quota < *ple_size + 1) - return -EBUSY; - - *ple_size = *ple_size + 1; - } - *pse_size = *pse_size + pse_sz; - - return 0; -} - -static void mt7663s_tx_update_quota(struct mt76_sdio *sdio, bool mcu, - int pse_size, int ple_size) -{ - if (mcu) { - sdio->sched.pse_mcu_quota -= pse_size; - } else { - sdio->sched.pse_data_quota -= pse_size; - sdio->sched.ple_data_quota -= ple_size; - } -} - -static int __mt7663s_xmit_queue(struct mt76_dev *dev, u8 *data, int len) -{ - struct mt76_sdio *sdio = &dev->sdio; - int err; - - if (len > sdio->func->cur_blksize) - len = roundup(len, sdio->func->cur_blksize); - - err = sdio_writesb(sdio->func, MCR_WTDR1, data, len); - if (err) - dev_err(dev->dev, "sdio write failed: %d\n", err); - - return err; -} - -static int mt7663s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q) -{ - int qid, err, nframes = 0, len = 0, pse_sz = 0, ple_sz = 0; - bool mcu = q == dev->q_mcu[MT_MCUQ_WM]; - struct mt76_sdio *sdio = &dev->sdio; - u8 pad; - - qid = mcu ? ARRAY_SIZE(sdio->xmit_buf) - 1 : q->qid; - while (q->first != q->head) { - struct mt76_queue_entry *e = &q->entry[q->first]; - struct sk_buff *iter; - - smp_rmb(); - - if (!test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) { - __skb_put_zero(e->skb, 4); - err = __mt7663s_xmit_queue(dev, e->skb->data, - e->skb->len); - if (err) - return err; - - goto next; - } - - pad = roundup(e->skb->len, 4) - e->skb->len; - if (len + e->skb->len + pad + 4 > MT76S_XMIT_BUF_SZ) - break; - - if (mt7663s_tx_pick_quota(sdio, mcu, e->buf_sz, &pse_sz, - &ple_sz)) - break; - - memcpy(sdio->xmit_buf[qid] + len, e->skb->data, - skb_headlen(e->skb)); - len += skb_headlen(e->skb); - nframes++; - - skb_walk_frags(e->skb, iter) { - memcpy(sdio->xmit_buf[qid] + len, iter->data, - iter->len); - len += iter->len; - nframes++; - } - - if (unlikely(pad)) { - memset(sdio->xmit_buf[qid] + len, 0, pad); - len += pad; - } -next: - q->first = (q->first + 1) % q->ndesc; - e->done = true; - } - - if (nframes) { - memset(sdio->xmit_buf[qid] + len, 0, 4); - err = __mt7663s_xmit_queue(dev, sdio->xmit_buf[qid], len + 4); - if (err) - return err; - } - mt7663s_tx_update_quota(sdio, mcu, pse_sz, ple_sz); - - mt76_worker_schedule(&sdio->status_worker); - - return nframes; -} - -void mt7663s_txrx_worker(struct mt76_worker *w) -{ - struct mt76_sdio *sdio = container_of(w, struct mt76_sdio, - txrx_worker); - struct mt76_dev *mdev = container_of(sdio, struct mt76_dev, sdio); - struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); - int i, nframes, ret; - - if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) { - queue_work(mdev->wq, &dev->pm.wake_work); - return; - } - - /* disable interrupt */ - sdio_claim_host(sdio->func); - sdio_writel(sdio->func, WHLPCR_INT_EN_CLR, MCR_WHLPCR, NULL); - - do { - nframes = 0; - - /* tx */ - for (i = 0; i <= MT_TXQ_PSD; i++) { - ret = mt7663s_tx_run_queue(mdev, mdev->phy.q_tx[i]); - if (ret > 0) - nframes += ret; - } - ret = mt7663s_tx_run_queue(mdev, mdev->q_mcu[MT_MCUQ_WM]); - if (ret > 0) - nframes += ret; - - /* rx */ - ret = mt7663s_rx_handler(mdev); - if (ret > 0) - nframes += ret; - } while (nframes > 0); - - /* enable interrupt */ - sdio_writel(sdio->func, WHLPCR_INT_EN_SET, MCR_WHLPCR, NULL); - sdio_release_host(sdio->func); - - mt76_connac_pm_unref(&dev->mphy, &dev->pm); -} - -void mt7663s_sdio_irq(struct sdio_func *func) -{ - struct mt7615_dev *dev = sdio_get_drvdata(func); - struct mt76_sdio *sdio = &dev->mt76.sdio; - - if (!test_bit(MT76_STATE_INITIALIZED, &dev->mt76.phy.state)) - return; - - mt76_worker_schedule(&sdio->txrx_worker); -} diff --git a/drivers/net/wireless/mediatek/mt76/sdio.c b/drivers/net/wireless/mediatek/mt76/sdio.c index f7a1838b4576..7e613462b60e 100644 --- a/drivers/net/wireless/mediatek/mt76/sdio.c +++ b/drivers/net/wireless/mediatek/mt76/sdio.c @@ -16,6 +16,271 @@ #include #include "mt76.h" +#include "sdio.h" + +static u32 mt76s_read_whisr(struct mt76_dev *dev) +{ + return sdio_readl(dev->sdio.func, MCR_WHISR, NULL); +} + +u32 mt76s_read_pcr(struct mt76_dev *dev) +{ + struct mt76_sdio *sdio = &dev->sdio; + + return sdio_readl(sdio->func, MCR_WHLPCR, NULL); +} +EXPORT_SYMBOL_GPL(mt76s_read_pcr); + +static u32 mt76s_read_mailbox(struct mt76_dev *dev, u32 offset) +{ + struct sdio_func *func = dev->sdio.func; + u32 val = ~0, status; + int err; + + sdio_claim_host(func); + + sdio_writel(func, offset, MCR_H2DSM0R, &err); + if (err < 0) { + dev_err(dev->dev, "failed setting address [err=%d]\n", err); + goto out; + } + + sdio_writel(func, H2D_SW_INT_READ, MCR_WSICR, &err); + if (err < 0) { + dev_err(dev->dev, "failed setting read mode [err=%d]\n", err); + goto out; + } + + err = readx_poll_timeout(mt76s_read_whisr, dev, status, + status & H2D_SW_INT_READ, 0, 1000000); + if (err < 0) { + dev_err(dev->dev, "query whisr timeout\n"); + goto out; + } + + sdio_writel(func, H2D_SW_INT_READ, MCR_WHISR, &err); + if (err < 0) { + dev_err(dev->dev, "failed setting read mode [err=%d]\n", err); + goto out; + } + + val = sdio_readl(func, MCR_H2DSM0R, &err); + if (err < 0) { + dev_err(dev->dev, "failed reading h2dsm0r [err=%d]\n", err); + goto out; + } + + if (val != offset) { + dev_err(dev->dev, "register mismatch\n"); + val = ~0; + goto out; + } + + val = sdio_readl(func, MCR_D2HRM1R, &err); + if (err < 0) + dev_err(dev->dev, "failed reading d2hrm1r [err=%d]\n", err); + +out: + sdio_release_host(func); + + return val; +} + +static void mt76s_write_mailbox(struct mt76_dev *dev, u32 offset, u32 val) +{ + struct sdio_func *func = dev->sdio.func; + u32 status; + int err; + + sdio_claim_host(func); + + sdio_writel(func, offset, MCR_H2DSM0R, &err); + if (err < 0) { + dev_err(dev->dev, "failed setting address [err=%d]\n", err); + goto out; + } + + sdio_writel(func, val, MCR_H2DSM1R, &err); + if (err < 0) { + dev_err(dev->dev, + "failed setting write value [err=%d]\n", err); + goto out; + } + + sdio_writel(func, H2D_SW_INT_WRITE, MCR_WSICR, &err); + if (err < 0) { + dev_err(dev->dev, "failed setting write mode [err=%d]\n", err); + goto out; + } + + err = readx_poll_timeout(mt76s_read_whisr, dev, status, + status & H2D_SW_INT_WRITE, 0, 1000000); + if (err < 0) { + dev_err(dev->dev, "query whisr timeout\n"); + goto out; + } + + sdio_writel(func, H2D_SW_INT_WRITE, MCR_WHISR, &err); + if (err < 0) { + dev_err(dev->dev, "failed setting write mode [err=%d]\n", err); + goto out; + } + + val = sdio_readl(func, MCR_H2DSM0R, &err); + if (err < 0) { + dev_err(dev->dev, "failed reading h2dsm0r [err=%d]\n", err); + goto out; + } + + if (val != offset) + dev_err(dev->dev, "register mismatch\n"); + +out: + sdio_release_host(func); +} + +u32 mt76s_rr(struct mt76_dev *dev, u32 offset) +{ + if (test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) + return dev->mcu_ops->mcu_rr(dev, offset); + else + return mt76s_read_mailbox(dev, offset); +} +EXPORT_SYMBOL_GPL(mt76s_rr); + +void mt76s_wr(struct mt76_dev *dev, u32 offset, u32 val) +{ + if (test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) + dev->mcu_ops->mcu_wr(dev, offset, val); + else + mt76s_write_mailbox(dev, offset, val); +} +EXPORT_SYMBOL_GPL(mt76s_wr); + +u32 mt76s_rmw(struct mt76_dev *dev, u32 offset, u32 mask, u32 val) +{ + val |= mt76s_rr(dev, offset) & ~mask; + mt76s_wr(dev, offset, val); + + return val; +} +EXPORT_SYMBOL_GPL(mt76s_rmw); + +void mt76s_write_copy(struct mt76_dev *dev, u32 offset, + const void *data, int len) +{ + const u32 *val = data; + int i; + + for (i = 0; i < len / sizeof(u32); i++) { + mt76s_wr(dev, offset, val[i]); + offset += sizeof(u32); + } +} +EXPORT_SYMBOL_GPL(mt76s_write_copy); + +void mt76s_read_copy(struct mt76_dev *dev, u32 offset, + void *data, int len) +{ + u32 *val = data; + int i; + + for (i = 0; i < len / sizeof(u32); i++) { + val[i] = mt76s_rr(dev, offset); + offset += sizeof(u32); + } +} +EXPORT_SYMBOL_GPL(mt76s_read_copy); + +int mt76s_wr_rp(struct mt76_dev *dev, u32 base, + const struct mt76_reg_pair *data, + int len) +{ + int i; + + for (i = 0; i < len; i++) { + mt76s_wr(dev, data->reg, data->value); + data++; + } + + return 0; +} +EXPORT_SYMBOL_GPL(mt76s_wr_rp); + +int mt76s_rd_rp(struct mt76_dev *dev, u32 base, + struct mt76_reg_pair *data, int len) +{ + int i; + + for (i = 0; i < len; i++) { + data->value = mt76s_rr(dev, data->reg); + data++; + } + + return 0; +} +EXPORT_SYMBOL_GPL(mt76s_rd_rp); + +int mt76s_hw_init(struct mt76_dev *dev, struct sdio_func *func) +{ + u32 status, ctrl; + int ret; + + sdio_claim_host(func); + + ret = sdio_enable_func(func); + if (ret < 0) + goto release; + + /* Get ownership from the device */ + sdio_writel(func, WHLPCR_INT_EN_CLR | WHLPCR_FW_OWN_REQ_CLR, + MCR_WHLPCR, &ret); + if (ret < 0) + goto disable_func; + + ret = readx_poll_timeout(mt76s_read_pcr, dev, status, + status & WHLPCR_IS_DRIVER_OWN, 2000, 1000000); + if (ret < 0) { + dev_err(dev->dev, "Cannot get ownership from device"); + goto disable_func; + } + + ret = sdio_set_block_size(func, 512); + if (ret < 0) + goto disable_func; + + /* Enable interrupt */ + sdio_writel(func, WHLPCR_INT_EN_SET, MCR_WHLPCR, &ret); + if (ret < 0) + goto disable_func; + + ctrl = WHIER_RX0_DONE_INT_EN | WHIER_TX_DONE_INT_EN; + sdio_writel(func, ctrl, MCR_WHIER, &ret); + if (ret < 0) + goto disable_func; + + /* set WHISR as read clear and Rx aggregation number as 16 */ + ctrl = FIELD_PREP(MAX_HIF_RX_LEN_NUM, 16); + sdio_writel(func, ctrl, MCR_WHCR, &ret); + if (ret < 0) + goto disable_func; + + ret = sdio_claim_irq(func, mt76s_sdio_irq); + if (ret < 0) + goto disable_func; + + sdio_release_host(func); + + return 0; + +disable_func: + sdio_disable_func(func); +release: + sdio_release_host(func); + + return ret; +} +EXPORT_SYMBOL_GPL(mt76s_hw_init); int mt76s_alloc_rx_queue(struct mt76_dev *dev, enum mt76_rxq_id qid) { diff --git a/drivers/net/wireless/mediatek/mt76/sdio.h b/drivers/net/wireless/mediatek/mt76/sdio.h new file mode 100644 index 000000000000..03877d89e152 --- /dev/null +++ b/drivers/net/wireless/mediatek/mt76/sdio.h @@ -0,0 +1,115 @@ +/* SPDX-License-Identifier: ISC */ +/* Copyright (C) 2020 MediaTek Inc. + * + * Author: Sean Wang + */ + +#ifndef __MT76S_H +#define __MT76S_H + +#define MT_PSE_PAGE_SZ 128 + +#define MCR_WCIR 0x0000 +#define MCR_WHLPCR 0x0004 +#define WHLPCR_FW_OWN_REQ_CLR BIT(9) +#define WHLPCR_FW_OWN_REQ_SET BIT(8) +#define WHLPCR_IS_DRIVER_OWN BIT(8) +#define WHLPCR_INT_EN_CLR BIT(1) +#define WHLPCR_INT_EN_SET BIT(0) + +#define MCR_WSDIOCSR 0x0008 +#define MCR_WHCR 0x000C +#define W_INT_CLR_CTRL BIT(1) +#define RECV_MAILBOX_RD_CLR_EN BIT(2) +#define MAX_HIF_RX_LEN_NUM GENMASK(13, 8) +#define RX_ENHANCE_MODE BIT(16) + +#define MCR_WHISR 0x0010 +#define MCR_WHIER 0x0014 +#define WHIER_D2H_SW_INT GENMASK(31, 8) +#define WHIER_FW_OWN_BACK_INT_EN BIT(7) +#define WHIER_ABNORMAL_INT_EN BIT(6) +#define WHIER_RX1_DONE_INT_EN BIT(2) +#define WHIER_RX0_DONE_INT_EN BIT(1) +#define WHIER_TX_DONE_INT_EN BIT(0) +#define WHIER_DEFAULT (WHIER_RX0_DONE_INT_EN | \ + WHIER_RX1_DONE_INT_EN | \ + WHIER_TX_DONE_INT_EN | \ + WHIER_ABNORMAL_INT_EN | \ + WHIER_D2H_SW_INT) + +#define MCR_WASR 0x0020 +#define MCR_WSICR 0x0024 +#define MCR_WTSR0 0x0028 +#define TQ0_CNT GENMASK(7, 0) +#define TQ1_CNT GENMASK(15, 8) +#define TQ2_CNT GENMASK(23, 16) +#define TQ3_CNT GENMASK(31, 24) + +#define MCR_WTSR1 0x002c +#define TQ4_CNT GENMASK(7, 0) +#define TQ5_CNT GENMASK(15, 8) +#define TQ6_CNT GENMASK(23, 16) +#define TQ7_CNT GENMASK(31, 24) + +#define MCR_WTDR1 0x0034 +#define MCR_WRDR0 0x0050 +#define MCR_WRDR1 0x0054 +#define MCR_WRDR(p) (0x0050 + 4 * (p)) +#define MCR_H2DSM0R 0x0070 +#define H2D_SW_INT_READ BIT(16) +#define H2D_SW_INT_WRITE BIT(17) + +#define MCR_H2DSM1R 0x0074 +#define MCR_D2HRM0R 0x0078 +#define MCR_D2HRM1R 0x007c +#define MCR_D2HRM2R 0x0080 +#define MCR_WRPLR 0x0090 +#define RX0_PACKET_LENGTH GENMASK(15, 0) +#define RX1_PACKET_LENGTH GENMASK(31, 16) + +#define MCR_WTMDR 0x00b0 +#define MCR_WTMCR 0x00b4 +#define MCR_WTMDPCR0 0x00b8 +#define MCR_WTMDPCR1 0x00bc +#define MCR_WPLRCR 0x00d4 +#define MCR_WSR 0x00D8 +#define MCR_CLKIOCR 0x0100 +#define MCR_CMDIOCR 0x0104 +#define MCR_DAT0IOCR 0x0108 +#define MCR_DAT1IOCR 0x010C +#define MCR_DAT2IOCR 0x0110 +#define MCR_DAT3IOCR 0x0114 +#define MCR_CLKDLYCR 0x0118 +#define MCR_CMDDLYCR 0x011C +#define MCR_ODATDLYCR 0x0120 +#define MCR_IDATDLYCR1 0x0124 +#define MCR_IDATDLYCR2 0x0128 +#define MCR_ILCHCR 0x012C +#define MCR_WTQCR0 0x0130 +#define MCR_WTQCR1 0x0134 +#define MCR_WTQCR2 0x0138 +#define MCR_WTQCR3 0x013C +#define MCR_WTQCR4 0x0140 +#define MCR_WTQCR5 0x0144 +#define MCR_WTQCR6 0x0148 +#define MCR_WTQCR7 0x014C +#define MCR_WTQCR(x) (0x130 + 4 * (x)) +#define TXQ_CNT_L GENMASK(15, 0) +#define TXQ_CNT_H GENMASK(31, 16) + +#define MCR_SWPCDBGR 0x0154 + +struct mt76s_intr { + u32 isr; + struct { + u32 wtqcr[8]; + } tx; + struct { + u16 num[2]; + u16 len[2][16]; + } rx; + u32 rec_mb[2]; +} __packed; + +#endif diff --git a/drivers/net/wireless/mediatek/mt76/sdio_txrx.c b/drivers/net/wireless/mediatek/mt76/sdio_txrx.c new file mode 100644 index 000000000000..ceb3dc0613d6 --- /dev/null +++ b/drivers/net/wireless/mediatek/mt76/sdio_txrx.c @@ -0,0 +1,328 @@ +// SPDX-License-Identifier: ISC +/* Copyright (C) 2020 MediaTek Inc. + * + * Author: Felix Fietkau + * Lorenzo Bianconi + * Sean Wang + */ + +#include +#include +#include + +#include +#include +#include + +#include "trace.h" +#include "sdio.h" +#include "mt76.h" + +static int mt76s_refill_sched_quota(struct mt76_dev *dev, u32 *data) +{ + u32 ple_ac_data_quota[] = { + FIELD_GET(TXQ_CNT_L, data[4]), /* VO */ + FIELD_GET(TXQ_CNT_H, data[3]), /* VI */ + FIELD_GET(TXQ_CNT_L, data[3]), /* BE */ + FIELD_GET(TXQ_CNT_H, data[2]), /* BK */ + }; + u32 pse_ac_data_quota[] = { + FIELD_GET(TXQ_CNT_H, data[1]), /* VO */ + FIELD_GET(TXQ_CNT_L, data[1]), /* VI */ + FIELD_GET(TXQ_CNT_H, data[0]), /* BE */ + FIELD_GET(TXQ_CNT_L, data[0]), /* BK */ + }; + u32 pse_mcu_quota = FIELD_GET(TXQ_CNT_L, data[2]); + u32 pse_data_quota = 0, ple_data_quota = 0; + struct mt76_sdio *sdio = &dev->sdio; + int i; + + for (i = 0; i < ARRAY_SIZE(pse_ac_data_quota); i++) { + pse_data_quota += pse_ac_data_quota[i]; + ple_data_quota += ple_ac_data_quota[i]; + } + + if (!pse_data_quota && !ple_data_quota && !pse_mcu_quota) + return 0; + + sdio->sched.pse_mcu_quota += pse_mcu_quota; + sdio->sched.pse_data_quota += pse_data_quota; + sdio->sched.ple_data_quota += ple_data_quota; + + return pse_data_quota + ple_data_quota + pse_mcu_quota; +} + +static struct sk_buff * +mt76s_build_rx_skb(void *data, int data_len, int buf_len) +{ + int len = min_t(int, data_len, MT_SKB_HEAD_LEN); + struct sk_buff *skb; + + skb = alloc_skb(len, GFP_KERNEL); + if (!skb) + return NULL; + + skb_put_data(skb, data, len); + if (data_len > len) { + struct page *page; + + data += len; + page = virt_to_head_page(data); + skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, + page, data - page_address(page), + data_len - len, buf_len); + get_page(page); + } + + return skb; +} + +static int +mt76s_rx_run_queue(struct mt76_dev *dev, enum mt76_rxq_id qid, + struct mt76s_intr *intr) +{ + struct mt76_queue *q = &dev->q_rx[qid]; + struct mt76_sdio *sdio = &dev->sdio; + int len = 0, err, i; + struct page *page; + u8 *buf; + + for (i = 0; i < intr->rx.num[qid]; i++) + len += round_up(intr->rx.len[qid][i] + 4, 4); + + if (!len) + return 0; + + if (len > sdio->func->cur_blksize) + len = roundup(len, sdio->func->cur_blksize); + + page = __dev_alloc_pages(GFP_KERNEL, get_order(len)); + if (!page) + return -ENOMEM; + + buf = page_address(page); + + err = sdio_readsb(sdio->func, buf, MCR_WRDR(qid), len); + if (err < 0) { + dev_err(dev->dev, "sdio read data failed:%d\n", err); + put_page(page); + return err; + } + + for (i = 0; i < intr->rx.num[qid]; i++) { + int index = (q->head + i) % q->ndesc; + struct mt76_queue_entry *e = &q->entry[index]; + + len = intr->rx.len[qid][i]; + e->skb = mt76s_build_rx_skb(buf, len, round_up(len + 4, 4)); + if (!e->skb) + break; + + buf += round_up(len + 4, 4); + if (q->queued + i + 1 == q->ndesc) + break; + } + put_page(page); + + spin_lock_bh(&q->lock); + q->head = (q->head + i) % q->ndesc; + q->queued += i; + spin_unlock_bh(&q->lock); + + return i; +} + +static int mt76s_rx_handler(struct mt76_dev *dev) +{ + struct mt76_sdio *sdio = &dev->sdio; + struct mt76s_intr *intr = sdio->intr_data; + int nframes = 0, ret; + + ret = sdio_readsb(sdio->func, intr, MCR_WHISR, sizeof(*intr)); + if (ret < 0) + return ret; + + trace_dev_irq(dev, intr->isr, 0); + + if (intr->isr & WHIER_RX0_DONE_INT_EN) { + ret = mt76s_rx_run_queue(dev, 0, intr); + if (ret > 0) { + mt76_worker_schedule(&sdio->net_worker); + nframes += ret; + } + } + + if (intr->isr & WHIER_RX1_DONE_INT_EN) { + ret = mt76s_rx_run_queue(dev, 1, intr); + if (ret > 0) { + mt76_worker_schedule(&sdio->net_worker); + nframes += ret; + } + } + + nframes += !!mt76s_refill_sched_quota(dev, intr->tx.wtqcr); + + return nframes; +} + +static int +mt76s_tx_pick_quota(struct mt76_sdio *sdio, bool mcu, int buf_sz, + int *pse_size, int *ple_size) +{ + int pse_sz; + + pse_sz = DIV_ROUND_UP(buf_sz + sdio->sched.deficit, MT_PSE_PAGE_SZ); + + if (mcu) { + if (sdio->sched.pse_mcu_quota < *pse_size + pse_sz) + return -EBUSY; + } else { + if (sdio->sched.pse_data_quota < *pse_size + pse_sz || + sdio->sched.ple_data_quota < *ple_size + 1) + return -EBUSY; + + *ple_size = *ple_size + 1; + } + *pse_size = *pse_size + pse_sz; + + return 0; +} + +static void +mt76s_tx_update_quota(struct mt76_sdio *sdio, bool mcu, int pse_size, + int ple_size) +{ + if (mcu) { + sdio->sched.pse_mcu_quota -= pse_size; + } else { + sdio->sched.pse_data_quota -= pse_size; + sdio->sched.ple_data_quota -= ple_size; + } +} + +static int __mt76s_xmit_queue(struct mt76_dev *dev, u8 *data, int len) +{ + struct mt76_sdio *sdio = &dev->sdio; + int err; + + if (len > sdio->func->cur_blksize) + len = roundup(len, sdio->func->cur_blksize); + + err = sdio_writesb(sdio->func, MCR_WTDR1, data, len); + if (err) + dev_err(dev->dev, "sdio write failed: %d\n", err); + + return err; +} + +static int mt76s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q) +{ + int qid, err, nframes = 0, len = 0, pse_sz = 0, ple_sz = 0; + bool mcu = q == dev->q_mcu[MT_MCUQ_WM]; + struct mt76_sdio *sdio = &dev->sdio; + u8 pad; + + qid = mcu ? ARRAY_SIZE(sdio->xmit_buf) - 1 : q->qid; + while (q->first != q->head) { + struct mt76_queue_entry *e = &q->entry[q->first]; + struct sk_buff *iter; + + smp_rmb(); + + if (!test_bit(MT76_STATE_MCU_RUNNING, &dev->phy.state)) { + __skb_put_zero(e->skb, 4); + err = __mt76s_xmit_queue(dev, e->skb->data, + e->skb->len); + if (err) + return err; + + goto next; + } + + pad = roundup(e->skb->len, 4) - e->skb->len; + if (len + e->skb->len + pad + 4 > MT76S_XMIT_BUF_SZ) + break; + + if (mt76s_tx_pick_quota(sdio, mcu, e->buf_sz, &pse_sz, + &ple_sz)) + break; + + memcpy(sdio->xmit_buf[qid] + len, e->skb->data, + skb_headlen(e->skb)); + len += skb_headlen(e->skb); + nframes++; + + skb_walk_frags(e->skb, iter) { + memcpy(sdio->xmit_buf[qid] + len, iter->data, + iter->len); + len += iter->len; + nframes++; + } + + if (unlikely(pad)) { + memset(sdio->xmit_buf[qid] + len, 0, pad); + len += pad; + } +next: + q->first = (q->first + 1) % q->ndesc; + e->done = true; + } + + if (nframes) { + memset(sdio->xmit_buf[qid] + len, 0, 4); + err = __mt76s_xmit_queue(dev, sdio->xmit_buf[qid], len + 4); + if (err) + return err; + } + mt76s_tx_update_quota(sdio, mcu, pse_sz, ple_sz); + + mt76_worker_schedule(&sdio->status_worker); + + return nframes; +} + +void mt76s_txrx_worker(struct mt76_sdio *sdio) +{ + struct mt76_dev *dev = container_of(sdio, struct mt76_dev, sdio); + int i, nframes, ret; + + /* disable interrupt */ + sdio_claim_host(sdio->func); + sdio_writel(sdio->func, WHLPCR_INT_EN_CLR, MCR_WHLPCR, NULL); + + do { + nframes = 0; + + /* tx */ + for (i = 0; i <= MT_TXQ_PSD; i++) { + ret = mt76s_tx_run_queue(dev, dev->phy.q_tx[i]); + if (ret > 0) + nframes += ret; + } + ret = mt76s_tx_run_queue(dev, dev->q_mcu[MT_MCUQ_WM]); + if (ret > 0) + nframes += ret; + + /* rx */ + ret = mt76s_rx_handler(dev); + if (ret > 0) + nframes += ret; + } while (nframes > 0); + + /* enable interrupt */ + sdio_writel(sdio->func, WHLPCR_INT_EN_SET, MCR_WHLPCR, NULL); + sdio_release_host(sdio->func); +} +EXPORT_SYMBOL_GPL(mt76s_txrx_worker); + +void mt76s_sdio_irq(struct sdio_func *func) +{ + struct mt76_dev *dev = sdio_get_drvdata(func); + struct mt76_sdio *sdio = &dev->sdio; + + if (!test_bit(MT76_STATE_INITIALIZED, &dev->phy.state)) + return; + + mt76_worker_schedule(&sdio->txrx_worker); +} +EXPORT_SYMBOL_GPL(mt76s_sdio_irq); -- cgit v1.2.3