From 67ac88ff10fa4253f716cb98ec43303f70711591 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 4 Jul 2012 14:14:16 -0500 Subject: i2c: iop3xx: clean-up trailing whitespace Remove a bunch of trailing whitespace. No functional changes. Signed-off-by: Rob Herring Cc: "Jean Delvare (PC drivers, core)" Cc: "Ben Dooks (embedded platforms)" Cc: "Wolfram Sang (embedded platforms)" Cc: linux-i2c@vger.kernel.org --- drivers/i2c/busses/i2c-iop3xx.c | 112 ++++++++++++++++++++-------------------- 1 file changed, 56 insertions(+), 56 deletions(-) diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c index 93f147a96b62..567d87389e3c 100644 --- a/drivers/i2c/busses/i2c-iop3xx.c +++ b/drivers/i2c/busses/i2c-iop3xx.c @@ -4,13 +4,13 @@ /* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd * * - * With acknowledgements to i2c-algo-ibm_ocp.c by + * With acknowledgements to i2c-algo-ibm_ocp.c by * Ian DaSilva, MontaVista Software, Inc. idasilva@mvista.com * * And i2c-algo-pcf.c, which was created by Simon G. Vogl and Hans Berglund: * * Copyright (C) 1995-1997 Simon G. Vogl, 1998-2000 Hans Berglund - * + * * And which acknowledged Kyösti Mälkki , * Frodo Looijaard , Martin Bailey * @@ -45,8 +45,8 @@ /* global unit counter */ static int i2c_id; -static inline unsigned char -iic_cook_addr(struct i2c_msg *msg) +static inline unsigned char +iic_cook_addr(struct i2c_msg *msg) { unsigned char addr; @@ -55,24 +55,24 @@ iic_cook_addr(struct i2c_msg *msg) if (msg->flags & I2C_M_RD) addr |= 1; - return addr; + return addr; } -static void +static void iop3xx_i2c_reset(struct i2c_algo_iop3xx_data *iop3xx_adap) { /* Follows devman 9.3 */ __raw_writel(IOP3XX_ICR_UNIT_RESET, iop3xx_adap->ioaddr + CR_OFFSET); __raw_writel(IOP3XX_ISR_CLEARBITS, iop3xx_adap->ioaddr + SR_OFFSET); __raw_writel(0, iop3xx_adap->ioaddr + CR_OFFSET); -} +} -static void +static void iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) { u32 cr = IOP3XX_ICR_GCD | IOP3XX_ICR_SCLEN | IOP3XX_ICR_UE; - /* + /* * Every time unit enable is asserted, GPOD needs to be cleared * on IOP3XX to avoid data corruption on the bus. */ @@ -86,7 +86,7 @@ iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) } #endif /* NB SR bits not same position as CR IE bits :-( */ - iop3xx_adap->SR_enabled = + iop3xx_adap->SR_enabled = IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD | IOP3XX_ISR_RXFULL | IOP3XX_ISR_TXEMPTY; @@ -96,23 +96,23 @@ iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); } -static void +static void iop3xx_i2c_transaction_cleanup(struct i2c_algo_iop3xx_data *iop3xx_adap) { unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); - - cr &= ~(IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE | + + cr &= ~(IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE | IOP3XX_ICR_MSTOP | IOP3XX_ICR_SCLEN); __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); } -/* - * NB: the handler has to clear the source of the interrupt! +/* + * NB: the handler has to clear the source of the interrupt! * Then it passes the SR flags of interest to BH via adap data */ -static irqreturn_t -iop3xx_i2c_irq_handler(int this_irq, void *dev_id) +static irqreturn_t +iop3xx_i2c_irq_handler(int this_irq, void *dev_id) { struct i2c_algo_iop3xx_data *iop3xx_adap = dev_id; u32 sr = __raw_readl(iop3xx_adap->ioaddr + SR_OFFSET); @@ -126,7 +126,7 @@ iop3xx_i2c_irq_handler(int this_irq, void *dev_id) } /* check all error conditions, clear them , report most important */ -static int +static int iop3xx_i2c_error(u32 sr) { int rc = 0; @@ -135,12 +135,12 @@ iop3xx_i2c_error(u32 sr) if ( !rc ) rc = -I2C_ERR_BERR; } if ((sr & IOP3XX_ISR_ALD)) { - if ( !rc ) rc = -I2C_ERR_ALD; + if ( !rc ) rc = -I2C_ERR_ALD; } - return rc; + return rc; } -static inline u32 +static inline u32 iop3xx_i2c_get_srstat(struct i2c_algo_iop3xx_data *iop3xx_adap) { unsigned long flags; @@ -161,8 +161,8 @@ iop3xx_i2c_get_srstat(struct i2c_algo_iop3xx_data *iop3xx_adap) typedef int (* compare_func)(unsigned test, unsigned mask); /* returns 1 on correct comparison */ -static int -iop3xx_i2c_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, +static int +iop3xx_i2c_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, unsigned flags, unsigned* status, compare_func compare) { @@ -192,47 +192,47 @@ iop3xx_i2c_wait_event(struct i2c_algo_iop3xx_data *iop3xx_adap, } /* - * Concrete compare_funcs + * Concrete compare_funcs */ -static int +static int all_bits_clear(unsigned test, unsigned mask) { return (test & mask) == 0; } -static int +static int any_bits_set(unsigned test, unsigned mask) { return (test & mask) != 0; } -static int +static int iop3xx_i2c_wait_tx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) { - return iop3xx_i2c_wait_event( - iop3xx_adap, + return iop3xx_i2c_wait_event( + iop3xx_adap, IOP3XX_ISR_TXEMPTY | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, status, any_bits_set); } -static int +static int iop3xx_i2c_wait_rx_done(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) { - return iop3xx_i2c_wait_event( - iop3xx_adap, + return iop3xx_i2c_wait_event( + iop3xx_adap, IOP3XX_ISR_RXFULL | IOP3XX_ISR_ALD | IOP3XX_ISR_BERRD, status, any_bits_set); } -static int +static int iop3xx_i2c_wait_idle(struct i2c_algo_iop3xx_data *iop3xx_adap, int *status) { - return iop3xx_i2c_wait_event( + return iop3xx_i2c_wait_event( iop3xx_adap, IOP3XX_ISR_UNITBUSY, status, all_bits_clear); } -static int -iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, +static int +iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, struct i2c_msg* msg) { unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); @@ -247,7 +247,7 @@ iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, } __raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET); - + cr &= ~(IOP3XX_ICR_MSTOP | IOP3XX_ICR_NACK); cr |= IOP3XX_ICR_MSTART | IOP3XX_ICR_TBYTE; @@ -257,8 +257,8 @@ iop3xx_i2c_send_target_addr(struct i2c_algo_iop3xx_data *iop3xx_adap, return rc; } -static int -iop3xx_i2c_write_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char byte, +static int +iop3xx_i2c_write_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char byte, int stop) { unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); @@ -277,10 +277,10 @@ iop3xx_i2c_write_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char byte, rc = iop3xx_i2c_wait_tx_done(iop3xx_adap, &status); return rc; -} +} -static int -iop3xx_i2c_read_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char* byte, +static int +iop3xx_i2c_read_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char* byte, int stop) { unsigned long cr = __raw_readl(iop3xx_adap->ioaddr + CR_OFFSET); @@ -304,19 +304,19 @@ iop3xx_i2c_read_byte(struct i2c_algo_iop3xx_data *iop3xx_adap, char* byte, return rc; } -static int +static int iop3xx_i2c_writebytes(struct i2c_adapter *i2c_adap, const char *buf, int count) { struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; int ii; int rc = 0; - for (ii = 0; rc == 0 && ii != count; ++ii) + for (ii = 0; rc == 0 && ii != count; ++ii) rc = iop3xx_i2c_write_byte(iop3xx_adap, buf[ii], ii==count-1); return rc; } -static int +static int iop3xx_i2c_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count) { struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; @@ -325,7 +325,7 @@ iop3xx_i2c_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count) for (ii = 0; rc == 0 && ii != count; ++ii) rc = iop3xx_i2c_read_byte(iop3xx_adap, &buf[ii], ii==count-1); - + return rc; } @@ -336,8 +336,8 @@ iop3xx_i2c_readbytes(struct i2c_adapter *i2c_adap, char *buf, int count) * Each transfer (i.e. a read or a write) is separated by a repeated start * condition. */ -static int -iop3xx_i2c_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg* pmsg) +static int +iop3xx_i2c_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg* pmsg) { struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; int rc; @@ -357,8 +357,8 @@ iop3xx_i2c_handle_msg(struct i2c_adapter *i2c_adap, struct i2c_msg* pmsg) /* * master_xfer() - main read/write entry */ -static int -iop3xx_i2c_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, +static int +iop3xx_i2c_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) { struct i2c_algo_iop3xx_data *iop3xx_adap = i2c_adap->algo_data; @@ -375,14 +375,14 @@ iop3xx_i2c_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, } iop3xx_i2c_transaction_cleanup(iop3xx_adap); - + if(ret) return ret; - return im; + return im; } -static u32 +static u32 iop3xx_i2c_func(struct i2c_adapter *adap) { return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; @@ -393,11 +393,11 @@ static const struct i2c_algorithm iop3xx_i2c_algo = { .functionality = iop3xx_i2c_func, }; -static int +static int iop3xx_i2c_remove(struct platform_device *pdev) { struct i2c_adapter *padapter = platform_get_drvdata(pdev); - struct i2c_algo_iop3xx_data *adapter_data = + struct i2c_algo_iop3xx_data *adapter_data = (struct i2c_algo_iop3xx_data *)padapter->algo_data; struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); unsigned long cr = __raw_readl(adapter_data->ioaddr + CR_OFFSET); @@ -419,7 +419,7 @@ iop3xx_i2c_remove(struct platform_device *pdev) return 0; } -static int +static int iop3xx_i2c_probe(struct platform_device *pdev) { struct resource *res; -- cgit v1.2.3 From 701eb2647d7986b42fa973990649a83b3e15e8eb Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 4 Jul 2012 14:16:12 -0500 Subject: i2c: iop3xx: use standard gpiolib functions Instead of using the custom iop3xx gpio functions, use the gpiolib variants. This should be functionally the same since the gpiolib just calls the iop3xx gpio functions. This is needed in preparation of removing iop3xx mach/io.h headers. Signed-off-by: Rob Herring Cc: "Jean Delvare (PC drivers, core)" Cc: "Ben Dooks (embedded platforms)" Cc: "Wolfram Sang (embedded platforms)" Cc: linux-i2c@vger.kernel.org --- drivers/i2c/busses/i2c-iop3xx.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/i2c/busses/i2c-iop3xx.c b/drivers/i2c/busses/i2c-iop3xx.c index 567d87389e3c..2f99613fd677 100644 --- a/drivers/i2c/busses/i2c-iop3xx.c +++ b/drivers/i2c/busses/i2c-iop3xx.c @@ -39,6 +39,7 @@ #include #include #include +#include #include "i2c-iop3xx.h" @@ -78,11 +79,11 @@ iop3xx_i2c_enable(struct i2c_algo_iop3xx_data *iop3xx_adap) */ #if defined(CONFIG_ARCH_IOP32X) || defined(CONFIG_ARCH_IOP33X) if (iop3xx_adap->id == 0) { - gpio_line_set(IOP3XX_GPIO_LINE(7), GPIO_LOW); - gpio_line_set(IOP3XX_GPIO_LINE(6), GPIO_LOW); + gpio_set_value(7, 0); + gpio_set_value(6, 0); } else { - gpio_line_set(IOP3XX_GPIO_LINE(5), GPIO_LOW); - gpio_line_set(IOP3XX_GPIO_LINE(4), GPIO_LOW); + gpio_set_value(5, 0); + gpio_set_value(4, 0); } #endif /* NB SR bits not same position as CR IE bits :-( */ -- cgit v1.2.3 From c2794437091a4fda72c4a4f3567dd728dcc0c3c9 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 29 Feb 2012 18:10:58 -0600 Subject: ARM: Add fixed PCI i/o mapping This adds a fixed virtual mapping for PCI i/o addresses. The mapping is located at the last 2MB of vmalloc region (0xfee00000-0xff000000). 2MB is used to align with PMD size, but IO_SPACE_LIMIT is 1MB. The space is reserved after .map_io and can be mapped at any time later with pci_ioremap_io. Platforms which need early i/o mapping (e.g. for vga console) can call pci_map_io_early in their .map_io function. This has changed completely from the 1st implementation which only supported creating the static mapping at .map_io. Signed-off-by: Rob Herring Cc: Russell King Acked-by: Nicolas Pitre --- Documentation/arm/memory.txt | 3 +++ arch/arm/include/asm/io.h | 8 ++++++ arch/arm/include/asm/mach/map.h | 8 ++++++ arch/arm/include/asm/mach/pci.h | 10 ++++++++ arch/arm/kernel/bios32.c | 13 ++++++++++ arch/arm/mm/ioremap.c | 14 +++++++++++ arch/arm/mm/mmu.c | 54 ++++++++++++++++++++++++++++++++--------- 7 files changed, 99 insertions(+), 11 deletions(-) diff --git a/Documentation/arm/memory.txt b/Documentation/arm/memory.txt index 208a2d465b92..4bfb9ffbdbc1 100644 --- a/Documentation/arm/memory.txt +++ b/Documentation/arm/memory.txt @@ -51,6 +51,9 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned ff000000 ffbfffff Reserved for future expansion of DMA mapping region. +fee00000 feffffff Mapping of PCI I/O space. This is a static + mapping within the vmalloc space. + VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space. Memory returned by vmalloc/ioremap will be dynamically placed in this region. diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 815c669fec0a..8f4db67533e5 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -113,11 +113,19 @@ static inline void __iomem *__typesafe_io(unsigned long addr) #define __iowmb() do { } while (0) #endif +/* PCI fixed i/o mapping */ +#define PCI_IO_VIRT_BASE 0xfee00000 + +extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr); + /* * Now, pick up the machine-defined IO definitions */ #ifdef CONFIG_NEED_MACH_IO_H #include +#elif defined(CONFIG_PCI) +#define IO_SPACE_LIMIT ((resource_size_t)0xfffff) +#define __io(a) __typesafe_io(PCI_IO_VIRT_BASE + ((a) & IO_SPACE_LIMIT)) #else #define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT) #endif diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h index a6efcdd6fd25..195ac2f9d3d3 100644 --- a/arch/arm/include/asm/mach/map.h +++ b/arch/arm/include/asm/mach/map.h @@ -9,6 +9,9 @@ * * Page table mapping constructs and function prototypes */ +#ifndef __ASM_MACH_MAP_H +#define __ASM_MACH_MAP_H + #include struct map_desc { @@ -34,6 +37,8 @@ struct map_desc { #ifdef CONFIG_MMU extern void iotable_init(struct map_desc *, int); +extern void vm_reserve_area_early(unsigned long addr, unsigned long size, + void *caller); struct mem_type; extern const struct mem_type *get_mem_type(unsigned int type); @@ -44,4 +49,7 @@ extern int ioremap_page(unsigned long virt, unsigned long phys, const struct mem_type *mtype); #else #define iotable_init(map,num) do { } while (0) +#define vm_reserve_area_early(a,s,c) do { } while (0) +#endif + #endif diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h index 26c511fddf8f..df818876fa31 100644 --- a/arch/arm/include/asm/mach/pci.h +++ b/arch/arm/include/asm/mach/pci.h @@ -11,6 +11,7 @@ #ifndef __ASM_MACH_PCI_H #define __ASM_MACH_PCI_H + struct pci_sys_data; struct pci_ops; struct pci_bus; @@ -54,6 +55,15 @@ struct pci_sys_data { */ void pci_common_init(struct hw_pci *); +/* + * Setup early fixed I/O mapping. + */ +#if defined(CONFIG_PCI) +extern void pci_map_io_early(unsigned long pfn); +#else +static inline void pci_map_io_early(unsigned long pfn) {} +#endif + /* * PCI controllers */ diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index 25552508c3fd..c3165f0fef63 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -13,6 +13,7 @@ #include #include +#include #include static int debug_pci; @@ -627,3 +628,15 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, return 0; } + +void __init pci_map_io_early(unsigned long pfn) +{ + struct map_desc pci_io_desc = { + .virtual = PCI_IO_VIRT_BASE, + .type = MT_DEVICE, + .length = SZ_64K, + }; + + pci_io_desc.pfn = pfn; + iotable_init(&pci_io_desc, 1); +} diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 4f55f5062ab7..8727802f8661 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c @@ -36,6 +36,7 @@ #include #include +#include #include "mm.h" int ioremap_page(unsigned long virt, unsigned long phys, @@ -383,3 +384,16 @@ void __arm_iounmap(volatile void __iomem *io_addr) arch_iounmap(io_addr); } EXPORT_SYMBOL(__arm_iounmap); + +#ifdef CONFIG_PCI +int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr) +{ + BUG_ON(offset + SZ_64K > IO_SPACE_LIMIT); + + return ioremap_page_range(PCI_IO_VIRT_BASE + offset, + PCI_IO_VIRT_BASE + offset + SZ_64K, + phys_addr, + __pgprot(get_mem_type(MT_DEVICE)->prot_pte)); +} +EXPORT_SYMBOL_GPL(pci_ioremap_io); +#endif diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index cf4528d51774..714a7fd99ca3 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -31,6 +31,7 @@ #include #include +#include #include "mm.h" @@ -216,7 +217,7 @@ static struct mem_type mem_types[] = { .prot_l1 = PMD_TYPE_TABLE, .prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB, .domain = DOMAIN_IO, - }, + }, [MT_DEVICE_WC] = { /* ioremap_wc */ .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC, .prot_l1 = PMD_TYPE_TABLE, @@ -783,14 +784,27 @@ void __init iotable_init(struct map_desc *io_desc, int nr) create_mapping(md); vm->addr = (void *)(md->virtual & PAGE_MASK); vm->size = PAGE_ALIGN(md->length + (md->virtual & ~PAGE_MASK)); - vm->phys_addr = __pfn_to_phys(md->pfn); - vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; + vm->phys_addr = __pfn_to_phys(md->pfn); + vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; vm->flags |= VM_ARM_MTYPE(md->type); vm->caller = iotable_init; vm_area_add_early(vm++); } } +void __init vm_reserve_area_early(unsigned long addr, unsigned long size, + void *caller) +{ + struct vm_struct *vm; + + vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm)); + vm->addr = (void *)addr; + vm->size = size; + vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; + vm->caller = caller; + vm_area_add_early(vm); +} + #ifndef CONFIG_ARM_LPAE /* @@ -808,14 +822,7 @@ void __init iotable_init(struct map_desc *io_desc, int nr) static void __init pmd_empty_section_gap(unsigned long addr) { - struct vm_struct *vm; - - vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm)); - vm->addr = (void *)addr; - vm->size = SECTION_SIZE; - vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING; - vm->caller = pmd_empty_section_gap; - vm_area_add_early(vm); + vm_reserve_area_early(addr, SECTION_SIZE, pmd_empty_section_gap); } static void __init fill_pmd_gaps(void) @@ -864,6 +871,28 @@ static void __init fill_pmd_gaps(void) #define fill_pmd_gaps() do { } while (0) #endif +#if defined(CONFIG_PCI) && !defined(CONFIG_NEED_MACH_IO_H) +static void __init pci_reserve_io(void) +{ + struct vm_struct *vm; + unsigned long addr; + + /* we're still single threaded hence no lock needed here */ + for (vm = vmlist; vm; vm = vm->next) { + if (!(vm->flags & VM_ARM_STATIC_MAPPING)) + continue; + addr = (unsigned long)vm->addr; + addr &= ~(SZ_2M - 1); + if (addr == PCI_IO_VIRT_BASE) + return; + + } + vm_reserve_area_early(PCI_IO_VIRT_BASE, SZ_2M, pci_reserve_io); +} +#else +#define pci_reserve_io() do { } while (0) +#endif + static void * __initdata vmalloc_min = (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET); @@ -1147,6 +1176,9 @@ static void __init devicemaps_init(struct machine_desc *mdesc) mdesc->map_io(); fill_pmd_gaps(); + /* Reserve fixed i/o space in VMALLOC region */ + pci_reserve_io(); + /* * Finally flush the caches and tlb to ensure that we're in a * consistent state wrt the writebuffer. This also ensures that -- cgit v1.2.3 From 3c5d1699887bfcd17e6d9842ba7e2b3234e665db Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 9 Jul 2012 21:59:03 -0500 Subject: ARM: move PCI i/o resource setup into common code With consolidation of the PCI i/o mappings, the i/o space is being set to start at a PCI bus addr of 0x0 and fixed to 64K per bus. In this case the core ARM PCI setup code can setup the i/o resource. Currently, the resource is only setup if the platform did not setup an i/o resource. Signed-off-by: Rob Herring Reviewed-by: Arnd Bergmann --- arch/arm/include/asm/mach/pci.h | 3 +++ arch/arm/kernel/bios32.c | 41 ++++++++++++++++++++++++++++++++++++----- 2 files changed, 39 insertions(+), 5 deletions(-) diff --git a/arch/arm/include/asm/mach/pci.h b/arch/arm/include/asm/mach/pci.h index df818876fa31..db9fedb57f2c 100644 --- a/arch/arm/include/asm/mach/pci.h +++ b/arch/arm/include/asm/mach/pci.h @@ -11,6 +11,7 @@ #ifndef __ASM_MACH_PCI_H #define __ASM_MACH_PCI_H +#include struct pci_sys_data; struct pci_ops; @@ -43,6 +44,8 @@ struct pci_sys_data { unsigned long io_offset; /* bus->cpu IO mapping offset */ struct pci_bus *bus; /* PCI bus */ struct list_head resources; /* root bus resources (apertures) */ + struct resource io_res; + char io_res_name[12]; /* Bridge swizzling */ u8 (*swizzle)(struct pci_dev *, u8 *); /* IRQ mapping */ diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index c3165f0fef63..036f7ea5812a 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -424,6 +424,38 @@ static int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) return irq; } +static int __init pcibios_init_resources(int busnr, struct pci_sys_data *sys) +{ + int ret; + struct pci_host_bridge_window *window; + + if (list_empty(&sys->resources)) { + pci_add_resource_offset(&sys->resources, + &iomem_resource, sys->mem_offset); + } + + list_for_each_entry(window, &sys->resources, list) { + if (resource_type(window->res) == IORESOURCE_IO) + return 0; + } + + sys->io_res.start = (busnr * SZ_64K) ? : pcibios_min_io; + sys->io_res.end = (busnr + 1) * SZ_64K - 1; + sys->io_res.flags = IORESOURCE_IO; + sys->io_res.name = sys->io_res_name; + sprintf(sys->io_res_name, "PCI%d I/O", busnr); + + ret = request_resource(&ioport_resource, &sys->io_res); + if (ret) { + pr_err("PCI: unable to allocate I/O port region (%d)\n", ret); + return ret; + } + pci_add_resource_offset(&sys->resources, &sys->io_res, + sys->io_offset); + + return 0; +} + static void __init pcibios_init_hw(struct hw_pci *hw, struct list_head *head) { struct pci_sys_data *sys = NULL; @@ -446,11 +478,10 @@ static void __init pcibios_init_hw(struct hw_pci *hw, struct list_head *head) ret = hw->setup(nr, sys); if (ret > 0) { - if (list_empty(&sys->resources)) { - pci_add_resource_offset(&sys->resources, - &ioport_resource, sys->io_offset); - pci_add_resource_offset(&sys->resources, - &iomem_resource, sys->mem_offset); + ret = pcibios_init_resources(nr, sys); + if (ret) { + kfree(sys); + break; } if (hw->scan) -- cgit v1.2.3 From fe5051754263e7198aa8f415b2e1298c126adb4e Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sun, 8 Jul 2012 22:13:54 -0500 Subject: ARM: versatile: use fixed PCI i/o mapping Move versatile PCI to fixed i/o mapping and remove io.h. Signed-off-by: Rob Herring Cc: Russell King Cc: Linus Walleij Reviewed-by: Arnd Bergmann --- arch/arm/Kconfig | 1 - arch/arm/mach-versatile/core.c | 5 ----- arch/arm/mach-versatile/include/mach/hardware.h | 1 - arch/arm/mach-versatile/include/mach/io.h | 27 ------------------------- arch/arm/mach-versatile/pci.c | 22 ++++---------------- 5 files changed, 4 insertions(+), 52 deletions(-) delete mode 100644 arch/arm/mach-versatile/include/mach/io.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a91009c61870..8fb7e4af28ed 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -293,7 +293,6 @@ config ARCH_VERSATILE select ICST select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB - select NEED_MACH_IO_H if PCI select PLAT_VERSATILE select PLAT_VERSATILE_CLCD select PLAT_VERSATILE_FPGA_IRQ diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index cd8ea3588f93..ca7902c6ed18 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -169,11 +169,6 @@ static struct map_desc versatile_io_desc[] __initdata = { .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE), .length = VERSATILE_PCI_CFG_BASE_SIZE, .type = MT_DEVICE - }, { - .virtual = (unsigned long)VERSATILE_PCI_VIRT_MEM_BASE0, - .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0), - .length = IO_SPACE_LIMIT, - .type = MT_DEVICE }, #endif }; diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h index 408e58da46c6..3e5d425e2a92 100644 --- a/arch/arm/mach-versatile/include/mach/hardware.h +++ b/arch/arm/mach-versatile/include/mach/hardware.h @@ -29,7 +29,6 @@ */ #define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul #define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul -#define VERSATILE_PCI_VIRT_MEM_BASE0 (void __iomem *)PCIO_BASE /* macro to get at MMIO space when running virtually */ #define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h deleted file mode 100644 index 0406513be7d8..000000000000 --- a/arch/arm/mach-versatile/include/mach/io.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * arch/arm/mach-versatile/include/mach/io.h - * - * Copyright (C) 2003 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define PCIO_BASE 0xeb000000ul - -#define __io(a) ((a) + PCIO_BASE) - -#endif diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c index e95bf84cc837..2f84f4094f13 100644 --- a/arch/arm/mach-versatile/pci.c +++ b/arch/arm/mach-versatile/pci.c @@ -169,13 +169,6 @@ static struct pci_ops pci_versatile_ops = { .write = versatile_write_config, }; -static struct resource io_port = { - .name = "PCI", - .start = 0, - .end = IO_SPACE_LIMIT, - .flags = IORESOURCE_IO, -}; - static struct resource io_mem = { .name = "PCI I/O space", .start = VERSATILE_PCI_MEM_BASE0, @@ -207,12 +200,6 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys) "memory region (%d)\n", ret); goto out; } - ret = request_resource(&ioport_resource, &io_port); - if (ret) { - printk(KERN_ERR "PCI: unable to allocate I/O " - "port region (%d)\n", ret); - goto out; - } ret = request_resource(&iomem_resource, &non_mem); if (ret) { printk(KERN_ERR "PCI: unable to allocate non-prefetchable " @@ -227,11 +214,9 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys) } /* - * the IO resource for this bus * the mem resource for this bus * the prefetch mem resource for this bus */ - pci_add_resource_offset(&sys->resources, &io_port, sys->io_offset); pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset); pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset); @@ -260,9 +245,11 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys) goto out; } + ret = pci_ioremap_io(0, VERSATILE_PCI_MEM_BASE0); + if (ret) + goto out; + if (nr == 0) { - sys->mem_offset = 0; - sys->io_offset = 0; ret = pci_versatile_setup_resources(sys); if (ret < 0) { printk("pci_versatile_setup: resources... oops?\n"); @@ -319,7 +306,6 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys) void __init pci_versatile_preinit(void) { - pcibios_min_io = 0x44000000; pcibios_min_mem = 0x50000000; __raw_writel(VERSATILE_PCI_MEM_BASE0 >> 28, PCI_IMAP0); -- cgit v1.2.3 From d94c7a04b84e825b7cdeb112a11935ec0e70afd7 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 13 Jul 2012 16:22:24 -0500 Subject: ARM: tegra: use fixed PCI i/o mapping Move tegra PCI to fixed i/o mapping and remove io.h. Signed-off-by: Rob Herring Cc: Colin Cross Cc: Olof Johansson Acked-by: Stephen Warren Reviewed-by: Arnd Bergmann --- arch/arm/Kconfig | 1 - arch/arm/mach-tegra/include/mach/io.h | 46 ---------------- arch/arm/mach-tegra/include/mach/iomap.h | 3 + arch/arm/mach-tegra/pcie.c | 95 ++++++++------------------------ 4 files changed, 25 insertions(+), 120 deletions(-) delete mode 100644 arch/arm/mach-tegra/include/mach/io.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 8fb7e4af28ed..ac446e3d802a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -644,7 +644,6 @@ config ARCH_TEGRA select HAVE_CLK select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 - select NEED_MACH_IO_H if PCI select ARCH_HAS_CPUFREQ help This enables support for NVIDIA Tegra based systems (Tegra APX, diff --git a/arch/arm/mach-tegra/include/mach/io.h b/arch/arm/mach-tegra/include/mach/io.h deleted file mode 100644 index fe700f9ce7dc..000000000000 --- a/arch/arm/mach-tegra/include/mach/io.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * arch/arm/mach-tegra/include/mach/io.h - * - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Colin Cross - * Erik Gilling - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#ifndef __MACH_TEGRA_IO_H -#define __MACH_TEGRA_IO_H - -#define IO_SPACE_LIMIT 0xffff - -#ifndef __ASSEMBLER__ - -#ifdef CONFIG_TEGRA_PCI -extern void __iomem *tegra_pcie_io_base; - -static inline void __iomem *__io(unsigned long addr) -{ - return tegra_pcie_io_base + (addr & IO_SPACE_LIMIT); -} -#else -static inline void __iomem *__io(unsigned long addr) -{ - return (void __iomem *)addr; -} -#endif - -#define __io(a) __io(a) - -#endif - -#endif diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index 7e76da73121c..fee3a94c4549 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -303,6 +303,9 @@ #define IO_APB_VIRT IOMEM(0xFE300000) #define IO_APB_SIZE SZ_1M +#define TEGRA_PCIE_BASE 0x80000000 +#define TEGRA_PCIE_IO_BASE (TEGRA_PCIE_BASE + SZ_4M) + #define IO_TO_VIRT_BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz))) #define IO_TO_VIRT_XLATE(p, pst, vst) (((p) - (pst) + (vst))) diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index 0e09137506ec..e483be8c6f04 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c @@ -171,8 +171,6 @@ static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE); * 0x90000000 - 0x9fffffff - non-prefetchable memory * 0xa0000000 - 0xbfffffff - prefetchable memory */ -#define TEGRA_PCIE_BASE 0x80000000 - #define PCIE_REGS_SZ SZ_16K #define PCIE_CFG_OFF PCIE_REGS_SZ #define PCIE_CFG_SZ SZ_1M @@ -180,8 +178,6 @@ static void __iomem *reg_pmc_base = IO_ADDRESS(TEGRA_PMC_BASE); #define PCIE_EXT_CFG_SZ SZ_1M #define PCIE_IOMAP_SZ (PCIE_REGS_SZ + PCIE_CFG_SZ + PCIE_EXT_CFG_SZ) -#define MMIO_BASE (TEGRA_PCIE_BASE + SZ_4M) -#define MMIO_SIZE SZ_64K #define MEM_BASE_0 (TEGRA_PCIE_BASE + SZ_256M) #define MEM_SIZE_0 SZ_128M #define MEM_BASE_1 (MEM_BASE_0 + MEM_SIZE_0) @@ -204,10 +200,9 @@ struct tegra_pcie_port { bool link_up; - char io_space_name[16]; char mem_space_name[16]; char prefetch_space_name[20]; - struct resource res[3]; + struct resource res[2]; }; struct tegra_pcie_info { @@ -223,17 +218,7 @@ struct tegra_pcie_info { struct clk *pll_e; }; -static struct tegra_pcie_info tegra_pcie = { - .res_mmio = { - .name = "PCI IO", - .start = MMIO_BASE, - .end = MMIO_BASE + MMIO_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -void __iomem *tegra_pcie_io_base; -EXPORT_SYMBOL(tegra_pcie_io_base); +static struct tegra_pcie_info tegra_pcie; static inline void afi_writel(u32 value, unsigned long offset) { @@ -391,24 +376,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys) pp = tegra_pcie.port + nr; pp->root_bus_nr = sys->busnr; - /* - * IORESOURCE_IO - */ - snprintf(pp->io_space_name, sizeof(pp->io_space_name), - "PCIe %d I/O", pp->index); - pp->io_space_name[sizeof(pp->io_space_name) - 1] = 0; - pp->res[0].name = pp->io_space_name; - if (pp->index == 0) { - pp->res[0].start = PCIBIOS_MIN_IO; - pp->res[0].end = pp->res[0].start + SZ_32K - 1; - } else { - pp->res[0].start = PCIBIOS_MIN_IO + SZ_32K; - pp->res[0].end = IO_SPACE_LIMIT; - } - pp->res[0].flags = IORESOURCE_IO; - if (request_resource(&ioport_resource, &pp->res[0])) - panic("Request PCIe IO resource failed\n"); - pci_add_resource_offset(&sys->resources, &pp->res[0], sys->io_offset); + pci_ioremap_io(nr * SZ_64K, TEGRA_PCIE_IO_BASE); /* * IORESOURCE_MEM @@ -416,18 +384,18 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys) snprintf(pp->mem_space_name, sizeof(pp->mem_space_name), "PCIe %d MEM", pp->index); pp->mem_space_name[sizeof(pp->mem_space_name) - 1] = 0; - pp->res[1].name = pp->mem_space_name; + pp->res[0].name = pp->mem_space_name; if (pp->index == 0) { - pp->res[1].start = MEM_BASE_0; - pp->res[1].end = pp->res[1].start + MEM_SIZE_0 - 1; + pp->res[0].start = MEM_BASE_0; + pp->res[0].end = pp->res[0].start + MEM_SIZE_0 - 1; } else { - pp->res[1].start = MEM_BASE_1; - pp->res[1].end = pp->res[1].start + MEM_SIZE_1 - 1; + pp->res[0].start = MEM_BASE_1; + pp->res[0].end = pp->res[0].start + MEM_SIZE_1 - 1; } - pp->res[1].flags = IORESOURCE_MEM; - if (request_resource(&iomem_resource, &pp->res[1])) + pp->res[0].flags = IORESOURCE_MEM; + if (request_resource(&iomem_resource, &pp->res[0])) panic("Request PCIe Memory resource failed\n"); - pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset); + pci_add_resource_offset(&sys->resources, &pp->res[0], sys->mem_offset); /* * IORESOURCE_MEM | IORESOURCE_PREFETCH @@ -435,18 +403,18 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys) snprintf(pp->prefetch_space_name, sizeof(pp->prefetch_space_name), "PCIe %d PREFETCH MEM", pp->index); pp->prefetch_space_name[sizeof(pp->prefetch_space_name) - 1] = 0; - pp->res[2].name = pp->prefetch_space_name; + pp->res[1].name = pp->prefetch_space_name; if (pp->index == 0) { - pp->res[2].start = PREFETCH_MEM_BASE_0; - pp->res[2].end = pp->res[2].start + PREFETCH_MEM_SIZE_0 - 1; + pp->res[1].start = PREFETCH_MEM_BASE_0; + pp->res[1].end = pp->res[1].start + PREFETCH_MEM_SIZE_0 - 1; } else { - pp->res[2].start = PREFETCH_MEM_BASE_1; - pp->res[2].end = pp->res[2].start + PREFETCH_MEM_SIZE_1 - 1; + pp->res[1].start = PREFETCH_MEM_BASE_1; + pp->res[1].end = pp->res[1].start + PREFETCH_MEM_SIZE_1 - 1; } - pp->res[2].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; - if (request_resource(&iomem_resource, &pp->res[2])) + pp->res[1].flags = IORESOURCE_MEM | IORESOURCE_PREFETCH; + if (request_resource(&iomem_resource, &pp->res[1])) panic("Request PCIe Prefetch Memory resource failed\n"); - pci_add_resource_offset(&sys->resources, &pp->res[2], sys->mem_offset); + pci_add_resource_offset(&sys->resources, &pp->res[1], sys->mem_offset); return 1; } @@ -541,8 +509,8 @@ static void tegra_pcie_setup_translations(void) /* Bar 2: downstream IO bar */ fpci_bar = ((__u32)0xfdfc << 16); - size = MMIO_SIZE; - axi_address = MMIO_BASE; + size = SZ_128K; + axi_address = TEGRA_PCIE_IO_BASE; afi_writel(axi_address, AFI_AXI_BAR2_START); afi_writel(size >> 12, AFI_AXI_BAR2_SZ); afi_writel(fpci_bar, AFI_FPCI_BAR2); @@ -776,7 +744,6 @@ static void tegra_pcie_clocks_put(void) static int __init tegra_pcie_get_resources(void) { - struct resource *res_mmio = &tegra_pcie.res_mmio; int err; err = tegra_pcie_clocks_get(); @@ -798,34 +765,16 @@ static int __init tegra_pcie_get_resources(void) goto err_map_reg; } - err = request_resource(&iomem_resource, res_mmio); - if (err) { - pr_err("PCIE: Failed to request resources: %d\n", err); - goto err_req_io; - } - - tegra_pcie_io_base = ioremap_nocache(res_mmio->start, - resource_size(res_mmio)); - if (tegra_pcie_io_base == NULL) { - pr_err("PCIE: Failed to map IO\n"); - err = -ENOMEM; - goto err_map_io; - } - err = request_irq(INT_PCIE_INTR, tegra_pcie_isr, IRQF_SHARED, "PCIE", &tegra_pcie); if (err) { pr_err("PCIE: Failed to register IRQ: %d\n", err); - goto err_irq; + goto err_req_io; } set_irq_flags(INT_PCIE_INTR, IRQF_VALID); return 0; -err_irq: - iounmap(tegra_pcie_io_base); -err_map_io: - release_resource(&tegra_pcie.res_mmio); err_req_io: iounmap(tegra_pcie.regs); err_map_reg: -- cgit v1.2.3 From 68ef63227b131a83732753f9fcd258319c37c1c3 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 13 Jul 2012 16:27:22 -0500 Subject: ARM: integrator: use fixed PCI i/o mapping Move integrator PCI to fixed i/o mapping and remove io.h. Signed-off-by: Rob Herring Cc: Russell King Cc: Linus Walleij Reviewed-by: Arnd Bergmann --- arch/arm/Kconfig | 1 - arch/arm/mach-integrator/include/mach/io.h | 33 ------------------------ arch/arm/mach-integrator/include/mach/platform.h | 4 +++ arch/arm/mach-integrator/integrator_ap.c | 9 +++---- arch/arm/mach-integrator/pci_v3.c | 4 --- 5 files changed, 7 insertions(+), 44 deletions(-) delete mode 100644 arch/arm/mach-integrator/include/mach/io.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ac446e3d802a..5d376283b7a4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -261,7 +261,6 @@ config ARCH_INTEGRATOR select GENERIC_CLOCKEVENTS select PLAT_VERSATILE select PLAT_VERSATILE_FPGA_IRQ - select NEED_MACH_IO_H select NEED_MACH_MEMORY_H select SPARSE_IRQ select MULTI_IRQ_HANDLER diff --git a/arch/arm/mach-integrator/include/mach/io.h b/arch/arm/mach-integrator/include/mach/io.h deleted file mode 100644 index 8de70de3dd0a..000000000000 --- a/arch/arm/mach-integrator/include/mach/io.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * arch/arm/mach-integrator/include/mach/io.h - * - * Copyright (C) 1999 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -/* - * WARNING: this has to mirror definitions in platform.h - */ -#define PCI_MEMORY_VADDR 0xe8000000 -#define PCI_CONFIG_VADDR 0xec000000 -#define PCI_V3_VADDR 0xed000000 -#define PCI_IO_VADDR 0xee000000 - -#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a))) - -#endif diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h index ec467baade09..4c0347526851 100644 --- a/arch/arm/mach-integrator/include/mach/platform.h +++ b/arch/arm/mach-integrator/include/mach/platform.h @@ -324,6 +324,10 @@ */ #define PHYS_PCI_V3_BASE 0x62000000 +#define PCI_MEMORY_VADDR 0xe8000000 +#define PCI_CONFIG_VADDR 0xec000000 +#define PCI_V3_VADDR 0xed000000 + /* ------------------------------------------------------------------------ * Integrator Interrupt Controllers * ------------------------------------------------------------------------ diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c index c857501c5783..fd3bdf8f7223 100644 --- a/arch/arm/mach-integrator/integrator_ap.c +++ b/arch/arm/mach-integrator/integrator_ap.c @@ -49,6 +49,7 @@ #include #include #include +#include #include #include @@ -72,7 +73,7 @@ * e8000000 40000000 PCI memory PHYS_PCI_MEM_BASE (max 512M) * ec000000 61000000 PCI config space PHYS_PCI_CONFIG_BASE (max 16M) * ed000000 62000000 PCI V3 regs PHYS_PCI_V3_BASE (max 64k) - * ee000000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M) + * fee00000 60000000 PCI IO PHYS_PCI_IO_BASE (max 16M) * ef000000 Cache flush * f1000000 10000000 Core module registers * f1100000 11000000 System controller registers @@ -146,11 +147,6 @@ static struct map_desc ap_io_desc[] __initdata = { .pfn = __phys_to_pfn(PHYS_PCI_V3_BASE), .length = SZ_64K, .type = MT_DEVICE - }, { - .virtual = PCI_IO_VADDR, - .pfn = __phys_to_pfn(PHYS_PCI_IO_BASE), - .length = SZ_64K, - .type = MT_DEVICE } }; @@ -158,6 +154,7 @@ static void __init ap_map_io(void) { iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc)); vga_base = PCI_MEMORY_VADDR; + pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE)); } #define INTEGRATOR_SC_VALID_INT 0x003fffff diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index b866880e82ac..3a1305ba9ac9 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -374,12 +374,9 @@ static int __init pci_v3_setup_resources(struct pci_sys_data *sys) } /* - * the IO resource for this bus * the mem resource for this bus * the prefetch mem resource for this bus */ - pci_add_resource_offset(&sys->resources, - &ioport_resource, sys->io_offset); pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset); pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset); @@ -498,7 +495,6 @@ void __init pci_v3_preinit(void) unsigned int temp; int ret; - pcibios_min_io = 0x6000; pcibios_min_mem = 0x00100000; /* -- cgit v1.2.3 From 29d396047939c559dc1fd42f2d43fd6006082b07 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 13 Jul 2012 16:27:43 -0500 Subject: ARM: integrator: remove trailing whitespace on pci_v3.c No functional changes. Signed-off-by: Rob Herring Reviewed-by: Arnd Bergmann --- arch/arm/mach-integrator/pci_v3.c | 46 +++++++++++++++++++-------------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index 3a1305ba9ac9..495f181fc937 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c @@ -41,61 +41,61 @@ /* * The V3 PCI interface chip in Integrator provides several windows from * local bus memory into the PCI memory areas. Unfortunately, there - * are not really enough windows for our usage, therefore we reuse + * are not really enough windows for our usage, therefore we reuse * one of the windows for access to PCI configuration space. The * memory map is as follows: - * + * * Local Bus Memory Usage - * + * * 40000000 - 4FFFFFFF PCI memory. 256M non-prefetchable * 50000000 - 5FFFFFFF PCI memory. 256M prefetchable * 60000000 - 60FFFFFF PCI IO. 16M * 61000000 - 61FFFFFF PCI Configuration. 16M - * + * * There are three V3 windows, each described by a pair of V3 registers. * These are LB_BASE0/LB_MAP0, LB_BASE1/LB_MAP1 and LB_BASE2/LB_MAP2. * Base0 and Base1 can be used for any type of PCI memory access. Base2 * can be used either for PCI I/O or for I20 accesses. By default, uHAL * uses this only for PCI IO space. - * + * * Normally these spaces are mapped using the following base registers: - * + * * Usage Local Bus Memory Base/Map registers used - * + * * Mem 40000000 - 4FFFFFFF LB_BASE0/LB_MAP0 * Mem 50000000 - 5FFFFFFF LB_BASE1/LB_MAP1 * IO 60000000 - 60FFFFFF LB_BASE2/LB_MAP2 * Cfg 61000000 - 61FFFFFF - * + * * This means that I20 and PCI configuration space accesses will fail. - * When PCI configuration accesses are needed (via the uHAL PCI + * When PCI configuration accesses are needed (via the uHAL PCI * configuration space primitives) we must remap the spaces as follows: - * + * * Usage Local Bus Memory Base/Map registers used - * + * * Mem 40000000 - 4FFFFFFF LB_BASE0/LB_MAP0 * Mem 50000000 - 5FFFFFFF LB_BASE0/LB_MAP0 * IO 60000000 - 60FFFFFF LB_BASE2/LB_MAP2 * Cfg 61000000 - 61FFFFFF LB_BASE1/LB_MAP1 - * + * * To make this work, the code depends on overlapping windows working. - * The V3 chip translates an address by checking its range within + * The V3 chip translates an address by checking its range within * each of the BASE/MAP pairs in turn (in ascending register number * order). It will use the first matching pair. So, for example, * if the same address is mapped by both LB_BASE0/LB_MAP0 and - * LB_BASE1/LB_MAP1, the V3 will use the translation from + * LB_BASE1/LB_MAP1, the V3 will use the translation from * LB_BASE0/LB_MAP0. - * + * * To allow PCI Configuration space access, the code enlarges the * window mapped by LB_BASE0/LB_MAP0 from 256M to 512M. This occludes * the windows currently mapped by LB_BASE1/LB_MAP1 so that it can * be remapped for use by configuration cycles. - * - * At the end of the PCI Configuration space accesses, + * + * At the end of the PCI Configuration space accesses, * LB_BASE1/LB_MAP1 is reset to map PCI Memory. Finally the window * mapped by LB_BASE0/LB_MAP0 is reduced in size from 512M to 256M to * reveal the now restored LB_BASE1/LB_MAP1 window. - * + * * NOTE: We do not set up I2O mapping. I suspect that this is only * for an intelligent (target) device. Using I2O disables most of * the mappings into PCI memory. @@ -127,8 +127,8 @@ * * returns: configuration address to play on the PCI bus * - * To generate the appropriate PCI configuration cycles in the PCI - * configuration address space, you present the V3 with the following pattern + * To generate the appropriate PCI configuration cycles in the PCI + * configuration address space, you present the V3 with the following pattern * (which is very nearly a type 1 (except that the lower two bits are 00 and * not 01). In order for this mapping to work you need to set up one of * the local to PCI aperatures to 16Mbytes in length translating to @@ -138,7 +138,7 @@ * * Type 0: * - * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 + * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | | |D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|0| @@ -150,7 +150,7 @@ * * Type 1: * - * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 + * 3 3|3 3 2 2|2 2 2 2|2 2 2 2|1 1 1 1|1 1 1 1|1 1 * 3 2|1 0 9 8|7 6 5 4|3 2 1 0|9 8 7 6|5 4 3 2|1 0 9 8|7 6 5 4|3 2 1 0 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ * | | | | | | | | | | |B|B|B|B|B|B|B|B|D|D|D|D|D|F|F|F|R|R|R|R|R|R|0|1| @@ -161,7 +161,7 @@ * 15:11 Device number (5 bits) * 10:8 function number * 7:2 register number - * + * */ static DEFINE_RAW_SPINLOCK(v3_lock); -- cgit v1.2.3 From c04dc9a6bfe88b8c15bf8dd298fc24d6b9df3f22 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 28 Feb 2012 13:15:43 -0600 Subject: ARM: shark: use fixed PCI i/o mapping Convert shark to use the fixed i/o mapping and remove io.h. This shrinks the mapping from 256MB to 1MB, but nothing is using that much space AFAICT. Signed-off-by: Rob Herring Cc: Russell King Reviewed-by: Arnd Bergmann --- arch/arm/Kconfig | 1 - arch/arm/mach-shark/core.c | 18 ------------------ arch/arm/mach-shark/include/mach/debug-macro.S | 7 ++++--- arch/arm/mach-shark/include/mach/entry-macro.S | 3 ++- arch/arm/mach-shark/include/mach/io.h | 18 ------------------ arch/arm/mach-shark/pci.c | 5 +++++ 6 files changed, 11 insertions(+), 41 deletions(-) delete mode 100644 arch/arm/mach-shark/include/mach/io.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 5d376283b7a4..3dfc555219b5 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -869,7 +869,6 @@ config ARCH_SHARK select PCI select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H - select NEED_MACH_IO_H help Support for the StrongARM based Digital DNARD machine, also known as "Shark" (). diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index 2704bcd869cd..d35b94ef73b7 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c @@ -21,9 +21,6 @@ #include #include -#define IO_BASE 0xe0000000 -#define IO_SIZE 0x08000000 -#define IO_START 0x40000000 #define ROMCARD_SIZE 0x08000000 #define ROMCARD_START 0x10000000 @@ -104,20 +101,6 @@ arch_initcall(shark_init); extern void shark_init_irq(void); -static struct map_desc shark_io_desc[] __initdata = { - { - .virtual = IO_BASE, - .pfn = __phys_to_pfn(IO_START), - .length = IO_SIZE, - .type = MT_DEVICE - } -}; - -static void __init shark_map_io(void) -{ - iotable_init(shark_io_desc, ARRAY_SIZE(shark_io_desc)); -} - #define IRQ_TIMER 0 #define HZ_TIME ((1193180 + HZ/2) / HZ) @@ -158,7 +141,6 @@ static void shark_init_early(void) MACHINE_START(SHARK, "Shark") /* Maintainer: Alexander Schulz */ .atag_offset = 0x3000, - .map_io = shark_map_io, .init_early = shark_init_early, .init_irq = shark_init_irq, .timer = &shark_timer, diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S index 20eb2bf2a42b..d129119a3f69 100644 --- a/arch/arm/mach-shark/include/mach/debug-macro.S +++ b/arch/arm/mach-shark/include/mach/debug-macro.S @@ -12,9 +12,10 @@ */ .macro addruart, rp, rv, tmp - mov \rp, #0xe0000000 - orr \rp, \rp, #0x000003f8 - mov \rv, \rp + mov \rp, #0x3f8 + orr \rv, \rp, #0xfe000000 + orr \rv, \rv, #0x00e00000 + orr \rp, \rp, #0x40000000 .endm .macro senduart,rd,rx diff --git a/arch/arm/mach-shark/include/mach/entry-macro.S b/arch/arm/mach-shark/include/mach/entry-macro.S index 5901b09fc96a..c9e49f049532 100644 --- a/arch/arm/mach-shark/include/mach/entry-macro.S +++ b/arch/arm/mach-shark/include/mach/entry-macro.S @@ -8,7 +8,8 @@ * warranty of any kind, whether express or implied. */ .macro get_irqnr_preamble, base, tmp - mov \base, #0xe0000000 + mov \base, #0xfe000000 + orr \base, \base, #0x00e00000 .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp diff --git a/arch/arm/mach-shark/include/mach/io.h b/arch/arm/mach-shark/include/mach/io.h deleted file mode 100644 index 1a45fc01ff1d..000000000000 --- a/arch/arm/mach-shark/include/mach/io.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * arch/arm/mach-shark/include/mach/io.h - * - * by Alexander Schulz - * - * derived from: - * arch/arm/mach-ebsa110/include/mach/io.h - * Copyright (C) 1997,1998 Russell King - */ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#define IO_SPACE_LIMIT 0xffffffff - -#define __io(a) ((void __iomem *)(0xe0000000 + (a))) - -#endif diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c index 9089407d5326..b8b4ab323a3e 100644 --- a/arch/arm/mach-shark/pci.c +++ b/arch/arm/mach-shark/pci.c @@ -8,12 +8,15 @@ #include #include #include +#include #include