From f0c07993af0acf5545d5c1445798846565f4f147 Mon Sep 17 00:00:00 2001 From: Robin Gong Date: Mon, 26 Apr 2021 16:59:09 +0800 Subject: dmaengine: fsl-qdma: check dma_set_mask return value For fix below warning reported by static code analysis tool like Coverity from Synopsys: Signed-off-by: Robin Gong Addresses-Coverity-ID: 12285639 ("Unchecked return value") Link: https://lore.kernel.org/r/1619427549-20498-1-git-send-email-yibin.gong@nxp.com Signed-off-by: Vinod Koul --- drivers/dma/fsl-qdma.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/dma/fsl-qdma.c b/drivers/dma/fsl-qdma.c index ed2ab46b15e7..045ead46ec8f 100644 --- a/drivers/dma/fsl-qdma.c +++ b/drivers/dma/fsl-qdma.c @@ -1235,7 +1235,11 @@ static int fsl_qdma_probe(struct platform_device *pdev) fsl_qdma->dma_dev.device_synchronize = fsl_qdma_synchronize; fsl_qdma->dma_dev.device_terminate_all = fsl_qdma_terminate_all; - dma_set_mask(&pdev->dev, DMA_BIT_MASK(40)); + ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(40)); + if (ret) { + dev_err(&pdev->dev, "dma_set_mask failure.\n"); + return ret; + } platform_set_drvdata(pdev, fsl_qdma); -- cgit v1.2.3 From 58cb138e20296dffe3b2be2beb64e5aa22846b84 Mon Sep 17 00:00:00 2001 From: Jiapeng Chong Date: Thu, 6 May 2021 19:00:47 +0800 Subject: dmaengine: idxd: Remove redundant variable cdev_ctx Variable cdev_ctx is set to '&ictx[wq->idxd->data->type]' but this value is not used, hence it is a redundant assignment and can be removed. Clean up the following clang-analyzer warning: drivers/dma/idxd/cdev.c:300:2: warning: Value stored to 'cdev_ctx' is never read [clang-analyzer-deadcode.DeadStores]. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong Acked-by: Dave Jiang Link: https://lore.kernel.org/r/1620298847-33127-1-git-send-email-jiapeng.chong@linux.alibaba.com Signed-off-by: Vinod Koul --- drivers/dma/idxd/cdev.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/dma/idxd/cdev.c b/drivers/dma/idxd/cdev.c index 302cba5ff779..6c72089ca31a 100644 --- a/drivers/dma/idxd/cdev.c +++ b/drivers/dma/idxd/cdev.c @@ -295,9 +295,7 @@ int idxd_wq_add_cdev(struct idxd_wq *wq) void idxd_wq_del_cdev(struct idxd_wq *wq) { struct idxd_cdev *idxd_cdev; - struct idxd_cdev_context *cdev_ctx; - cdev_ctx = &ictx[wq->idxd->data->type]; idxd_cdev = wq->idxd_cdev; wq->idxd_cdev = NULL; cdev_device_del(&idxd_cdev->cdev, &idxd_cdev->dev); -- cgit v1.2.3 From 33f9f3c33e9336e5f49501c9632584c3d1f4f3a5 Mon Sep 17 00:00:00 2001 From: Dave Jiang Date: Sun, 9 May 2021 17:38:25 -0700 Subject: dmaengine: idxd: remove devm allocation for idxd->int_handles Allocation of idxd->int_handles was merged incorrectly for the 5.13 merge window. The devm_kcalloc should've been regular kcalloc due to devm_* removal series for the driver. Fixes: eb15e7154fbf ("dmaengine: idxd: add interrupt handle request and release support") Reported-by: Dan Carpenter Signed-off-by: Dave Jiang Link: https://lore.kernel.org/r/162060710518.130816.11349798049329202863.stgit@djiang5-desk3.ch.intel.com Signed-off-by: Vinod Koul --- drivers/dma/idxd/init.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c index 2a926bef87f2..21d3dcb1c0e3 100644 --- a/drivers/dma/idxd/init.c +++ b/drivers/dma/idxd/init.c @@ -311,7 +311,8 @@ static int idxd_setup_internals(struct idxd_device *idxd) init_waitqueue_head(&idxd->cmd_waitq); if (idxd->hw.cmd_cap & BIT(IDXD_CMD_REQUEST_INT_HANDLE)) { - idxd->int_handles = devm_kcalloc(dev, idxd->max_wqs, sizeof(int), GFP_KERNEL); + idxd->int_handles = kcalloc_node(idxd->max_wqs, sizeof(int), GFP_KERNEL, + dev_to_node(dev)); if (!idxd->int_handles) return -ENOMEM; } -- cgit v1.2.3 From 6f64aa5746d254f2b9b94b837b7862549f2565a0 Mon Sep 17 00:00:00 2001 From: Corentin Labbe Date: Fri, 30 Apr 2021 18:36:51 +0000 Subject: dt-bindings: dma: convert arm-pl08x to yaml Converts dma/arm-pl08x.txt to yaml. In the process, I add an example for the faraday variant. Signed-off-by: Corentin Labbe Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20210430183651.919317-1-clabbe@baylibre.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/dma/arm-pl08x.txt | 59 --------- .../devicetree/bindings/dma/arm-pl08x.yaml | 136 +++++++++++++++++++++ 2 files changed, 136 insertions(+), 59 deletions(-) delete mode 100644 Documentation/devicetree/bindings/dma/arm-pl08x.txt create mode 100644 Documentation/devicetree/bindings/dma/arm-pl08x.yaml diff --git a/Documentation/devicetree/bindings/dma/arm-pl08x.txt b/Documentation/devicetree/bindings/dma/arm-pl08x.txt deleted file mode 100644 index 0ba81f79266f..000000000000 --- a/Documentation/devicetree/bindings/dma/arm-pl08x.txt +++ /dev/null @@ -1,59 +0,0 @@ -* ARM PrimeCells PL080 and PL081 and derivatives DMA controller - -Required properties: -- compatible: "arm,pl080", "arm,primecell"; - "arm,pl081", "arm,primecell"; - "faraday,ftdmac020", "arm,primecell" -- arm,primecell-periphid: on the FTDMAC020 the primecell ID is not hard-coded - in the hardware and must be specified here as <0x0003b080>. This number - follows the PrimeCell standard numbering using the JEP106 vendor code 0x38 - for Faraday Technology. -- reg: Address range of the PL08x registers -- interrupt: The PL08x interrupt number -- clocks: The clock running the IP core clock -- clock-names: Must contain "apb_pclk" -- lli-bus-interface-ahb1: if AHB master 1 is eligible for fetching LLIs -- lli-bus-interface-ahb2: if AHB master 2 is eligible for fetching LLIs -- mem-bus-interface-ahb1: if AHB master 1 is eligible for fetching memory contents -- mem-bus-interface-ahb2: if AHB master 2 is eligible for fetching memory contents -- #dma-cells: must be <2>. First cell should contain the DMA request, - second cell should contain either 1 or 2 depending on - which AHB master that is used. - -Optional properties: -- dma-channels: contains the total number of DMA channels supported by the DMAC -- dma-requests: contains the total number of DMA requests supported by the DMAC -- memcpy-burst-size: the size of the bursts for memcpy: 1, 4, 8, 16, 32 - 64, 128 or 256 bytes are legal values -- memcpy-bus-width: the bus width used for memcpy in bits: 8, 16 or 32 are legal - values, the Faraday FTDMAC020 can also accept 64 bits - -Clients -Required properties: -- dmas: List of DMA controller phandle, request channel and AHB master id -- dma-names: Names of the aforementioned requested channels - -Example: - -dmac0: dma-controller@10130000 { - compatible = "arm,pl080", "arm,primecell"; - reg = <0x10130000 0x1000>; - interrupt-parent = <&vica>; - interrupts = <15>; - clocks = <&hclkdma0>; - clock-names = "apb_pclk"; - lli-bus-interface-ahb1; - lli-bus-interface-ahb2; - mem-bus-interface-ahb2; - memcpy-burst-size = <256>; - memcpy-bus-width = <32>; - #dma-cells = <2>; -}; - -device@40008000 { - ... - dmas = <&dmac0 0 2 - &dmac0 1 2>; - dma-names = "tx", "rx"; - ... -}; diff --git a/Documentation/devicetree/bindings/dma/arm-pl08x.yaml b/Documentation/devicetree/bindings/dma/arm-pl08x.yaml new file mode 100644 index 000000000000..3bd9eea543ca --- /dev/null +++ b/Documentation/devicetree/bindings/dma/arm-pl08x.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller + +maintainers: + - Vinod Koul + +allOf: + - $ref: "dma-controller.yaml#" + +# We need a select here so we don't match all nodes with 'arm,primecell' +select: + properties: + compatible: + contains: + enum: + - arm,pl080 + - arm,pl081 + required: + - compatible + +properties: + compatible: + oneOf: + - items: + - enum: + - arm,pl080 + - arm,pl081 + - const: arm,primecell + - items: + - const: faraday,ftdma020 + - const: arm,pl080 + - const: arm,primecell + + reg: + maxItems: 1 + description: Address range of the PL08x registers + + interrupts: + minItems: 1 + description: The PL08x interrupt number + + clocks: + minItems: 1 + description: The clock running the IP core clock + + clock-names: + maxItems: 1 + + lli-bus-interface-ahb1: + type: boolean + description: if AHB master 1 is eligible for fetching LLIs + + lli-bus-interface-ahb2: + type: boolean + description: if AHB master 2 is eligible for fetching LLIs + + mem-bus-interface-ahb1: + type: boolean + description: if AHB master 1 is eligible for fetching memory contents + + mem-bus-interface-ahb2: + type: boolean + description: if AHB master 2 is eligible for fetching memory contents + + memcpy-burst-size: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 1 + - 4 + - 8 + - 16 + - 32 + - 64 + - 128 + - 256 + description: the size of the bursts for memcpy + + memcpy-bus-width: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 8 + - 16 + - 32 + - 64 + description: bus width used for memcpy in bits. FTDMAC020 also accept 64 bits + +required: + - reg + - interrupts + - clocks + - clock-names + - "#dma-cells" + +unevaluatedProperties: false + +examples: + - | + dmac0: dma-controller@10130000 { + compatible = "arm,pl080", "arm,primecell"; + reg = <0x10130000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <15>; + clocks = <&hclkdma0>; + clock-names = "apb_pclk"; + lli-bus-interface-ahb1; + lli-bus-interface-ahb2; + mem-bus-interface-ahb2; + memcpy-burst-size = <256>; + memcpy-bus-width = <32>; + #dma-cells = <2>; + }; + - | + #include + #include + #include + dma-controller@67000000 { + compatible = "faraday,ftdma020", "arm,pl080", "arm,primecell"; + /* Faraday Technology FTDMAC020 variant */ + arm,primecell-periphid = <0x0003b080>; + reg = <0x67000000 0x1000>; + interrupts = <9 IRQ_TYPE_EDGE_RISING>; + resets = <&syscon GEMINI_RESET_DMAC>; + clocks = <&syscon GEMINI_CLK_AHB>; + clock-names = "apb_pclk"; + /* Bus interface AHB1 (AHB0) is totally tilted */ + lli-bus-interface-ahb2; + mem-bus-interface-ahb2; + memcpy-burst-size = <256>; + memcpy-bus-width = <32>; + #dma-cells = <2>; + }; -- cgit v1.2.3 From 30211901927a2a504adae2a75f9863962d2d06b0 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 20 May 2021 18:24:18 +0300 Subject: dmaengine: xilinx: dpdma: Print channel number in kernel log messages To ease debugging, add the channel number to all kernel log messages related to a particular channel. Signed-off-by: Laurent Pinchart Tested-by: Jianqiang Chen Reviewed-by: Jianqiang Chen Link: https://lore.kernel.org/r/20210520152420.23986-3-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul --- drivers/dma/xilinx/xilinx_dpdma.c | 32 ++++++++++++++++++++------------ 1 file changed, 20 insertions(+), 12 deletions(-) diff --git a/drivers/dma/xilinx/xilinx_dpdma.c b/drivers/dma/xilinx/xilinx_dpdma.c index 70b29bd079c9..ea56c3b35782 100644 --- a/drivers/dma/xilinx/xilinx_dpdma.c +++ b/drivers/dma/xilinx/xilinx_dpdma.c @@ -702,8 +702,9 @@ xilinx_dpdma_chan_prep_interleaved_dma(struct xilinx_dpdma_chan *chan, size_t stride = hsize + xt->sgl[0].icg; if (!IS_ALIGNED(xt->src_start, XILINX_DPDMA_ALIGN_BYTES)) { - dev_err(chan->xdev->dev, "buffer should be aligned at %d B\n", - XILINX_DPDMA_ALIGN_BYTES); + dev_err(chan->xdev->dev, + "chan%u: buffer should be aligned at %d B\n", + chan->id, XILINX_DPDMA_ALIGN_BYTES); return NULL; } @@ -934,7 +935,9 @@ static int xilinx_dpdma_chan_notify_no_ostand(struct xilinx_dpdma_chan *chan) cnt = xilinx_dpdma_chan_ostand(chan); if (cnt) { - dev_dbg(chan->xdev->dev, "%d outstanding transactions\n", cnt); + dev_dbg(chan->xdev->dev, + "chan%u: %d outstanding transactions\n", + chan->id, cnt); return -EWOULDBLOCK; } @@ -970,8 +973,8 @@ static int xilinx_dpdma_chan_wait_no_ostand(struct xilinx_dpdma_chan *chan) return 0; } - dev_err(chan->xdev->dev, "not ready to stop: %d trans\n", - xilinx_dpdma_chan_ostand(chan)); + dev_err(chan->xdev->dev, "chan%u: not ready to stop: %d trans\n", + chan->id, xilinx_dpdma_chan_ostand(chan)); if (ret == 0) return -ETIMEDOUT; @@ -1005,8 +1008,8 @@ static int xilinx_dpdma_chan_poll_no_ostand(struct xilinx_dpdma_chan *chan) return 0; } - dev_err(chan->xdev->dev, "not ready to stop: %d trans\n", - xilinx_dpdma_chan_ostand(chan)); + dev_err(chan->xdev->dev, "chan%u: not ready to stop: %d trans\n", + chan->id, xilinx_dpdma_chan_ostand(chan)); return -ETIMEDOUT; } @@ -1060,7 +1063,8 @@ static void xilinx_dpdma_chan_done_irq(struct xilinx_dpdma_chan *chan) vchan_cyclic_callback(&active->vdesc); else dev_warn(chan->xdev->dev, - "DONE IRQ with no active descriptor!\n"); + "chan%u: DONE IRQ with no active descriptor!\n", + chan->id); spin_unlock_irqrestore(&chan->lock, flags); } @@ -1148,10 +1152,12 @@ static void xilinx_dpdma_chan_handle_err(struct xilinx_dpdma_chan *chan) spin_lock_irqsave(&chan->lock, flags); - dev_dbg(xdev->dev, "cur desc addr = 0x%04x%08x\n", + dev_dbg(xdev->dev, "chan%u: cur desc addr = 0x%04x%08x\n", + chan->id, dpdma_read(chan->reg, XILINX_DPDMA_CH_DESC_START_ADDRE), dpdma_read(chan->reg, XILINX_DPDMA_CH_DESC_START_ADDR)); - dev_dbg(xdev->dev, "cur payload addr = 0x%04x%08x\n", + dev_dbg(xdev->dev, "chan%u: cur payload addr = 0x%04x%08x\n", + chan->id, dpdma_read(chan->reg, XILINX_DPDMA_CH_PYLD_CUR_ADDRE), dpdma_read(chan->reg, XILINX_DPDMA_CH_PYLD_CUR_ADDR)); @@ -1167,7 +1173,8 @@ static void xilinx_dpdma_chan_handle_err(struct xilinx_dpdma_chan *chan) xilinx_dpdma_chan_dump_tx_desc(chan, active); if (active->error) - dev_dbg(xdev->dev, "repeated error on desc\n"); + dev_dbg(xdev->dev, "chan%u: repeated error on desc\n", + chan->id); /* Reschedule if there's no new descriptor */ if (!chan->desc.pending && @@ -1232,7 +1239,8 @@ static int xilinx_dpdma_alloc_chan_resources(struct dma_chan *dchan) align, 0); if (!chan->desc_pool) { dev_err(chan->xdev->dev, - "failed to allocate a descriptor pool\n"); + "chan%u: failed to allocate a descriptor pool\n", + chan->id); return -ENOMEM; } -- cgit v1.2.3 From 4fbf41ce573556a6dc4e684f0d92700cdc883ad3 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 20 May 2021 18:24:19 +0300 Subject: dmaengine: xilinx: dpdma: Print debug message when losing vsync race The hardware retrigger is inherently racy with the vsync interrupt. This isn't an issue as the hardware provides a way to detect a race loss and handle it correctly. When debugging issues related to this, it's useful to get a notification of the race loss. Add a debug message to do so. Signed-off-by: Laurent Pinchart Tested-by: Jianqiang Chen Reviewed-by: Jianqiang Chen Link: https://lore.kernel.org/r/20210520152420.23986-4-laurent.pinchart@ideasonboard.com Signed-off-by: Vinod Koul --- drivers/dma/xilinx/xilinx_dpdma.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/dma/xilinx/xilinx_dpdma.c b/drivers/dma/xilinx/xilinx_dpdma.c index ea56c3b35782..5834f8614a58 100644 --- a/drivers/dma/xilinx/xilinx_dpdma.c +++ b/drivers/dma/xilinx/xilinx_dpdma.c @@ -1095,8 +1095,12 @@ static void xilinx_dpdma_chan_vsync_irq(struct xilinx_dpdma_chan *chan) /* If the retrigger raced with vsync, retry at the next frame. */ sw_desc = list_first_entry(&pending->descriptors, struct xilinx_dpdma_sw_desc, node); - if (sw_desc->hw.desc_id != desc_id) + if (sw_desc->hw.desc_id != desc_id) { + dev_dbg(chan->xdev->dev, + "chan%u: vsync race lost (%u != %u), retrying\n", + chan->id, sw_desc->hw.desc_id, desc_id); goto out; + } /* * Complete the active descriptor, if any, promote the pending -- cgit v1.2.3 From acfbb1911dc907f5f2f1096e88feeaff433bba81 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 18 May 2021 13:43:22 +0300 Subject: dmaengine: Move kdoc description of struct dma_chan_percpu closer to it We have split by unknown reason of kdoc and struct dma_chan_percpu definition. Join them back. No functional change. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20210518104323.37632-1-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul --- include/linux/dmaengine.h | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index 004736b6a9c8..93c3ca5fdafd 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h @@ -229,12 +229,6 @@ enum sum_check_flags { */ typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t; -/** - * struct dma_chan_percpu - the per-CPU part of struct dma_chan - * @memcpy_count: transaction counter - * @bytes_transferred: byte counter - */ - /** * enum dma_desc_metadata_mode - per descriptor metadata mode types supported * @DESC_METADATA_CLIENT - the metadata buffer is allocated/provided by the @@ -291,6 +285,11 @@ enum dma_desc_metadata_mode { DESC_METADATA_ENGINE = BIT(1), }; +/** + * struct dma_chan_percpu - the per-CPU part of struct dma_chan + * @memcpy_count: transaction counter + * @bytes_transferred: byte counter + */ struct dma_chan_percpu { /* stats */ unsigned long memcpy_count; -- cgit v1.2.3 From 66fde1794ffd075c1b2026d8956f667704c76920 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 18 May 2021 13:43:23 +0300 Subject: dmaengine: hsu: Account transferred bytes Bump statistics for transferred bytes at the event of the successful transfer. Signed-off-by: Andy Shevchenko Link: https://lore.kernel.org/r/20210518104323.37632-2-andriy.shevchenko@linux.intel.com Signed-off-by: Vinod Koul --- drivers/dma/hsu/hsu.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/dma/hsu/hsu.c b/drivers/dma/hsu/hsu.c index 025d8ad5a63c..92caae55aece 100644 --- a/drivers/dma/hsu/hsu.c +++ b/drivers/dma/hsu/hsu.c @@ -201,6 +201,7 @@ EXPORT_SYMBOL_GPL(hsu_dma_get_status); */ int hsu_dma_do_irq(struct hsu_dma_chip *chip, unsigned short nr, u32 status) { + struct dma_chan_percpu *stat; struct hsu_dma_chan *hsuc; struct hsu_dma_desc *desc; unsigned long flags; @@ -210,6 +211,7 @@ int hsu_dma_do_irq(struct hsu_dma_chip *chip, unsigned short nr, u32 status) return 0; hsuc = &chip->hsu->chan[nr]; + stat = this_cpu_ptr(hsuc->vchan.chan.local); spin_lock_irqsave(&hsuc->vchan.lock, flags); desc = hsuc->desc; @@ -221,6 +223,7 @@ int hsu_dma_do_irq(struct hsu_dma_chip *chip, unsigned short nr, u32 status) } else { vchan_cookie_complete(&desc->vdesc); desc->status = DMA_COMPLETE; + stat->bytes_transferred += desc->length; hsu_dma_start_transfer(hsuc); } } -- cgit v1.2.3 From 340ad031887b89af4467ee078e22d24aad0d8401 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 18 May 2021 10:43:47 +0300 Subject: dmaengine: ti: omap-dma: Skip pointless cpu_pm context restore on errors There's no need to restore DMA context on CPU_CLUSTER_PM_ENTER_FAILED as the DMA context won't be lost on errors. Note that this does not cause invalid context restore as we already check for busy DMA with omap_dma_busy() in CPU_CLUSTER_PM_ENTER, and block any deeper idle states for the SoC by returning NOTIFY_BAD if busy. If other drivers block deeper idle states with cpu_pm, we now just do a pointless restore, but only if dma was not busy on CPU_CLUSTER_PM_ENTER. Let's update the CPU_CLUSTER_PM_ENTER_FAILED handling for correctness, and add a comment. Cc: Aaro Koskinen Cc: Adam Ford Cc: Andreas Kemnade Cc: Peter Ujfalusi Signed-off-by: Tony Lindgren Acked-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20210518074347.16908-1-tony@atomide.com Signed-off-by: Vinod Koul --- drivers/dma/ti/omap-dma.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/dma/ti/omap-dma.c b/drivers/dma/ti/omap-dma.c index 268a08058714..7cb577e6587b 100644 --- a/drivers/dma/ti/omap-dma.c +++ b/drivers/dma/ti/omap-dma.c @@ -1608,7 +1608,8 @@ static int omap_dma_context_notifier(struct notifier_block *nb, return NOTIFY_BAD; omap_dma_context_save(od); break; - case CPU_CLUSTER_PM_ENTER_FAILED: + case CPU_CLUSTER_PM_ENTER_FAILED: /* No need to restore context */ + break; case CPU_CLUSTER_PM_EXIT: omap_dma_context_restore(od); break; -- cgit v1.2.3 From 2e5c09d19e63726a88ccd7a71256fec8a716551e Mon Sep 17 00:00:00 2001 From: Zou Wei Date: Mon, 7 Jun 2021 11:20:35 +0800 Subject: dmaengine: sun4i: Use list_move_tail instead of list_del/list_add_tail Using list_move_tail() instead of list_del() + list_add_tail(). Reported-by: Hulk Robot Signed-off-by: Zou Wei Acked-by: Maxime Ripard Link: https://lore.kernel.org/r/1623036035-30614-1-git-send-email-zou_wei@huawei.com Signed-off-by: Vinod Koul --- drivers/dma/sun4i-dma.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/dma/sun4i-dma.c b/drivers/dma/sun4i-dma.c index e8b6633ae661..93f1645ae928 100644 --- a/drivers/dma/sun4i-dma.c +++ b/drivers/dma/sun4i-dma.c @@ -1042,9 +1042,8 @@ handle_pending: * Move the promise into the completed list now that * we're done with it */ - list_del(&vchan->processing->list); - list_add_tail(&vchan->processing->list, - &contract->completed_demands); + list_move_tail(&vchan->processing->list, + &contract->completed_demands); /* * Cyclic DMA transfers are special: -- cgit v1.2.3 From 14f259c8be0168f11333bad30b2d716002cfdcbc Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Tue, 15 Jun 2021 01:53:56 +0200 Subject: dt-bindings: dmaengine: qcom: gpi: add compatible for sm8250 No functional changes, just adding a new compatible for a different SoC. Signed-off-by: Konrad Dybcio Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/r/20210614235358.444834-1-konrad.dybcio@somainline.org Signed-off-by: Vinod Koul --- Documentation/devicetree/bindings/dma/qcom,gpi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml index e302147e53c6..e614fe3187bb 100644 --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml @@ -21,6 +21,7 @@ properties: enum: - qcom,sdm845-gpi-dma - qcom,sm8150-gpi-dma + - qcom,sm8250-gpi-dma reg: maxItems: 1 -- cgit v1.2.3 From 23e51f110f914ab9eb2eb4ddd83f3fc8ffda99b5 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Tue, 15 Jun 2021 01:53:57 +0200 Subject: dmaengine: qcom: gpi: Add SM8250 compatible SM8250 seems to work just fine, so add a shiny new compatible for it. Signed-off-by: Konrad Dybcio Reviewed-by: Bjorn Andersson Link: https://lore.kernel.org/r/20210614235358.444834-2-konrad.dybcio@somainline.org Signed-off-by: Vinod Koul --- drivers/dma/qcom/gpi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma/qcom/gpi.c b/drivers/dma/qcom/gpi.c index 43ac3ab23d4c..1a1b7d8458c9 100644 --- a/drivers/dma/qcom/gpi.c +++ b/drivers/dma/qcom/gpi.c @@ -2282,6 +2282,7 @@ static int gpi_probe(struct platform_device *pdev) static const struct of_device_id gpi_of_match[] = { { .compatible = "qcom,sdm845-gpi-dma" }, { .compatible = "qcom,sm8150-gpi-dma" }, + { .compatible = "qcom,sm8250-gpi-dma" }, { }, }; MODULE_DEVICE_TABLE(of, gpi_of_match); -- cgit v1.2.3 From 2451eeb4ebc051ad1f753580066f20dbf4c5174e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 11 Jun 2021 12:18:39 +0200 Subject: dt-bindings: dmaengine: Remove SHDMA Device Tree bindings Remove the Renesas SHDMA Device Tree bindings, as they are unused. The DMA multiplexer node and one DMA controller instance were added to the R-Mobile APE6 .dtsi file, but DMA support was never fully enabled, cfr. commit a19788612f51b787 ("dmaengine: sh: Remove R-Mobile APE6 support"). Note that the mux idea was dropped when implementing support for DMA on R-Car Gen2, cfr. renesas,rcar-dmac.yaml. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/ba56b7199fcf3516f202389d2c8f836c9ec51e7a.1623406640.git.geert+renesas@glider.be Signed-off-by: Vinod Koul --- .../devicetree/bindings/dma/renesas,shdma.txt | 84 ---------------------- 1 file changed, 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/dma/renesas,shdma.txt diff --git a/Documentation/devicetree/bindings/dma/renesas,shdma.txt b/Documentation/devicetree/bindings/dma/renesas,shdma.txt deleted file mode 100644 index a91920a49433..000000000000 --- a/Documentation/devicetree/bindings/dma/renesas,shdma.txt +++ /dev/null @@ -1,84 +0,0 @@ -* SHDMA Device Tree bindings - -Sh-/r-mobile and R-Car systems often have multiple identical DMA controller -instances, capable of serving any of a common set of DMA slave devices, using -the same configuration. To describe this topology we require all compatible -SHDMA DT nodes to be placed under a DMA multiplexer node. All such compatible -DMAC instances have the same number of channels and use the same DMA -descriptors. Therefore respective DMA DT bindings can also all be placed in the -multiplexer node. Even if there is only one such DMAC instance on a system, it -still has to be placed under such a multiplexer node. - -* DMA multiplexer - -Required properties: -- compatible: should be "renesas,shdma-mux" -- #dma-cells: should be <1>, see "dmas" property below - -Optional properties (currently unused): -- dma-channels: number of DMA channels -- dma-requests: number of DMA request signals - -* DMA controller - -Required properties: -- compatible: should be of the form "renesas,shdma-", where should - be replaced with the desired SoC model, e.g. - "renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC - -Example: - dmac: dma-multiplexer@0 { - compatible = "renesas,shdma-mux"; - #dma-cells = <1>; - dma-channels = <20>; - dma-requests = <256>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - dma0: dma-controller@e6700020 { - compatible = "renesas,shdma-r8a73a4"; - reg = <0 0xe6700020 0 0x89e0>; - interrupt-parent = <&gic>; - interrupts = <0 220 4 - 0 200 4 - 0 201 4 - 0 202 4 - 0 203 4 - 0 204 4 - 0 205 4 - 0 206 4 - 0 207 4 - 0 208 4 - 0 209 4 - 0 210 4 - 0 211 4 - 0 212 4 - 0 213 4 - 0 214 4 - 0 215 4 - 0 216 4 - 0 217 4 - 0 218 4 - 0 219 4>; - interrupt-names = "error", - "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19"; - }; - }; - -* DMA client - -Required properties: -- dmas: a list of <[DMA multiplexer phandle] [MID/RID value]> pairs, - where MID/RID values are fixed handles, specified in the SoC - manual -- dma-names: a list of DMA channel names, one per "dmas" entry - -Example: - dmas = <&dmac 0xd1 - &dmac 0xd2>; - dma-names = "tx", "rx"; -- cgit v1.2.3 From c1fc3745e7b07f3bfecf16adb6c49544393094f2 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 11 Jun 2021 12:18:40 +0200 Subject: dmaengine: sh: Remove unused shdma-of driver Remove the DT-based Renesas SHDMA DMA multiplexer driver, as it is unused. The DMA multiplexer node and one DMA controller instance were added to the R-Mobile APE6 .dtsi file, but DMA support was never fully enabled, cfr. commit a19788612f51b787 ("dmaengine: sh: Remove R-Mobile APE6 support"). Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/e9445a5f4ac15fc4d3b376b5e675e39f8c95b967.1623406640.git.geert+renesas@glider.be Signed-off-by: Vinod Koul --- drivers/dma/sh/Makefile | 2 +- drivers/dma/sh/shdma-of.c | 76 ----------------------------------------------- 2 files changed, 1 insertion(+), 77 deletions(-) delete mode 100644 drivers/dma/sh/shdma-of.c diff --git a/drivers/dma/sh/Makefile b/drivers/dma/sh/Makefile index 112fbd22bb3f..abdf10341725 100644 --- a/drivers/dma/sh/Makefile +++ b/drivers/dma/sh/Makefile @@ -3,7 +3,7 @@ # DMA Engine Helpers # -obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o shdma-of.o +obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o # # DMA Controllers diff --git a/drivers/dma/sh/shdma-of.c b/drivers/dma/sh/shdma-of.c deleted file mode 100644 index be89dd894328..000000000000 --- a/drivers/dma/sh/shdma-of.c +++ /dev/null @@ -1,76 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * SHDMA Device Tree glue - * - * Copyright (C) 2013 Renesas Electronics Inc. - * Author: Guennadi Liakhovetski - */ - -#include -#include -#include -#include -#include -#include -#include - -#define to_shdma_chan(c) container_of(c, struct shdma_chan, dma_chan) - -static struct dma_chan *shdma_of_xlate(struct of_phandle_args *dma_spec, - struct of_dma *ofdma) -{ - u32 id = dma_spec->args[0]; - dma_cap_mask_t mask; - struct dma_chan *chan; - - if (dma_spec->args_count != 1) - return NULL; - - dma_cap_zero(mask); - /* Only slave DMA channels can be allocated via DT */ - dma_cap_set(DMA_SLAVE, mask); - - chan = dma_request_channel(mask, shdma_chan_filter, - (void *)(uintptr_t)id); - if (chan) - to_shdma_chan(chan)->hw_req = id; - - return chan; -} - -static int shdma_of_probe(struct platform_device *pdev) -{ - const struct of_dev_auxdata *lookup = dev_get_platdata(&pdev->dev); - int ret; - - ret = of_dma_controller_register(pdev->dev.of_node, - shdma_of_xlate, pdev); - if (ret < 0) - return ret; - - ret = of_platform_populate(pdev->dev.of_node, NULL, lookup, &pdev->dev); - if (ret < 0) - of_dma_controller_free(pdev->dev.of_node); - - return ret; -} - -static const struct of_device_id shdma_of_match[] = { - { .compatible = "renesas,shdma-mux", }, - { } -}; -MODULE_DEVICE_TABLE(of, sh_dmae_of_match); - -static struct platform_driver shdma_of = { - .driver = { - .name = "shdma-of", - .of_match_table = shdma_of_match, - }, - .probe = shdma_of_probe, -}; - -module_platform_driver(shdma_of); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("SH-DMA driver DT glue"); -MODULE_AUTHOR("Guennadi Liakhovetski "); -- cgit v1.2.3 From 94b4cd7c5fc0dd6858a046b00ca729fb0512b9ba Mon Sep 17 00:00:00 2001 From: Austin Kim Date: Fri, 11 Jun 2021 07:53:36 +0100 Subject: dmaengine: sf-pdma: apply proper spinlock flags in sf_pdma_prep_dma_memcpy() The second parameter of spinlock_irq[save/restore] function is flags, which is the last input parameter of sf_pdma_prep_dma_memcpy(). So declare local variable 'iflags' to be used as the second parameter of spinlock_irq[save/restore] function. Signed-off-by: Austin Kim Link: https://lore.kernel.org/r/20210611065336.GA1121@raspberrypi Signed-off-by: Vinod Koul --- drivers/dma/sf-pdma/sf-pdma.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/dma/sf-pdma/sf-pdma.c b/drivers/dma/sf-pdma/sf-pdma.c index c4c4e8575764..f12606aeff87 100644 --- a/drivers/dma/sf-pdma/sf-pdma.c +++ b/drivers/dma/sf-pdma/sf-pdma.c @@ -94,6 +94,7 @@ sf_pdma_prep_dma_memcpy(struct dma_chan *dchan, dma_addr_t dest, dma_addr_t src, { struct sf_pdma_chan *chan = to_sf_pdma_chan(dchan); struct sf_pdma_desc *desc; + unsigned long iflags; if (chan && (!len || !dest || !src)) { dev_err(chan->pdma->dma_dev.dev, @@ -109,10 +110,10 @@ sf_pdma_prep_dma_memcpy(struct dma_chan *dchan, dma_addr_t dest, dma_addr_t src, desc->dirn = DMA_MEM_TO_MEM; desc->async_tx = vchan_tx_prep(&chan->vchan, &desc->vdesc, flags); - spin_lock_irqsave(&chan->vchan.lock, flags); + spin_lock_irqsave(&chan->vchan.lock, iflags); chan->desc = desc; sf_pdma_fill_desc(desc, dest, src, len); - spin_unlock_irqrestore(&chan->vchan.lock, flags); + spin_unlock_irqrestore(&chan->vchan.lock, iflags); return desc->async_tx; } -- cgit v1.2.3 From ce939833b828dd472b278a9173361c7beaeb5b11 Mon Sep 17 00:00:00 2001 From: Yang Li Date: Wed, 9 Jun 2021 15:14:53 +0800 Subject: dmaengine: xilinx: dpdma: fix kernel-doc Fix function name in xilinx/xilinx_dpdma.c comment to remove a warning found by kernel-doc. drivers/dma/xilinx/xilinx_dpdma.c:935: warning: expecting prototype for xilinx_dpdma_chan_no_ostand(). Prototype was for xilinx_dpdma_chan_notify_no_ostand() instead. Reported-by: Abaci Robot Signed-off-by: Yang Li Reviewed-by: Nathan Chancellor Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/1623222893-123227-1-git-send-email-yang.lee@linux.alibaba.com Signed-off-by: Vinod Koul --- drivers/dma/xilinx/xilinx_dpdma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/xilinx/xilinx_dpdma.c b/drivers/dma/xilinx/xilinx_dpdma.c index 5834f8614a58..7fd62fde6125 100644 --- a/drivers/dma/xilinx/xilinx_dpdma.c +++ b/drivers/dma/xilinx/xilinx_dpdma.c @@ -916,7 +916,7 @@ static u32 xilinx_dpdma_chan_ostand(struct xilinx_dpdma_chan *chan) } /** - * xilinx_dpdma_chan_no_ostand - Notify no outstanding transaction event + * xilinx_dpdma_chan_notify_no_ostand - Notify no outstanding transaction event * @chan: DPDMA channel * * Notify waiters for no outstanding event, so waiters can stop the channel -- cgit v1.2.3 From 90ad30310a352bf029169d6805eb69a2551c73e8 Mon Sep 17 00:00:00 2001 From: Olivier Dautricourt Date: Wed, 9 Jun 2021 17:20:13 +0200 Subject: dt-bindings: dma: add schema for altera-msgdma add yaml schema for Altera mSGDMA bindings in devicetree. Reviewed-by: Stefan Roese Reviewed-by: Rob Herring Signed-off-by: Olivier Dautricourt Link: https://lore.kernel.org/r/7487a25cdb240d1be4a8593aa602c3c73d8f5acb.1623251990.git.olivier.dautricourt@orolia.com Signed-off-by: Vinod Koul --- .../devicetree/bindings/dma/altr,msgdma.yaml | 61 ++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/altr,msgdma.yaml diff --git a/Documentation/devicetree/bindings/dma/altr,msgdma.yaml b/Documentation/devicetree/bindings/dma/altr,msgdma.yaml new file mode 100644 index 000000000000..a4f9fe23dcd9 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/altr,msgdma.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/altr,msgdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Altera mSGDMA IP core + +maintainers: + - Olivier Dautricourt + +description: | + Altera / Intel modular Scatter-Gather Direct Memory Access (mSGDMA) + intellectual property (IP) + +allOf: + - $ref: "dma-controller.yaml#" + +properties: + compatible: + const: altr,socfpga-msgdma + + reg: + items: + - description: Control and Status Register Slave Port + - description: Descriptor Slave Port + - description: Response Slave Port + + reg-names: + items: + - const: csr + - const: desc + - const: resp + + interrupts: + maxItems: 1 + + "#dma-cells": + const: 1 + description: + The cell identifies the channel id (must be 0) + +required: + - compatible + - reg + - reg-names + - interrupts + +unevaluatedProperties: false + +examples: + - | + #include + + msgdma_controller: dma-controller@ff200b00 { + compatible = "altr,socfpga-msgdma"; + reg = <0xff200b00 0x100>, <0xff200c00 0x100>, <0xff200d00 0x100>; + reg-names = "csr", "desc", "resp"; + interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + }; -- cgit v1.2.3 From ce91c6220947e4efa0db564cc50baa0151d8872b Mon Sep 17 00:00:00 2001 From: Olivier Dautricourt Date: Wed, 9 Jun 2021 17:20:55 +0200 Subject: MAINTAINERS: add entry for Altera mSGDMA This entry is for the standalone driver in drivers/dma/altera-msgdma.c Add myself as 'Odd fixes' maintainer for this driver as i am currently writing new code and have access to the hardware. Add Stefan Roese as reviewer. Signed-off-by: Olivier Dautricourt Acked-by: Stefan Roese Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de Link: https://lore.kernel.org/r/4258cb93e0f7ff57c4e116c3e8cd9a1a3159cec6.1623251990.git.olivier.dautricourt@orolia.com Signed-off-by: Vinod Koul --- MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index bd7aff0c120f..af95b9d0d0f1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -783,6 +783,14 @@ M: Ley Foon Tan S: Maintained F: drivers/mailbox/mailbox-altera.c +ALTERA MSGDMA IP CORE DRIVER +M: Olivier Dautricourt +R: Stefan Roese +L: dmaengine@vger.kernel.org +S: Odd Fixes +F: Documentation/devicetree/bindings/dma/altr,msgdma.yaml +F: drivers/dma/altera-msgdma.c + ALTERA PIO DRIVER M: Joyce Ooi L: linux-gpio@vger.kernel.org -- cgit v1.2.3 From 656758425f98693bd61a08f6b51c4c5aa26c9d50 Mon Sep 17 00:00:00 2001 From: Olivier Dautricourt Date: Wed, 9 Jun 2021 17:21:46 +0200 Subject: dmaengine: altera-msgdma: add OF support This driver had no device tree support. - add compatible field "altr,socfpga-msgdma" - register dma controller with of_dma_controller_register Reviewed-by: Stefan Roese Signed-off-by: Olivier Dautricourt Link: https://lore.kernel.org/r/7459635ba093d87b6bf12413cf7cfe09f6e3019b.1623251990.git.olivier.dautricourt@orolia.com Signed-off-by: Vinod Koul --- drivers/dma/altera-msgdma.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/dma/altera-msgdma.c b/drivers/dma/altera-msgdma.c index 9a841ce5f0c5..0fe0676f8e1d 100644 --- a/drivers/dma/altera-msgdma.c +++ b/drivers/dma/altera-msgdma.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "dmaengine.h" @@ -888,6 +889,13 @@ static int msgdma_probe(struct platform_device *pdev) if (ret) goto fail; + ret = of_dma_controller_register(pdev->dev.of_node, + of_dma_xlate_by_chan_id, dma_dev); + if (ret == -EINVAL) + dev_warn(&pdev->dev, "device was not probed from DT"); + else if (ret && ret != -ENODEV) + goto fail; + dev_notice(&pdev->dev, "Altera mSGDMA driver probe success\n"); return 0; @@ -908,6 +916,8 @@ static int msgdma_remove(struct platform_device *pdev) { struct msgdma_device *mdev = platform_get_drvdata(pdev); + if (pdev->dev.of_node) + of_dma_controller_free(pdev->dev.of_node); dma_async_device_unregister(&mdev->dmadev); msgdma_dev_remove(mdev); @@ -916,9 +926,19 @@ static int msgdma_remove(struct platform_device *pdev) return 0; } +#ifdef CONFIG_OF +static const struct of_device_id msgdma_match[] = { + { .compatible = "altr,socfpga-msgdma", }, + { } +}; + +MODULE_DEVICE_TABLE(of, msgdma_match); +#endif + static struct platform_driver msgdma_driver = { .driver = { .name = "altera-msgdma", + .of_match_table = of_match_ptr(msgdma_match), }, .probe = msgdma_probe, .remove = msgdma_remove, -- cgit v1.2.3 From 536bc5e6fdabbbfd4cb84a2d3b6c1aad17b44757 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 23 Jun 2021 13:05:39 +0200 Subject: dmaengine: xilinx: dpdma: Use kernel type u32 over uint32_t Use u32 kernel type instead of uint32_t. Issue is reported by checkpatch.pl --strict. Signed-off-by: Michal Simek Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/9569008794d519b487348bfeafbfd76c5da5755e.1624446336.git.michal.simek@xilinx.com Signed-off-by: Vinod Koul --- drivers/dma/xilinx/xilinx_dpdma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/xilinx/xilinx_dpdma.c b/drivers/dma/xilinx/xilinx_dpdma.c index 7fd62fde6125..f37324be1017 100644 --- a/drivers/dma/xilinx/xilinx_dpdma.c +++ b/drivers/dma/xilinx/xilinx_dpdma.c @@ -1597,7 +1597,7 @@ static struct dma_chan *of_dma_xilinx_xlate(struct of_phandle_args *dma_spec, struct of_dma *ofdma) { struct xilinx_dpdma_device *xdev = ofdma->of_dma_data; - uint32_t chan_id = dma_spec->args[0]; + u32 chan_id = dma_spec->args[0]; if (chan_id >= ARRAY_SIZE(xdev->chan)) return NULL; -- cgit v1.2.3 From 72cce7dd9f0aa88f82a5612e7d4f9993c34d0d17 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 23 Jun 2021 13:07:38 +0200 Subject: dmaengine: xilinx: dpdma: Fix spacing around addr[i-1] Use proper spacing for array calculation. Issue is reported by checkpatch.pl --strict. Signed-off-by: Michal Simek Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/ef7cde6f793bfa6f3dd0a8898bad13b6407479b0.1624446456.git.michal.simek@xilinx.com Signed-off-by: Vinod Koul --- drivers/dma/xilinx/xilinx_dpdma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/dma/xilinx/xilinx_dpdma.c b/drivers/dma/xilinx/xilinx_dpdma.c index f37324be1017..e75aad72c655 100644 --- a/drivers/dma/xilinx/xilinx_dpdma.c +++ b/drivers/dma/xilinx/xilinx_dpdma.c @@ -530,7 +530,7 @@ static void xilinx_dpdma_sw_desc_set_dma_addrs(struct xilinx_dpdma_device *xdev, for (i = 1; i < num_src_addr; i++) { u32 *addr = &hw_desc->src_addr2; - addr[i-1] = lower_32_bits(dma_addr[i]); + addr[i - 1] = lower_32_bits(dma_addr[i]); if (xdev->ext_addr) { u32 *addr_ext = &hw_desc->addr_ext_23; -- cgit v1.2.3 From 8d11cfb0c37547bd6b1cdc7c2653c1e6b5ec5abb Mon Sep 17 00:00:00 2001 From: Vladimir Zapolskiy Date: Sun, 20 Jun 2021 22:11:03 +0300 Subject: dmaengine: imx-sdma: Remove platform data header Since commit 6c5f05a6cd88 ("ARM: imx3: Remove imx3 soc_init()") there are no more users of struct sdma_script_start_addrs outside of the driver itself, thus let's move the struct declaration just to the driver source code and remove the header file as unused one. Signed-off-by: Vladimir Zapolskiy Cc: Fabio Estevam Cc: Shawn Guo Cc: Arnd Bergmann Reviewed-by: Fabio Estevam Link: https://lore.kernel.org/r/20210620191103.156626-1-vz@mleia.com Signed-off-by: Vinod Koul --- drivers/dma/imx-sdma.c | 56 +++++++++++++++++++++++++++- include/linux/platform_data/dma-imx-sdma.h | 60 ------------------------------ 2 files changed, 55 insertions(+), 61 deletions(-) delete mode 100644 include/linux/platform_data/dma-imx-sdma.h diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index d5590c08db51..48390ea3c91f 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -35,7 +35,6 @@ #include #include -#include #include #include #include @@ -181,6 +180,61 @@ BIT(DMA_MEM_TO_DEV) | \ BIT(DMA_DEV_TO_DEV)) +/** + * struct sdma_script_start_addrs - SDMA script start pointers + * + * start addresses of the different functions in the physical + * address space of the SDMA engine. + */ +struct sdma_script_start_addrs { + s32 ap_2_ap_addr; + s32 ap_2_bp_addr; + s32 ap_2_ap_fixed_addr; + s32 bp_2_ap_addr; + s32 loopback_on_dsp_side_addr; + s32 mcu_interrupt_only_addr; + s32 firi_2_per_addr; + s32 firi_2_mcu_addr; + s32 per_2_firi_addr; + s32 mcu_2_firi_addr; + s32 uart_2_per_addr; + s32 uart_2_mcu_addr; + s32 per_2_app_addr; + s32 mcu_2_app_addr; + s32 per_2_per_addr; + s32 uartsh_2_per_addr; + s32 uartsh_2_mcu_addr; + s32 per_2_shp_addr; + s32 mcu_2_shp_addr; + s32 ata_2_mcu_addr; + s32 mcu_2_ata_addr; + s32 app_2_per_addr; + s32 app_2_mcu_addr; + s32 shp_2_per_addr; + s32 shp_2_mcu_addr; + s32 mshc_2_mcu_addr; + s32 mcu_2_mshc_addr; + s32 spdif_2_mcu_addr; + s32 mcu_2_spdif_addr; + s32 asrc_2_mcu_addr; + s32 ext_mem_2_ipu_addr; + s32 descrambler_addr; + s32 dptc_dvfs_addr; + s32 utra_addr; + s32 ram_code_start_addr; + /* End of v1 array */ + s32 mcu_2_ssish_addr; + s32 ssish_2_mcu_addr; + s32 hdmi_dma_addr; + /* End of v2 array */ + s32 zcanfd_2_mcu_addr; + s32 zqspi_2_mcu_addr; + s32 mcu_2_ecspi_addr; + /* End of v3 array */ + s32 mcu_2_zqspi_addr; + /* End of v4 array */ +}; + /* * Mode/Count of data node descriptors - IPCv2 */ diff --git a/include/linux/platform_data/dma-imx-sdma.h b/include/linux/platform_data/dma-imx-sdma.h deleted file mode 100644 index 725602d9df91..000000000000 --- a/include/linux/platform_data/dma-imx-sdma.h +++ /dev/null @@ -1,60 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __MACH_MXC_SDMA_H__ -#define __MACH_MXC_SDMA_H__ - -/** - * struct sdma_script_start_addrs - SDMA script start pointers - * - * start addresses of the different functions in the physical - * address space of the SDMA engine. - */ -struct sdma_script_start_addrs { - s32 ap_2_ap_addr; - s32 ap_2_bp_addr; - s32 ap_2_ap_fixed_addr; - s32 bp_2_ap_addr; - s32 loopback_on_dsp_side_addr; - s32 mcu_interrupt_only_addr; - s32 firi_2_per_addr; - s32 firi_2_mcu_addr; - s32 per_2_firi_addr; - s32 mcu_2_firi_addr; - s32 uart_2_per_addr; - s32 uart_2_mcu_addr; - s32 per_2_app_addr; - s32 mcu_2_app_addr; - s32 per_2_per_addr; - s32 uartsh_2_per_addr; - s32 uartsh_2_mcu_addr; - s32 per_2_shp_addr; - s32 mcu_2_shp_addr; - s32 ata_2_mcu_addr; - s32 mcu_2_ata_addr; - s32 app_2_per_addr; - s32 app_2_mcu_addr; - s32 shp_2_per_addr; - s32 shp_2_mcu_addr; - s32 mshc_2_mcu_addr; - s32 mcu_2_mshc_addr; - s32 spdif_2_mcu_addr; - s32 mcu_2_spdif_addr; - s32 asrc_2_mcu_addr; - s32 ext_mem_2_ipu_addr; - s32 descrambler_addr; - s32 dptc_dvfs_addr; - s32 utra_addr; - s32 ram_code_start_addr; - /* End of v1 array */ - s32 mcu_2_ssish_addr; - s32 ssish_2_mcu_addr; - s32 hdmi_dma_addr; - /* End of v2 array */ - s32 zcanfd_2_mcu_addr; - s32 zqspi_2_mcu_addr; - s32 mcu_2_ecspi_addr; - /* End of v3 array */ - s32 mcu_2_zqspi_addr; - /* End of v4 array */ -}; - -#endif /* __MACH_MXC_SDMA_H__ */ -- cgit v1.2.3