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path: root/drivers/ntb/hw
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2021-09-05NTB: switch from 'pci_' to 'dma_' APIChristophe JAILLET3-33/+6
2021-09-04ntb: intel: remove invalid email address in header commentDave Jiang1-3/+0
2021-02-23NTB: Add support for EPF PCI Non-Transparent BridgeKishon Vijay Abraham I5-0/+762
2020-12-06ntb: intel: add Intel NTB LTR vendor support for gen4 NTBDave Jiang3-1/+42
2020-12-06ntb: idt: fix error check in ntb_hw_idt.cWang Qing1-2/+2
2020-08-24ntb: intel: Fix memleak in intel_ntb_pci_probeDinghao Liu1-1/+1
2020-08-23NTB: hw: amd: fix an issue about leak system resourcesKaige Li1-0/+1
2020-08-14ntb: intel: constify ioreadX() iomem argument (as in generic implementation)Krzysztof Kozlowski3-3/+3
2020-06-05ntb: hw: remove the code that sets the DMA maskLogan Gunthorpe3-14/+0
2020-06-05ntb: intel: fix static declarationDave Jiang1-1/+1
2020-06-05ntb: intel: add hw workaround for NTB BAR alignmentDave Jiang3-13/+79
2020-04-20ntb: intel: Add Icelake (gen4) support for Intel NTBDave Jiang7-27/+640
2020-04-03Merge tag 'pci-v5.7-changes' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds1-2/+2
2020-03-28PCI/AER: Rationalize error status register clearingKuppuswamy Sathyanarayanan1-2/+2
2020-03-13NTB: add pci shutdown handler for AMD NTBArindam Nath1-0/+17
2020-03-13NTB: send DB event when driver is loaded or un-loadedArindam Nath2-2/+56
2020-03-13NTB: remove redundant setting of DB valid maskArindam Nath1-2/+0
2020-03-13NTB: return link up status correctly for PRI and SECArindam Nath2-5/+60
2020-03-13NTB: add helper functions to set and clear sideinfoArindam Nath2-10/+37
2020-03-13NTB: move ntb_ctrl handling to init and deinitArindam Nath1-10/+10
2020-03-13NTB: handle link up, D0 and D3 events correctlyArindam Nath1-0/+6
2020-03-13NTB: handle link down event correctlyArindam Nath1-3/+6
2020-03-13NTB: remove handling of peer_sta from amd_link_is_upArindam Nath1-11/+0
2020-03-13NTB: set peer_sta within event handler itselfArindam Nath1-2/+4
2020-03-13NTB: return the side info status from amd_poll_linkArindam Nath2-8/+5
2020-03-13NTB: define a new function to get link statusArindam Nath1-43/+50
2020-03-13NTB: Enable link up and down event notificationArindam Nath1-0/+5
2020-03-13NTB: clear interrupt status registerArindam Nath1-0/+3
2020-03-13NTB: Fix access to link status and control registerArindam Nath1-3/+37
2020-03-13ntb_hw_switchtec: Fix ntb_mw_clear_trans error if size == 0Alexander Fomichev1-1/+1
2020-03-12NTB: Fix an error in get link statusJiasen Lin2-3/+2
2019-12-07NTB: Add Hygon Device IDJiasen Lin1-0/+1
2019-09-23NTB: fix IDT Kconfig typos/spellosRandy Dunlap1-3/+3
2019-09-23ntb_hw_amd: Add memory window support for new AMD hardwareSanjay R Mehta2-6/+24
2019-09-23ntb_hw_amd: Add a new NTB PCI device IDSanjay R Mehta2-2/+2
2019-09-23ntb_hw_switchtec: make ntb_mw_set_trans() work when addr == 0Alexander Fomichev1-1/+1
2019-07-21Merge tag 'ntb-5.3' of git://github.com/jonmason/ntbLinus Torvalds3-40/+58
2019-06-13ntb_hw_switchtec: Fix setup MW with failure bugJoey Zhang1-27/+39
2019-06-13ntb_hw_switchtec: Skip unnecessary re-setup of shared memory window for cross...Wesley Sheng1-0/+3
2019-06-13ntb_hw_switchtec: Remove redundant steps of switchtec_ntb_reinit_peer() functionJoey Zhang1-4/+7
2019-06-13NTB: amd: Silence shift wrapping warning in amd_ntb_db_vector_mask()Dan Carpenter1-1/+1
2019-06-13ntb_hw_switchtec: potential shift wrapping bug in switchtec_ntb_init_sndev()Dan Carpenter1-1/+1
2019-06-13NTB: ntb_hw_amd: set peer limit registerSanjay R Mehta1-4/+4
2019-06-13ntb: intel: Make intel_ntb3_peer_db_addr staticYueHaibing1-3/+3
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288Thomas Gleixner1-10/+1
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner10-0/+10
2019-04-08drivers: Remove explicit invocations of mmiowb()Will Deacon1-7/+0
2019-03-15Merge tag 'ntb-5.1' of git://github.com/jonmason/ntbLinus Torvalds4-13/+70
2019-02-13NTB: add new parameter to peer_db_addr() db_bit and db_dataLeonid Ravich4-10/+62
2019-02-11ntb_hw_switchtec: Added support of >=4G memory windowsPaul Selles1-2/+7
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