| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-06-10 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 130 | -612/+13263 |
| 2020-06-09 | clk: mediatek: Remove ifr{0,1}_cfg_regs structures | Stephen Boyd | 1 | -30/+0 |
| 2020-06-09 | clk: baikal-t1: remove redundant assignment to variable 'divider' | Colin Ian King | 1 | -1/+1 |
| 2020-06-09 | clk: baikal-t1: fix spelling mistake "Uncompatible" -> "Incompatible" | Colin Ian King | 1 | -1/+1 |
| 2020-06-07 | Merge tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/gi... | Linus Torvalds | 5 | -48/+25 |
| 2020-06-04 | Merge tag 'arm-drivers-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/... | Linus Torvalds | 10 | -140/+165 |
| 2020-06-04 | Merge tag 'arm-soc-5.8' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc | Linus Torvalds | 5 | -144/+21 |
| 2020-06-03 | clk: sprd: fix compile-testing | Arnd Bergmann | 1 | -1/+1 |
| 2020-06-02 | Merge tag 'pm-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafae... | Linus Torvalds | 2 | -4/+32 |
| 2020-06-01 | Merge branches 'clk-vc5', 'clk-hsdk', 'clk-mediatek' and 'clk-baikal' into cl... | Stephen Boyd | 22 | -32/+3644 |
| 2020-06-01 | Merge branches 'clk-mmp', 'clk-intel', 'clk-ingenic', 'clk-qcom' and 'clk-sil... | Stephen Boyd | 35 | -82/+7246 |
| 2020-06-01 | Merge branches 'clk-unisoc', 'clk-trivial', 'clk-bcm', 'clk-st' and 'clk-ast2... | Stephen Boyd | 10 | -66/+136 |
| 2020-06-01 | Merge branches 'clk-tegra', 'clk-imx', 'clk-zynq', 'clk-socfpga', 'clk-at91' ... | Stephen Boyd | 52 | -346/+1805 |
| 2020-06-01 | Merge branches 'clk-selectable', 'clk-amlogic', 'clk-renesas', 'clk-samsung' ... | Stephen Boyd | 14 | -82/+443 |
| 2020-06-01 | Merge branch 'pm-cpufreq' | Rafael J. Wysocki | 1 | -3/+27 |
| 2020-05-30 | clk: vc5: Add support for IDT VersaClock 5P49V6965 | Adam Ford | 1 | -0/+11 |
| 2020-05-30 | clk: Add Baikal-T1 CCU Dividers driver | Serge Semin | 5 | -0/+1210 |
| 2020-05-30 | clk: Add Baikal-T1 CCU PLLs driver | Serge Semin | 7 | -0/+860 |
| 2020-05-29 | ARM: zynq: Don't select CONFIG_ICST | Rob Herring | 1 | -1/+1 |
| 2020-05-28 | clk: mediatek: assign the initial value to clk_init_data of mtk_mux | Weiyi Lu | 1 | -1/+1 |
| 2020-05-28 | clk: mediatek: Add MT6765 clock support | Owen Chen | 9 | -0/+1523 |
| 2020-05-28 | CLK: HSDK: CGU: add support for 148.5MHz clock | Eugeniy Paltsev | 1 | -0/+1 |
| 2020-05-28 | CLK: HSDK: CGU: support PLL bypassing | Eugeniy Paltsev | 1 | -27/+34 |
| 2020-05-28 | CLK: HSDK: CGU: check if PLL is bypassed first | Eugeniy Paltsev | 1 | -4/+4 |
| 2020-05-28 | clk: clk-si5341: Add support for the Si5345 series | Mike Looijmans | 1 | -5/+64 |
| 2020-05-28 | clk: qcom: Add missing msm8998 ufs_unipro_core_clk_src | Jeffrey Hugo | 1 | -0/+27 |
| 2020-05-28 | clk: ingenic: Mark ingenic_tcu_of_match as __maybe_unused | Stephen Boyd | 1 | -1/+1 |
| 2020-05-28 | clk: X1000: Add FIXDIV for SSI clock of X1000. | 周琰杰 (Zhou Yanjie) | 1 | -6/+111 |
| 2020-05-28 | clk: Ingenic: Add CGU driver for X1830. | 周琰杰 (Zhou Yanjie) | 3 | -0/+459 |
| 2020-05-28 | clk: Ingenic: Adjust cgu code to make it compatible with X1830. | 周琰杰 (Zhou Yanjie) | 7 | -4/+41 |
| 2020-05-28 | clk: Ingenic: Remove unnecessary spinlock when reading registers. | 周琰杰 (Zhou Yanjie) | 1 | -11/+1 |
| 2020-05-28 | clk: intel: remove redundant initialization of variable rate64 | Colin Ian King | 1 | -1/+1 |
| 2020-05-28 | clk: versatile: Fix kconfig dependency on COMMON_CLK_VERSATILE | Rob Herring | 1 | -7/+4 |
| 2020-05-27 | clk: mmp2: Add audio clock controller driver | Lubomir Rintel | 3 | -0/+450 |
| 2020-05-27 | clk: mmp2: Add support for power islands | Lubomir Rintel | 4 | -1/+168 |
| 2020-05-27 | clk: mmp2: Add the audio clock | Lubomir Rintel | 1 | -0/+4 |
| 2020-05-27 | clk: mmp2: Add the I2S clocks | Lubomir Rintel | 1 | -0/+46 |
| 2020-05-27 | clk: mmp2: Rename mmp2_pll_init() to mmp2_main_clk_init() | Lubomir Rintel | 1 | -2/+2 |
| 2020-05-27 | clk: mmp2: Move thermal register defines up a bit | Lubomir Rintel | 1 | -4/+4 |
| 2020-05-27 | clk: mmp: frac: Allow setting bits other than the numerator/denominator | Lubomir Rintel | 2 | -0/+4 |
| 2020-05-27 | clk: mmp: frac: Do not lose last 4 digits of precision | Lubomir Rintel | 1 | -8/+16 |
| 2020-05-27 | clk: ast2600: Fix AHB clock divider for A1 | Eddie James | 1 | -6/+25 |
| 2020-05-27 | clk: clk-flexgen: fix clock-critical handling | Alain Volmat | 1 | -0/+1 |
| 2020-05-27 | clk: bcm2835: Constify struct debugfs_reg32 | Rikard Falkeborn | 1 | -3/+3 |
| 2020-05-26 | clk: sprd: add mipi_csi_xx gate clocks | Chunyan Zhang | 1 | -0/+32 |
| 2020-05-26 | clk: sprd: check its parent status before reading gate clock | Chunyan Zhang | 2 | -0/+16 |
| 2020-05-26 | clk: versatile: remove redundant assignment to pointer clk | Colin Ian King | 1 | -1/+1 |
| 2020-05-26 | clk: ti: dra7: remove two unused symbols | Jason Yan | 1 | -9/+0 |
| 2020-05-26 | clk: at91: allow setting all PMC clock parents via DT | Michał Mirosław | 10 | -10/+38 |
| 2020-05-26 | clk: at91: allow setting PCKx parent via DT | Michał Mirosław | 12 | -13/+45 |
