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path: root/drivers/clk/zte/clk.h
AgeCommit message (Expand)AuthorFilesLines
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner1-4/+1
2017-12-21clk: move clock common macros out from vendor directoriesChunyan Zhang1-18/+0
2017-04-12clk: zte: pd_bit is not 0 on zx296718Shawn Guo1-1/+5
2017-01-09clk: zte: add audio clocks for zx296718Jun Nie1-0/+21
2016-09-14clk: zx: register ZX296718 clocksJun Nie1-0/+125
2016-09-14clk: zx: reform pll config info to ease code extensionJun Nie1-0/+4
2015-07-28clk: zx: Add audio div clock method for zx296702Jun Nie1-0/+9
2015-06-11clk: zx: add clock support to zx296702Jun Nie1-0/+32