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path: root/drivers/clk/sunxi-ng
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2017-07-24clk: sunxi-ng: sun5i: Add clk_set_rate_parent to the CPU clockMaxime Ripard1-1/+1
2017-06-16clk: sunxi-ng: Staticize ccu_mux_helper_unapply_prediv()Stephen Boyd1-1/+1
2017-06-16Merge tag 'sunxi-clk-for-4.13' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd21-260/+1562
2017-06-14Merge tag 'sunxi-clk-fixes-for-4.12' of https://git.kernel.org/pub/scm/linux/...Stephen Boyd5-4/+9
2017-06-07clk: sunxi-ng: Move all clock types to a libraryStephen Boyd2-132/+22
2017-06-07clk: sunxi-ng: a83t: Add support for A83T's PRCMChen-Yu Tsai1-0/+107
2017-06-07clk: sunxi-ng: select SUNXI_CCU_MULT for sun8i-a83tArnd Bergmann1-0/+1
2017-06-07clk: sunxi-ng: a83t: Fix audio PLL divider offsetChen-Yu Tsai1-1/+1
2017-06-07clk: sunxi-ng: a83t: Fix PLL lock status register offsetChen-Yu Tsai1-1/+1
2017-06-07clk: sunxi-ng: Add driver for A83T CCUChen-Yu Tsai4-0/+998
2017-06-07clk: sunxi-ng: Support multiple variable pre-dividersChen-Yu Tsai9-47/+54
2017-06-07clk: sunxi-ng: de2: fix wrong pointer passed to PTR_ERR()Wei Yongjun1-1/+1
2017-06-07clk: sunxi-ng: sun5i: Export video PLLsMaxime Ripard1-2/+4
2017-06-07clk: sunxi-ng: mux: Re-adjust parent rateMaxime Ripard1-5/+28
2017-06-07clk: sunxi-ng: mux: Change pre-divider application function prototypeMaxime Ripard5-33/+28
2017-06-07clk: sunxi-ng: mux: split out the pre-divider computation codeMaxime Ripard1-12/+20
2017-06-07clk: sunxi-ng: mux: Don't just rely on the parent for CLK_SET_RATE_PARENTMaxime Ripard1-13/+1
2017-06-07clk: sunxi-ng: div: Switch to divider_round_rateMaxime Ripard1-23/+4
2017-06-07clk: sunxi-ng: Pass the parent and a pointer to the clocks round rateMaxime Ripard6-18/+25
2017-06-07clk: sunxi-ng: explicitly include linux/spinlock.hTobias Klauser1-0/+1
2017-06-07clk: sunxi-ng: add support for DE2 CCUIcenowy Zheng4-0/+294
2017-05-31clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCMChen-Yu Tsai1-1/+3
2017-05-31clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCMChen-Yu Tsai1-1/+3
2017-05-25clk: sunxi-ng: sun5i: Fix ahb_bist_clk definitionBoris Brezillon1-1/+1
2017-05-18clk: sunxi-ng: enable SUNXI_CCU_MP for PRCMArnd Bergmann1-0/+1
2017-05-14clk: sunxi-ng: v3s: Fix usb otg device reset bitYong Deng1-1/+1
2017-05-14clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offsetChen-Yu Tsai1-1/+1
2017-05-10Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds17-53/+710
2017-04-28clk: sunxi-ng: always select CCU_GATEArnd Bergmann1-1/+1
2017-04-21Merge tag 'sunxi-clk-for-4.12-2' of https://git.kernel.org/pub/scm/linux/kern...Stephen Boyd7-18/+17
2017-04-19Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd13-37/+695
2017-04-13clk: sunxi-ng: a80: Fix audio PLL comment not matching actual codeChen-Yu Tsai1-2/+1
2017-04-13clk: sunxi-ng: Fix round_rate/set_rate multiplier minimum mismatchChen-Yu Tsai2-3/+3
2017-04-13clk: sunxi-ng: use 1 as fallback for minimum multiplierChen-Yu Tsai4-11/+11
2017-04-13clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate changeChen-Yu Tsai1-0/+11
2017-04-13clk: sunxi-ng: Add clk notifier to gate then ungate PLL clocksChen-Yu Tsai2-0/+61
2017-04-13clk: sunxi-ng: fix build failure in ccu-sun9i-a80 driverTobias Regnery1-0/+1
2017-04-13clk: sunxi-ng: fix build error without CONFIG_RESET_CONTROLLERTobias Regnery1-0/+1
2017-04-10clk: sunxi-ng: fix PRCM CCU CLK_NUMBER valueIcenowy Zheng1-1/+1
2017-04-10clk: sunxi-ng: fix PRCM CCU ir clk parentIcenowy Zheng1-1/+1
2017-04-06clk: sunxi-ng: Display index when clock registration failsPriit Laes1-2/+2
2017-04-05clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factorChen-Yu Tsai1-7/+11
2017-04-05clk: sunxi-ng: a80: Remodel CPU cluster PLLs as N-type multiplier clocksChen-Yu Tsai1-18/+52
2017-04-05clk: sunxi-ng: mult: Support PLL lock detectionChen-Yu Tsai2-0/+4
2017-04-04clk: sunxi-ng: add support for PRCM CCUsIcenowy Zheng4-0/+247
2017-03-20clk: sunxi-ng: fix recalc_rate formula of NKMP clocksIcenowy Zheng1-1/+1
2017-03-20clk: sunxi-ng: Fix div/mult settings for osc12M on A64Philipp Tomsich1-1/+1
2017-03-06clk: sunxi-ng: sun5i: Fix mux width for csi clockPriit Laes1-1/+1
2017-03-06clk: sunxi-ng: tighten SoC deps on explicit AllWinner SoCsPeter Robinson1-0/+8
2017-03-06clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driverIcenowy Zheng3-9/+323