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path: root/drivers/clk/rockchip/clk-pll.c
AgeCommit message (Expand)AuthorFilesLines
2015-11-23clk: rockchip: add new pll-type for rk3036 and similar socsXing Zheng1-1/+257
2015-10-01clk: rockchip: don't use clk_ APIs in the pll init-callbackHeiko Stübner1-61/+74
2015-08-24clk: rockchip: register pll mux before pll itselfHeiko Stuebner1-31/+32
2015-08-24clk: rockchip: Convert to clk_hw based provider APIsStephen Boyd1-9/+9
2015-07-28clk: rockchip: Fix PLL bandwidthDouglas Anderson1-9/+9
2015-07-20clk: rockchip: Properly include clk.hStephen Boyd1-1/+0
2015-06-04clk: make several parent names constUwe Kleine-König1-4/+4
2014-11-25clk: rockchip: add optional sync to pll rate parametersHeiko Stuebner1-0/+50
2014-11-25clk: rockchip: setup pll_mux data earlierHeiko Stuebner1-14/+13
2014-11-25clk: rockchip: add ability to specify pll-specific flagsHeiko Stuebner1-1/+3
2014-09-27clk: rockchip: change pll rate without a clk-notifierDoug Anderson1-50/+13
2014-07-13clk: rockchip: add clock type for pll clocks and pll used on rk3066Heiko Stübner1-0/+431