Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2016-11-01 | clk: qcom: Enable FSM mode for votable alpha PLLs | Rajendra Nayak | 1 | -28/+3 |
2015-08-24 | clk: qcom: Convert to clk_hw based provider APIs | Stephen Boyd | 1 | -6/+2 |
2015-07-28 | Merge branch 'clk-determine-rate-struct' into clk-next | Stephen Boyd | 1 | -7/+11 |
2015-07-27 | clk: change clk_ops' ->determine_rate() prototype | Boris Brezillon | 1 | -7/+11 |
2015-07-07 | clk: qcom: Add support for SR2 PLLs | Georgi Djakov | 1 | -0/+75 |
2015-03-26 | clk: qcom: fix simple_return.cocci warnings | Fengguang Wu | 1 | -5/+1 |
2015-02-02 | clk: Add rate constraints to clocks | Tomeu Vizoso | 1 | -0/+1 |
2014-12-03 | clk: Change clk_ops->determine_rate to return a clk_hw as the best parent | Tomeu Vizoso | 1 | -1/+1 |
2014-09-22 | clk: qcom: Add support for setting rates on PLLs | Stephen Boyd | 1 | -1/+67 |
2014-07-15 | clk: qcom: pll: Add support for configuring SR PLLs | Stephen Boyd | 1 | -3/+12 |
2014-01-16 | clk: qcom: Add support for phase locked loops (PLLs) | Stephen Boyd | 1 | -0/+222 |