Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2019-11-05 | riscv: abstract out CSR names for supervisor vs machine mode | Christoph Hellwig | 1 | -5/+5 |
2019-10-28 | riscv: add missing header file includes | Paul Walmsley | 1 | -0/+1 |
2019-08-14 | riscv: Make __fstate_clean() work correctly. | Vincent Chen | 1 | -1/+1 |
2019-08-14 | riscv: Correct the initialized flow of FP register | Vincent Chen | 1 | -0/+6 |
2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 | Thomas Gleixner | 1 | -9/+1 |
2018-10-22 | Auto-detect whether a FPU exists | Alan Kao | 1 | -4/+4 |
2018-10-22 | Allow to disable FPU support | Alan Kao | 1 | -0/+10 |
2017-09-26 | RISC-V: Task implementation | Palmer Dabbelt | 1 | -0/+69 |