Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2022-07-28 | riscv: Add support for non-coherent devices using zicbom extension | Heiko Stuebner | 1 | -0/+10 |
2020-06-08 | mm: rename flush_icache_user_range to flush_icache_user_page | Christoph Hellwig | 1 | -1/+2 |
2020-06-08 | riscv: use asm-generic/cacheflush.h | Christoph Hellwig | 1 | -59/+3 |
2020-03-03 | riscv: Use flush_icache_mm for flush_icache_user_range | Guo Ren | 1 | -1/+1 |
2019-07-18 | riscv: fix build break after macro-to-function conversion in generic cacheflu... | Paul Walmsley | 1 | -4/+59 |
2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 | Thomas Gleixner | 1 | -9/+1 |
2019-05-16 | riscv: move flush_icache_{all,mm} to cacheflush.c | Gary Guo | 1 | -1/+1 |
2018-06-07 | riscv: use NULL instead of a plain 0 | Luc Van Oostenryck | 1 | -1/+1 |
2017-11-30 | RISC-V: Allow userspace to flush the instruction cache | Andrew Waterman | 1 | -0/+6 |
2017-11-30 | RISC-V: Flush I$ when making a dirty page executable | Andrew Waterman | 1 | -4/+20 |
2017-09-26 | RISC-V: Atomic and Locking Code | Palmer Dabbelt | 1 | -0/+39 |