Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-01-03 | MIPS: Loongson1B: Change the OSC clock name | Kelvin Cheung | 1 | -1/+1 |
2017-01-03 | MIPS: Loongson1: Add watchdog support for Loongson1 board | Yang Ling | 3 | -6/+24 |
2017-01-03 | MIPS: Loongson1: Remove several redundant RTC-related macros | Yang Ling | 1 | -16/+11 |
2016-12-25 | clocksource: Use a plain u64 instead of cycle_t | Thomas Gleixner | 1 | -2/+2 |
2016-10-04 | MIPS: Add RTC support for Loongson1C board | Yang Ling | 3 | -6/+18 |
2016-10-04 | MIPS: Loongson1C: Add board support | Yang Ling | 8 | -3/+130 |
2016-05-13 | MIPS: Loongson1B: Some updates/fixes for LS1B | Kelvin Cheung | 4 | -28/+184 |
2015-09-03 | MIPS: loongsoon32: Migrate to new 'set-state' interface | Viresh Kumar | 1 | -23/+34 |
2015-06-21 | MIPS: Loongson: Naming style cleanup and rework | Huacai Chen | 12 | -0/+894 |