summaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/cpu-features.h
AgeCommit message (Expand)AuthorFilesLines
2015-04-13Merge branch '4.0-fixes' into mips-for-linux-nextRalf Baechle1-1/+35
2015-04-10MIPS: Fix cpu_has_mips_r2_exec_hazard.Ralf Baechle1-1/+32
2015-04-08MIPS: Correct FP ISA requirementsMaciej W. Rozycki1-2/+5
2015-04-08MIPS: Correct `nofpu' non-functionalityMaciej W. Rozycki1-0/+1
2015-03-31MIPS: Add arch CDMM definitions and probingJames Hogan1-0/+4
2015-03-19MIPS: Add support for XPA.Steven J. Hill1-0/+3
2015-02-17MIPS: Handle MIPS IV, V and R2 FPU instructions on MIPS R6 as wellMarkos Chandras1-1/+2
2015-02-17MIPS: Add LLB bit and related feature for the Config 5 CP0 registerMarkos Chandras1-0/+3
2015-02-17MIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfoMarkos Chandras1-0/+3
2015-02-17MIPS: asm: cpu: Add MIPSR6 ISA definitionsLeonid Yegoshin1-4/+15
2014-11-24MIPS: detect presence of the FRE & UFR bitsPaul Burton1-0/+4
2014-09-22MIPS: Use WSBH/DSBH/DSHD on Loongson 3AChen Jie1-0/+10
2014-08-02MIPS: detect presence of MAARsPaul Burton1-0/+3
2014-08-02MIPS: Add new option for unique RI/XI exceptionsLeonid Yegoshin1-0/+3
2014-08-02MIPS: cpu: Add new cpu option for Hardware Table Walker.Markos Chandras1-0/+3
2014-05-30MIPS: Don't use RI/XI with 32-bit kernels on 64-bit CPUsDavid Daney1-1/+8
2014-05-21MIPS: math-emu: Remove most ifdefery.Ralf Baechle1-0/+11
2014-03-26MIPS: asm: cpu: Add cpu flag for Enhanced Virtual AddressingMarkos Chandras1-1/+3
2014-03-26MIPS: Detect the MSA ASEPaul Burton1-0/+6
2014-01-22MIPS: features: Add initial support for Segmentation Control registersSteven J. Hill1-0/+4
2014-01-22MIPS: features: Add initial support for TLBINVF capable coresLeonid Yegoshin1-0/+3
2013-09-24MIPS: cpu-features.h: s/MIPS53/MIPS64/Maciej W. Rozycki1-1/+1
2013-09-17MIPS: Optimize current_cpu_type() for better code.Ralf Baechle1-6/+0
2013-08-05MIPS: oprofile: Fix BUG due to smp_processor_id() in preemptible code.Ralf Baechle1-0/+2
2013-07-01MIPS: Cleanup indentation and whitespaceTony Wu1-16/+16
2013-07-01MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPSDavid Daney1-1/+5
2013-07-01MIPS: Get rid of MIPS I flag and test macros.Ralf Baechle1-1/+10
2013-05-08MIPS: Build uasm-generated code only once to avoid CPU Hotplug problemHuacai Chen1-0/+3
2013-02-21Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...Ralf Baechle1-0/+7
2013-02-19MIPS: Probe for and report hardware virtualization support.David Daney1-0/+4
2013-02-17MIPS: Add support for the M14KEc core.Steven J. Hill1-0/+3
2013-02-15MIPS: Add printing of ISA version in cpuinfo.Steven J. Hill1-0/+13
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle1-9/+9
2012-10-11MIPS: Add detection of DSP ASE Revision 2.Steven J. Hill1-0/+4
2012-10-11MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)Al Cooper1-0/+4
2012-09-13MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.Steven J. Hill1-3/+0
2012-09-13MIPS: Add base architecture support for RI and XI.Steven J. Hill1-0/+3
2010-08-05MIPS: Update comment for cpu_has_clo_clzRalf Baechle1-1/+2
2010-02-27MIPS: Implement Read Inhibit/eXecute InhibitDavid Daney1-0/+3
2010-02-02MIPS: 64-bit: Detect virtual memory sizeGuenter Roeck1-0/+7
2009-09-17MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.David Daney1-0/+3
2009-06-17MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.David Daney1-0/+4
2009-06-17MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.David Daney1-0/+4
2009-05-14MIPS: Enable CLO / CLZ instructions via separate CPU propertyRalf Baechle1-0/+9
2009-01-11MIPS: Hook Cavium OCTEON cache init into cache.cDavid Daney1-0/+3
2008-10-30MIPS: New feature test macro cpu_has_mips_rRalf Baechle1-0/+2
2008-10-11MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle1-0/+219