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2017-09-04irqchip: mips-gic: Move gic_get_c0_*_int() to asm/mips-gic.hPaul Burton1-1/+0
The linux/irqchip/mips-gic.h header is now almost empty. Move the declarations of gic_get_c0_compare_int(), gic_get_c0_perfcount_int() & gic_get_c0_fdc_int() to asm/mips-gic.h in order to close in on being able to delete the former header. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17046/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-09-04MIPS: Use mips_gic_present() in place of gic_presentPaul Burton1-3/+4
In preparation for removing the gic_present global variable, switch to using the mips_gic_present() function instead. For the most part this is a straightforward substitution. In cases which previously wrapped the GIC case in an #ifdef CONFIG_MIPS_GIC that #ifdef has been removed, since mips_gic_present() will return a compile-time constant false allowing the affected code to be optimised out anyway. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/17044/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: generic: Include asm/time.h for get_c0_*_int()Paul Burton1-0/+1
arch/mips/generic/irq.c provides implementations of the get_c0_compare_int() & get_c0_perfcount_int() functions, but doesn't include the asm/time.h header which declares them. This leads to warnings from sparse: arch/mips/generic/irq.c:36:5: warning: symbol 'get_c0_perfcount_int' was not declared. Should it be static? arch/mips/generic/irq.c:52:14: warning: symbol 'get_c0_compare_int' was not declared. Should it be static? Fix this by including asm/time.h to get the declarations of get_c0_compare_int() & get_c0_perfcount_int(). Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17167/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: generic: Include asm/bootinfo.h for plat_fdt_relocated()Paul Burton1-0/+5
arch/mips/generic/init.c provides an implementation of the plat_fdt_relocated() function, but doesn't include the asm/bootinfo.h header which declares it. This leads to a warning from sparse: arch/mips/generic/init.c:94:13: warning: symbol 'plat_fdt_relocated' was not declared. Should it be static? Fix this by including asm/bootinfo.h to get the declaration of plat_fdt_relocated(). We also #ifdef our definition of plat_fdt_relocated() such that it is only provided when CONFIG_RELOCATABLE is set, matching the header & avoiding the redundant function for non-relocatable kernels. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17166/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: generic: Move NI 169445 FIT image source to its own filePaul Burton3-25/+23
Move the NI 169445 board flattened image tree source into its own file which is concatenated into the final image tree source used to build the flattened image tree. Separating boards into different files will help us to avoid conflicts as boards are added. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Nathan Sullivan <nathan.sullivan@ni.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16940/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: generic: Move Boston FIT image source to its own filePaul Burton3-25/+23
Move the Boston board flattened image tree source into its own file which is concatenated into the final image tree source used to build the flattened image tree. Separating boards into different files will help us to avoid conflicts as boards are added. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16939/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: Allow platform to specify multiple its.S filesPaul Burton1-0/+2
In preparation for splitting arch/mips/generic/vmlinux.its.S into multiple files such that it doesn't become a conflict magnet as boards are added, allow platforms to specify a list of image tree source files which will be concatenated to form the final source used to build the image tree. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16938/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-08-29MIPS: NI 169445 board supportNathan Sullivan2-0/+31
Support the National Instruments 169445 board. Signed-off-by: Nathan Sullivan <nathan.sullivan@ni.com> Acked-by: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16782/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-07-15Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds6-193/+354
Pull MIPS updates from Ralf Baechle: "Boston platform support: - Document DT bindings - Add CLK driver for board clocks CM: - Avoid per-core locking with CM3 & higher - WARN on attempt to lock invalid VP, not BUG CPS: - Select CONFIG_SYS_SUPPORTS_SCHED_SMT for MIPSr6 - Prevent multi-core with dcache aliasing - Handle cores not powering down more gracefully - Handle spurious VP starts more gracefully DSP: - Add lwx & lhx missaligned access support eBPF: - Add MIPS support along with many supporting change to add the required infrastructure Generic arch code: - Misc sysmips MIPS_ATOMIC_SET fixes - Drop duplicate HAVE_SYSCALL_TRACEPOINTS - Negate error syscall return in trace - Correct forced syscall errors - Traced negative syscalls should return -ENOSYS - Allow samples/bpf/tracex5 to access syscall arguments for sane traces - Cleanup from old Kconfig options in defconfigs - Fix PREF instruction usage by memcpy for MIPS R6 - Fix various special cases in the FPU eulation - Fix some special cases in MIPS16e2 support - Fix MIPS I ISA /proc/cpuinfo reporting - Sort MIPS Kconfig alphabetically - Fix minimum alignment requirement of IRQ stack as required by ABI / GCC - Fix special cases in the module loader - Perform post-DMA cache flushes on systems with MAARs - Probe the I6500 CPU - Cleanup cmpxchg and add support for 1 and 2 byte operations - Use queued read/write locks (qrwlock) - Use queued spinlocks (qspinlock) - Add CPU shared FTLB feature detection - Handle tlbex-tlbp race condition - Allow storing pgd in C0_CONTEXT for MIPSr6 - Use current_cpu_type() in m4kc_tlbp_war() - Support Boston in the generic kernel Generic platform: - yamon-dt: Pull YAMON DT shim code out of SEAD-3 board - yamon-dt: Support > 256MB of RAM - yamon-dt: Use serial* rather than uart* aliases - Abstract FDT fixup application - Set RTC_ALWAYS_BCD to 0 - Add a MAINTAINERS entry core kernel: - qspinlock.c: include linux/prefetch.h Loongson 3: - Add support Perf: - Add I6500 support SEAD-3: - Remove GIC timer from DT - Set interrupt-parent per-device, not at root node - Fix GIC interrupt specifiers SMP: - Skip IPI setup if we only have a single CPU VDSO: - Make comment match reality - Improvements to time code in VDSO" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (86 commits) locking/qspinlock: Include linux/prefetch.h MIPS: Fix MIPS I ISA /proc/cpuinfo reporting MIPS: Fix minimum alignment requirement of IRQ stack MIPS: generic: Support MIPS Boston development boards MIPS: DTS: img: Don't attempt to build-in all .dtb files clk: boston: Add a driver for MIPS Boston board clocks dt-bindings: Document img,boston-clock binding MIPS: Traced negative syscalls should return -ENOSYS MIPS: Correct forced syscall errors MIPS: Negate error syscall return in trace MIPS: Drop duplicate HAVE_SYSCALL_TRACEPOINTS select MIPS16e2: Provide feature overrides for non-MIPS16 systems MIPS: MIPS16e2: Report ASE presence in /proc/cpuinfo MIPS: MIPS16e2: Subdecode extended LWSP/SWSP instructions MIPS: MIPS16e2: Identify ASE presence MIPS: VDSO: Fix a mismatch between comment and preprocessor constant MIPS: VDSO: Add implementation of gettimeofday() fallback MIPS: VDSO: Add implementation of clock_gettime() fallback MIPS: VDSO: Fix conversions in do_monotonic()/do_monotonic_coarse() MIPS: Use current_cpu_type() in m4kc_tlbp_war() ...
2017-07-11MIPS: generic: Support MIPS Boston development boardsPaul Burton2-0/+37
Add support for the MIPS Boston development board to generic kernels, which essentially amounts to: - Adding the device tree source for the MIPS Boston board. - Adding a Kconfig fragment which enables the appropriate drivers for the MIPS Boston board. With these changes in place generic kernels will support the board by default, and kernels with only the drivers needed for Boston enabled can be configured by setting BOARDS=boston during configuration. For example: $ make ARCH=mips 64r6el_defconfig BOARDS=boston Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16485/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-06-28MIPS: SEAD-3: Set interrupt-parent per-device, not at root nodePaul Burton1-6/+20
The SEAD-3 board may be configured with or without a MIPS Global Interrupt Controller (GIC). Because of this we have a device tree with a default case of a GIC present, and code to fixup the device tree based upon a configuration register that indicates the presence of the GIC. In order to keep this DT fixup code simple, the interrupt-parent property was specified at the root node of the SEAD-3 DT, allowing the fixup code to simply change this property to the phandle of the CPU interrupt controller if a GIC is not present & affect all interrupt-using devices at once. This however causes a problem if we do have a GIC & the device tree is used as-is, because the interrupt-parent property of the root node applies to the CPU interrupt controller node. This causes a cycle when of_irq_init() attempts to probe interrupt controllers in order and boots fail due to a lack of configured interrupts, with this message printed on the kernel console: [ 0.000000] OF: of_irq_init: children remain, but no parents Fix this by removing the interrupt-parent property from the DT root node & instead setting it for each device which uses interrupts, ensuring that the CPU interrupt controller node has no interrupt-parent & allowing of_irq_init() to identify it as the root interrupt controller. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reported-by: Keng Koh <keng.koh@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16187/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-06-28MIPS: generic: Abstract FDT fixup applicationPaul Burton2-22/+38
Introduce an apply_mips_fdt_fixups() function which can apply fixups to an FDT based upon an array of fixup descriptions. This abstracts that functionality such that legacy board code can apply FDT fixups without requiring lots of duplication. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16184/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-06-28MIPS: generic/yamon-dt: Use serial* rather than uart* aliasesPaul Burton1-2/+2
Name aliases in the SEAD-3 device tree serial0 & serial1, rather than uart0 & uart1. This allows the core serial code to make use of the aliases to ensure that the UARTs are consistently numbered as expected rather than having the numbering depend upon probe order. When translating YAMON-provided serial configuration to a device tree stdout-path property adjust accordingly, such that we continue to reference a valid alias. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16183/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-06-28MIPS: generic/yamon-dt: Support > 256MB of RAMPaul Burton2-22/+87
YAMON can expose more than 256MB of RAM to Linux on Malta by passing an ememsize environment variable with the full size, but the kernel then needs to be careful to choose the corresponding physical memory regions, avoiding the IO memory window. This is platform dependent, and on Malta it also depends on the memory layout which varies between system controllers. Extend yamon_dt_amend_memory() to generically handle this by taking [e]memsize bytes of memory from an array of memory regions passed in as a new parameter. Board code provides this array as appropriate depending on its own memory map. [paul.burton@imgtec.com: SEAD-3 supports 384MB DDR from 0] Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16182/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-06-28MIPS: generic/yamon-dt: Pull YAMON DT shim code out of SEAD-3 boardPaul Burton4-174/+203
In preparation for supporting other YAMON-using boards (Malta) & sharing code to translate information from YAMON into device tree properties, pull the code doing so for the kernel command line, system memory & serial configuration out of the SEAD-3 board code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16181/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-06-14clocksource/drivers: Rename clocksource_probe to timer_probeDaniel Lezcano1-1/+1
The function name is now renamed to 'timer_probe' for consistency with the CLOCKSOURCE_OF_DECLARE => TIMER_OF_DECLARE change. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2017-01-03MIPS: generic/kexec: add support for a DTB passed in a separate bufferMarcin Nowakowski2-0/+45
Signed-off-by: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14615/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-01-03MIPS: platform: Allow for DTB to be moved during kernel relocationMarcin Nowakowski1-0/+13
Add plat_fdt_relocated(void*) API to allow the kernel relocation code to update platform's information about the DTB location if the DTB had to be moved due to being placed in a location used by the relocated kernel. Signed-off-by: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14611/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-11-04MIPS: generic: Fix KASLR for generic kernel.Matt Redfearn1-6/+10
The KASLR code requires that the plat_get_fdt() function return the address of the device tree, and it must be available early in the boot, before prom_init() is called. Move the code determining the address of the device tree into plat_get_fdt, and call that from prom_init(). The fdt pointer will be set up by plat_get_fdt() called from relocate_kernel initially and once the relocated kernel has started, prom_init() will use it again to determine the address in the relocated image. Fixes: eed0eabd12ef ("MIPS: generic: Introduce generic DT-based board support") Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14415/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-06MIPS: generic: Convert SEAD-3 to a generic boardPaul Burton3-0/+385
Convert the MIPS SEAD-3 board support to be a generic board, supported by generic kernels. Because the SEAD-3 boot protocol was defined long ago and we don't want to force a switch to the UHI protocol, SEAD-3 is added as a legacy board which is detected by reading the REVISION register. This may technically not be a valid memory read & future work will include attempting to handle that gracefully. In practice since SEAD-3 is the only legacy board supported by the generic kernel so far the read will only happen on SEAD-3 boards, and even once Malta is converted the same REVISION register exists there too. Other boards such as Boston, Ci20 & Ci40 will use the UHI boot protocol & thus not run any of the legacy board detect functions. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-10-06MIPS: generic: Introduce generic DT-based board supportPaul Burton7-0/+339
Introduce a "generic" platform, which aims to be board-agnostic by making use of device trees passed by the boot protocol defined in the MIPS UHI (Universal Hosting Interface) specification. Provision is made for supporting boards which use a legacy boot protocol that can't be changed, but adding support for such boards or any others is left to followon patches. Right now the built kernels expect to be loaded to 0x80100000, ie. in kseg0. This is fine for the vast majority of MIPS platforms, but nevertheless it would be good to remove this limitation in the future by mapping the kernel via the TLB such that it can be loaded anywhere & map itself appropriately. Configuration is handled by dynamically generating configs using scripts/kconfig/merge_config.sh, somewhat similar to the way powerpc makes use of it. This allows for variations upon the configuration, eg. differing architecture revisions or subsets of driver support for differing boards, to be handled without having a large number of defconfig files. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14353/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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