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2023-01-10arm64: dts: qcom: msm8992-libra: Fix the memory mapKonrad Dybcio1-17/+60
The memory map was wrong. Fix it to prevent the device from randomly rebooting. Fixes: 0f5cdb31e850 ("arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219131918.446587-2-konrad.dybcio@linaro.org
2023-01-10arm64: dts: qcom: msm8992: Don't use sfpb mutexKonrad Dybcio1-4/+0
MSM8992 uses the same mutex hardware as MSM8994. This was wrong from the start, but never presented as an issue until the sfpb compatible was given different driver data. Fixes: 6a6d1978f9c0 ("arm64: dts: msm8992 SoC and LG Bullhead (Nexus 5X) support") Reported-by: Eugene Lepshy <fekz115@gmail.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221219131918.446587-1-konrad.dybcio@linaro.org
2023-01-10arm64: dts: msm8994-angler: fix the memory mapDominik Kobinski1-3/+16
Add reserved regions for memory hole and tz app mem to prevent rebooting. Also enable cont_splash_mem, it is the same as the generic 8994 one. Reported-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Dominik Kobinski <dominikkobinski314@gmail.com> Reviewed-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221230194845.57780-1-dominikkobinski314@gmail.com
2022-12-29arm64: dts: qcom: sm8350: correct SDHCI interconnect argumentsKrzysztof Kozlowski1-2/+2
The interconnect providers accept only one argument (cells == 1), so fix a copy&paste from SM8450: sm8350-hdk.dtb: mmc@8804000: interconnects: [[74, 9, 0], [75, 1, 0], [76, 2, 0], [77, 36, 0]] is too long Fixes: 60477435e4de ("arm64: dts: qcom: sm8350: Add SDHCI2") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221224214351.18215-1-krzysztof.kozlowski@linaro.org
2022-12-28Revert "arm64: dts: qcom: sm8250: Disable the not yet supported cluster idle ↵Ulf Hansson1-1/+0
state" Due to recent improvements of the cluster idle state support for Qcom based platforms, we are now able to support the deepest cluster idle state. Let's therefore revert the earlier workaround. This reverts commit cadaa773bcf1 ("arm64: dts: qcom: sm8250: Disable the not yet supported cluster idle state"), which is available from v6.1-rc6. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221122123713.65631-1-ulf.hansson@linaro.org
2022-12-27arm64: dts: msm8992-bullhead: add memory hole regionDominik Kobinski1-0/+6
Add region for memory hole present on bullhead in order to fix a reboot issue on recent kernels Reported-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Dominik Kobinski <dominikkobinski314@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Petr Vorel <petr.vorel@gmail.com> Reviewed-by: Petr Vorel <petr.vorel@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221211100501.82323-1-dominikkobinski314@gmail.com
2022-12-27arm64: dts: qcom: sc8280xp: fix USB-DP PHY nodesJohan Hovold1-54/+23
Update the USB4-USB3-DP QMP PHY nodes to match the new binding which specifically includes the missing register regions (e.g. DP_PHY) and allows for supporting DisplayPort Alternate Mode. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221121085058.31213-16-johan+linaro@kernel.org
2022-12-27arm64: dts: qcom: sc8280xp: fix primary USB-DP PHY resetJohan Hovold1-1/+1
The vendor kernel is using the GCC_USB4_DP_PHY_PRIM_BCR and GCC_USB4_1_DP_PHY_PRIM_BCR resets for the USB4-USB3-DP QMP PHYs. Update the primary USB-DP PHY node to match. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221121085058.31213-15-johan+linaro@kernel.org
2022-12-06arm64: dts: qcom: sc8280xp: fix UFS DMA coherencyJohan Hovold1-0/+2
The SC8280XP UFS controllers are cache coherent and must be marked as such in the devicetree to avoid potential data corruption. Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") Cc: stable@vger.kernel.org # 6.0 Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221205100837.29212-3-johan+linaro@kernel.org
2022-12-06arm64: dts: qcom: sc7280: Add DT for sc7280-herobrine-zombieOwen Yang4-0/+346
Add DT for sc7280-herobrine-zombie Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Owen Yang <ecs.taipeikernel@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221205133603.v15.2.I80aa32497bfd67bc8a372c1418ccc443ccf193e4@changeid
2022-12-06arm64: dts: qcom: sm8250-sony-xperia-edo: fix no-mmc property for SDHCIKrzysztof Kozlowski1-1/+1
There is no "no-emmc" property, so intention for SD/SDIO only nodes was to use "no-mmc": qcom/sm8250-sony-xperia-edo-pdx206.dtb: mmc@8804000: Unevaluated properties are not allowed ('no-emmc' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204094438.73288-6-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: sdm845-sony-xperia-tama: fix no-mmc property for SDHCIKrzysztof Kozlowski1-1/+1
There is no "no-emmc" property, so intention for SD/SDIO only nodes was to use "no-mmc": qcom/sdm845-sony-xperia-tama-akatsuki.dtb: mmc@8804000: Unevaluated properties are not allowed ('no-emmc' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204094438.73288-5-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: sda660-inforce-ifc6560: fix no-mmc property for SDHCIKrzysztof Kozlowski1-1/+1
There is no "no-emmc" property, so intention for SD/SDIO only nodes was to use "no-mmc": qcom/sda660-inforce-ifc6560.dtb: mmc@c084000: Unevaluated properties are not allowed ('no-emmc' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204094438.73288-4-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: sa8155p-adp: fix no-mmc property for SDHCIKrzysztof Kozlowski1-1/+1
There is no "no-emmc" property, so intention for SD/SDIO only nodes was to use "no-mmc": qcom/sa8155p-adp.dtb: mmc@8804000: Unevaluated properties are not allowed ('no-emmc' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204094438.73288-3-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: qrb5165-rb: fix no-mmc property for SDHCIKrzysztof Kozlowski1-1/+1
There is no "no-emmc" property, so intention for SD/SDIO only nodes was to use "no-mmc": qcom/qrb5165-rb5.dtb: mmc@8804000: Unevaluated properties are not allowed ('no-emmc' was unexpected) Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204094438.73288-2-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: sm8450: align MMC node names with dtschemaKrzysztof Kozlowski1-1/+1
The bindings expect "mmc" for MMC/SDHCI nodes: qcom/sm8450-sony-xperia-nagara-pdx223.dtb: sdhci@8804000: $nodename:0: 'sdhci@8804000' does not match '^mmc(@.*)?$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221204094438.73288-1-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: sc7180-trogdor: use generic node namesKrzysztof Kozlowski5-13/+13
According to Devicetree specification, the node names should be somewhat generic. Use "amplifier" for max98360a and "-regulator" for fixed regulators. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221203161443.97656-1-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: sm8450-hdk: add sound supportSrinivas Kandagatla1-0/+186
Add sound support to SM8450 HDK board. Tested setup so far is only two speakers (working) and head-phones (only one channel working). Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202152054.357316-4-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: sm8450: add Soundwire and LPASSSrinivas Kandagatla1-0/+324
Add Soundwire controllers, Low Power Audio SubSystem (LPASS) devices and LPASS pin controller. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202152054.357316-3-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: sm8450: add GPR nodeSrinivas Kandagatla1-0/+40
Add Generic Packet Router (GPR) device node with ADSP services. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202152054.357316-2-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: sa8540p-ride: enable PCIe supportBrian Masney1-0/+53
Add the vreg_l11a, pcie3a, pcie3a_phy, and tlmm nodes that are necessary in order to get PCIe working on the QDrive3. This patch also increases the width of the ranges property for the PCIe switch that's found on this platform. Note that this change requires the latest trustzone (TZ) firmware that's available from Qualcomm as of November 2022. If this is used against a board with the older firmware, then the board will go into ramdump mode when PCIe is probed on startup. The ranges property is overridden in this sa8540p-ride.dts file since this is what's used to describe the QDrive3 variant with dual SoCs. There's another variant of this board that only has a single SoC where this change is not applicable, and hence why this specific change was not done in sa8540p.dtsi. These changes were derived from various patches that Qualcomm delivered to Red Hat in a downstream kernel. Signed-off-by: Brian Masney <bmasney@redhat.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221202120918.2252647-1-bmasney@redhat.com
2022-12-06arm64: dts: qcom: sm6115: Add smmu fallback to qcom generic compatibleAdam Skladowski1-1/+1
Add fallback to generic qcom mmu-500 implementation. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-13-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: sm6115: Add WCN nodeAdam Skladowski1-0/+22
Add WCN node to allow using wifi module. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-12-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: sm6115: Add i2c/spi nodesAdam Skladowski1-0/+290
Add I2C/SPI nodes for SM6115. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-11-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: sm6115: Add GPI DMAAdam Skladowski1-0/+20
Add GPI DMA node which will be wired to i2c/spi/uart. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-10-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: sm6115: Add mdss/dpu nodeAdam Skladowski1-2/+185
Add mdss and dpu node to enable display support on SM6115. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-9-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: sm6115: Add dispcc nodeAdam Skladowski1-0/+14
Add display clock controller to allow controlling display related clocks. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> [bjorn: Pushed dsi_phy reference into next patch] Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-8-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: sm6115: Add rpm-stats nodeAdam Skladowski1-0/+5
Add rpm stats node. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-7-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: sm6115: Add PRNG nodeAdam Skladowski1-0/+7
Add a node for the PRNG to enable hw-accelerated pseudo-random number generation. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-6-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: sm6115: Add TSENS nodeAdam Skladowski1-0/+11
Add nodes required for TSENS block using the common qcom,tsens-v2 binding. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-5-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: sm6115: Add cpufreq-hw supportAdam Skladowski1-0/+19
Add cpufreq-hw node and assign qcom,freq-domain properties to CPUs to enable CPU clock scaling. Signed-off-by: Adam Skladowski <a39.skl@gmail.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221130200950.144618-4-a39.skl@gmail.com
2022-12-06arm64: dts: qcom: msm8916-wingtech-wt88047: Add flash LEDLin, Meng-Bo1-0/+22
WT88047 uses OCP 8110 Flash LED driver. Add it to the device tree. Signed-off-by: Lin, Meng-Bo <linmengbo0689@protonmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221128051512.125148-1-linmengbo0689@protonmail.com
2022-12-06arm64: dts: qcom: align LED node names with dtschemaKrzysztof Kozlowski3-3/+3
The node names should be generic and DT schema expects certain pattern: qcom/msm8998-oneplus-cheeseburger.dtb: leds: 'button-backlight' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' qcom/sc7180-trogdor-coachz-r1.dtb: pwmleds: 'keyboard-backlight' does not match any of the regexes: '^led(-[0-9a-f]+)?$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221125144209.477328-1-krzysztof.kozlowski@linaro.org
2022-12-06arm64: dts: qcom: add SA8540P ride(Qdrive-3)Parikshit Pareek3-0/+295
Introduce the Qualcomm SA8540P ride automotive platform, also known as Qdrive-3 development board. This initial contribution supports SMP, CPUFreq, cluster idle, UFS, RPMh regulators, debug UART, PMICs, remoteprocs and USB. The SA8540P ride contains four PM8450 PMICs. A separate DTSI file has been created for PMIC, so that it can be used for future SA8540P based boards. Signed-off-by: Parikshit Pareek <quic_ppareek@quicinc.com> Tested-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Tested-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Eric Chanudet <echanude@redhat.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Tested-by: Andrew Halaney <ahalaney@redhat.com> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221118025158.16902-3-quic_ppareek@quicinc.com
2022-12-06arm64: dts: qcom: sm8450-nagara: Add gpio line names for TLMMKonrad Dybcio2-0/+426
Sony ever so graciously provides GPIO line names in their downstream kernel (though sometimes they are not 100% accurate and you can judge that by simply looking at them and with what drivers they are used). Add these to the PDX223&224 DTSIs to better document the hardware. Diff between 223 and 224: < gpio-line-names = "NC", /* GPIO_0 */ < "NC", < "NC", < "NC", > gpio-line-names = "TELE_SPI_MISO", /* GPIO_0 */ > "TELE_SPI_MOSI", > "TELE_SPI_CLK", > "TELE_SPI_CS_N", < "PM8010_2_RESET_N", > "NC", < "NC", > "UWIDEC_PWR_EN", < "TOF_RST_N", > "NC" < "QLINK1_REQ", < "QLINK1_EN", /* GPIO_160 */ < "QLINK1_WMSS_RESET_N", > "NC", > "NC", /* GPIO_160 */ > "NC", The tele lens setup is different on 1 IV and 5 IV and power wiring is different for some lenses, so it makes sense. As for QLINK, no idea. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117141613.19942-1-konrad.dybcio@linaro.org
2022-12-06arm64: dts: qcom: msm8994: Drop spi-max-frequency from SPI hostKonrad Dybcio1-2/+0
This is a device property, not a bus host one. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117105845.13644-1-konrad.dybcio@linaro.org
2022-12-06arm64: dts: qcom: sm8450: Supply clock from cpufreq node to CPUsManivannan Sadhasivam1-0/+9
Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks to the CPU cores. But this relationship is not represented in DTS so far. So let's make cpufreq node as the clock provider and CPU nodes as the consumers. The clock index for each CPU node is based on the frequency domain index. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117053145.10409-3-manivannan.sadhasivam@linaro.org
2022-12-06arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Add vision mezzanineBryan O'Donoghue3-0/+96
The Vision Mezzanine for the RB5 ships with an imx577 and ov9282 populated. Other sensors and components may be added or stacked with additional mezzanines. Enable the IMX577 on the vision mezzanine. An example media-ctl pipeline for the imx577 is: media-ctl --reset media-ctl -v -d /dev/media0 -V '"imx577 '22-001a'":0[fmt:SRGGB10/4056x3040 field:none]' media-ctl -V '"msm_csiphy2":0[fmt:SRGGB10/4056x3040]' media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]' media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]' media-ctl -l '"msm_csiphy2":1->"msm_csid0":0[1]' media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]' yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video0 Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117003232.589734-8-bryan.odonoghue@linaro.org
2022-12-06arm64: dts: qcom: sm8250: camss: Define ports and ports address/size cellsBryan O'Donoghue1-0/+29
Define the set of possible ports, one for each CSI PHY along with the port address and size cells @ the SoC dtsi level. Suggested-by: Konrad Dybcio <konrad.dybcio@somainline.org> Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117003232.589734-7-bryan.odonoghue@linaro.org
2022-12-06arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Add navigation ↵Bryan O'Donoghue3-96/+105
mezzanine dts Move the dts data for the rb3 navigation mezzanine into its own dts file. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117003232.589734-6-bryan.odonoghue@linaro.org
2022-12-06arm64: dts: qcom: sdm845-db845c: Use okay not ok, disabled not disable for ↵Bryan O'Donoghue1-4/+2
status Use preferred "ok" not "okay". Use preferred status "disabled" instead of "disable". There's no functional change here so no Fixes has been applied. Reported-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117003232.589734-5-bryan.odonoghue@linaro.org
2022-12-06arm64: dts: qcom: sdm845-db845c: Drop redundant reg = in portBryan O'Donoghue1-1/+0
The reg for the port is specified in the dtsi. Remove from the db845c dts. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117003232.589734-4-bryan.odonoghue@linaro.org
2022-12-06arm64: dts: qcom: sdm845-db845c: Drop redundant address-cells, size-cells ↵Bryan O'Donoghue1-2/+0
declaration sdm845.dtsi camss already defines the address-cells and size-cells for camss, no need to replicate in sdm845-db845c.dts. Reported-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117003232.589734-3-bryan.odonoghue@linaro.org
2022-12-06arm64: dts: qcom: sdm845: Define the number of available portsBryan O'Donoghue1-0/+16
The number of available ports is SoC specific so we should define it in the SoC dtsi. For the case of the sdm845 that is 4 CSI PHYs => four ports. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117003232.589734-2-bryan.odonoghue@linaro.org
2022-12-06arm64: dts: qcom: sm8350-sagami: Wire up SDHCI2Konrad Dybcio1-1/+28
Adjust regulators, add required pin setup and finally enable SDHCI2 to get the SD Card slot going on Sagami Xperias. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221116123612.34302-4-konrad.dybcio@linaro.org
2022-12-06arm64: dts: qcom: sm8350-sagami: Add GPIO line names for TLMMKonrad Dybcio2-0/+409
Sony ever so graciously provides GPIO line names in their downstream kernel (though sometimes they are not 100% accurate and you can judge that by simply looking at them and with what drivers they are used). Add these to the Sagami-common / PDX215 DTSIs to better document the hardware. Diff between 215 and common: < "NC", < "NC", > "WLC_I2C_SDA", > "WLC_I2C_SCL", < "NC", > "WLC_INT_N", > "CAM_MCLK4", < "NC", < "NC", > "TOF_RST_N", < "NC", < "NC", < "NC", > "QLINK1_REQ", > "QLINK1_EN", > "QLINK1_WMSS_RESET_N", It's pretty logical as 1 III has WLC (WireLess Charging), and an additional 3D iToF sensor. As for QLINK, no idea. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221116123612.34302-3-konrad.dybcio@linaro.org
2022-12-06arm64: dts: qcom: sm8350: Add SDHCI2Konrad Dybcio1-0/+79
Add and configure the SDHCI host responsible for (mostly) SD Card and its corresponding pins' sleep states. The setup is *literally* 1:1 with 8450 (bar SDR50/104 may not be broken). Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221116123612.34302-2-konrad.dybcio@linaro.org
2022-12-06arm64: dts: qcom: clean up 'regulator-allowed-modes' indentationJohan Hovold8-66/+44
When recently adding the missing 'regulator-allowed-modes' properties it appears that the binding example with its four-spaces indentation (corresponding to a single tab, which is still to little) was copied verbatim. Drop the unnecessary first line break after 'regulator-allowed-modes' properties and indent the single remaining continuation line properly. Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221116102054.4673-3-johan+linaro@kernel.org
2022-12-06arm64: dts: qcom: sc7280: Remove unused sleep pin control nodesSrinivasa Rao Mandadapu4-88/+0
Remove unused and redundant sleep pin control entries as they are not referenced anywhere in sc7280 based platform's device tree variants. Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> Reported-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/1668591184-21099-1-git-send-email-quic_srivasam@quicinc.com
2022-12-06arm64: dts: qcom: pmk8350: Specify PBS register for PONKonrad Dybcio1-1/+2
PMK8350 is the first PMIC to require both HLOS and PBS registers for PON to function properly (at least in theory, sm8350 sees no change). The support for it on the driver side has been added long ago, but it has never been wired up. Do so. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221115132626.7465-1-konrad.dybcio@linaro.org
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