summaryrefslogtreecommitdiffstats
path: root/arch/arc/mm
AgeCommit message (Expand)AuthorFilesLines
2014-07-23ARC: update some commentsVineet Gupta1-2/+2
2014-06-26ARC: [SMP] Enable icache coherencyVineet Gupta1-6/+19
2014-06-03ARC: Disable caches in early boot if so configuredVineet Gupta1-81/+25
2014-05-05ARC: fix mmuv2 warningVineet Gupta1-0/+4
2014-04-05ARC: [SMP] General FixesVineet Gupta1-2/+1
2014-03-26ARC: switch to generic ENTRY/END assembler annotationsVineet Gupta1-6/+4
2014-03-26ARC: support external initrdNoam Camus1-0/+27
2014-03-07ARC: Use correct PTAG register for icache flushVineet Gupta1-2/+2
2013-11-12Merge tag 'devicetree-for-3.13' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds1-7/+0
2013-11-06ARC: [SMP] TLB flushVineet Gupta1-0/+73
2013-11-06ARC: [SMP] ASID allocationVineet Gupta1-6/+8
2013-11-06ARC: Fix bogus gcc warning and micro-optimise TLB iteration loopVineet Gupta1-2/+2
2013-11-06ARC: Change calling convention of do_page_fault()Vineet Gupta2-3/+3
2013-11-06ARC: cacheflush optim - PTAG can be loop invariant if V-P is constVineet Gupta1-3/+11
2013-11-06ARC: cacheflush refactor #3: Unify the {d,i}cache flush leaf helpersVineet Gupta1-84/+55
2013-11-06ARC: cacheflush refactor #2: I and D caches lines to have same sizeVineet Gupta1-15/+15
2013-11-06ARC: cacheflush refactor #1: push aux reg ascertaining into leaf routineVineet Gupta1-10/+6
2013-11-02ARC: Incorrect mm reference used in vmalloc fault handlerVineet Gupta1-3/+3
2013-10-09of: remove early_init_dt_setup_initrd_archRob Herring1-7/+0
2013-09-12arch: mm: pass userspace fault flag to generic fault handlerJohannes Weiner1-2/+4
2013-09-12arch: mm: remove obsolete init OOM protectionJohannes Weiner1-5/+0
2013-09-10Merge tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linuxLinus Torvalds1-3/+2
2013-08-30ARC: [ASID] Track ASID allocation cycles/generationsVineet Gupta2-16/+11
2013-08-30ARC: [ASID] get_new_mmu_context() to conditionally allocate new ASIDVineet Gupta1-6/+7
2013-08-30ARC: [ASID] Refactor the TLB paranoid debug codeVineet Gupta2-20/+20
2013-08-30ARC: No need to flush the TLB in early bootVineet Gupta1-7/+0
2013-08-30ARC: MMUv4 preps/3 - Abstract out TLB Insert/DeleteVineet Gupta1-40/+54
2013-08-30ARC: MMUv4 preps/2 - Reshuffle PTE bitsVineet Gupta2-11/+3
2013-08-29ARC: MMUv4 preps/1 - Fold PTE K/U access flagsVineet Gupta2-23/+40
2013-08-29ARC: Code cosmetics (Nothing semantical)Vineet Gupta2-72/+67
2013-08-26ARC: Exception Handlers Code consolidationVineet Gupta1-7/+1
2013-07-24of: Specify initrd location using 64-bitSantosh Shilimkar1-3/+2
2013-07-09mm: invoke oom-killer from remaining unconverted page fault handlersJohannes Weiner1-2/+4
2013-07-03Merge branch 'akpm' (updates from Andrew Morton)Linus Torvalds1-36/+6
2013-07-03mm/ARC: prepare for removing num_physpages and simplify mem_init()Jiang Liu1-33/+3
2013-07-03mm: concentrate modification of totalram_pages into the mm coreJiang Liu1-1/+1
2013-07-03mm: enhance free_reserved_area() to support poisoning memory with zeroJiang Liu1-2/+2
2013-07-03mm: change signature of free_reserved_area() to fix building warningsJiang Liu1-1/+1
2013-06-27arc: delete __cpuinit usage from all arc filesPaul Gortmaker2-4/+4
2013-06-27ARC: [tlb-miss] Fix bug with CONFIG_ARC_DBG_TLB_MISS_COUNTVineet Gupta1-5/+5
2013-06-27ARC: [tlb-miss] Extraneous PTE bit testing/settingVineet Gupta1-5/+5
2013-06-26ARC: Remove explicit passing around of ECRVineet Gupta2-8/+5
2013-06-22ARC: [mm] Remove @write argument to do_page_fault()Vineet Gupta2-13/+4
2013-06-22ARC: [mm] Assume pagecache page dirty by defaultVineet Gupta2-7/+7
2013-06-22ARC: [mm] optimise VIPT dcache aliasing 2/xVineet Gupta1-0/+1
2013-06-22ARC: [mm] optimise VIPT dcache aliasing 1/xVineet Gupta1-1/+6
2013-06-22ARC: [mm] Zero page optimizationVineet Gupta1-1/+5
2013-06-22ARC: No-op full icache flush if !CONFIG_ARC_HAS_ICACHEVineet Gupta1-19/+9
2013-06-22ARC: cache detection code bitrotVineet Gupta1-21/+10
2013-06-22ARC: Disintegrate arcregs.hVineet Gupta4-9/+57
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-11 14:22:31 +0000