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2019-08-29arm64: dts: meson-gxbb-nanopi-k2: add missing modelNeil Armstrong1-0/+1
This fixes the following DT schemas check errors: meson-gxbb-nanopi-k2.dt.yaml: /: 'model' is a required property Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-g12a-x96-max: fix compatibleNeil Armstrong1-1/+1
This fixes the following DT schemas check errors: meson-g12a-x96-max.dt.yaml: /: compatible: ['amediatech,x96-max', 'amlogic,u200', 'amlogic,g12a'] is not valid under any of the given schemas Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-g12a: fix reset controller compatibleNeil Armstrong1-2/+1
This fixes the following DT schemas check errors: meson-g12a-u200.dt.yaml: reset-controller@1004: compatible:0: 'amlogic,meson-g12a-reset' is not one of ['amlogic,meson8b-reset', 'amlogic,meson-gxbb-reset', 'amlogic,meson-axg-reset'] meson-g12a-sei510.dt.yaml: reset-controller@1004: compatible:0: 'amlogic,meson-g12a-reset' is not one of ['amlogic,meson8b-reset', 'amlogic,meson-gxbb-reset', 'amlogic,meson-axg-reset'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-axg: fix MHU compatibleNeil Armstrong1-1/+1
This fixes the following DT schemas check errors: meson-axg-s400.dt.yaml: mailbox@ff63c404: compatible:0: 'amlogic,meson-gx-mhu' is not one of ['amlogic,meson-gxbb-mhu'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gxl: fix internal phy compatibleNeil Armstrong1-1/+1
This fixes the following DT schemas check errors: meson-gxl-s805x-libretech-ac.dt.yaml: ethernet-phy@8: compatible: ['ethernet-phy-id0181.4400', 'ethernet-phy-ieee802.3-c22'] is not valid under any of the given schemas Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix periphs bus node nameNeil Armstrong1-1/+1
This fixes the following DT schemas check errors: meson-gxbb-nanopi-k2.dt.yaml: periphs@c8834000: $nodename:0: 'periphs@c8834000' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' meson-gxl-s805x-libretech-ac.dt.yaml: periphs@c8834000: $nodename:0: 'periphs@c8834000' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix mhu compatibleNeil Armstrong1-1/+1
This fixes the following DT schemas check errors: meson-gxbb-nanopi-k2.dt.yaml: mailbox@404: compatible:0: 'amlogic,meson-gx-mhu' is not one of ['amlogic,meson-gxbb-mhu'] meson-gxl-s805x-libretech-ac.dt.yaml: mailbox@404: compatible:0: 'amlogic,meson-gx-mhu' is not one of ['amlogic,meson-gxbb-mhu'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix watchdog compatibleNeil Armstrong1-1/+1
This fixes the following DT schemas check errors: meson-gxbb-nanopi-k2.dt.yaml: watchdog@98d0: compatible:0: 'amlogic,meson-gx-wdt' is not one of ['amlogic,meson-gxbb-wdt'] meson-gxl-s805x-libretech-ac.dt.yaml: watchdog@98d0: compatible:0: 'amlogic,meson-gx-wdt' is not one of ['amlogic,meson-gxbb-wdt'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix spifc compatibleNeil Armstrong1-1/+1
This fixes the following DT schemas check errors: meson-gxl-s805x-libretech-ac.dt.yaml: spi@8c80: compatible:0: 'amlogic,meson-gx-spifc' is not one of ['amlogic,meson6-spifc', 'amlogic,meson-gxbb-spifc'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: fix reset controller compatibleNeil Armstrong1-1/+1
This fixes the following DT schemas check errors: meson-gxbb-nanopi-k2.dt.yaml: reset-controller@4404: compatible:0: 'amlogic,meson-gx-reset' is not one of ['amlogic,meson8b-reset', 'amlogic,meson-gxbb-reset', 'amlogic,meson-axg-reset'] Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson-gx: drop the vpu dmc memory cellNeil Armstrong1-3/+2
This fixes the following DT schemas check errors: meson-gxl-s805x-libretech-ac.dt.yaml: vpu@d0100000: reg-names: Additional items are not allowed ('dmc' was unexpected) meson-gxl-s805x-libretech-ac.dt.yaml: vpu@d0100000: reg-names: ['vpu', 'hhi', 'dmc'] is too long The 'dmc' register area was replaced by the amlogic,canvas property which was introduced in commit f1726043426c73 ("arm64: dts: meson-gx: add dmcbus and canvas nodes.") and commit cf34287986d0b6 ("arm64: dts: meson-gx: Add canvas provider node to the vpu") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson: fix ethernet mac reg formatNeil Armstrong4-9/+6
This fixes the following DT schemas check errors: meson-axg-s400.dt.yaml: soc: ethernet@ff3f0000:reg:0: [0, 4282318848, 0, 65536, 0, 4284695872, 0, 8] is too long meson-axg-s400.dt.yaml: ethernet@ff3f0000: reg: [[0, 4282318848, 0, 65536, 0, 4284695872, 0, 8]] is too short meson-g12a-u200.dt.yaml: soc: ethernet@ff3f0000:reg:0: [0, 4282318848, 0, 65536, 0, 4284695872, 0, 8] is too long meson-g12a-u200.dt.yaml: ethernet@ff3f0000: reg: [[0, 4282318848, 0, 65536, 0, 4284695872, 0, 8]] is too short meson-gxbb-nanopi-k2.dt.yaml: soc: ethernet@c9410000:reg:0: [0, 3376480256, 0, 65536, 0, 3364046144, 0, 4] is too long meson-gxl-s805x-libretech-ac.dt.yaml: soc: ethernet@c9410000:reg:0: [0, 3376480256, 0, 65536, 0, 3364046144, 0, 4] is too lon while here, also drop the redundant reg property from meson-gxl.dtsi because it had the same value as meson-gx.dtsi from which it inherits. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29arm64: dts: meson: g12a-common: add VRTCKevin Hilman1-0/+5
Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-29Merge tag 'clk-meson-dt-v5.4-3' of git://github.com/BayLibre/clk-meson into ↵Kevin Hilman4-0/+45
v5.4/dt64-2 Amlogic clk dt bindings changes for v5.4 - 3rd round * add sm1 peripheral controller bindings
2019-08-29Merge tag 'amlogic-drivers-2.1' of ↵Kevin Hilman9-2/+782
https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into v5.4/dt64-2 soc: amlogic: updates for v5.4 (round 2) - add power domain controller
2019-08-29dt-bindings: power: add Amlogic Everything-Else power domains bindingsNeil Armstrong3-0/+124
Add the bindings for the Amlogic Everything-Else power domains, controlling the Everything-Else peripherals power domains. The bindings targets the Amlogic G12A and SM1 compatible SoCs, support for earlier SoCs will be added later. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-28soc: amlogic: Add support for Everything-Else power domains controllerNeil Armstrong3-0/+504
Add support for the General Purpose Amlogic Everything-Else Power controller, with the first support for G12A and SM1 SoCs dedicated to the VPU, PCIe, USB, NNA, GE2D and Ethernet Power Domains. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-26dt-bindings: clk: meson: add sm1 periph clock controller bindingsNeil Armstrong2-0/+6
Update the documentation to support clock driver for the Amlogic SM1 SoC and expose the GP1, DSU and the CPU 1, 2 & 3 clocks. SM1 clock tree is very close, the main differences are : - each CPU core can achieve a different frequency, albeit a common PLL - a similar tree as the clock tree has been added for the DynamIQ Shared Unit - has a new GP1 PLL used for the DynamIQ Shared Unit - SM1 has additional clocks like for CSI, NanoQ an other components Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-08-20soc: amlogic: meson-gx-socinfo: Add of_node_put() before returnNishka Dasgupta1-1/+3
The variable np in function meson_gx_socinfo_init takes the return value of of_find_compatible_node, which gets a node but does not put it. If this node is not put it may cause a memory leak. Hence put np after its usefulness has been exhausted. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Fixes: a9daaba2965e ("soc: Add Amlogic SoC Information driver") Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20arm64: dts: add support for SM1 based SEI Robotics SEI610Neil Armstrong3-0/+369
Add support for the Amlogic SM1 Based SEI610 board. The SM1 SoC is a derivative of the G12A SoC Family with : - Cortex-A55 core instead of A53 - more power domains, including USB & PCIe - a neural network co-processor (NNA) - a CSI input and image processor - some changes in the audio complex, thus not yet enabled The SEI610 board is a derivative of the SEI510 board with : - removed ADC based touch button, replaced with 3x GPIO buttons - physical switch disabling on-board MICs - USB-C port for USB 2.0 OTG - On-board FTDI USB2SERIAL port for Linux console Audio, Display and USB support will be added later when support of the corresponding power domains will be added, for now they are kept disabled. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> [khilman: fix minor typo regultor -> regulator] Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20dt-bindings: arm: amlogic: add SEI Robotics SEI610 bindingsNeil Armstrong1-0/+2
Add the compatible for the Amlogic SM1 Based SEI610 board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20dt-bindings: arm: amlogic: add SM1 bindingsNeil Armstrong1-0/+3
Add bindings for the new Amlogic SM1 SoC Family. It a derivative of the G12A SoC Family with : - Cortex-A55 core instead of A53 - more power domains - a neural network co-processor - a CSI input and image processor Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20soc: amlogic: clk-measure: Add support for SM1Neil Armstrong1-0/+134
Add the clk-measurer clocks IDs for the Amlogic SM1 SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20dt-bindings: soc: amlogic: clk-measure: Add SM1 compatibleNeil Armstrong1-0/+1
Add the Amlogic SM1 Compatible for the clk-measurer IP. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDsNeil Armstrong1-0/+2
Add the SoC IDs for the S905X3 Amlogic SM1 SoC. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-20dt-bindings: clock: meson: add resets to the audio clock controllerJerome Brunet2-0/+39
Add the documentation and bindings for the resets provided by the g12a audio clock controller Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-08-12arm64: dts: meson-g12b-odroid-n2: enable DVFSNeil Armstrong1-0/+96
Enable DVFS for the Odroid-N2 by setting the clock, OPP and supply for each cores of each CPU clusters. The first cluster uses the "VDDCPU_B" power supply, and the second cluster uses the "VDDCPU_A" power supply. Each power supply can achieve 0.73V to 1.01V using 2 distinct PWM outputs clocked at 800KHz with an inverse duty-cycle. DVFS has been tested by running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations of each cluster and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-12arm64: dts: meson-g12b-khadas-vim3: add initial device-treeChristian Hewitt4-0/+576
The Khadas VIM3 uses the Amlogic S922X or A311S SoC, both based on the Amlogic G12B SoC family, on a board with the same form factor as the VIM/VIM2 models. It ships in two variants; basic and pro which differ in RAM and eMMC size: - 2GB (basic) or 4GB (pro) LPDDR4 RAM - 16GB (basic) or 32GB (pro) eMMC 5.1 storage - 16MB SPI flash - 10/100/1000 Base-T Ethernet - AP6398S Wireless (802.11 a/b/g/n/ac, BT5.0) - HDMI 2.1 video - 1x USB 2.0 + 1x USB 3.0 ports - 1x USB-C (power) with USB 2.0 OTG - 3x LED's (1x red, 1x blue, 1x white) - 3x buttons (power, function, reset) - IR receiver - M2 socket with PCIe, USB, ADC & I2C - 40pin GPIO Header - 1x micro SD card slot A common meson-g12b-khadas-vim3.dtsi is added to support both S922X and A311D SoCs supported by two variants of the board. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-12Merge tag 'clk-meson-v5.4-1' of git://github.com/BayLibre/clk-meson into ↵Kevin Hilman23-1286/+2626
v5.4/dt64 Amlogic clock changes for v5.4 * Migrate to new clock description method * Add DVFS support to g12 # gpg: Signature made Mon 12 Aug 2019 02:11:32 AM PDT # gpg: using RSA key F4E159AE18F3F56D5F1BB71BE6FC0F1C37F2DA85 # gpg: Good signature from "Jerome Brunet <jbrunet@baylibre.com>" [full] # gpg: aka "Jerome Brunet <jerome@liltaz.com>" [full] # gpg: aka "Jerome Brunet <jerome.brunet@gmail.com>" [full] * tag 'clk-meson-v5.4-1' of git://github.com/BayLibre/clk-meson: clk: meson: g12a: expose CPUB clock ID for G12B clk: meson: g12a: add notifiers to handle cpu clock change clk: meson: add g12a cpu dynamic divider driver clk: core: introduce clk_hw_set_parent() clk: meson: remove clk input helper clk: meson: remove ee input bypass clocks clk: meson: clk-regmap: migrate to new parent description method clk: meson: meson8b: migrate to the new parent description method clk: meson: axg: migrate to the new parent description method clk: meson: gxbb: migrate to the new parent description method clk: meson: g12a: migrate to the new parent description method clk: meson: remove ao input bypass clocks clk: meson: axg-aoclk: migrate to the new parent description method clk: meson: gxbb-aoclk: migrate to the new parent description method clk: meson: g12a-aoclk: migrate to the new parent description method clk: meson: axg-audio: migrate to the new parent description method clk: meson: g12a: fix hifi typo in mali parent_names
2019-08-09dt-bindings: arm: amlogic: fix x96-max/sei510 section in amlogic.yamlChristian Hewitt1-3/+3
Move amediatech,x96-max and seirobotics,sei510 to the S905D2 section and update the S905D2 description to S905D2/X2/Y2. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: amlogic: g12 CPU timers stop in suspendKevin Hilman1-0/+1
The Arm per-CPU architected timers stop ticking in suspend, when the SCP powers down the CPUs. Flag that in the DT. Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12b: support a311d and s922x cpu operating pointsChristian Hewitt4-116/+274
Meson g12b ships with a low-speed (S922X) and high-speed (A311D) variant so remove cpu_opp_table nodes in meson-g12b.dtsi and create two new dtsi that can be included in device-specific dts files. Opp points were taken from the vendor BSP kernel. Also make meson-g12b-odroid-n2.dts include the new meson-g12b-s922x.dtsi. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09dt-bindings: arm: amlogic: add support for the Khadas VIM3Christian Hewitt1-0/+3
The Khadas VIM3 uses the Amlogic S922X or A311S SoC, both based on the Amlogic G12B SoC family, on a board with the same form factor as the VIM/VIM2 models. It ships in two variants; basic and pro which differ in RAM and eMMC size: - 2GB (basic) or 4GB (pro) LPDDR4 RAM - 16GB (basic) or 32GB (pro) eMMC 5.1 storage - 16MB SPI flash - 10/100/1000 Base-T Ethernet - AP6398S Wireless (802.11 a/b/g/n/ac, BT5.0) - HDMI 2.1 video - 1x USB 2.0 + 1x USB 3.0 ports - 1x USB-C (power) with USB 2.0 OTG - 3x LED's (1x red, 1x blue, 1x white) - 3x buttons (power, function, reset) - IR receiver - M2 socket with PCIe, USB, ADC & I2C - 40pin GPIO Header - 1x micro SD card slot Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09dt-bindings: arm: amlogic: add bindings for the Amlogic G12B based A311D SoCNeil Armstrong1-0/+5
Add a specific compatible for the Amlogic G12B bases A311D SoC used in the Khadas VIM3. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09dt-bindings: arm: amlogic: add bindings for G12B based S922X SoCNeil Armstrong1-0/+1
Add a specific compatible for the Amlogic G12B family based S922X SoC to differentiate with the A311D SoC from the same family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson: add video decoder entriesMaxime Jourdan3-0/+26
This enables the video decoder for GXBB, GXL and GXM chips Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-gx: add video decoder entryMaxime Jourdan1-0/+14
Add the base video decoder node compatible with the meson vdec driver, for GX* chips. Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09dt-bindings: media: amlogic,vdec: add default compatibleMaxime Jourdan1-2/+3
The first version of the bindings is missing a generic compatible that is used by the base node (GX), and then extended by the SoC device trees (GXBB, GXL, GXM) Also change the example to use "video-codec" instead of "video-decoder", as the former is the one used in almost all cases when it comes to video decode/encode accelerators. Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson: add ethernet fifo sizesJerome Brunet3-0/+6
If unspecified in DT, the fifo sizes are not automatically detected by the dwmac1000 dma driver and the reported fifo sizes default to 0. Because of this, flow control will be turned off on the device. Add the fifo sizes provided by the datasheets in the SoC in DT so flow control may be enabled if necessary. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12b: add cpus OPP tablesNeil Armstrong1-0/+115
Add the OPP table taken from the HardKernel Odroid-N2 DTS. The Amlogic G12B SoC seems to available in 2 types : - low-speed: Cortex-A73 Cluster up to 1,704GHz - high-speed: Cortex-A73 Cluster up to 2.208GHz The Cortex-A73 Cluster can be clocked up to 1,896GHz for both types. The Vendor Amlogic A311D OPP table are slighly different, with lower voltages than the HardKernel S922X tables but seems to be high-speed type. This adds the conservative OPP table with the S922X higher voltages and the maximum low-speed OPP frequency. The values were tested to be stable on an HardKernel Odroid-N2 board running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations for both clusters and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12a: enable DVFS on G12A boardsNeil Armstrong3-0/+161
Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board by setting the clock, OPP and supply for each CPU cores. The CPU cluster power supply can achieve 0.73V to 1.01V using a PWM output clocked at 800KHz with an inverse duty-cycle. DVFS has been tested by running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12a: add cpus OPP tableNeil Armstrong1-0/+60
Add the OPP table taken from the vendor u200 and u211 DTS. The Amlogic G12A SoC seems to available in 3 types : - low-speed: up to 1,8GHz - mid-speed: up to 1,908GHz - high-speed: up to 2.1GHz And the S905X2 opp voltages are slightly higher than the S905D2 OPP voltages for the low-speed table. This adds the conservative OPP table with the S905X2 higher voltages and the maximum low-speed OPP frequency. The values were tested to be stable on an Amlogic U200 Reference Board, SeiRobotics SEI510 and X96 Max Set-Top-Boxes running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: meson-g12-common: add pwm_a on GPIOE_2 pinmuxNeil Armstrong1-0/+8
Add the ao_pinctrl subnode for the pwm_a function on GPIOE_2. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09arm64: dts: move common G12A & G12B modes to meson-g12-common.dtsiNeil Armstrong3-2405/+2440
To simplify the representation of differences betweem the G12A and G12B SoCs, move the common nodes into a meson-g12-common.dtsi file and express the CPU nodes and differences in meson-g12a.dtsi and meson-g12b.dtsi. This separation will help for DVFS and future Amlogic SM1 Family support. The sd_emmc_a quirk is added in the g12a/g12b since since it's already known the sd_emmc_a controller is fixed in the next SM1 SoC family. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2019-08-09Merge branch 'v5.4/dt' into v5.4/driversJerome Brunet2-1/+1
2019-08-09clk: meson: g12a: expose CPUB clock ID for G12BNeil Armstrong2-1/+1
Expose the CPUB clock id to add DVFS to the second CPU cluster of the Amlogic G12B SoC. Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-08-09clk: meson: g12a: add notifiers to handle cpu clock changeNeil Armstrong1-54/+481
In order to implement clock switching for the CLKID_CPU_CLK and CLKID_CPUB_CLK, notifiers are added on specific points of the clock tree : cpu_clk / cpub_clk | \- cpu_clk_dyn | | \- cpu_clk_premux0 | | |- cpu_clk_postmux0 | | | |- cpu_clk_dyn0_div | | | \- xtal/fclk_div2/fclk_div3 | | \- xtal/fclk_div2/fclk_div3 | \- cpu_clk_premux1 | |- cpu_clk_postmux1 | | |- cpu_clk_dyn1_div | | \- xtal/fclk_div2/fclk_div3 | \- xtal/fclk_div2/fclk_div3 \ sys_pll / sys1_pll This for each cluster, a single one for G12A, two for G12B. Each cpu_clk_premux1 tree is marked as read-only and CLK_SET_RATE_NO_REPARENT, to be used as "parking" clock in a safe clock frequency. A notifier is added on each cpu_clk_premux0 to detech when CCF want to change the frequency of the cpu_clk_dyn tree. In this notifier, the cpu_clk_premux1 tree is configured to use the xtal clock and then the cpu_clk_dyn is switch to cpu_clk_premux1 while CCF updates the cpu_clk_premux0 tree. A notifier is added on each sys_pll/sys1_pll to detect when CCF wants to change the PLL clock source of the cpu_clk. In this notifier, the cpu_clk is switched to cpu_clk_dyn while CCF updates the sys_pll/sys1_pll frequency. A third small notifier is added on each cpu_clk / cpub_clk and cpu_clk_dyn, add a small delay at PRE_RATE_CHANGE/POST_RATE_CHANGE to let the other notofiers change propagate before changing the cpu_clk_premux0 and sys_pll clock trees. This notifier set permits switching the cpu_clk / cpub_clk without any glitches and using a safe parking clock while switching between sub-GHz clocks using the cpu_clk_dyn tree. This setup has been tested and validated on the Amlogic G12A and G12B SoCs running the arm64 cpuburn at [1] and cycling between all the possible cpufreq translations of each cluster and checking the final frequency using the clock-measurer, script at [2]. [1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S [2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-08-09clk: meson: add g12a cpu dynamic divider driverNeil Armstrong4-0/+99
Add a clock driver for the cpu dynamic divider, this divider needs to have a flag set before setting the divider value then removed while writing the new value to the register. This drivers implements this behavior and will be used essentially on the Amlogic G12A and G12B SoCs for cpu clock trees. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-08-09clk: core: introduce clk_hw_set_parent()Neil Armstrong2-0/+7
Introduce the clk_hw_set_parent() provider call to change parent of a clock by using the clk_hw pointers. This eases the clock reparenting from clock rate notifiers and implementing DVFS with simpler code avoiding the boilerplates functions as __clk_lookup(clk_hw_get_name()) then clk_set_parent(). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2019-08-05soc: amlogic: meson-gx-socinfo: add A311D idChristian Hewitt1-0/+1
Add the SoC ID for the A311D Amlogic SoC. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-02-27 08:58:42 +0000