diff options
Diffstat (limited to 'drivers/net/wireless')
297 files changed, 20214 insertions, 7899 deletions
diff --git a/drivers/net/wireless/ath/ar5523/ar5523.c b/drivers/net/wireless/ath/ar5523/ar5523.c index 141c1b5a7b1f..9cabd342d156 100644 --- a/drivers/net/wireless/ath/ar5523/ar5523.c +++ b/drivers/net/wireless/ath/ar5523/ar5523.c @@ -104,7 +104,7 @@ static void ar5523_cmd_rx_cb(struct urb *urb) } if (urb->actual_length < sizeof(struct ar5523_cmd_hdr)) { - ar5523_err(ar, "RX USB to short.\n"); + ar5523_err(ar, "RX USB too short.\n"); goto skip; } diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c index 8f5b8eb368fa..9e1f483e1362 100644 --- a/drivers/net/wireless/ath/ath10k/core.c +++ b/drivers/net/wireless/ath/ath10k/core.c @@ -75,6 +75,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA988X_BOARD_DATA_SZ, .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca988x_ops, .decap_align_bytes = 4, .spectral_bin_discard = 0, @@ -111,6 +112,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA988X_BOARD_DATA_SZ, .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca988x_ops, .decap_align_bytes = 4, .spectral_bin_discard = 0, @@ -148,6 +150,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA9887_BOARD_DATA_SZ, .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca988x_ops, .decap_align_bytes = 4, .spectral_bin_discard = 0, @@ -184,6 +187,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA6174_BOARD_DATA_SZ, .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca6174_sdio_ops, .hw_clk = qca6174_clk, .target_cpu_freq = 176000000, @@ -216,6 +220,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA6174_BOARD_DATA_SZ, .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca988x_ops, .decap_align_bytes = 4, .spectral_bin_discard = 0, @@ -252,6 +257,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA6174_BOARD_DATA_SZ, .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca988x_ops, .decap_align_bytes = 4, .spectral_bin_discard = 0, @@ -288,6 +294,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA6174_BOARD_DATA_SZ, .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca988x_ops, .decap_align_bytes = 4, .spectral_bin_discard = 0, @@ -325,6 +332,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA6174_BOARD_DATA_SZ, .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca6174_ops, .hw_clk = qca6174_clk, .target_cpu_freq = 176000000, @@ -370,6 +378,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, }, .sw_decrypt_mcast_mgmt = true, + .rx_desc_ops = &qca99x0_rx_desc_ops, .hw_ops = &qca99x0_ops, .decap_align_bytes = 1, .spectral_bin_discard = 4, @@ -415,6 +424,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, }, .sw_decrypt_mcast_mgmt = true, + .rx_desc_ops = &qca99x0_rx_desc_ops, .hw_ops = &qca99x0_ops, .decap_align_bytes = 1, .spectral_bin_discard = 12, @@ -461,6 +471,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, }, .sw_decrypt_mcast_mgmt = true, + .rx_desc_ops = &qca99x0_rx_desc_ops, .hw_ops = &qca99x0_ops, .decap_align_bytes = 1, .spectral_bin_discard = 12, @@ -501,6 +512,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA9377_BOARD_DATA_SZ, .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca988x_ops, .decap_align_bytes = 4, .spectral_bin_discard = 0, @@ -537,6 +549,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA9377_BOARD_DATA_SZ, .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca6174_ops, .hw_clk = qca6174_clk, .target_cpu_freq = 176000000, @@ -575,6 +588,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_size = QCA9377_BOARD_DATA_SZ, .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, }, + .rx_desc_ops = &qca988x_rx_desc_ops, .hw_ops = &qca6174_ops, .hw_clk = qca6174_clk, .target_cpu_freq = 176000000, @@ -611,6 +625,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, }, .sw_decrypt_mcast_mgmt = true, + .rx_desc_ops = &qca99x0_rx_desc_ops, .hw_ops = &qca99x0_ops, .decap_align_bytes = 1, .spectral_bin_discard = 4, @@ -643,6 +658,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = { .dir = WCN3990_HW_1_0_FW_DIR, }, .sw_decrypt_mcast_mgmt = true, + .rx_desc_ops = &wcn3990_rx_desc_ops, .hw_ops = &wcn3990_ops, .decap_align_bytes = 1, .num_peers = TARGET_HL_TLV_NUM_PEERS, diff --git a/drivers/net/wireless/ath/ath10k/htt.c b/drivers/net/wireless/ath/ath10k/htt.c index 127b4e4980ef..907e1e13871a 100644 --- a/drivers/net/wireless/ath/ath10k/htt.c +++ b/drivers/net/wireless/ath/ath10k/htt.c @@ -131,6 +131,159 @@ static const enum htt_t2h_msg_type htt_10_4_t2h_msg_types[] = { HTT_T2H_MSG_TYPE_PEER_STATS, }; +const struct ath10k_htt_rx_desc_ops qca988x_rx_desc_ops = { + .rx_desc_size = sizeof(struct htt_rx_desc_v1), + .rx_desc_msdu_payload_offset = offsetof(struct htt_rx_desc_v1, msdu_payload) +}; + +static int ath10k_qca99x0_rx_desc_get_l3_pad_bytes(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc = container_of(rxd, + struct htt_rx_desc_v1, + base); + + return MS(__le32_to_cpu(rx_desc->msdu_end.qca99x0.info1), + RX_MSDU_END_INFO1_L3_HDR_PAD); +} + +static bool ath10k_qca99x0_rx_desc_msdu_limit_error(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc = container_of(rxd, + struct htt_rx_desc_v1, + base); + + return !!(rx_desc->msdu_end.common.info0 & + __cpu_to_le32(RX_MSDU_END_INFO0_MSDU_LIMIT_ERR)); +} + +const struct ath10k_htt_rx_desc_ops qca99x0_rx_desc_ops = { + .rx_desc_size = sizeof(struct htt_rx_desc_v1), + .rx_desc_msdu_payload_offset = offsetof(struct htt_rx_desc_v1, msdu_payload), + + .rx_desc_get_l3_pad_bytes = ath10k_qca99x0_rx_desc_get_l3_pad_bytes, + .rx_desc_get_msdu_limit_error = ath10k_qca99x0_rx_desc_msdu_limit_error, +}; + +static void ath10k_rx_desc_wcn3990_get_offsets(struct htt_rx_ring_rx_desc_offsets *off) +{ +#define desc_offset(x) (offsetof(struct htt_rx_desc_v2, x) / 4) + off->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status)); + off->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload)); + off->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start)); + off->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end)); + off->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start)); + off->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end)); + off->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start)); + off->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end)); + off->rx_attention_offset = __cpu_to_le16(desc_offset(attention)); + off->frag_info_offset = __cpu_to_le16(desc_offset(frag_info)); +#undef desc_offset +} + +static struct htt_rx_desc * +ath10k_rx_desc_wcn3990_from_raw_buffer(void *buff) +{ + return &((struct htt_rx_desc_v2 *)buff)->base; +} + +static struct rx_attention * +ath10k_rx_desc_wcn3990_get_attention(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return &rx_desc->attention; +} + +static struct rx_frag_info_common * +ath10k_rx_desc_wcn3990_get_frag_info(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return &rx_desc->frag_info.common; +} + +static struct rx_mpdu_start * +ath10k_rx_desc_wcn3990_get_mpdu_start(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return &rx_desc->mpdu_start; +} + +static struct rx_mpdu_end * +ath10k_rx_desc_wcn3990_get_mpdu_end(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return &rx_desc->mpdu_end; +} + +static struct rx_msdu_start_common * +ath10k_rx_desc_wcn3990_get_msdu_start(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return &rx_desc->msdu_start.common; +} + +static struct rx_msdu_end_common * +ath10k_rx_desc_wcn3990_get_msdu_end(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return &rx_desc->msdu_end.common; +} + +static struct rx_ppdu_start * +ath10k_rx_desc_wcn3990_get_ppdu_start(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return &rx_desc->ppdu_start; +} + +static struct rx_ppdu_end_common * +ath10k_rx_desc_wcn3990_get_ppdu_end(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return &rx_desc->ppdu_end.common; +} + +static u8 * +ath10k_rx_desc_wcn3990_get_rx_hdr_status(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return rx_desc->rx_hdr_status; +} + +static u8 * +ath10k_rx_desc_wcn3990_get_msdu_payload(struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v2 *rx_desc = container_of(rxd, struct htt_rx_desc_v2, base); + + return rx_desc->msdu_payload; +} + +const struct ath10k_htt_rx_desc_ops wcn3990_rx_desc_ops = { + .rx_desc_size = sizeof(struct htt_rx_desc_v2), + .rx_desc_msdu_payload_offset = offsetof(struct htt_rx_desc_v2, msdu_payload), + + .rx_desc_from_raw_buffer = ath10k_rx_desc_wcn3990_from_raw_buffer, + .rx_desc_get_offsets = ath10k_rx_desc_wcn3990_get_offsets, + .rx_desc_get_attention = ath10k_rx_desc_wcn3990_get_attention, + .rx_desc_get_frag_info = ath10k_rx_desc_wcn3990_get_frag_info, + .rx_desc_get_mpdu_start = ath10k_rx_desc_wcn3990_get_mpdu_start, + .rx_desc_get_mpdu_end = ath10k_rx_desc_wcn3990_get_mpdu_end, + .rx_desc_get_msdu_start = ath10k_rx_desc_wcn3990_get_msdu_start, + .rx_desc_get_msdu_end = ath10k_rx_desc_wcn3990_get_msdu_end, + .rx_desc_get_ppdu_start = ath10k_rx_desc_wcn3990_get_ppdu_start, + .rx_desc_get_ppdu_end = ath10k_rx_desc_wcn3990_get_ppdu_end, + .rx_desc_get_rx_hdr_status = ath10k_rx_desc_wcn3990_get_rx_hdr_status, + .rx_desc_get_msdu_payload = ath10k_rx_desc_wcn3990_get_msdu_payload, +}; + int ath10k_htt_connect(struct ath10k_htt *htt) { struct ath10k_htc_svc_conn_req conn_req; diff --git a/drivers/net/wireless/ath/ath10k/htt.h b/drivers/net/wireless/ath/ath10k/htt.h index 9a3a8907389b..f06cf39204e2 100644 --- a/drivers/net/wireless/ath/ath10k/htt.h +++ b/drivers/net/wireless/ath/ath10k/htt.h @@ -240,14 +240,7 @@ enum htt_rx_ring_flags { #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1) #define HTT_RX_RING_FILL_LEVEL_DUAL_MAC (HTT_RX_RING_SIZE - 1) -struct htt_rx_ring_setup_ring32 { - __le32 fw_idx_shadow_reg_paddr; - __le32 rx_ring_base_paddr; - __le16 rx_ring_len; /* in 4-byte words */ - __le16 rx_ring_bufsize; /* rx skb size - in bytes */ - __le16 flags; /* %HTT_RX_RING_FLAGS_ */ - __le16 fw_idx_init_val; - +struct htt_rx_ring_rx_desc_offsets { /* the following offsets are in 4-byte units */ __le16 mac80211_hdr_offset; __le16 msdu_payload_offset; @@ -261,6 +254,17 @@ struct htt_rx_ring_setup_ring32 { __le16 frag_info_offset; } __packed; +struct htt_rx_ring_setup_ring32 { + __le32 fw_idx_shadow_reg_paddr; + __le32 rx_ring_base_paddr; + __le16 rx_ring_len; /* in 4-byte words */ + __le16 rx_ring_bufsize; /* rx skb size - in bytes */ + __le16 flags; /* %HTT_RX_RING_FLAGS_ */ + __le16 fw_idx_init_val; + + struct htt_rx_ring_rx_desc_offsets offsets; +} __packed; + struct htt_rx_ring_setup_ring64 { __le64 fw_idx_shadow_reg_paddr; __le64 rx_ring_base_paddr; @@ -269,17 +273,7 @@ struct htt_rx_ring_setup_ring64 { __le16 flags; /* %HTT_RX_RING_FLAGS_ */ __le16 fw_idx_init_val; - /* the following offsets are in 4-byte units */ - __le16 mac80211_hdr_offset; - __le16 msdu_payload_offset; - __le16 ppdu_start_offset; - __le16 ppdu_end_offset; - __le16 mpdu_start_offset; - __le16 mpdu_end_offset; - __le16 msdu_start_offset; - __le16 msdu_end_offset; - __le16 rx_attention_offset; - __le16 frag_info_offset; + struct htt_rx_ring_rx_desc_offsets offsets; } __packed; struct htt_rx_ring_setup_hdr { @@ -2075,12 +2069,22 @@ static inline bool ath10k_htt_rx_proc_rx_frag_ind(struct ath10k_htt *htt, return htt->rx_ops->htt_rx_proc_rx_frag_ind(htt, rx, skb); } +/* the driver strongly assumes that the rx header status be 64 bytes long, + * so all possible rx_desc structures must respect this assumption. + */ #define RX_HTT_HDR_STATUS_LEN 64 -/* This structure layout is programmed via rx ring setup +/* The rx descriptor structure layout is programmed via rx ring setup * so that FW knows how to transfer the rx descriptor to the host. - * Buffers like this are placed on the rx ring. + * Unfortunately, though, QCA6174's firmware doesn't currently behave correctly + * when modifying the structure layout of the rx descriptor beyond what it expects + * (even if it correctly programmed during the rx ring setup). + * Therefore we must keep two different memory layouts, abstract the rx descriptor + * representation and use ath10k_rx_desc_ops + * for correctly accessing rx descriptor data. */ + +/* base struct used for abstracting the rx descritor representation */ struct htt_rx_desc { union { /* This field is filled on the host using the msdu buffer @@ -2089,6 +2093,13 @@ struct htt_rx_desc { struct fw_rx_desc_base fw_desc; u32 pad; } __packed; +} __packed; + +/* rx descriptor for wcn3990 and possibly extensible for newer cards + * Buffers like this are placed on the rx ring. + */ +struct htt_rx_desc_v2 { + struct htt_rx_desc base; struct { struct rx_attention attention; struct rx_frag_info frag_info; @@ -2103,6 +2114,240 @@ struct htt_rx_desc { u8 msdu_payload[]; }; +/* QCA6174, QCA988x, QCA99x0 dedicated rx descriptor to make sure their firmware + * works correctly. We keep a single rx descriptor for all these three + * families of cards because from tests it seems to be the most stable solution, + * e.g. having a rx descriptor only for QCA6174 seldom caused firmware crashes + * during some tests. + * Buffers like this are placed on the rx ring. + */ +struct htt_rx_desc_v1 { + struct htt_rx_desc base; + struct { + struct rx_attention attention; + struct rx_frag_info_v1 frag_info; + struct rx_mpdu_start mpdu_start; + struct rx_msdu_start_v1 msdu_start; + struct rx_msdu_end_v1 msdu_end; + struct rx_mpdu_end mpdu_end; + struct rx_ppdu_start ppdu_start; + struct rx_ppdu_end_v1 ppdu_end; + } __packed; + u8 rx_hdr_status[RX_HTT_HDR_STATUS_LEN]; + u8 msdu_payload[]; +}; + +/* rx_desc abstraction */ +struct ath10k_htt_rx_desc_ops { + /* These fields are mandatory, they must be specified in any instance */ + + /* sizeof() of the rx_desc structure used by this hw */ + size_t rx_desc_size; + + /* offset of msdu_payload inside the rx_desc structure used by this hw */ + size_t rx_desc_msdu_payload_offset; + + /* These fields are options. + * When a field is not provided the default implementation gets used + * (see the ath10k_rx_desc_* operations below for more info about the defaults) + */ + bool (*rx_desc_get_msdu_limit_error)(struct htt_rx_desc *rxd); + int (*rx_desc_get_l3_pad_bytes)(struct htt_rx_desc *rxd); + + /* Safely cast from a void* buffer containing an rx descriptor + * to the proper rx_desc structure + */ + struct htt_rx_desc *(*rx_desc_from_raw_buffer)(void *buff); + + void (*rx_desc_get_offsets)(struct htt_rx_ring_rx_desc_offsets *offs); + struct rx_attention *(*rx_desc_get_attention)(struct htt_rx_desc *rxd); + struct rx_frag_info_common *(*rx_desc_get_frag_info)(struct htt_rx_desc *rxd); + struct rx_mpdu_start *(*rx_desc_get_mpdu_start)(struct htt_rx_desc *rxd); + struct rx_mpdu_end *(*rx_desc_get_mpdu_end)(struct htt_rx_desc *rxd); + struct rx_msdu_start_common *(*rx_desc_get_msdu_start)(struct htt_rx_desc *rxd); + struct rx_msdu_end_common *(*rx_desc_get_msdu_end)(struct htt_rx_desc *rxd); + struct rx_ppdu_start *(*rx_desc_get_ppdu_start)(struct htt_rx_desc *rxd); + struct rx_ppdu_end_common *(*rx_desc_get_ppdu_end)(struct htt_rx_desc *rxd); + u8 *(*rx_desc_get_rx_hdr_status)(struct htt_rx_desc *rxd); + u8 *(*rx_desc_get_msdu_payload)(struct htt_rx_desc *rxd); +}; + +extern const struct ath10k_htt_rx_desc_ops qca988x_rx_desc_ops; +extern const struct ath10k_htt_rx_desc_ops qca99x0_rx_desc_ops; +extern const struct ath10k_htt_rx_desc_ops wcn3990_rx_desc_ops; + +static inline int +ath10k_htt_rx_desc_get_l3_pad_bytes(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + if (hw->rx_desc_ops->rx_desc_get_l3_pad_bytes) + return hw->rx_desc_ops->rx_desc_get_l3_pad_bytes(rxd); + return 0; +} + +static inline bool +ath10k_htt_rx_desc_msdu_limit_error(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + if (hw->rx_desc_ops->rx_desc_get_msdu_limit_error) + return hw->rx_desc_ops->rx_desc_get_msdu_limit_error(rxd); + return false; +} + +/* The default implementation of all these getters is using the old rx_desc, + * so that it is easier to define the ath10k_htt_rx_desc_ops instances. + * But probably, if new wireless cards must be supported, it would be better + * to switch the default implementation to the new rx_desc, since this would + * make the extension easier . + */ +static inline struct htt_rx_desc * +ath10k_htt_rx_desc_from_raw_buffer(struct ath10k_hw_params *hw, void *buff) +{ + if (hw->rx_desc_ops->rx_desc_from_raw_buffer) + return hw->rx_desc_ops->rx_desc_from_raw_buffer(buff); + return &((struct htt_rx_desc_v1 *)buff)->base; +} + +static inline void +ath10k_htt_rx_desc_get_offsets(struct ath10k_hw_params *hw, + struct htt_rx_ring_rx_desc_offsets *off) +{ + if (hw->rx_desc_ops->rx_desc_get_offsets) { + hw->rx_desc_ops->rx_desc_get_offsets(off); + } else { +#define desc_offset(x) (offsetof(struct htt_rx_desc_v1, x) / 4) + off->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status)); + off->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload)); + off->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start)); + off->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end)); + off->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start)); + off->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end)); + off->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start)); + off->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end)); + off->rx_attention_offset = __cpu_to_le16(desc_offset(attention)); + off->frag_info_offset = __cpu_to_le16(desc_offset(frag_info)); +#undef desc_offset + } +} + +static inline struct rx_attention * +ath10k_htt_rx_desc_get_attention(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_attention) + return hw->rx_desc_ops->rx_desc_get_attention(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return &rx_desc->attention; +} + +static inline struct rx_frag_info_common * +ath10k_htt_rx_desc_get_frag_info(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_frag_info) + return hw->rx_desc_ops->rx_desc_get_frag_info(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return &rx_desc->frag_info.common; +} + +static inline struct rx_mpdu_start * +ath10k_htt_rx_desc_get_mpdu_start(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_mpdu_start) + return hw->rx_desc_ops->rx_desc_get_mpdu_start(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return &rx_desc->mpdu_start; +} + +static inline struct rx_mpdu_end * +ath10k_htt_rx_desc_get_mpdu_end(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_mpdu_end) + return hw->rx_desc_ops->rx_desc_get_mpdu_end(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return &rx_desc->mpdu_end; +} + +static inline struct rx_msdu_start_common * +ath10k_htt_rx_desc_get_msdu_start(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_msdu_start) + return hw->rx_desc_ops->rx_desc_get_msdu_start(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return &rx_desc->msdu_start.common; +} + +static inline struct rx_msdu_end_common * +ath10k_htt_rx_desc_get_msdu_end(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_msdu_end) + return hw->rx_desc_ops->rx_desc_get_msdu_end(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return &rx_desc->msdu_end.common; +} + +static inline struct rx_ppdu_start * +ath10k_htt_rx_desc_get_ppdu_start(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_ppdu_start) + return hw->rx_desc_ops->rx_desc_get_ppdu_start(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return &rx_desc->ppdu_start; +} + +static inline struct rx_ppdu_end_common * +ath10k_htt_rx_desc_get_ppdu_end(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_ppdu_end) + return hw->rx_desc_ops->rx_desc_get_ppdu_end(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return &rx_desc->ppdu_end.common; +} + +static inline u8 * +ath10k_htt_rx_desc_get_rx_hdr_status(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_rx_hdr_status) + return hw->rx_desc_ops->rx_desc_get_rx_hdr_status(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return rx_desc->rx_hdr_status; +} + +static inline u8 * +ath10k_htt_rx_desc_get_msdu_payload(struct ath10k_hw_params *hw, struct htt_rx_desc *rxd) +{ + struct htt_rx_desc_v1 *rx_desc; + + if (hw->rx_desc_ops->rx_desc_get_msdu_payload) + return hw->rx_desc_ops->rx_desc_get_msdu_payload(rxd); + + rx_desc = container_of(rxd, struct htt_rx_desc_v1, base); + return rx_desc->msdu_payload; +} + #define HTT_RX_DESC_HL_INFO_SEQ_NUM_MASK 0x00000fff #define HTT_RX_DESC_HL_INFO_SEQ_NUM_LSB 0 #define HTT_RX_DESC_HL_INFO_ENCRYPTED_MASK 0x00001000 @@ -2136,7 +2381,14 @@ struct htt_rx_chan_info { * rounded up to a cache line size. */ #define HTT_RX_BUF_SIZE 2048 -#define HTT_RX_MSDU_SIZE (HTT_RX_BUF_SIZE - (int)sizeof(struct htt_rx_desc)) + +/* The HTT_RX_MSDU_SIZE can't be statically computed anymore, + * because it depends on the underlying device rx_desc representation + */ +static inline int ath10k_htt_rx_msdu_size(struct ath10k_hw_params *hw) +{ + return HTT_RX_BUF_SIZE - (int)hw->rx_desc_ops->rx_desc_size; +} /* Refill a bunch of RX buffers for each refill round so that FW/HW can handle * aggregated traffic more nicely. diff --git a/drivers/net/wireless/ath/ath10k/htt_rx.c b/drivers/net/wireless/ath/ath10k/htt_rx.c index adbaeb67eedf..771252dd6d4e 100644 --- a/drivers/net/wireless/ath/ath10k/htt_rx.c +++ b/drivers/net/wireless/ath/ath10k/htt_rx.c @@ -21,7 +21,10 @@ #define HTT_RX_RING_REFILL_RESCHED_MS 5 -static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb); +/* shortcut to interpret a raw memory buffer as a rx descriptor */ +#define HTT_RX_BUF_TO_RX_DESC(hw, buf) ath10k_htt_rx_desc_from_raw_buffer(hw, buf) + +static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb); static struct sk_buff * ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u64 paddr) @@ -128,6 +131,7 @@ static void *ath10k_htt_get_vaddr_ring_64(struct ath10k_htt *htt) static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) { + struct ath10k_hw_params *hw = &htt->ar->hw_params; struct htt_rx_desc *rx_desc; struct ath10k_skb_rxcb *rxcb; struct sk_buff *skb; @@ -163,8 +167,8 @@ static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) skb->data); /* Clear rx_desc attention word before posting to Rx ring */ - rx_desc = (struct htt_rx_desc *)skb->data; - rx_desc->attention.flags = __cpu_to_le32(0); + rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, skb->data); + ath10k_htt_rx_desc_get_attention(hw, rx_desc)->flags = __cpu_to_le32(0); paddr = dma_map_single(htt->ar->dev, skb->data, skb->len + skb_tailroom(skb), @@ -343,9 +347,14 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, struct sk_buff_head *amsdu) { struct ath10k *ar = htt->ar; + struct ath10k_hw_params *hw = &ar->hw_params; int msdu_len, msdu_chaining = 0; struct sk_buff *msdu; struct htt_rx_desc *rx_desc; + struct rx_attention *rx_desc_attention; + struct rx_frag_info_common *rx_desc_frag_info_common; + struct rx_msdu_start_common *rx_desc_msdu_start_common; + struct rx_msdu_end_common *rx_desc_msdu_end_common; lockdep_assert_held(&htt->rx_ring.lock); @@ -360,13 +369,18 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, __skb_queue_tail(amsdu, msdu); - rx_desc = (struct htt_rx_desc *)msdu->data; + rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); + rx_desc_attention = ath10k_htt_rx_desc_get_attention(hw, rx_desc); + rx_desc_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, + rx_desc); + rx_desc_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rx_desc); + rx_desc_frag_info_common = ath10k_htt_rx_desc_get_frag_info(hw, rx_desc); /* FIXME: we must report msdu payload since this is what caller * expects now */ - skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload)); - skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload)); + skb_put(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset); + skb_pull(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset); /* * Sanity check - confirm the HW is finished filling in the @@ -376,24 +390,24 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, * To prevent the case that we handle a stale Rx descriptor, * just assert for now until we have a way to recover. */ - if (!(__le32_to_cpu(rx_desc->attention.flags) + if (!(__le32_to_cpu(rx_desc_attention->flags) & RX_ATTENTION_FLAGS_MSDU_DONE)) { __skb_queue_purge(amsdu); return -EIO; } - msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags) + msdu_len_invalid = !!(__le32_to_cpu(rx_desc_attention->flags) & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); - msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0), + msdu_len = MS(__le32_to_cpu(rx_desc_msdu_start_common->info0), RX_MSDU_START_INFO0_MSDU_LENGTH); - msdu_chained = rx_desc->frag_info.ring2_more_count; + msdu_chained = rx_desc_frag_info_common->ring2_more_count; if (msdu_len_invalid) msdu_len = 0; skb_trim(msdu, 0); - skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE)); + skb_put(msdu, min(msdu_len, ath10k_htt_rx_msdu_size(hw))); msdu_len -= msdu->len; /* Note: Chained buffers do not contain rx descriptor */ @@ -411,11 +425,12 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, msdu_chaining = 1; } - last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) & + last_msdu = __le32_to_cpu(rx_desc_msdu_end_common->info0) & RX_MSDU_END_INFO0_LAST_MSDU; - trace_ath10k_htt_rx_desc(ar, &rx_desc->attention, - sizeof(*rx_desc) - sizeof(u32)); + /* FIXME: why are we skipping the first part of the rx_desc? */ + trace_ath10k_htt_rx_desc(ar, (void *)rx_desc + sizeof(u32), + hw->rx_desc_ops->rx_desc_size - sizeof(u32)); if (last_msdu) break; @@ -480,6 +495,7 @@ static int ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt *htt, struct htt_rx_in_ord_msdu_desc **msdu_desc) { struct ath10k *ar = htt->ar; + struct ath10k_hw_params *hw = &ar->hw_params; u32 paddr; struct sk_buff *frag_buf; struct sk_buff *prev_frag_buf; @@ -488,12 +504,12 @@ static int ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt *htt, struct htt_rx_desc *rxd; int amsdu_len = __le16_to_cpu(ind_desc->msdu_len); - rxd = (void *)msdu->data; - trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); + rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); + trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size); - skb_put(msdu, sizeof(struct htt_rx_desc)); - skb_pull(msdu, sizeof(struct htt_rx_desc)); - skb_put(msdu, min(amsdu_len, HTT_RX_MSDU_SIZE)); + skb_put(msdu, hw->rx_desc_ops->rx_desc_size); + skb_pull(msdu, hw->rx_desc_ops->rx_desc_size); + skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw))); amsdu_len -= msdu->len; last_frag = ind_desc->reserved; @@ -556,6 +572,7 @@ ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt *htt, struct htt_rx_in_ord_msdu_desc_ext **msdu_desc) { struct ath10k *ar = htt->ar; + struct ath10k_hw_params *hw = &ar->hw_params; u64 paddr; struct sk_buff *frag_buf; struct sk_buff *prev_frag_buf; @@ -564,12 +581,12 @@ ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt *htt, struct htt_rx_desc *rxd; int amsdu_len = __le16_to_cpu(ind_desc->msdu_len); - rxd = (void *)msdu->data; - trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); + rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); + trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size); - skb_put(msdu, sizeof(struct htt_rx_desc)); - skb_pull(msdu, sizeof(struct htt_rx_desc)); - skb_put(msdu, min(amsdu_len, HTT_RX_MSDU_SIZE)); + skb_put(msdu, hw->rx_desc_ops->rx_desc_size); + skb_pull(msdu, hw->rx_desc_ops->rx_desc_size); + skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw))); amsdu_len -= msdu->len; last_frag = ind_desc->reserved; @@ -631,8 +648,10 @@ static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt, struct sk_buff_head *list) { struct ath10k *ar = htt->ar; + struct ath10k_hw_params *hw = &ar->hw_params; struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs32; struct htt_rx_desc *rxd; + struct rx_attention *rxd_attention; struct sk_buff *msdu; int msdu_count, ret; bool is_offload; @@ -667,15 +686,16 @@ static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt, __skb_queue_tail(list, msdu); if (!is_offload) { - rxd = (void *)msdu->data; + rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); + rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); - trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); + trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size); - skb_put(msdu, sizeof(*rxd)); - skb_pull(msdu, sizeof(*rxd)); + skb_put(msdu, hw->rx_desc_ops->rx_desc_size); + skb_pull(msdu, hw->rx_desc_ops->rx_desc_size); skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); - if (!(__le32_to_cpu(rxd->attention.flags) & + if (!(__le32_to_cpu(rxd_attention->flags) & RX_ATTENTION_FLAGS_MSDU_DONE)) { ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); return -EIO; @@ -693,8 +713,10 @@ static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt, struct sk_buff_head *list) { struct ath10k *ar = htt->ar; + struct ath10k_hw_params *hw = &ar->hw_params; struct htt_rx_in_ord_msdu_desc_ext *msdu_desc = ev->msdu_descs64; struct htt_rx_desc *rxd; + struct rx_attention *rxd_attention; struct sk_buff *msdu; int msdu_count, ret; bool is_offload; @@ -728,15 +750,16 @@ static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt, __skb_queue_tail(list, msdu); if (!is_offload) { - rxd = (void *)msdu->data; + rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); + rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); - trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd)); + trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size); - skb_put(msdu, sizeof(*rxd)); - skb_pull(msdu, sizeof(*rxd)); + skb_put(msdu, hw->rx_desc_ops->rx_desc_size); + skb_pull(msdu, hw->rx_desc_ops->rx_desc_size); skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); - if (!(__le32_to_cpu(rxd->attention.flags) & + if (!(__le32_to_cpu(rxd_attention->flags) & RX_ATTENTION_FLAGS_MSDU_DONE)) { ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); return -EIO; @@ -944,16 +967,32 @@ static void ath10k_htt_rx_h_rates(struct ath10k *ar, struct ieee80211_rx_status *status, struct htt_rx_desc *rxd) { + struct ath10k_hw_params *hw = &ar->hw_params; + struct rx_attention *rxd_attention; + struct rx_mpdu_start *rxd_mpdu_start; + struct rx_mpdu_end *rxd_mpdu_end; + struct rx_msdu_start_common *rxd_msdu_start_common; + struct rx_msdu_end_common *rxd_msdu_end_common; + struct rx_ppdu_start *rxd_ppdu_start; struct ieee80211_supported_band *sband; u8 cck, rate, bw, sgi, mcs, nss; + u8 *rxd_msdu_payload; u8 preamble = 0; u8 group_id; u32 info1, info2, info3; u32 stbc, nsts_su; - info1 = __le32_to_cpu(rxd->ppdu_start.info1); - info2 = __le32_to_cpu(rxd->ppdu_start.info2); - info3 = __le32_to_cpu(rxd->ppdu_start.info3); + rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); + rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd); + rxd_mpdu_end = ath10k_htt_rx_desc_get_mpdu_end(hw, rxd); + rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd); + rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); + rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd); + rxd_msdu_payload = ath10k_htt_rx_desc_get_msdu_payload(hw, rxd); + + info1 = __le32_to_cpu(rxd_ppdu_start->info1); + info2 = __le32_to_cpu(rxd_ppdu_start->info2); + info3 = __le32_to_cpu(rxd_ppdu_start->info3); preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE); @@ -1022,24 +1061,24 @@ static void ath10k_htt_rx_h_rates(struct ath10k *ar, if (mcs > 0x09) { ath10k_warn(ar, "invalid MCS received %u\n", mcs); ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n", - __le32_to_cpu(rxd->attention.flags), - __le32_to_cpu(rxd->mpdu_start.info0), - __le32_to_cpu(rxd->mpdu_start.info1), - __le32_to_cpu(rxd->msdu_start.common.info0), - __le32_to_cpu(rxd->msdu_start.common.info1), - rxd->ppdu_start.info0, - __le32_to_cpu(rxd->ppdu_start.info1), - __le32_to_cpu(rxd->ppdu_start.info2), - __le32_to_cpu(rxd->ppdu_start.info3), - __le32_to_cpu(rxd->ppdu_start.info4)); + __le32_to_cpu(rxd_attention->flags), + __le32_to_cpu(rxd_mpdu_start->info0), + __le32_to_cpu(rxd_mpdu_start->info1), + __le32_to_cpu(rxd_msdu_start_common->info0), + __le32_to_cpu(rxd_msdu_start_common->info1), + rxd_ppdu_start->info0, + __le32_to_cpu(rxd_ppdu_start->info1), + __le32_to_cpu(rxd_ppdu_start->info2), + __le32_to_cpu(rxd_ppdu_start->info3), + __le32_to_cpu(rxd_ppdu_start->info4)); ath10k_warn(ar, "msdu end %08x mpdu end %08x\n", - __le32_to_cpu(rxd->msdu_end.common.info0), - __le32_to_cpu(rxd->mpdu_end.info0)); + __le32_to_cpu(rxd_msdu_end_common->info0), + __le32_to_cpu(rxd_mpdu_end->info0)); ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx desc msdu payload: ", - rxd->msdu_payload, 50); + rxd_msdu_payload, 50); } status->rate_idx = mcs; @@ -1059,6 +1098,10 @@ static void ath10k_htt_rx_h_rates(struct ath10k *ar, static struct ieee80211_channel * ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd) { + struct ath10k_hw_params *hw = &ar->hw_params; + struct rx_attention *rxd_attention; + struct rx_msdu_end_common *rxd_msdu_end_common; + struct rx_mpdu_start *rxd_mpdu_start; struct ath10k_peer *peer; struct ath10k_vif *arvif; struct cfg80211_chan_def def; @@ -1069,15 +1112,19 @@ ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd) if (!rxd) return NULL; - if (rxd->attention.flags & + rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); + rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); + rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd); + + if (rxd_attention->flags & __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID)) return NULL; - if (!(rxd->msdu_end.common.info0 & + if (!(rxd_msdu_end_common->info0 & __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU))) return NULL; - peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0), + peer_id = MS(__le32_to_cpu(rxd_mpdu_start->info0), RX_MPDU_START_INFO0_PEER_IDX); peer = ath10k_peer_find_by_id(ar, peer_id); @@ -1167,14 +1214,16 @@ static void ath10k_htt_rx_h_signal(struct ath10k *ar, struct ieee80211_rx_status *status, struct htt_rx_desc *rxd) { + struct ath10k_hw_params *hw = &ar->hw_params; + struct rx_ppdu_start *rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd); int i; for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) { status->chains &= ~BIT(i); - if (rxd->ppdu_start.rssi_chains[i].pri20_mhz != 0x80) { + if (rxd_ppdu_start->rssi_chains[i].pri20_mhz != 0x80) { status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + - rxd->ppdu_start.rssi_chains[i].pri20_mhz; + rxd_ppdu_start->rssi_chains[i].pri20_mhz; status->chains |= BIT(i); } @@ -1182,7 +1231,7 @@ static void ath10k_htt_rx_h_signal(struct ath10k *ar, /* FIXME: Get real NF */ status->signal = ATH10K_DEFAULT_NOISE_FLOOR + - rxd->ppdu_start.rssi_comb; + rxd_ppdu_start->rssi_comb; status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; } @@ -1190,13 +1239,18 @@ static void ath10k_htt_rx_h_mactime(struct ath10k *ar, struct ieee80211_rx_status *status, struct htt_rx_desc *rxd) { + struct ath10k_hw_params *hw = &ar->hw_params; + struct rx_ppdu_end_common *rxd_ppdu_end_common; + + rxd_ppdu_end_common = ath10k_htt_rx_desc_get_ppdu_end(hw, rxd); + /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This * means all prior MSDUs in a PPDU are reported to mac80211 without the * TSF. Is it worth holding frames until end of PPDU is known? * * FIXME: Can we get/compute 64bit TSF? */ - status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp); + status->mactime = __le32_to_cpu(rxd_ppdu_end_common->tsf_timestamp); status->flag |= RX_FLAG_MACTIME_END; } @@ -1206,7 +1260,9 @@ static void ath10k_htt_rx_h_ppdu(struct ath10k *ar, u32 vdev_id) { struct sk_buff *first; + struct ath10k_hw_params *hw = &ar->hw_params; struct htt_rx_desc *rxd; + struct rx_attention *rxd_attention; bool is_first_ppdu; bool is_last_ppdu; @@ -1214,11 +1270,14 @@ static void ath10k_htt_rx_h_ppdu(struct ath10k *ar, return; first = skb_peek(amsdu); - rxd = (void *)first->data - sizeof(*rxd); + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)first->data - hw->rx_desc_ops->rx_desc_size); - is_first_ppdu = !!(rxd->attention.flags & + rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); + + is_first_ppdu = !!(rxd_attention->flags & __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU)); - is_last_ppdu = !!(rxd->attention.flags & + is_last_ppdu = !!(rxd_attention->flags & __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU)); if (is_first_ppdu) { @@ -1357,7 +1416,9 @@ static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, const u8 first_hdr[64]) { struct ieee80211_hdr *hdr; + struct ath10k_hw_params *hw = &ar->hw_params; struct htt_rx_desc *rxd; + struct rx_msdu_end_common *rxd_msdu_end_common; size_t hdr_len; size_t crypto_len; bool is_first; @@ -1366,10 +1427,13 @@ static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, int bytes_aligned = ar->hw_params.decap_align_bytes; u8 *qos; - rxd = (void *)msdu->data - sizeof(*rxd); - is_first = !!(rxd->msdu_end.common.info0 & + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); + + rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); + is_first = !!(rxd_msdu_end_common->info0 & __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); - is_last = !!(rxd->msdu_end.common.info0 & + is_last = !!(rxd_msdu_end_common->info0 & __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); /* Delivered decapped frame: @@ -1387,7 +1451,7 @@ static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, * error packets. If limit exceeds, hw sends all remaining MSDUs as * a single last MSDU with this msdu limit error set. */ - msdu_limit_err = ath10k_rx_desc_msdu_limit_error(&ar->hw_params, rxd); + msdu_limit_err = ath10k_htt_rx_desc_msdu_limit_error(hw, rxd); /* If MSDU limit error happens, then don't warn on, the partial raw MSDU * without first MSDU is expected in that case, and handled later here. @@ -1479,6 +1543,7 @@ static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar, const u8 first_hdr[64], enum htt_rx_mpdu_encrypt_type enctype) { + struct ath10k_hw_params *hw = &ar->hw_params; struct ieee80211_hdr *hdr; struct htt_rx_desc *rxd; size_t hdr_len; @@ -1499,9 +1564,10 @@ static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar, */ /* pull decapped header and copy SA & DA */ - rxd = (void *)msdu->data - sizeof(*rxd); + rxd = HTT_RX_BUF_TO_RX_DESC(hw, (void *)msdu->data - + hw->rx_desc_ops->rx_desc_size); - l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); + l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); skb_put(msdu, l3_pad_bytes); hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes); @@ -1537,18 +1603,25 @@ static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar, enum htt_rx_mpdu_encrypt_type enctype) { struct ieee80211_hdr *hdr; + struct ath10k_hw_params *hw = &ar->hw_params; struct htt_rx_desc *rxd; + struct rx_msdu_end_common *rxd_msdu_end_common; + u8 *rxd_rx_hdr_status; size_t hdr_len, crypto_len; void *rfc1042; bool is_first, is_last, is_amsdu; int bytes_aligned = ar->hw_params.decap_align_bytes; - rxd = (void *)msdu->data - sizeof(*rxd); - hdr = (void *)rxd->rx_hdr_status; + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); + + rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); + rxd_rx_hdr_status = ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd); + hdr = (void *)rxd_rx_hdr_status; - is_first = !!(rxd->msdu_end.common.info0 & + is_first = !!(rxd_msdu_end_common->info0 & __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); - is_last = !!(rxd->msdu_end.common.info0 & + is_last = !!(rxd_msdu_end_common->info0 & __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); is_amsdu = !(is_first && is_last); @@ -1574,6 +1647,7 @@ static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar, const u8 first_hdr[64], enum htt_rx_mpdu_encrypt_type enctype) { + struct ath10k_hw_params *hw = &ar->hw_params; struct ieee80211_hdr *hdr; struct ethhdr *eth; size_t hdr_len; @@ -1593,8 +1667,10 @@ static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar, if (WARN_ON_ONCE(!rfc1042)) return; - rxd = (void *)msdu->data - sizeof(*rxd); - l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); + + l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); skb_put(msdu, l3_pad_bytes); skb_pull(msdu, l3_pad_bytes); @@ -1635,6 +1711,7 @@ static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar, const u8 first_hdr[64], enum htt_rx_mpdu_encrypt_type enctype) { + struct ath10k_hw_params *hw = &ar->hw_params; struct ieee80211_hdr *hdr; size_t hdr_len; int l3_pad_bytes; @@ -1647,8 +1724,10 @@ static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar, * [payload] */ - rxd = (void *)msdu->data - sizeof(*rxd); - l3_pad_bytes = ath10k_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); + + l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); skb_put(msdu, l3_pad_bytes); skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes); @@ -1673,7 +1752,9 @@ static void ath10k_htt_rx_h_undecap(struct ath10k *ar, enum htt_rx_mpdu_encrypt_type enctype, bool is_decrypted) { + struct ath10k_hw_params *hw = &ar->hw_params; struct htt_rx_desc *rxd; + struct rx_msdu_start_common *rxd_msdu_start_common; enum rx_msdu_decap_format decap; /* First msdu's decapped header: @@ -1687,8 +1768,11 @@ static void ath10k_htt_rx_h_undecap(struct ath10k *ar, * [rfc1042/llc] */ - rxd = (void *)msdu->data - sizeof(*rxd); - decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); + + rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd); + decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1), RX_MSDU_START_INFO1_DECAP_FORMAT); switch (decap) { @@ -1710,17 +1794,23 @@ static void ath10k_htt_rx_h_undecap(struct ath10k *ar, } } -static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) +static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb) { struct htt_rx_desc *rxd; + struct rx_attention *rxd_attention; + struct rx_msdu_start_common *rxd_msdu_start_common; u32 flags, info; bool is_ip4, is_ip6; bool is_tcp, is_udp; bool ip_csum_ok, tcpudp_csum_ok; - rxd = (void *)skb->data - sizeof(*rxd); - flags = __le32_to_cpu(rxd->attention.flags); - info = __le32_to_cpu(rxd->msdu_start.common.info1); + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)skb->data - hw->rx_desc_ops->rx_desc_size); + + rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); + rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd); + flags = __le32_to_cpu(rxd_attention->flags); + info = __le32_to_cpu(rxd_msdu_start_common->info1); is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); @@ -1741,9 +1831,10 @@ static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb) return CHECKSUM_UNNECESSARY; } -static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu) +static void ath10k_htt_rx_h_csum_offload(struct ath10k_hw_params *hw, + struct sk_buff *msdu) { - msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu); + msdu->ip_summed = ath10k_htt_rx_get_csum_state(hw, msdu); } static u64 ath10k_htt_rx_h_get_pn(struct ath10k *ar, struct sk_buff *skb, @@ -1835,7 +1926,11 @@ static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, struct sk_buff *first; struct sk_buff *last; struct sk_buff *msdu, *temp; + struct ath10k_hw_params *hw = &ar->hw_params; struct htt_rx_desc *rxd; + struct rx_attention *rxd_attention; + struct rx_mpdu_start *rxd_mpdu_start; + struct ieee80211_hdr *hdr; enum htt_rx_mpdu_encrypt_type enctype; u8 first_hdr[64]; @@ -1853,18 +1948,22 @@ static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, return; first = skb_peek(amsdu); - rxd = (void *)first->data - sizeof(*rxd); + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)first->data - hw->rx_desc_ops->rx_desc_size); - is_mgmt = !!(rxd->attention.flags & + rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); + rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd); + + is_mgmt = !!(rxd_attention->flags & __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)); - enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), + enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0), RX_MPDU_START_INFO0_ENCRYPT_TYPE); /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11 * decapped header. It'll be used for undecapping of each MSDU. */ - hdr = (void *)rxd->rx_hdr_status; + hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd); memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN); if (rx_hdr) @@ -1882,8 +1981,11 @@ static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, /* Some attention flags are valid only in the last MSDU. */ last = skb_peek_tail(amsdu); - rxd = (void *)last->data - sizeof(*rxd); - attention = __le32_to_cpu(rxd->attention.flags); + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)last->data - hw->rx_desc_ops->rx_desc_size); + + rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); + attention = __le32_to_cpu(rxd_attention->flags); has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR); has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); @@ -1971,7 +2073,7 @@ static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, continue; } - ath10k_htt_rx_h_csum_offload(msdu); + ath10k_htt_rx_h_csum_offload(&ar->hw_params, msdu); if (frag && !fill_crypt_header && enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) @@ -2083,12 +2185,19 @@ static void ath10k_htt_rx_h_unchain(struct ath10k *ar, unsigned long *unchain_cnt) { struct sk_buff *first; + struct ath10k_hw_params *hw = &ar->hw_params; struct htt_rx_desc *rxd; + struct rx_msdu_start_common *rxd_msdu_start_common; + struct rx_frag_info_common *rxd_frag_info; enum rx_msdu_decap_format decap; first = skb_peek(amsdu); - rxd = (void *)first->data - sizeof(*rxd); - decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1), + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)first->data - hw->rx_desc_ops->rx_desc_size); + + rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd); + rxd_frag_info = ath10k_htt_rx_desc_get_frag_info(hw, rxd); + decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1), RX_MSDU_START_INFO1_DECAP_FORMAT); /* FIXME: Current unchaining logic can only handle simple case of raw @@ -2097,7 +2206,7 @@ static void ath10k_htt_rx_h_unchain(struct ath10k *ar, * try re-constructing such frames - it'll be pretty much garbage. */ if (decap != RX_MSDU_DECAP_RAW || - skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) { + skb_queue_len(amsdu) != 1 + rxd_frag_info->ring2_more_count) { *drop_cnt += skb_queue_len(amsdu); __skb_queue_purge(amsdu); return; @@ -2112,7 +2221,10 @@ static bool ath10k_htt_rx_validate_amsdu(struct ath10k *ar, u8 *subframe_hdr; struct sk_buff *first; bool is_first, is_last; + struct ath10k_hw_params *hw = &ar->hw_params; struct htt_rx_desc *rxd; + struct rx_msdu_end_common *rxd_msdu_end_common; + struct rx_mpdu_start *rxd_mpdu_start; struct ieee80211_hdr *hdr; size_t hdr_len, crypto_len; enum htt_rx_mpdu_encrypt_type enctype; @@ -2120,12 +2232,16 @@ static bool ath10k_htt_rx_validate_amsdu(struct ath10k *ar, first = skb_peek(amsdu); - rxd = (void *)first->data - sizeof(*rxd); - hdr = (void *)rxd->rx_hdr_status; + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)first->data - hw->rx_desc_ops->rx_desc_size); + + rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); + rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd); + hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd); - is_first = !!(rxd->msdu_end.common.info0 & + is_first = !!(rxd_msdu_end_common->info0 & __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); - is_last = !!(rxd->msdu_end.common.info0 & + is_last = !!(rxd_msdu_end_common->info0 & __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); /* Return in case of non-aggregated msdu */ @@ -2136,7 +2252,7 @@ static bool ath10k_htt_rx_validate_amsdu(struct ath10k *ar, if (!is_first) return false; - enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0), + enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0), RX_MPDU_START_INFO0_ENCRYPT_TYPE); hdr_len = ieee80211_hdrlen(hdr->frame_control); @@ -3028,11 +3144,13 @@ static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) spin_unlock_bh(&ar->data_lock); } -static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list, +static int ath10k_htt_rx_extract_amsdu(struct ath10k_hw_params *hw, + struct sk_buff_head *list, struct sk_buff_head *amsdu) { struct sk_buff *msdu; struct htt_rx_desc *rxd; + struct rx_msdu_end_common *rxd_msdu_end_common; if (skb_queue_empty(list)) return -ENOBUFS; @@ -3043,15 +3161,22 @@ static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list, while ((msdu = __skb_dequeue(list))) { __skb_queue_tail(amsdu, msdu); - rxd = (void *)msdu->data - sizeof(*rxd); - if (rxd->msdu_end.common.info0 & + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)msdu->data - + hw->rx_desc_ops->rx_desc_size); + + rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); + if (rxd_msdu_end_common->info0 & __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)) break; } msdu = skb_peek_tail(amsdu); - rxd = (void *)msdu->data - sizeof(*rxd); - if (!(rxd->msdu_end.common.info0 & + rxd = HTT_RX_BUF_TO_RX_DESC(hw, + (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); + + rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); + if (!(rxd_msdu_end_common->info0 & __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) { skb_queue_splice_init(amsdu, list); return -EAGAIN; @@ -3194,7 +3319,7 @@ static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb) while (!skb_queue_empty(&list)) { __skb_queue_head_init(&amsdu); - ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu); + ret = ath10k_htt_rx_extract_amsdu(&ar->hw_params, &list, &amsdu); switch (ret) { case 0: /* Note: The in-order indication may report interleaved diff --git a/drivers/net/wireless/ath/ath10k/htt_tx.c b/drivers/net/wireless/ath/ath10k/htt_tx.c index b793eac2cfac..9842a4b2f78f 100644 --- a/drivers/net/wireless/ath/ath10k/htt_tx.c +++ b/drivers/net/wireless/ath/ath10k/htt_tx.c @@ -796,47 +796,26 @@ static int ath10k_htt_send_frag_desc_bank_cfg_64(struct ath10k_htt *htt) return 0; } -static void ath10k_htt_fill_rx_desc_offset_32(void *rx_ring) +static void ath10k_htt_fill_rx_desc_offset_32(struct ath10k_hw_params *hw, void *rx_ring) { struct htt_rx_ring_setup_ring32 *ring = (struct htt_rx_ring_setup_ring32 *)rx_ring; -#define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4) - ring->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status)); - ring->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload)); - ring->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start)); - ring->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end)); - ring->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start)); - ring->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end)); - ring->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start)); - ring->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end)); - ring->rx_attention_offset = __cpu_to_le16(desc_offset(attention)); - ring->frag_info_offset = __cpu_to_le16(desc_offset(frag_info)); -#undef desc_offset + ath10k_htt_rx_desc_get_offsets(hw, &ring->offsets); } -static void ath10k_htt_fill_rx_desc_offset_64(void *rx_ring) +static void ath10k_htt_fill_rx_desc_offset_64(struct ath10k_hw_params *hw, void *rx_ring) { struct htt_rx_ring_setup_ring64 *ring = (struct htt_rx_ring_setup_ring64 *)rx_ring; -#define desc_offset(x) (offsetof(struct htt_rx_desc, x) / 4) - ring->mac80211_hdr_offset = __cpu_to_le16(desc_offset(rx_hdr_status)); - ring->msdu_payload_offset = __cpu_to_le16(desc_offset(msdu_payload)); - ring->ppdu_start_offset = __cpu_to_le16(desc_offset(ppdu_start)); - ring->ppdu_end_offset = __cpu_to_le16(desc_offset(ppdu_end)); - ring->mpdu_start_offset = __cpu_to_le16(desc_offset(mpdu_start)); - ring->mpdu_end_offset = __cpu_to_le16(desc_offset(mpdu_end)); - ring->msdu_start_offset = __cpu_to_le16(desc_offset(msdu_start)); - ring->msdu_end_offset = __cpu_to_le16(desc_offset(msdu_end)); - ring->rx_attention_offset = __cpu_to_le16(desc_offset(attention)); - ring->frag_info_offset = __cpu_to_le16(desc_offset(frag_info)); -#undef desc_offset + ath10k_htt_rx_desc_get_offsets(hw, &ring->offsets); } static int ath10k_htt_send_rx_ring_cfg_32(struct ath10k_htt *htt) { struct ath10k *ar = htt->ar; + struct ath10k_hw_params *hw = &ar->hw_params; struct sk_buff *skb; struct htt_cmd *cmd; struct htt_rx_ring_setup_ring32 *ring; @@ -896,7 +875,7 @@ static int ath10k_htt_send_rx_ring_cfg_32(struct ath10k_htt *htt) ring->flags = __cpu_to_le16(flags); ring->fw_idx_init_val = __cpu_to_le16(fw_idx); - ath10k_htt_fill_rx_desc_offset_32(ring); + ath10k_htt_fill_rx_desc_offset_32(hw, ring); ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); if (ret) { dev_kfree_skb_any(skb); @@ -909,6 +888,7 @@ static int ath10k_htt_send_rx_ring_cfg_32(struct ath10k_htt *htt) static int ath10k_htt_send_rx_ring_cfg_64(struct ath10k_htt *htt) { struct ath10k *ar = htt->ar; + struct ath10k_hw_params *hw = &ar->hw_params; struct sk_buff *skb; struct htt_cmd *cmd; struct htt_rx_ring_setup_ring64 *ring; @@ -965,7 +945,7 @@ static int ath10k_htt_send_rx_ring_cfg_64(struct ath10k_htt *htt) ring->flags = __cpu_to_le16(flags); ring->fw_idx_init_val = __cpu_to_le16(fw_idx); - ath10k_htt_fill_rx_desc_offset_64(ring); + ath10k_htt_fill_rx_desc_offset_64(hw, ring); ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb); if (ret) { dev_kfree_skb_any(skb); diff --git a/drivers/net/wireless/ath/ath10k/hw.c b/drivers/net/wireless/ath/ath10k/hw.c index 57c58af64a57..e52e41a70321 100644 --- a/drivers/net/wireless/ath/ath10k/hw.c +++ b/drivers/net/wireless/ath/ath10k/hw.c @@ -11,6 +11,7 @@ #include "hif.h" #include "wmi-ops.h" #include "bmi.h" +#include "rx_desc.h" const struct ath10k_hw_regs qca988x_regs = { .rtc_soc_base_address = 0x00004000, @@ -1134,21 +1135,7 @@ const struct ath10k_hw_ops qca988x_ops = { .is_rssi_enable = ath10k_htt_tx_rssi_enable, }; -static int ath10k_qca99x0_rx_desc_get_l3_pad_bytes(struct htt_rx_desc *rxd) -{ - return MS(__le32_to_cpu(rxd->msdu_end.qca99x0.info1), - RX_MSDU_END_INFO1_L3_HDR_PAD); -} - -static bool ath10k_qca99x0_rx_desc_msdu_limit_error(struct htt_rx_desc *rxd) -{ - return !!(rxd->msdu_end.common.info0 & - __cpu_to_le32(RX_MSDU_END_INFO0_MSDU_LIMIT_ERR)); -} - const struct ath10k_hw_ops qca99x0_ops = { - .rx_desc_get_l3_pad_bytes = ath10k_qca99x0_rx_desc_get_l3_pad_bytes, - .rx_desc_get_msdu_limit_error = ath10k_qca99x0_rx_desc_msdu_limit_error, .is_rssi_enable = ath10k_htt_tx_rssi_enable, }; diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h index 591ef7416b61..5215a6816d71 100644 --- a/drivers/net/wireless/ath/ath10k/hw.h +++ b/drivers/net/wireless/ath/ath10k/hw.h @@ -510,6 +510,8 @@ struct ath10k_hw_clk_params { u32 outdiv; }; +struct htt_rx_desc_ops; + struct ath10k_hw_params { u32 id; u16 dev_id; @@ -562,6 +564,9 @@ struct ath10k_hw_params { */ bool sw_decrypt_mcast_mgmt; + /* Rx descriptor abstraction */ + const struct ath10k_htt_rx_desc_ops *rx_desc_ops; + const struct ath10k_hw_ops *hw_ops; /* Number of bytes used for alignment in rx_hdr_status of rx desc. */ @@ -630,16 +635,14 @@ struct ath10k_hw_params { bool dynamic_sar_support; }; -struct htt_rx_desc; struct htt_resp; struct htt_data_tx_completion_ext; +struct htt_rx_ring_rx_desc_offsets; /* Defines needed for Rx descriptor abstraction */ struct ath10k_hw_ops { - int (*rx_desc_get_l3_pad_bytes)(struct htt_rx_desc *rxd); void (*set_coverage_class)(struct ath10k *ar, s16 value); int (*enable_pll_clk)(struct ath10k *ar); - bool (*rx_desc_get_msdu_limit_error)(struct htt_rx_desc *rxd); int (*tx_data_rssi_pad_bytes)(struct htt_resp *htt); int (*is_rssi_enable)(struct htt_resp *resp); }; @@ -653,24 +656,6 @@ extern const struct ath10k_hw_ops wcn3990_ops; extern const struct ath10k_hw_clk_params qca6174_clk[]; static inline int -ath10k_rx_desc_get_l3_pad_bytes(struct ath10k_hw_params *hw, - struct htt_rx_desc *rxd) -{ - if (hw->hw_ops->rx_desc_get_l3_pad_bytes) - return hw->hw_ops->rx_desc_get_l3_pad_bytes(rxd); - return 0; -} - -static inline bool -ath10k_rx_desc_msdu_limit_error(struct ath10k_hw_params *hw, - struct htt_rx_desc *rxd) -{ - if (hw->hw_ops->rx_desc_get_msdu_limit_error) - return hw->hw_ops->rx_desc_get_msdu_limit_error(rxd); - return false; -} - -static inline int ath10k_tx_data_rssi_get_pad_bytes(struct ath10k_hw_params *hw, struct htt_resp *htt) { diff --git a/drivers/net/wireless/ath/ath10k/rx_desc.h b/drivers/net/wireless/ath/ath10k/rx_desc.h index 705b6295e466..6ce2a8b1060d 100644 --- a/drivers/net/wireless/ath/ath10k/rx_desc.h +++ b/drivers/net/wireless/ath/ath10k/rx_desc.h @@ -196,17 +196,31 @@ struct rx_attention { * descriptor. */ -struct rx_frag_info { +struct rx_frag_info_common { u8 ring0_more_count; u8 ring1_more_count; u8 ring2_more_count; u8 ring3_more_count; +} __packed; + +struct rx_frag_info_wcn3990 { u8 ring4_more_count; u8 ring5_more_count; u8 ring6_more_count; u8 ring7_more_count; } __packed; +struct rx_frag_info { + struct rx_frag_info_common common; + union { + struct rx_frag_info_wcn3990 wcn3990; + } __packed; +} __packed; + +struct rx_frag_info_v1 { + struct rx_frag_info_common common; +} __packed; + /* * ring0_more_count * Indicates the number of more buffers associated with RX DMA @@ -474,11 +488,17 @@ struct rx_msdu_start_wcn3990 { struct rx_msdu_start { struct rx_msdu_start_common common; union { - struct rx_msdu_start_qca99x0 qca99x0; struct rx_msdu_start_wcn3990 wcn3990; } __packed; } __packed; +struct rx_msdu_start_v1 { + struct rx_msdu_start_common common; + union { + struct rx_msdu_start_qca99x0 qca99x0; + } __packed; +} __packed; + /* * msdu_length * MSDU length in bytes after decapsulation. This field is @@ -612,11 +632,17 @@ struct rx_msdu_end_wcn3990 { struct rx_msdu_end { struct rx_msdu_end_common common; union { - struct rx_msdu_end_qca99x0 qca99x0; struct rx_msdu_end_wcn3990 wcn3990; } __packed; } __packed; +struct rx_msdu_end_v1 { + struct rx_msdu_end_common common; + union { + struct rx_msdu_end_qca99x0 qca99x0; + } __packed; +} __packed; + /* *ip_hdr_chksum * This can include the IP header checksum or the pseudo header @@ -1136,11 +1162,17 @@ struct rx_ppdu_end_wcn3990 { struct rx_ppdu_end { struct rx_ppdu_end_common common; union { + struct rx_ppdu_end_wcn3990 wcn3990; + } __packed; +} __packed; + +struct rx_ppdu_end_v1 { + struct rx_ppdu_end_common common; + union { struct rx_ppdu_end_qca988x qca988x; struct rx_ppdu_end_qca6174 qca6174; struct rx_ppdu_end_qca99x0 qca99x0; struct rx_ppdu_end_qca9984 qca9984; - struct rx_ppdu_end_wcn3990 wcn3990; } __packed; } __packed; diff --git a/drivers/net/wireless/ath/ath10k/snoc.c b/drivers/net/wireless/ath/ath10k/snoc.c index 9513ab696fff..8328966a0471 100644 --- a/drivers/net/wireless/ath/ath10k/snoc.c +++ b/drivers/net/wireless/ath/ath10k/snoc.c @@ -1306,13 +1306,10 @@ static int ath10k_snoc_resource_init(struct ath10k *ar) } for (i = 0; i < CE_COUNT; i++) { - res = platform_get_resource(ar_snoc->dev, IORESOURCE_IRQ, i); - if (!res) { - ath10k_err(ar, "failed to get IRQ%d\n", i); - ret = -ENODEV; - goto out; - } - ar_snoc->ce_irqs[i].irq_line = res->start; + ret = platform_get_irq(ar_snoc->dev, i); + if (ret < 0) + return ret; + ar_snoc->ce_irqs[i].irq_line = ret; } ret = device_property_read_u32(&pdev->dev, "qcom,xo-cal-data", @@ -1323,10 +1320,8 @@ static int ath10k_snoc_resource_init(struct ath10k *ar) ath10k_dbg(ar, ATH10K_DBG_SNOC, "xo cal data %x\n", ar_snoc->xo_cal_data); } - ret = 0; -out: - return ret; + return 0; } static void ath10k_snoc_quirks_init(struct ath10k *ar) @@ -1556,11 +1551,11 @@ static int ath10k_setup_msa_resources(struct ath10k *ar, u32 msa_size) node = of_parse_phandle(dev->of_node, "memory-region", 0); if (node) { ret = of_address_to_resource(node, 0, &r); + of_node_put(node); if (ret) { dev_err(dev, "failed to resolve msa fixed region\n"); return ret; } - of_node_put(node); ar->msa.paddr = r.start; ar->msa.mem_size = resource_size(&r); diff --git a/drivers/net/wireless/ath/ath10k/swap.h b/drivers/net/wireless/ath/ath10k/swap.h index 25e0ad36ddb1..b4733b5ded34 100644 --- a/drivers/net/wireless/ath/ath10k/swap.h +++ b/drivers/net/wireless/ath/ath10k/swap.h @@ -17,7 +17,7 @@ struct ath10k_fw_file; struct ath10k_swap_code_seg_tlv { __le32 address; __le32 length; - u8 data[0]; + u8 data[]; } __packed; struct ath10k_swap_code_seg_tail { diff --git a/drivers/net/wireless/ath/ath10k/txrx.c b/drivers/net/wireless/ath/ath10k/txrx.c index 6f8b64218894..10123974c3da 100644 --- a/drivers/net/wireless/ath/ath10k/txrx.c +++ b/drivers/net/wireless/ath/ath10k/txrx.c @@ -125,7 +125,7 @@ int ath10k_txrx_tx_unref(struct ath10k_htt *htt, tx_done->ack_rssi != ATH10K_INVALID_RSSI) { info->status.ack_signal = ATH10K_DEFAULT_NOISE_FLOOR + tx_done->ack_rssi; - info->status.is_valid_ack_signal = true; + info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID; } ieee80211_tx_status(htt->ar->hw, msdu); diff --git a/drivers/net/wireless/ath/ath10k/wmi.c b/drivers/net/wireless/ath/ath10k/wmi.c index 7c1c2658cb5f..cd438f76f284 100644 --- a/drivers/net/wireless/ath/ath10k/wmi.c +++ b/drivers/net/wireless/ath/ath10k/wmi.c @@ -2427,7 +2427,7 @@ wmi_process_mgmt_tx_comp(struct ath10k *ar, struct mgmt_tx_compl_params *param) info->flags |= IEEE80211_TX_STAT_ACK; info->status.ack_signal = ATH10K_DEFAULT_NOISE_FLOOR + param->ack_rssi; - info->status.is_valid_ack_signal = true; + info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID; } ieee80211_tx_status_irqsafe(ar->hw, msdu); diff --git a/drivers/net/wireless/ath/ath10k/wow.c b/drivers/net/wireless/ath/ath10k/wow.c index 7d65c115669f..20b9aa8ddf7d 100644 --- a/drivers/net/wireless/ath/ath10k/wow.c +++ b/drivers/net/wireless/ath/ath10k/wow.c @@ -337,14 +337,15 @@ static int ath10k_vif_wow_set_wakeups(struct ath10k_vif *arvif, if (patterns[i].mask[j / 8] & BIT(j % 8)) bitmask[j] = 0xff; old_pattern.mask = bitmask; - new_pattern = old_pattern; if (ar->wmi.rx_decap_mode == ATH10K_HW_TXRX_NATIVE_WIFI) { - if (patterns[i].pkt_offset < ETH_HLEN) + if (patterns[i].pkt_offset < ETH_HLEN) { ath10k_wow_convert_8023_to_80211(&new_pattern, &old_pattern); - else + } else { + new_pattern = old_pattern; new_pattern.pkt_offset += WOW_HDR_LEN - ETH_HLEN; + } } if (WARN_ON(new_pattern.pattern_len > WOW_MAX_PATTERN_SIZE)) diff --git a/drivers/net/wireless/ath/ath11k/ahb.c b/drivers/net/wireless/ath/ath11k/ahb.c index 3fb0aa000825..f407d4af2074 100644 --- a/drivers/net/wireless/ath/ath11k/ahb.c +++ b/drivers/net/wireless/ath/ath11k/ahb.c @@ -391,6 +391,8 @@ static void ath11k_ahb_free_ext_irq(struct ath11k_base *ab) for (j = 0; j < irq_grp->num_irq; j++) free_irq(ab->irq_num[irq_grp->irqs[j]], irq_grp); + + netif_napi_del(&irq_grp->napi); } } @@ -466,7 +468,7 @@ static irqreturn_t ath11k_ahb_ext_interrupt_handler(int irq, void *arg) return IRQ_HANDLED; } -static int ath11k_ahb_ext_irq_config(struct ath11k_base *ab) +static int ath11k_ahb_config_ext_irq(struct ath11k_base *ab) { struct ath11k_hw_params *hw = &ab->hw_params; int i, j; @@ -574,7 +576,7 @@ static int ath11k_ahb_config_irq(struct ath11k_base *ab) } /* Configure external interrupts */ - ret = ath11k_ahb_ext_irq_config(ab); + ret = ath11k_ahb_config_ext_irq(ab); return ret; } diff --git a/drivers/net/wireless/ath/ath11k/ce.h b/drivers/net/wireless/ath/ath11k/ce.h index 8255b6cfab0c..9644ff909502 100644 --- a/drivers/net/wireless/ath/ath11k/ce.h +++ b/drivers/net/wireless/ath/ath11k/ce.h @@ -145,7 +145,7 @@ struct ath11k_ce_ring { u32 hal_ring_id; /* keep last */ - struct sk_buff *skb[0]; + struct sk_buff *skb[]; }; struct ath11k_ce_pipe { diff --git a/drivers/net/wireless/ath/ath11k/core.c b/drivers/net/wireless/ath/ath11k/core.c index 293563b3f784..71eb7d04c3bf 100644 --- a/drivers/net/wireless/ath/ath11k/core.c +++ b/drivers/net/wireless/ath/ath11k/core.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause-Clear /* * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. + * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. */ #include <linux/module.h> @@ -97,6 +98,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { .wakeup_mhi = false, .supports_rssi_stats = false, .fw_wmi_diag_event = false, + .current_cc_support = false, + .dbr_debug_support = true, }, { .hw_rev = ATH11K_HW_IPQ6018_HW10, @@ -161,6 +164,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { .wakeup_mhi = false, .supports_rssi_stats = false, .fw_wmi_diag_event = false, + .current_cc_support = false, + .dbr_debug_support = true, }, { .name = "qca6390 hw2.0", @@ -224,6 +229,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { .wakeup_mhi = true, .supports_rssi_stats = true, .fw_wmi_diag_event = true, + .current_cc_support = true, + .dbr_debug_support = false, }, { .name = "qcn9074 hw1.0", @@ -287,6 +294,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { .wakeup_mhi = false, .supports_rssi_stats = false, .fw_wmi_diag_event = false, + .current_cc_support = false, + .dbr_debug_support = true, }, { .name = "wcn6855 hw2.0", @@ -350,6 +359,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { .wakeup_mhi = true, .supports_rssi_stats = true, .fw_wmi_diag_event = true, + .current_cc_support = true, + .dbr_debug_support = false, }, { .name = "wcn6855 hw2.1", @@ -412,6 +423,8 @@ static const struct ath11k_hw_params ath11k_hw_params[] = { .wakeup_mhi = true, .supports_rssi_stats = true, .fw_wmi_diag_event = true, + .current_cc_support = true, + .dbr_debug_support = false, }, }; @@ -1404,6 +1417,8 @@ EXPORT_SYMBOL(ath11k_core_deinit); void ath11k_core_free(struct ath11k_base *ab) { + destroy_workqueue(ab->workqueue); + kfree(ab); } EXPORT_SYMBOL(ath11k_core_free); diff --git a/drivers/net/wireless/ath/ath11k/core.h b/drivers/net/wireless/ath/ath11k/core.h index 9e88ccca5ca7..c0228e91a596 100644 --- a/drivers/net/wireless/ath/ath11k/core.h +++ b/drivers/net/wireless/ath/ath11k/core.h @@ -263,6 +263,9 @@ struct ath11k_vif { bool bcca_zero_sent; bool do_not_send_tmpl; struct ieee80211_chanctx_conf chanctx; +#ifdef CONFIG_ATH11K_DEBUGFS + struct dentry *debugfs_twt; +#endif /* CONFIG_ATH11K_DEBUGFS */ }; struct ath11k_vif_iter { @@ -441,6 +444,8 @@ struct ath11k_dbg_htt_stats { spinlock_t lock; }; +#define MAX_MODULE_ID_BITMAP_WORDS 16 + struct ath11k_debug { struct dentry *debugfs_pdev; struct ath11k_dbg_htt_stats htt_stats; @@ -454,6 +459,9 @@ struct ath11k_debug { u32 pktlog_peer_valid; u8 pktlog_peer_addr[ETH_ALEN]; u32 rx_filter; + u32 mem_offset; + u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS]; + struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX]; }; struct ath11k_per_peer_tx_stats { @@ -603,6 +611,8 @@ struct ath11k { struct completion finish_11d_ch_list; bool pending_11d; bool regdom_set_by_user; + int hw_rate_code; + u8 twt_enabled; }; struct ath11k_band_cap { @@ -806,7 +816,7 @@ struct ath11k_base { } id; /* must be last */ - u8 drv_priv[0] __aligned(sizeof(void *)); + u8 drv_priv[] __aligned(sizeof(void *)); }; struct ath11k_fw_stats_pdev { diff --git a/drivers/net/wireless/ath/ath11k/dbring.c b/drivers/net/wireless/ath/ath11k/dbring.c index eda67ebfc4c2..2107ec05d14f 100644 --- a/drivers/net/wireless/ath/ath11k/dbring.c +++ b/drivers/net/wireless/ath/ath11k/dbring.c @@ -37,7 +37,8 @@ static void ath11k_dbring_fill_magic_value(struct ath11k *ar, static int ath11k_dbring_bufs_replenish(struct ath11k *ar, struct ath11k_dbring *ring, - struct ath11k_dbring_element *buff) + struct ath11k_dbring_element *buff, + enum wmi_direct_buffer_module id) { struct ath11k_base *ab = ar->ab; struct hal_srng *srng; @@ -84,6 +85,7 @@ static int ath11k_dbring_bufs_replenish(struct ath11k *ar, ath11k_hal_rx_buf_addr_info_set(desc, paddr, cookie, 0); + ath11k_debugfs_add_dbring_entry(ar, id, ATH11K_DBG_DBR_EVENT_REPLENISH, srng); ath11k_hal_srng_access_end(ab, srng); return 0; @@ -101,7 +103,8 @@ err: } static int ath11k_dbring_fill_bufs(struct ath11k *ar, - struct ath11k_dbring *ring) + struct ath11k_dbring *ring, + enum wmi_direct_buffer_module id) { struct ath11k_dbring_element *buff; struct hal_srng *srng; @@ -129,7 +132,7 @@ static int ath11k_dbring_fill_bufs(struct ath11k *ar, kfree(buff); break; } - ret = ath11k_dbring_bufs_replenish(ar, ring, buff); + ret = ath11k_dbring_bufs_replenish(ar, ring, buff, id); if (ret) { ath11k_warn(ar->ab, "failed to replenish db ring num_remain %d req_ent %d\n", num_remain, req_entries); @@ -210,7 +213,7 @@ int ath11k_dbring_buf_setup(struct ath11k *ar, ring->hp_addr = ath11k_hal_srng_get_hp_addr(ar->ab, srng); ring->tp_addr = ath11k_hal_srng_get_tp_addr(ar->ab, srng); - ret = ath11k_dbring_fill_bufs(ar, ring); + ret = ath11k_dbring_fill_bufs(ar, ring, db_cap->id); return ret; } @@ -270,7 +273,7 @@ int ath11k_dbring_buffer_release_event(struct ath11k_base *ab, struct ath11k_buffer_addr desc; u8 *vaddr_unalign; u32 num_entry, num_buff_reaped; - u8 pdev_idx, rbm; + u8 pdev_idx, rbm, module_id; u32 cookie; int buf_id; int size; @@ -278,6 +281,7 @@ int ath11k_dbring_buffer_release_event(struct ath11k_base *ab, int ret = 0; pdev_idx = ev->fixed.pdev_id; + module_id = ev->fixed.module_id; if (pdev_idx >= ab->num_radios) { ath11k_warn(ab, "Invalid pdev id %d\n", pdev_idx); @@ -346,6 +350,9 @@ int ath11k_dbring_buffer_release_event(struct ath11k_base *ab, dma_unmap_single(ab->dev, buff->paddr, ring->buf_sz, DMA_FROM_DEVICE); + ath11k_debugfs_add_dbring_entry(ar, module_id, + ATH11K_DBG_DBR_EVENT_RX, srng); + if (ring->handler) { vaddr_unalign = buff->payload; handler_data.data = PTR_ALIGN(vaddr_unalign, @@ -357,7 +364,7 @@ int ath11k_dbring_buffer_release_event(struct ath11k_base *ab, buff->paddr = 0; memset(buff->payload, 0, size); - ath11k_dbring_bufs_replenish(ar, ring, buff); + ath11k_dbring_bufs_replenish(ar, ring, buff, module_id); } spin_unlock_bh(&srng->lock); diff --git a/drivers/net/wireless/ath/ath11k/debugfs.c b/drivers/net/wireless/ath/ath11k/debugfs.c index 198ade90b725..a82266c8befc 100644 --- a/drivers/net/wireless/ath/ath11k/debugfs.c +++ b/drivers/net/wireless/ath/ath11k/debugfs.c @@ -52,6 +52,45 @@ static const char *htt_bp_lmac_ring[HTT_SW_LMAC_RING_IDX_MAX] = { "MONITOR_DEST_RING", }; +void ath11k_debugfs_add_dbring_entry(struct ath11k *ar, + enum wmi_direct_buffer_module id, + enum ath11k_dbg_dbr_event event, + struct hal_srng *srng) +{ + struct ath11k_debug_dbr *dbr_debug; + struct ath11k_dbg_dbr_data *dbr_data; + struct ath11k_dbg_dbr_entry *entry; + + if (id >= WMI_DIRECT_BUF_MAX || event >= ATH11K_DBG_DBR_EVENT_MAX) + return; + + dbr_debug = ar->debug.dbr_debug[id]; + if (!dbr_debug) + return; + + if (!dbr_debug->dbr_debug_enabled) + return; + + dbr_data = &dbr_debug->dbr_dbg_data; + + spin_lock_bh(&dbr_data->lock); + + if (dbr_data->entries) { + entry = &dbr_data->entries[dbr_data->dbr_debug_idx]; + entry->hp = srng->u.src_ring.hp; + entry->tp = *srng->u.src_ring.tp_addr; + entry->timestamp = jiffies; + entry->event = event; + + dbr_data->dbr_debug_idx++; + if (dbr_data->dbr_debug_idx == + dbr_data->num_ring_debug_entries) + dbr_data->dbr_debug_idx = 0; + } + + spin_unlock_bh(&dbr_data->lock); +} + static void ath11k_fw_stats_pdevs_free(struct list_head *head) { struct ath11k_fw_stats_pdev *i, *tmp; @@ -666,6 +705,12 @@ static ssize_t ath11k_write_extd_rx_stats(struct file *file, goto exit; } + if (test_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags)) { + ar->debug.extd_rx_stats = enable; + ret = count; + goto exit; + } + if (enable) { rx_filter = HTT_RX_FILTER_TLV_FLAGS_MPDU_START; rx_filter |= HTT_RX_FILTER_TLV_FLAGS_PPDU_START; @@ -870,6 +915,69 @@ static const struct file_operations fops_soc_dp_stats = { .llseek = default_llseek, }; +static ssize_t ath11k_write_fw_dbglog(struct file *file, + const char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct ath11k *ar = file->private_data; + char buf[128] = {0}; + struct ath11k_fw_dbglog dbglog; + unsigned int param, mod_id_index, is_end; + u64 value; + int ret, num; + + ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, + user_buf, count); + if (ret <= 0) + return ret; + + num = sscanf(buf, "%u %llx %u %u", ¶m, &value, &mod_id_index, &is_end); + + if (num < 2) + return -EINVAL; + + mutex_lock(&ar->conf_mutex); + if (param == WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP || + param == WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP) { + if (num != 4 || mod_id_index > (MAX_MODULE_ID_BITMAP_WORDS - 1)) { + ret = -EINVAL; + goto out; + } + ar->debug.module_id_bitmap[mod_id_index] = upper_32_bits(value); + if (!is_end) { + ret = count; + goto out; + } + } else { + if (num != 2) { + ret = -EINVAL; + goto out; + } + } + + dbglog.param = param; + dbglog.value = lower_32_bits(value); + ret = ath11k_wmi_fw_dbglog_cfg(ar, ar->debug.module_id_bitmap, &dbglog); + if (ret) { + ath11k_warn(ar->ab, "fw dbglog config failed from debugfs: %d\n", + ret); + goto out; + } + + ret = count; + +out: + mutex_unlock(&ar->conf_mutex); + return ret; +} + +static const struct file_operations fops_fw_dbglog = { + .write = ath11k_write_fw_dbglog, + .open = simple_open, + .owner = THIS_MODULE, + .llseek = default_llseek, +}; + int ath11k_debugfs_pdev_create(struct ath11k_base *ab) { if (test_bit(ATH11K_FLAG_REGISTERED, &ab->dev_flags)) @@ -1107,6 +1215,169 @@ static const struct file_operations fops_simulate_radar = { .open = simple_open }; +static ssize_t ath11k_debug_dump_dbr_entries(struct file *file, + char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct ath11k_dbg_dbr_data *dbr_dbg_data = file->private_data; + static const char * const event_id_to_string[] = {"empty", "Rx", "Replenish"}; + int size = ATH11K_DEBUG_DBR_ENTRIES_MAX * 100; + char *buf; + int i, ret; + int len = 0; + + buf = kzalloc(size, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + len += scnprintf(buf + len, size - len, + "-----------------------------------------\n"); + len += scnprintf(buf + len, size - len, + "| idx | hp | tp | timestamp | event |\n"); + len += scnprintf(buf + len, size - len, + "-----------------------------------------\n"); + + spin_lock_bh(&dbr_dbg_data->lock); + + for (i = 0; i < dbr_dbg_data->num_ring_debug_entries; i++) { + len += scnprintf(buf + len, size - len, + "|%4u|%8u|%8u|%11llu|%8s|\n", i, + dbr_dbg_data->entries[i].hp, + dbr_dbg_data->entries[i].tp, + dbr_dbg_data->entries[i].timestamp, + event_id_to_string[dbr_dbg_data->entries[i].event]); + } + + spin_unlock_bh(&dbr_dbg_data->lock); + + ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); + kfree(buf); + + return ret; +} + +static const struct file_operations fops_debug_dump_dbr_entries = { + .read = ath11k_debug_dump_dbr_entries, + .open = simple_open, + .owner = THIS_MODULE, + .llseek = default_llseek, +}; + +static void ath11k_debugfs_dbr_dbg_destroy(struct ath11k *ar, int dbr_id) +{ + struct ath11k_debug_dbr *dbr_debug; + struct ath11k_dbg_dbr_data *dbr_dbg_data; + + if (!ar->debug.dbr_debug[dbr_id]) + return; + + dbr_debug = ar->debug.dbr_debug[dbr_id]; + dbr_dbg_data = &dbr_debug->dbr_dbg_data; + + debugfs_remove_recursive(dbr_debug->dbr_debugfs); + kfree(dbr_dbg_data->entries); + kfree(dbr_debug); + ar->debug.dbr_debug[dbr_id] = NULL; +} + +static int ath11k_debugfs_dbr_dbg_init(struct ath11k *ar, int dbr_id) +{ + struct ath11k_debug_dbr *dbr_debug; + struct ath11k_dbg_dbr_data *dbr_dbg_data; + static const char * const dbr_id_to_str[] = {"spectral", "CFR"}; + + if (ar->debug.dbr_debug[dbr_id]) + return 0; + + ar->debug.dbr_debug[dbr_id] = kzalloc(sizeof(*dbr_debug), + GFP_KERNEL); + + if (!ar->debug.dbr_debug[dbr_id]) + return -ENOMEM; + + dbr_debug = ar->debug.dbr_debug[dbr_id]; + dbr_dbg_data = &dbr_debug->dbr_dbg_data; + + if (dbr_debug->dbr_debugfs) + return 0; + + dbr_debug->dbr_debugfs = debugfs_create_dir(dbr_id_to_str[dbr_id], + ar->debug.debugfs_pdev); + if (IS_ERR_OR_NULL(dbr_debug->dbr_debugfs)) { + if (IS_ERR(dbr_debug->dbr_debugfs)) + return PTR_ERR(dbr_debug->dbr_debugfs); + return -ENOMEM; + } + + dbr_debug->dbr_debug_enabled = true; + dbr_dbg_data->num_ring_debug_entries = ATH11K_DEBUG_DBR_ENTRIES_MAX; + dbr_dbg_data->dbr_debug_idx = 0; + dbr_dbg_data->entries = kcalloc(ATH11K_DEBUG_DBR_ENTRIES_MAX, + sizeof(struct ath11k_dbg_dbr_entry), + GFP_KERNEL); + if (!dbr_dbg_data->entries) + return -ENOMEM; + + spin_lock_init(&dbr_dbg_data->lock); + + debugfs_create_file("dump_dbr_debug", 0444, dbr_debug->dbr_debugfs, + dbr_dbg_data, &fops_debug_dump_dbr_entries); + + return 0; +} + +static ssize_t ath11k_debugfs_write_enable_dbr_dbg(struct file *file, + const char __user *ubuf, + size_t count, loff_t *ppos) +{ + struct ath11k *ar = file->private_data; + char buf[32] = {0}; + u32 dbr_id, enable; + int ret; + + mutex_lock(&ar->conf_mutex); + + if (ar->state != ATH11K_STATE_ON) { + ret = -ENETDOWN; + goto out; + } + + ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, ubuf, count); + if (ret < 0) + goto out; + + buf[ret] = '\0'; + ret = sscanf(buf, "%u %u", &dbr_id, &enable); + if (ret != 2 || dbr_id > 1 || enable > 1) { + ret = -EINVAL; + ath11k_warn(ar->ab, "usage: echo <dbr_id> <val> dbr_id:0-Spectral 1-CFR val:0-disable 1-enable\n"); + goto out; + } + + if (enable) { + ret = ath11k_debugfs_dbr_dbg_init(ar, dbr_id); + if (ret) { + ath11k_warn(ar->ab, "db ring module debugfs init failed: %d\n", + ret); + goto out; + } + } else { + ath11k_debugfs_dbr_dbg_destroy(ar, dbr_id); + } + + ret = count; +out: + mutex_unlock(&ar->conf_mutex); + return ret; +} + +static const struct file_operations fops_dbr_debug = { + .write = ath11k_debugfs_write_enable_dbr_dbg, + .open = simple_open, + .owner = THIS_MODULE, + .llseek = default_llseek, +}; + int ath11k_debugfs_register(struct ath11k *ar) { struct ath11k_base *ab = ar->ab; @@ -1136,6 +1407,9 @@ int ath11k_debugfs_register(struct ath11k *ar) debugfs_create_file("pktlog_filter", 0644, ar->debug.debugfs_pdev, ar, &fops_pktlog_filter); + debugfs_create_file("fw_dbglog_config", 0600, + ar->debug.debugfs_pdev, ar, + &fops_fw_dbglog); if (ar->hw->wiphy->bands[NL80211_BAND_5GHZ]) { debugfs_create_file("dfs_simulate_radar", 0200, @@ -1146,9 +1420,250 @@ int ath11k_debugfs_register(struct ath11k *ar) &ar->dfs_block_radar_events); } + if (ab->hw_params.dbr_debug_support) + debugfs_create_file("enable_dbr_debug", 0200, ar->debug.debugfs_pdev, + ar, &fops_dbr_debug); + return 0; } void ath11k_debugfs_unregister(struct ath11k *ar) { + struct ath11k_debug_dbr *dbr_debug; + struct ath11k_dbg_dbr_data *dbr_dbg_data; + int i; + + for (i = 0; i < WMI_DIRECT_BUF_MAX; i++) { + dbr_debug = ar->debug.dbr_debug[i]; + if (!dbr_debug) + continue; + + dbr_dbg_data = &dbr_debug->dbr_dbg_data; + kfree(dbr_dbg_data->entries); + debugfs_remove_recursive(dbr_debug->dbr_debugfs); + kfree(dbr_debug); + ar->debug.dbr_debug[i] = NULL; + } +} + +static ssize_t ath11k_write_twt_add_dialog(struct file *file, + const char __user *ubuf, + size_t count, loff_t *ppos) +{ + struct ath11k_vif *arvif = file->private_data; + struct wmi_twt_add_dialog_params params = { 0 }; + u8 buf[128] = {0}; + int ret; + + if (arvif->ar->twt_enabled == 0) { + ath11k_err(arvif->ar->ab, "twt support is not enabled\n"); + return -EOPNOTSUPP; + } + + ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, ubuf, count); + if (ret < 0) + return ret; + + buf[ret] = '\0'; + ret = sscanf(buf, + "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx %u %u %u %u %u %hhu %hhu %hhu %hhu %hhu", + ¶ms.peer_macaddr[0], + ¶ms.peer_macaddr[1], + ¶ms.peer_macaddr[2], + ¶ms.peer_macaddr[3], + ¶ms.peer_macaddr[4], + ¶ms.peer_macaddr[5], + ¶ms.dialog_id, + ¶ms.wake_intvl_us, + ¶ms.wake_intvl_mantis, + ¶ms.wake_dura_us, + ¶ms.sp_offset_us, + ¶ms.twt_cmd, + ¶ms.flag_bcast, + ¶ms.flag_trigger, + ¶ms.flag_flow_type, + ¶ms.flag_protection); + if (ret != 16) + return -EINVAL; + + params.vdev_id = arvif->vdev_id; + + ret = ath11k_wmi_send_twt_add_dialog_cmd(arvif->ar, ¶ms); + if (ret) + return ret; + + return count; +} + +static ssize_t ath11k_write_twt_del_dialog(struct file *file, + const char __user *ubuf, + size_t count, loff_t *ppos) +{ + struct ath11k_vif *arvif = file->private_data; + struct wmi_twt_del_dialog_params params = { 0 }; + u8 buf[64] = {0}; + int ret; + + if (arvif->ar->twt_enabled == 0) { + ath11k_err(arvif->ar->ab, "twt support is not enabled\n"); + return -EOPNOTSUPP; + } + + ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, ubuf, count); + if (ret < 0) + return ret; + + buf[ret] = '\0'; + ret = sscanf(buf, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx %u", + ¶ms.peer_macaddr[0], + ¶ms.peer_macaddr[1], + ¶ms.peer_macaddr[2], + ¶ms.peer_macaddr[3], + ¶ms.peer_macaddr[4], + ¶ms.peer_macaddr[5], + ¶ms.dialog_id); + if (ret != 7) + return -EINVAL; + + params.vdev_id = arvif->vdev_id; + + ret = ath11k_wmi_send_twt_del_dialog_cmd(arvif->ar, ¶ms); + if (ret) + return ret; + + return count; +} + +static ssize_t ath11k_write_twt_pause_dialog(struct file *file, + const char __user *ubuf, + size_t count, loff_t *ppos) +{ + struct ath11k_vif *arvif = file->private_data; + struct wmi_twt_pause_dialog_params params = { 0 }; + u8 buf[64] = {0}; + int ret; + + if (arvif->ar->twt_enabled == 0) { + ath11k_err(arvif->ar->ab, "twt support is not enabled\n"); + return -EOPNOTSUPP; + } + + ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, ubuf, count); + if (ret < 0) + return ret; + + buf[ret] = '\0'; + ret = sscanf(buf, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx %u", + ¶ms.peer_macaddr[0], + ¶ms.peer_macaddr[1], + ¶ms.peer_macaddr[2], + ¶ms.peer_macaddr[3], + ¶ms.peer_macaddr[4], + ¶ms.peer_macaddr[5], + ¶ms.dialog_id); + if (ret != 7) + return -EINVAL; + + params.vdev_id = arvif->vdev_id; + + ret = ath11k_wmi_send_twt_pause_dialog_cmd(arvif->ar, ¶ms); + if (ret) + return ret; + + return count; +} + +static ssize_t ath11k_write_twt_resume_dialog(struct file *file, + const char __user *ubuf, + size_t count, loff_t *ppos) +{ + struct ath11k_vif *arvif = file->private_data; + struct wmi_twt_resume_dialog_params params = { 0 }; + u8 buf[64] = {0}; + int ret; + + if (arvif->ar->twt_enabled == 0) { + ath11k_err(arvif->ar->ab, "twt support is not enabled\n"); + return -EOPNOTSUPP; + } + + ret = simple_write_to_buffer(buf, sizeof(buf) - 1, ppos, ubuf, count); + if (ret < 0) + return ret; + + buf[ret] = '\0'; + ret = sscanf(buf, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx %u %u %u", + ¶ms.peer_macaddr[0], + ¶ms.peer_macaddr[1], + ¶ms.peer_macaddr[2], + ¶ms.peer_macaddr[3], + ¶ms.peer_macaddr[4], + ¶ms.peer_macaddr[5], + ¶ms.dialog_id, + ¶ms.sp_offset_us, + ¶ms.next_twt_size); + if (ret != 9) + return -EINVAL; + + params.vdev_id = arvif->vdev_id; + + ret = ath11k_wmi_send_twt_resume_dialog_cmd(arvif->ar, ¶ms); + if (ret) + return ret; + + return count; +} + +static const struct file_operations ath11k_fops_twt_add_dialog = { + .write = ath11k_write_twt_add_dialog, + .open = simple_open +}; + +static const struct file_operations ath11k_fops_twt_del_dialog = { + .write = ath11k_write_twt_del_dialog, + .open = simple_open +}; + +static const struct file_operations ath11k_fops_twt_pause_dialog = { + .write = ath11k_write_twt_pause_dialog, + .open = simple_open +}; + +static const struct file_operations ath11k_fops_twt_resume_dialog = { + .write = ath11k_write_twt_resume_dialog, + .open = simple_open +}; + +int ath11k_debugfs_add_interface(struct ath11k_vif *arvif) +{ + if (arvif->vif->type == NL80211_IFTYPE_AP && !arvif->debugfs_twt) { + arvif->debugfs_twt = debugfs_create_dir("twt", + arvif->vif->debugfs_dir); + if (!arvif->debugfs_twt || IS_ERR(arvif->debugfs_twt)) { + ath11k_warn(arvif->ar->ab, + "failed to create directory %p\n", + arvif->debugfs_twt); + arvif->debugfs_twt = NULL; + return -1; + } + + debugfs_create_file("add_dialog", 0200, arvif->debugfs_twt, + arvif, &ath11k_fops_twt_add_dialog); + + debugfs_create_file("del_dialog", 0200, arvif->debugfs_twt, + arvif, &ath11k_fops_twt_del_dialog); + + debugfs_create_file("pause_dialog", 0200, arvif->debugfs_twt, + arvif, &ath11k_fops_twt_pause_dialog); + + debugfs_create_file("resume_dialog", 0200, arvif->debugfs_twt, + arvif, &ath11k_fops_twt_resume_dialog); + } + return 0; +} + +void ath11k_debugfs_remove_interface(struct ath11k_vif *arvif) +{ + debugfs_remove_recursive(arvif->debugfs_twt); + arvif->debugfs_twt = NULL; } diff --git a/drivers/net/wireless/ath/ath11k/debugfs.h b/drivers/net/wireless/ath/ath11k/debugfs.h index 4c0740394c95..30c00cb28311 100644 --- a/drivers/net/wireless/ath/ath11k/debugfs.h +++ b/drivers/net/wireless/ath/ath11k/debugfs.h @@ -47,6 +47,36 @@ enum ath11k_dbg_htt_ext_stats_type { ATH11K_DBG_HTT_NUM_EXT_STATS, }; +#define ATH11K_DEBUG_DBR_ENTRIES_MAX 512 + +enum ath11k_dbg_dbr_event { + ATH11K_DBG_DBR_EVENT_INVALID, + ATH11K_DBG_DBR_EVENT_RX, + ATH11K_DBG_DBR_EVENT_REPLENISH, + ATH11K_DBG_DBR_EVENT_MAX, +}; + +struct ath11k_dbg_dbr_entry { + u32 hp; + u32 tp; + u64 timestamp; + enum ath11k_dbg_dbr_event event; +}; + +struct ath11k_dbg_dbr_data { + /* protects ath11k_db_ring_debug data */ + spinlock_t lock; + struct ath11k_dbg_dbr_entry *entries; + u32 dbr_debug_idx; + u32 num_ring_debug_entries; +}; + +struct ath11k_debug_dbr { + struct ath11k_dbg_dbr_data dbr_dbg_data; + struct dentry *dbr_debugfs; + bool dbr_debug_enabled; +}; + struct debug_htt_stats_req { bool done; u8 pdev_id; @@ -88,6 +118,7 @@ enum ath11k_pktlog_mode { }; enum ath11k_pktlog_enum { + ATH11K_PKTLOG_TYPE_INVALID = 0, ATH11K_PKTLOG_TYPE_TX_CTRL = 1, ATH11K_PKTLOG_TYPE_TX_STAT = 2, ATH11K_PKTLOG_TYPE_TX_MSDU_ID = 3, @@ -107,6 +138,130 @@ enum ath11k_dbg_aggr_mode { ATH11K_DBG_AGGR_MODE_MAX, }; +enum fw_dbglog_wlan_module_id { + WLAN_MODULE_ID_MIN = 0, + WLAN_MODULE_INF = WLAN_MODULE_ID_MIN, + WLAN_MODULE_WMI, + WLAN_MODULE_STA_PWRSAVE, + WLAN_MODULE_WHAL, + WLAN_MODULE_COEX, + WLAN_MODULE_ROAM, + WLAN_MODULE_RESMGR_CHAN_MANAGER, + WLAN_MODULE_RESMGR, + WLAN_MODULE_VDEV_MGR, + WLAN_MODULE_SCAN, + WLAN_MODULE_RATECTRL, + WLAN_MODULE_AP_PWRSAVE, + WLAN_MODULE_BLOCKACK, + WLAN_MODULE_MGMT_TXRX, + WLAN_MODULE_DATA_TXRX, + WLAN_MODULE_HTT, + WLAN_MODULE_HOST, + WLAN_MODULE_BEACON, + WLAN_MODULE_OFFLOAD, + WLAN_MODULE_WAL, + WLAN_WAL_MODULE_DE, + WLAN_MODULE_PCIELP, + WLAN_MODULE_RTT, + WLAN_MODULE_RESOURCE, + WLAN_MODULE_DCS, + WLAN_MODULE_CACHEMGR, + WLAN_MODULE_ANI, + WLAN_MODULE_P2P, + WLAN_MODULE_CSA, + WLAN_MODULE_NLO, + WLAN_MODULE_CHATTER, + WLAN_MODULE_WOW, + WLAN_MODULE_WAL_VDEV, + WLAN_MODULE_WAL_PDEV, + WLAN_MODULE_TEST, + WLAN_MODULE_STA_SMPS, + WLAN_MODULE_SWBMISS, + WLAN_MODULE_WMMAC, + WLAN_MODULE_TDLS, + WLAN_MODULE_HB, + WLAN_MODULE_TXBF, + WLAN_MODULE_BATCH_SCAN, + WLAN_MODULE_THERMAL_MGR, + WLAN_MODULE_PHYERR_DFS, + WLAN_MODULE_RMC, + WLAN_MODULE_STATS, + WLAN_MODULE_NAN, + WLAN_MODULE_IBSS_PWRSAVE, + WLAN_MODULE_HIF_UART, + WLAN_MODULE_LPI, + WLAN_MODULE_EXTSCAN, + WLAN_MODULE_UNIT_TEST, + WLAN_MODULE_MLME, + WLAN_MODULE_SUPPL, + WLAN_MODULE_ERE, + WLAN_MODULE_OCB, + WLAN_MODULE_RSSI_MONITOR, + WLAN_MODULE_WPM, + WLAN_MODULE_CSS, + WLAN_MODULE_PPS, + WLAN_MODULE_SCAN_CH_PREDICT, + WLAN_MODULE_MAWC, + WLAN_MODULE_CMC_QMIC, + WLAN_MODULE_EGAP, + WLAN_MODULE_NAN20, + WLAN_MODULE_QBOOST, + WLAN_MODULE_P2P_LISTEN_OFFLOAD, + WLAN_MODULE_HALPHY, + WLAN_WAL_MODULE_ENQ, + WLAN_MODULE_GNSS, + WLAN_MODULE_WAL_MEM, + WLAN_MODULE_SCHED_ALGO, + WLAN_MODULE_TX, + WLAN_MODULE_RX, + WLAN_MODULE_WLM, + WLAN_MODULE_RU_ALLOCATOR, + WLAN_MODULE_11K_OFFLOAD, + WLAN_MODULE_STA_TWT, + WLAN_MODULE_AP_TWT, + WLAN_MODULE_UL_OFDMA, + WLAN_MODULE_HPCS_PULSE, + WLAN_MODULE_DTF, + WLAN_MODULE_QUIET_IE, + WLAN_MODULE_SHMEM_MGR, + WLAN_MODULE_CFIR, + WLAN_MODULE_CODE_COVER, + WLAN_MODULE_SHO, + WLAN_MODULE_MLO_MGR, + WLAN_MODULE_PEER_INIT, + WLAN_MODULE_STA_MLO_PS, + + WLAN_MODULE_ID_MAX, + WLAN_MODULE_ID_INVALID = WLAN_MODULE_ID_MAX, +}; + +enum fw_dbglog_log_level { + ATH11K_FW_DBGLOG_ML = 0, + ATH11K_FW_DBGLOG_VERBOSE = 0, + ATH11K_FW_DBGLOG_INFO, + ATH11K_FW_DBGLOG_INFO_LVL_1, + ATH11K_FW_DBGLOG_INFO_LVL_2, + ATH11K_FW_DBGLOG_WARN, + ATH11K_FW_DBGLOG_ERR, + ATH11K_FW_DBGLOG_LVL_MAX +}; + +struct ath11k_fw_dbglog { + enum wmi_debug_log_param param; + union { + struct { + /* log_level values are given in enum fw_dbglog_log_level */ + u16 log_level; + /* module_id values are given in enum fw_dbglog_wlan_module_id */ + u16 module_id; + }; + /* value is either log_level&module_id/vdev_id/vdev_id_bitmap/log_level + * according to param + */ + u32 value; + }; +}; + #ifdef CONFIG_ATH11K_DEBUGFS int ath11k_debugfs_soc_create(struct ath11k_base *ab); void ath11k_debugfs_soc_destroy(struct ath11k_base *ab); @@ -151,6 +306,13 @@ static inline int ath11k_debugfs_rx_filter(struct ath11k *ar) return ar->debug.rx_filter; } +int ath11k_debugfs_add_interface(struct ath11k_vif *arvif); +void ath11k_debugfs_remove_interface(struct ath11k_vif *arvif); +void ath11k_debugfs_add_dbring_entry(struct ath11k *ar, + enum wmi_direct_buffer_module id, + enum ath11k_dbg_dbr_event event, + struct hal_srng *srng); + #else static inline int ath11k_debugfs_soc_create(struct ath11k_base *ab) { @@ -224,6 +386,22 @@ static inline int ath11k_debugfs_get_fw_stats(struct ath11k *ar, return 0; } -#endif /* CONFIG_MAC80211_DEBUGFS*/ +static inline int ath11k_debugfs_add_interface(struct ath11k_vif *arvif) +{ + return 0; +} + +static inline void ath11k_debugfs_remove_interface(struct ath11k_vif *arvif) +{ +} + +static inline void +ath11k_debugfs_add_dbring_entry(struct ath11k *ar, + enum wmi_direct_buffer_module id, + enum ath11k_dbg_dbr_event event, + struct hal_srng *srng) +{ +} +#endif /* CONFIG_ATH11K_DEBUGFS*/ #endif /* _ATH11K_DEBUGFS_H_ */ diff --git a/drivers/net/wireless/ath/ath11k/dp.h b/drivers/net/wireless/ath/ath11k/dp.h index 409d6cc5a1d5..e9dfa209098b 100644 --- a/drivers/net/wireless/ath/ath11k/dp.h +++ b/drivers/net/wireless/ath/ath11k/dp.h @@ -115,6 +115,8 @@ struct ath11k_pdev_mon_stats { u32 dest_mpdu_drop; u32 dup_mon_linkdesc_cnt; u32 dup_mon_buf_cnt; + u32 dest_mon_stuck; + u32 dest_mon_not_reaped; }; struct dp_full_mon_mpdu { @@ -167,6 +169,7 @@ struct ath11k_mon_data { struct ath11k_pdev_dp { u32 mac_id; + u32 mon_dest_ring_stuck_cnt; atomic_t num_tx_pending; wait_queue_head_t tx_empty_waitq; struct dp_rxdma_ring rx_refill_buf_ring; @@ -1170,12 +1173,12 @@ struct ath11k_htt_ppdu_stats_msg { u32 ppdu_id; u32 timestamp; u32 rsvd; - u8 data[0]; + u8 data[]; } __packed; struct htt_tlv { u32 header; - u8 value[0]; + u8 value[]; } __packed; #define HTT_TLV_TAG GENMASK(11, 0) @@ -1362,7 +1365,7 @@ struct htt_ppdu_stats_usr_cmn_array { * tx_ppdu_stats_info is variable length, with length = * number_of_ppdu_stats * sizeof (struct htt_tx_ppdu_stats_info) */ - struct htt_tx_ppdu_stats_info tx_ppdu_info[0]; + struct htt_tx_ppdu_stats_info tx_ppdu_info[]; } __packed; struct htt_ppdu_user_stats { @@ -1424,7 +1427,7 @@ struct htt_ppdu_stats_info { */ struct htt_pktlog_msg { u32 hdr; - u8 payload[0]; + u8 payload[]; }; /** @@ -1645,7 +1648,7 @@ struct ath11k_htt_extd_stats_msg { u32 info0; u64 cookie; u32 info1; - u8 data[0]; + u8 data[]; } __packed; #define HTT_MAC_ADDR_L32_0 GENMASK(7, 0) diff --git a/drivers/net/wireless/ath/ath11k/dp_rx.c b/drivers/net/wireless/ath/ath11k/dp_rx.c index c212a789421e..049774cc158c 100644 --- a/drivers/net/wireless/ath/ath11k/dp_rx.c +++ b/drivers/net/wireless/ath/ath11k/dp_rx.c @@ -43,6 +43,13 @@ static inline u8 ath11k_dp_rx_h_msdu_start_decap_type(struct ath11k_base *ab, } static inline +bool ath11k_dp_rx_h_msdu_start_ldpc_support(struct ath11k_base *ab, + struct hal_rx_desc *desc) +{ + return ab->hw_params.hw_ops->rx_desc_get_ldpc_support(desc); +} + +static inline u8 ath11k_dp_rx_h_msdu_start_mesh_ctl_present(struct ath11k_base *ab, struct hal_rx_desc *desc) { @@ -2313,7 +2320,7 @@ static void ath11k_dp_rx_h_rate(struct ath11k *ar, struct hal_rx_desc *rx_desc, u8 bw; u8 rate_mcs, nss; u8 sgi; - bool is_cck; + bool is_cck, is_ldpc; pkt_type = ath11k_dp_rx_h_msdu_start_pkt_type(ar->ab, rx_desc); bw = ath11k_dp_rx_h_msdu_start_rx_bw(ar->ab, rx_desc); @@ -2355,6 +2362,9 @@ static void ath11k_dp_rx_h_rate(struct ath11k *ar, struct hal_rx_desc *rx_desc, if (sgi) rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI; rx_status->bw = ath11k_mac_bw_to_mac80211_bw(bw); + is_ldpc = ath11k_dp_rx_h_msdu_start_ldpc_support(ar->ab, rx_desc); + if (is_ldpc) + rx_status->enc_flags |= RX_ENC_FLAG_LDPC; break; case RX_MSDU_START_PKT_TYPE_11AX: rx_status->rate_idx = rate_mcs; @@ -2642,9 +2652,9 @@ int ath11k_dp_process_rx(struct ath11k_base *ab, int ring_id, spin_lock_bh(&srng->lock); +try_again: ath11k_hal_srng_access_begin(ab, srng); -try_again: while (likely(desc = (struct hal_reo_dest_ring *)ath11k_hal_srng_dst_get_next_entry(ab, srng))) { @@ -3080,79 +3090,6 @@ move_next: return num_buffs_reaped; } -int ath11k_dp_rx_process_mon_status(struct ath11k_base *ab, int mac_id, - struct napi_struct *napi, int budget) -{ - struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id); - enum hal_rx_mon_status hal_status; - struct sk_buff *skb; - struct sk_buff_head skb_list; - struct hal_rx_mon_ppdu_info ppdu_info; - struct ath11k_peer *peer; - struct ath11k_sta *arsta; - int num_buffs_reaped = 0; - u32 rx_buf_sz; - u16 log_type = 0; - - __skb_queue_head_init(&skb_list); - - num_buffs_reaped = ath11k_dp_rx_reap_mon_status_ring(ab, mac_id, &budget, - &skb_list); - if (!num_buffs_reaped) - goto exit; - - memset(&ppdu_info, 0, sizeof(ppdu_info)); - ppdu_info.peer_id = HAL_INVALID_PEERID; - - while ((skb = __skb_dequeue(&skb_list))) { - if (ath11k_debugfs_is_pktlog_lite_mode_enabled(ar)) { - log_type = ATH11K_PKTLOG_TYPE_LITE_RX; - rx_buf_sz = DP_RX_BUFFER_SIZE_LITE; - } else if (ath11k_debugfs_is_pktlog_rx_stats_enabled(ar)) { - log_type = ATH11K_PKTLOG_TYPE_RX_STATBUF; - rx_buf_sz = DP_RX_BUFFER_SIZE; - } - - if (log_type) - trace_ath11k_htt_rxdesc(ar, skb->data, log_type, rx_buf_sz); - - hal_status = ath11k_hal_rx_parse_mon_status(ab, &ppdu_info, skb); - - if (ppdu_info.peer_id == HAL_INVALID_PEERID || - hal_status != HAL_RX_MON_STATUS_PPDU_DONE) { - dev_kfree_skb_any(skb); - continue; - } - - rcu_read_lock(); - spin_lock_bh(&ab->base_lock); - peer = ath11k_peer_find_by_id(ab, ppdu_info.peer_id); - - if (!peer || !peer->sta) { - ath11k_dbg(ab, ATH11K_DBG_DATA, - "failed to find the peer with peer_id %d\n", - ppdu_info.peer_id); - goto next_skb; - } - - arsta = (struct ath11k_sta *)peer->sta->drv_priv; - ath11k_dp_rx_update_peer_stats(arsta, &ppdu_info); - - if (ath11k_debugfs_is_pktlog_peer_valid(ar, peer->addr)) - trace_ath11k_htt_rxdesc(ar, skb->data, log_type, rx_buf_sz); - -next_skb: - spin_unlock_bh(&ab->base_lock); - rcu_read_unlock(); - - dev_kfree_skb_any(skb); - memset(&ppdu_info, 0, sizeof(ppdu_info)); - ppdu_info.peer_id = HAL_INVALID_PEERID; - } -exit: - return num_buffs_reaped; -} - static void ath11k_dp_rx_frag_timer(struct timer_list *timer) { struct dp_rx_tid *rx_tid = from_timer(rx_tid, timer, frag_timer); @@ -4870,7 +4807,6 @@ ath11k_dp_rx_mon_merg_msdus(struct ath11k *ar, { struct ath11k_base *ab = ar->ab; struct sk_buff *msdu, *prev_buf; - u32 wifi_hdr_len; struct hal_rx_desc *rx_desc; char *hdr_desc; u8 *dest, decap_format; @@ -4912,38 +4848,27 @@ ath11k_dp_rx_mon_merg_msdus(struct ath11k *ar, skb_trim(prev_buf, prev_buf->len - HAL_RX_FCS_LEN); } else if (decap_format == DP_RX_DECAP_TYPE_NATIVE_WIFI) { - __le16 qos_field; u8 qos_pkt = 0; rx_desc = (struct hal_rx_desc *)head_msdu->data; hdr_desc = ath11k_dp_rxdesc_get_80211hdr(ab, rx_desc); /* Base size */ - wifi_hdr_len = sizeof(struct ieee80211_hdr_3addr); wh = (struct ieee80211_hdr_3addr *)hdr_desc; - if (ieee80211_is_data_qos(wh->frame_control)) { - struct ieee80211_qos_hdr *qwh = - (struct ieee80211_qos_hdr *)hdr_desc; - - qos_field = qwh->qos_ctrl; + if (ieee80211_is_data_qos(wh->frame_control)) qos_pkt = 1; - } + msdu = head_msdu; while (msdu) { - rx_desc = (struct hal_rx_desc *)msdu->data; - hdr_desc = ath11k_dp_rxdesc_get_80211hdr(ab, rx_desc); - + ath11k_dp_rx_msdus_set_payload(ar, msdu); if (qos_pkt) { dest = skb_push(msdu, sizeof(__le16)); if (!dest) goto err_merge_fail; - memcpy(dest, hdr_desc, wifi_hdr_len); - memcpy(dest + wifi_hdr_len, - (u8 *)&qos_field, sizeof(__le16)); + memcpy(dest, hdr_desc, sizeof(struct ieee80211_qos_hdr)); } - ath11k_dp_rx_msdus_set_payload(ar, msdu); prev_buf = msdu; msdu = msdu->next; } @@ -4967,8 +4892,98 @@ err_merge_fail: return NULL; } +static void +ath11k_dp_rx_update_radiotap_he(struct hal_rx_mon_ppdu_info *rx_status, + u8 *rtap_buf) +{ + u32 rtap_len = 0; + + put_unaligned_le16(rx_status->he_data1, &rtap_buf[rtap_len]); + rtap_len += 2; + + put_unaligned_le16(rx_status->he_data2, &rtap_buf[rtap_len]); + rtap_len += 2; + + put_unaligned_le16(rx_status->he_data3, &rtap_buf[rtap_len]); + rtap_len += 2; + + put_unaligned_le16(rx_status->he_data4, &rtap_buf[rtap_len]); + rtap_len += 2; + + put_unaligned_le16(rx_status->he_data5, &rtap_buf[rtap_len]); + rtap_len += 2; + + put_unaligned_le16(rx_status->he_data6, &rtap_buf[rtap_len]); +} + +static void +ath11k_dp_rx_update_radiotap_he_mu(struct hal_rx_mon_ppdu_info *rx_status, + u8 *rtap_buf) +{ + u32 rtap_len = 0; + + put_unaligned_le16(rx_status->he_flags1, &rtap_buf[rtap_len]); + rtap_len += 2; + + put_unaligned_le16(rx_status->he_flags2, &rtap_buf[rtap_len]); + rtap_len += 2; + + rtap_buf[rtap_len] = rx_status->he_RU[0]; + rtap_len += 1; + + rtap_buf[rtap_len] = rx_status->he_RU[1]; + rtap_len += 1; + + rtap_buf[rtap_len] = rx_status->he_RU[2]; + rtap_len += 1; + + rtap_buf[rtap_len] = rx_status->he_RU[3]; +} + +static void ath11k_update_radiotap(struct ath11k *ar, + struct hal_rx_mon_ppdu_info *ppduinfo, + struct sk_buff *mon_skb, + struct ieee80211_rx_status *rxs) +{ + struct ieee80211_supported_band *sband; + u8 *ptr = NULL; + + rxs->flag |= RX_FLAG_MACTIME_START; + rxs->signal = ppduinfo->rssi_comb + ATH11K_DEFAULT_NOISE_FLOOR; + + if (ppduinfo->nss) + rxs->nss = ppduinfo->nss; + + if (ppduinfo->he_mu_flags) { + rxs->flag |= RX_FLAG_RADIOTAP_HE_MU; + rxs->encoding = RX_ENC_HE; + ptr = skb_push(mon_skb, sizeof(struct ieee80211_radiotap_he_mu)); + ath11k_dp_rx_update_radiotap_he_mu(ppduinfo, ptr); + } else if (ppduinfo->he_flags) { + rxs->flag |= RX_FLAG_RADIOTAP_HE; + rxs->encoding = RX_ENC_HE; + ptr = skb_push(mon_skb, sizeof(struct ieee80211_radiotap_he)); + ath11k_dp_rx_update_radiotap_he(ppduinfo, ptr); + rxs->rate_idx = ppduinfo->rate; + } else if (ppduinfo->vht_flags) { + rxs->encoding = RX_ENC_VHT; + rxs->rate_idx = ppduinfo->rate; + } else if (ppduinfo->ht_flags) { + rxs->encoding = RX_ENC_HT; + rxs->rate_idx = ppduinfo->rate; + } else { + rxs->encoding = RX_ENC_LEGACY; + sband = &ar->mac.sbands[rxs->band]; + rxs->rate_idx = ath11k_mac_hw_rate_to_idx(sband, ppduinfo->rate, + ppduinfo->cck_flag); + } + + rxs->mactime = ppduinfo->tsft; +} + static int ath11k_dp_rx_mon_deliver(struct ath11k *ar, u32 mac_id, struct sk_buff *head_msdu, + struct hal_rx_mon_ppdu_info *ppduinfo, struct sk_buff *tail_msdu, struct napi_struct *napi) { @@ -5003,7 +5018,7 @@ static int ath11k_dp_rx_mon_deliver(struct ath11k *ar, u32 mac_id, } else { rxs->flag |= RX_FLAG_ALLOW_SAME_PN; } - rxs->flag |= RX_FLAG_ONLY_MONITOR; + ath11k_update_radiotap(ar, ppduinfo, mon_skb, rxs); ath11k_dp_rx_deliver_msdu(ar, napi, mon_skb, rxs); mon_skb = skb_next; @@ -5022,6 +5037,12 @@ mon_deliver_fail: return -EINVAL; } +/* The destination ring processing is stuck if the destination is not + * moving while status ring moves 16 PPDU. The destination ring processing + * skips this destination ring PPDU as a workaround. + */ +#define MON_DEST_RING_STUCK_MAX_CNT 16 + static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id, u32 quota, struct napi_struct *napi) { @@ -5035,6 +5056,7 @@ static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id, u32 ring_id; struct ath11k_pdev_mon_stats *rx_mon_stats; u32 npackets = 0; + u32 mpdu_rx_bufs_used; if (ar->ab->hw_params.rxdma1_enable) ring_id = dp->rxdma_mon_dst_ring.ring_id; @@ -5064,20 +5086,44 @@ static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id, head_msdu = NULL; tail_msdu = NULL; - rx_bufs_used += ath11k_dp_rx_mon_mpdu_pop(ar, mac_id, ring_entry, - &head_msdu, - &tail_msdu, - &npackets, &ppdu_id); + mpdu_rx_bufs_used = ath11k_dp_rx_mon_mpdu_pop(ar, mac_id, ring_entry, + &head_msdu, + &tail_msdu, + &npackets, &ppdu_id); + + rx_bufs_used += mpdu_rx_bufs_used; + + if (mpdu_rx_bufs_used) { + dp->mon_dest_ring_stuck_cnt = 0; + } else { + dp->mon_dest_ring_stuck_cnt++; + rx_mon_stats->dest_mon_not_reaped++; + } + + if (dp->mon_dest_ring_stuck_cnt > MON_DEST_RING_STUCK_MAX_CNT) { + rx_mon_stats->dest_mon_stuck++; + ath11k_dbg(ar->ab, ATH11K_DBG_DATA, + "status ring ppdu_id=%d dest ring ppdu_id=%d mon_dest_ring_stuck_cnt=%d dest_mon_not_reaped=%u dest_mon_stuck=%u\n", + pmon->mon_ppdu_info.ppdu_id, ppdu_id, + dp->mon_dest_ring_stuck_cnt, + rx_mon_stats->dest_mon_not_reaped, + rx_mon_stats->dest_mon_stuck); + pmon->mon_ppdu_info.ppdu_id = ppdu_id; + continue; + } if (ppdu_id != pmon->mon_ppdu_info.ppdu_id) { pmon->mon_ppdu_status = DP_PPDU_STATUS_START; ath11k_dbg(ar->ab, ATH11K_DBG_DATA, - "dest_rx: new ppdu_id %x != status ppdu_id %x", - ppdu_id, pmon->mon_ppdu_info.ppdu_id); + "dest_rx: new ppdu_id %x != status ppdu_id %x dest_mon_not_reaped = %u dest_mon_stuck = %u\n", + ppdu_id, pmon->mon_ppdu_info.ppdu_id, + rx_mon_stats->dest_mon_not_reaped, + rx_mon_stats->dest_mon_stuck); break; } if (head_msdu && tail_msdu) { ath11k_dp_rx_mon_deliver(ar, dp->mac_id, head_msdu, + &pmon->mon_ppdu_info, tail_msdu, napi); rx_mon_stats->dest_mpdu_done++; } @@ -5106,36 +5152,92 @@ static void ath11k_dp_rx_mon_dest_process(struct ath11k *ar, int mac_id, } } -static void ath11k_dp_rx_mon_status_process_tlv(struct ath11k *ar, - int mac_id, u32 quota, - struct napi_struct *napi) +int ath11k_dp_rx_process_mon_status(struct ath11k_base *ab, int mac_id, + struct napi_struct *napi, int budget) { - struct ath11k_pdev_dp *dp = &ar->dp; - struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data; - struct hal_rx_mon_ppdu_info *ppdu_info; - struct sk_buff *status_skb; - u32 tlv_status = HAL_TLV_STATUS_BUF_DONE; - struct ath11k_pdev_mon_stats *rx_mon_stats; + struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id); + enum hal_rx_mon_status hal_status; + struct sk_buff *skb; + struct sk_buff_head skb_list; + struct ath11k_peer *peer; + struct ath11k_sta *arsta; + int num_buffs_reaped = 0; + u32 rx_buf_sz; + u16 log_type; + struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&ar->dp.mon_data; + struct ath11k_pdev_mon_stats *rx_mon_stats = &pmon->rx_mon_stats; + struct hal_rx_mon_ppdu_info *ppdu_info = &pmon->mon_ppdu_info; - ppdu_info = &pmon->mon_ppdu_info; - rx_mon_stats = &pmon->rx_mon_stats; + __skb_queue_head_init(&skb_list); - if (pmon->mon_ppdu_status != DP_PPDU_STATUS_START) - return; + num_buffs_reaped = ath11k_dp_rx_reap_mon_status_ring(ab, mac_id, &budget, + &skb_list); + if (!num_buffs_reaped) + goto exit; - while (!skb_queue_empty(&pmon->rx_status_q)) { - status_skb = skb_dequeue(&pmon->rx_status_q); + memset(ppdu_info, 0, sizeof(*ppdu_info)); + ppdu_info->peer_id = HAL_INVALID_PEERID; - tlv_status = ath11k_hal_rx_parse_mon_status(ar->ab, ppdu_info, - status_skb); - if (tlv_status == HAL_TLV_STATUS_PPDU_DONE) { + while ((skb = __skb_dequeue(&skb_list))) { + if (ath11k_debugfs_is_pktlog_lite_mode_enabled(ar)) { + log_type = ATH11K_PKTLOG_TYPE_LITE_RX; + rx_buf_sz = DP_RX_BUFFER_SIZE_LITE; + } else if (ath11k_debugfs_is_pktlog_rx_stats_enabled(ar)) { + log_type = ATH11K_PKTLOG_TYPE_RX_STATBUF; + rx_buf_sz = DP_RX_BUFFER_SIZE; + } else { + log_type = ATH11K_PKTLOG_TYPE_INVALID; + rx_buf_sz = 0; + } + + if (log_type != ATH11K_PKTLOG_TYPE_INVALID) + trace_ath11k_htt_rxdesc(ar, skb->data, log_type, rx_buf_sz); + + memset(ppdu_info, 0, sizeof(struct hal_rx_mon_ppdu_info)); + hal_status = ath11k_hal_rx_parse_mon_status(ab, ppdu_info, skb); + + if (test_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags) && + pmon->mon_ppdu_status == DP_PPDU_STATUS_START && + hal_status == HAL_TLV_STATUS_PPDU_DONE) { rx_mon_stats->status_ppdu_done++; pmon->mon_ppdu_status = DP_PPDU_STATUS_DONE; - ath11k_dp_rx_mon_dest_process(ar, mac_id, quota, napi); + ath11k_dp_rx_mon_dest_process(ar, mac_id, budget, napi); pmon->mon_ppdu_status = DP_PPDU_STATUS_START; } - dev_kfree_skb_any(status_skb); + + if (ppdu_info->peer_id == HAL_INVALID_PEERID || + hal_status != HAL_RX_MON_STATUS_PPDU_DONE) { + dev_kfree_skb_any(skb); + continue; + } + + rcu_read_lock(); + spin_lock_bh(&ab->base_lock); + peer = ath11k_peer_find_by_id(ab, ppdu_info->peer_id); + + if (!peer || !peer->sta) { + ath11k_dbg(ab, ATH11K_DBG_DATA, + "failed to find the peer with peer_id %d\n", + ppdu_info->peer_id); + goto next_skb; + } + + arsta = (struct ath11k_sta *)peer->sta->drv_priv; + ath11k_dp_rx_update_peer_stats(arsta, ppdu_info); + + if (ath11k_debugfs_is_pktlog_peer_valid(ar, peer->addr)) + trace_ath11k_htt_rxdesc(ar, skb->data, log_type, rx_buf_sz); + +next_skb: + spin_unlock_bh(&ab->base_lock); + rcu_read_unlock(); + + dev_kfree_skb_any(skb); + memset(ppdu_info, 0, sizeof(*ppdu_info)); + ppdu_info->peer_id = HAL_INVALID_PEERID; } +exit: + return num_buffs_reaped; } static u32 @@ -5352,6 +5454,7 @@ static int ath11k_dp_rx_full_mon_deliver_ppdu(struct ath11k *ar, tail_msdu = mon_mpdu->tail; if (head_msdu && tail_msdu) { ret = ath11k_dp_rx_mon_deliver(ar, mac_id, head_msdu, + &pmon->mon_ppdu_info, tail_msdu, napi); rx_mon_stats->dest_mpdu_done++; ath11k_dbg(ar->ab, ATH11K_DBG_DATA, "full mon: deliver ppdu\n"); @@ -5489,22 +5592,6 @@ reap_status_ring: return quota; } -static int ath11k_dp_mon_process_rx(struct ath11k_base *ab, int mac_id, - struct napi_struct *napi, int budget) -{ - struct ath11k *ar = ath11k_ab_to_ar(ab, mac_id); - struct ath11k_pdev_dp *dp = &ar->dp; - struct ath11k_mon_data *pmon = (struct ath11k_mon_data *)&dp->mon_data; - int num_buffs_reaped = 0; - - num_buffs_reaped = ath11k_dp_rx_reap_mon_status_ring(ar->ab, mac_id, &budget, - &pmon->rx_status_q); - if (num_buffs_reaped) - ath11k_dp_rx_mon_status_process_tlv(ar, mac_id, budget, napi); - - return num_buffs_reaped; -} - int ath11k_dp_rx_process_mon_rings(struct ath11k_base *ab, int mac_id, struct napi_struct *napi, int budget) { @@ -5514,8 +5601,6 @@ int ath11k_dp_rx_process_mon_rings(struct ath11k_base *ab, int mac_id, if (test_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags) && ab->hw_params.full_monitor_mode) ret = ath11k_dp_full_mon_process_rx(ab, mac_id, napi, budget); - else if (test_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags)) - ret = ath11k_dp_mon_process_rx(ab, mac_id, napi, budget); else ret = ath11k_dp_rx_process_mon_status(ab, mac_id, napi, budget); diff --git a/drivers/net/wireless/ath/ath11k/dp_tx.c b/drivers/net/wireless/ath/ath11k/dp_tx.c index 91d6244b6543..00a45819907e 100644 --- a/drivers/net/wireless/ath/ath11k/dp_tx.c +++ b/drivers/net/wireless/ath/ath11k/dp_tx.c @@ -351,7 +351,8 @@ ath11k_dp_tx_htt_tx_complete_buf(struct ath11k_base *ab, info->flags |= IEEE80211_TX_STAT_ACK; info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR + ts->ack_rssi; - info->status.is_valid_ack_signal = true; + info->status.flags |= + IEEE80211_TX_STATUS_ACK_SIGNAL_VALID; } else { info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; } @@ -426,7 +427,7 @@ void ath11k_dp_tx_update_txcompl(struct ath11k *ar, struct hal_tx_status *ts) struct ath11k_sta *arsta; struct ieee80211_sta *sta; u16 rate, ru_tones; - u8 mcs, rate_idx, ofdma; + u8 mcs, rate_idx = 0, ofdma; int ret; spin_lock_bh(&ab->base_lock); @@ -518,9 +519,13 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar, struct sk_buff *msdu, struct hal_tx_status *ts) { + struct ieee80211_tx_status status = { 0 }; struct ath11k_base *ab = ar->ab; struct ieee80211_tx_info *info; struct ath11k_skb_cb *skb_cb; + struct ath11k_peer *peer; + struct ath11k_sta *arsta; + struct rate_info rate; if (WARN_ON_ONCE(ts->buf_rel_source != HAL_WBM_REL_SRC_MODULE_TQM)) { /* Must not happen */ @@ -552,7 +557,7 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar, info->flags |= IEEE80211_TX_STAT_ACK; info->status.ack_signal = ATH11K_DEFAULT_NOISE_FLOOR + ts->ack_rssi; - info->status.is_valid_ack_signal = true; + info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID; } if (ts->status == HAL_WBM_TQM_REL_REASON_CMD_REMOVE_TX && @@ -583,12 +588,26 @@ static void ath11k_dp_tx_complete_msdu(struct ath11k *ar, ath11k_dp_tx_cache_peer_stats(ar, msdu, ts); } - /* NOTE: Tx rate status reporting. Tx completion status does not have - * necessary information (for example nss) to build the tx rate. - * Might end up reporting it out-of-band from HTT stats. - */ + spin_lock_bh(&ab->base_lock); + peer = ath11k_peer_find_by_id(ab, ts->peer_id); + if (!peer || !peer->sta) { + ath11k_dbg(ab, ATH11K_DBG_DATA, + "dp_tx: failed to find the peer with peer_id %d\n", + ts->peer_id); + spin_unlock_bh(&ab->base_lock); + dev_kfree_skb_any(msdu); + return; + } + arsta = (struct ath11k_sta *)peer->sta->drv_priv; + status.sta = peer->sta; + status.skb = msdu; + status.info = info; + rate = arsta->last_txrate; + status.rate = &rate; - ieee80211_tx_status(ar->hw, msdu); + spin_unlock_bh(&ab->base_lock); + + ieee80211_tx_status_ext(ar->hw, &status); } static inline void ath11k_dp_tx_status_parse(struct ath11k_base *ab, diff --git a/drivers/net/wireless/ath/ath11k/hal_desc.h b/drivers/net/wireless/ath/ath11k/hal_desc.h index 406767672844..24e72e75a8c7 100644 --- a/drivers/net/wireless/ath/ath11k/hal_desc.h +++ b/drivers/net/wireless/ath/ath11k/hal_desc.h @@ -474,6 +474,7 @@ enum hal_tlv_tag { #define HAL_TLV_HDR_TAG GENMASK(9, 1) #define HAL_TLV_HDR_LEN GENMASK(25, 10) +#define HAL_TLV_USR_ID GENMASK(31, 26) #define HAL_TLV_ALIGN 4 diff --git a/drivers/net/wireless/ath/ath11k/hal_rx.c b/drivers/net/wireless/ath/ath11k/hal_rx.c index a3b353a4b5f7..4bb1fbaed0c9 100644 --- a/drivers/net/wireless/ath/ath11k/hal_rx.c +++ b/drivers/net/wireless/ath/ath11k/hal_rx.c @@ -453,10 +453,12 @@ void ath11k_hal_reo_status_queue_stats(struct ath11k_base *ab, u32 *reo_desc, desc->info0)); ath11k_dbg(ab, ATH11k_DBG_HAL, "pn = [%08x, %08x, %08x, %08x]\n", desc->pn[0], desc->pn[1], desc->pn[2], desc->pn[3]); - ath11k_dbg(ab, ATH11k_DBG_HAL, "last_rx: enqueue_tstamp %08x dequeue_tstamp %08x\n", + ath11k_dbg(ab, ATH11k_DBG_HAL, + "last_rx: enqueue_tstamp %08x dequeue_tstamp %08x\n", desc->last_rx_enqueue_timestamp, desc->last_rx_dequeue_timestamp); - ath11k_dbg(ab, ATH11k_DBG_HAL, "rx_bitmap [%08x %08x %08x %08x %08x %08x %08x %08x]\n", + ath11k_dbg(ab, ATH11k_DBG_HAL, + "rx_bitmap [%08x %08x %08x %08x %08x %08x %08x %08x]\n", desc->rx_bitmap[0], desc->rx_bitmap[1], desc->rx_bitmap[2], desc->rx_bitmap[3], desc->rx_bitmap[4], desc->rx_bitmap[5], desc->rx_bitmap[6], desc->rx_bitmap[7]); @@ -802,12 +804,75 @@ void ath11k_hal_reo_init_cmd_ring(struct ath11k_base *ab, } } +#define HAL_MAX_UL_MU_USERS 37 +static inline void +ath11k_hal_rx_handle_ofdma_info(void *rx_tlv, + struct hal_rx_user_status *rx_user_status) +{ + struct hal_rx_ppdu_end_user_stats *ppdu_end_user = + (struct hal_rx_ppdu_end_user_stats *)rx_tlv; + + rx_user_status->ul_ofdma_user_v0_word0 = __le32_to_cpu(ppdu_end_user->info6); + + rx_user_status->ul_ofdma_user_v0_word1 = __le32_to_cpu(ppdu_end_user->rsvd2[10]); +} + +static inline void +ath11k_hal_rx_populate_byte_count(void *rx_tlv, void *ppduinfo, + struct hal_rx_user_status *rx_user_status) +{ + struct hal_rx_ppdu_end_user_stats *ppdu_end_user = + (struct hal_rx_ppdu_end_user_stats *)rx_tlv; + + rx_user_status->mpdu_ok_byte_count = + FIELD_GET(HAL_RX_PPDU_END_USER_STATS_RSVD2_6_MPDU_OK_BYTE_COUNT, + __le32_to_cpu(ppdu_end_user->rsvd2[6])); + rx_user_status->mpdu_err_byte_count = + FIELD_GET(HAL_RX_PPDU_END_USER_STATS_RSVD2_8_MPDU_ERR_BYTE_COUNT, + __le32_to_cpu(ppdu_end_user->rsvd2[8])); +} + +static inline void +ath11k_hal_rx_populate_mu_user_info(void *rx_tlv, struct hal_rx_mon_ppdu_info *ppdu_info, + struct hal_rx_user_status *rx_user_status) +{ + rx_user_status->ast_index = ppdu_info->ast_index; + rx_user_status->tid = ppdu_info->tid; + rx_user_status->tcp_msdu_count = + ppdu_info->tcp_msdu_count; + rx_user_status->udp_msdu_count = + ppdu_info->udp_msdu_count; + rx_user_status->other_msdu_count = + ppdu_info->other_msdu_count; + rx_user_status->frame_control = ppdu_info->frame_control; + rx_user_status->frame_control_info_valid = + ppdu_info->frame_control_info_valid; + rx_user_status->data_sequence_control_info_valid = + ppdu_info->data_sequence_control_info_valid; + rx_user_status->first_data_seq_ctrl = + ppdu_info->first_data_seq_ctrl; + rx_user_status->preamble_type = ppdu_info->preamble_type; + rx_user_status->ht_flags = ppdu_info->ht_flags; + rx_user_status->vht_flags = ppdu_info->vht_flags; + rx_user_status->he_flags = ppdu_info->he_flags; + rx_user_status->rs_flags = ppdu_info->rs_flags; + + rx_user_status->mpdu_cnt_fcs_ok = + ppdu_info->num_mpdu_fcs_ok; + rx_user_status->mpdu_cnt_fcs_err = + ppdu_info->num_mpdu_fcs_err; + + ath11k_hal_rx_populate_byte_count(rx_tlv, ppdu_info, rx_user_status); +} + static enum hal_rx_mon_status ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab, struct hal_rx_mon_ppdu_info *ppdu_info, - u32 tlv_tag, u8 *tlv_data) + u32 tlv_tag, u8 *tlv_data, u32 userid) { - u32 info0, info1; + u32 info0, info1, value; + u8 he_dcm = 0, he_stbc = 0; + u16 he_gi = 0, he_ltf = 0; switch (tlv_tag) { case HAL_RX_PPDU_START: { @@ -828,6 +893,9 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab, info0 = __le32_to_cpu(eu_stats->info0); info1 = __le32_to_cpu(eu_stats->info1); + ppdu_info->ast_index = + FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO2_AST_INDEX, + __le32_to_cpu(eu_stats->info2)); ppdu_info->tid = ffs(FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO6_TID_BITMAP, __le32_to_cpu(eu_stats->info6))) - 1; @@ -851,6 +919,44 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab, ppdu_info->num_mpdu_fcs_err = FIELD_GET(HAL_RX_PPDU_END_USER_STATS_INFO0_MPDU_CNT_FCS_ERR, info0); + switch (ppdu_info->preamble_type) { + case HAL_RX_PREAMBLE_11N: + ppdu_info->ht_flags = 1; + break; + case HAL_RX_PREAMBLE_11AC: + ppdu_info->vht_flags = 1; + break; + case HAL_RX_PREAMBLE_11AX: + ppdu_info->he_flags = 1; + break; + default: + break; + } + + if (userid < HAL_MAX_UL_MU_USERS) { + struct hal_rx_user_status *rxuser_stats = + &ppdu_info->userstats; + + ath11k_hal_rx_handle_ofdma_info(tlv_data, rxuser_stats); + ath11k_hal_rx_populate_mu_user_info(tlv_data, ppdu_info, + rxuser_stats); + } + ppdu_info->userstats.mpdu_fcs_ok_bitmap[0] = + __le32_to_cpu(eu_stats->rsvd1[0]); + ppdu_info->userstats.mpdu_fcs_ok_bitmap[1] = + __le32_to_cpu(eu_stats->rsvd1[1]); + + break; + } + case HAL_RX_PPDU_END_USER_STATS_EXT: { + struct hal_rx_ppdu_end_user_stats_ext *eu_stats = + (struct hal_rx_ppdu_end_user_stats_ext *)tlv_data; + ppdu_info->userstats.mpdu_fcs_ok_bitmap[2] = eu_stats->info1; + ppdu_info->userstats.mpdu_fcs_ok_bitmap[3] = eu_stats->info2; + ppdu_info->userstats.mpdu_fcs_ok_bitmap[4] = eu_stats->info3; + ppdu_info->userstats.mpdu_fcs_ok_bitmap[5] = eu_stats->info4; + ppdu_info->userstats.mpdu_fcs_ok_bitmap[6] = eu_stats->info5; + ppdu_info->userstats.mpdu_fcs_ok_bitmap[7] = eu_stats->info6; break; } case HAL_PHYRX_HT_SIG: { @@ -949,50 +1055,151 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab, else ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_MIMO; + ppdu_info->vht_flag_values5 = group_id; + ppdu_info->vht_flag_values3[0] = (((ppdu_info->mcs) << 4) | + ppdu_info->nss); + ppdu_info->vht_flag_values2 = ppdu_info->bw; + ppdu_info->vht_flag_values4 = + FIELD_GET(HAL_RX_VHT_SIG_A_INFO_INFO1_SU_MU_CODING, info1); break; } case HAL_PHYRX_HE_SIG_A_SU: { struct hal_rx_he_sig_a_su_info *he_sig_a = (struct hal_rx_he_sig_a_su_info *)tlv_data; - u32 nsts, cp_ltf, dcm; + ppdu_info->he_flags = 1; info0 = __le32_to_cpu(he_sig_a->info0); info1 = __le32_to_cpu(he_sig_a->info1); - ppdu_info->mcs = - FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_MCS, - info0); - ppdu_info->bw = - FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_BW, - info0); - ppdu_info->ldpc = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO1_CODING, info0); - ppdu_info->is_stbc = info1 & - HAL_RX_HE_SIG_A_SU_INFO_INFO1_STBC; - ppdu_info->beamformed = info1 & - HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXBF; - dcm = info0 & HAL_RX_HE_SIG_A_SU_INFO_INFO0_DCM; - cp_ltf = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_CP_LTF_SIZE, - info0); - nsts = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS, info0); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_FORMAT_IND, info0); - switch (cp_ltf) { + if (value == 0) + ppdu_info->he_data1 = IEEE80211_RADIOTAP_HE_DATA1_FORMAT_TRIG; + else + ppdu_info->he_data1 = IEEE80211_RADIOTAP_HE_DATA1_FORMAT_SU; + + ppdu_info->he_data1 |= + IEEE80211_RADIOTAP_HE_DATA1_BSS_COLOR_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_BEAM_CHANGE_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_UL_DL_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_DATA_DCM_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_CODING_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_LDPC_XSYMSEG_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_STBC_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_DOPPLER_KNOWN; + + ppdu_info->he_data2 |= + IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_TXBF_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_PE_DISAMBIG_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_TXOP_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_NUM_LTF_SYMS_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_PRE_FEC_PAD_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_MIDAMBLE_KNOWN; + + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_BSS_COLOR, info0); + ppdu_info->he_data3 = + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_BSS_COLOR, value); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_BEAM_CHANGE, info0); + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_BEAM_CHANGE, value); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_DL_UL_FLAG, info0); + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_UL_DL, value); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_MCS, info0); + ppdu_info->mcs = value; + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_MCS, value); + + he_dcm = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_DCM, info0); + ppdu_info->dcm = he_dcm; + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_DCM, he_dcm); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO1_CODING, info1); + ppdu_info->ldpc = (value == HAL_RX_SU_MU_CODING_LDPC) ? 1 : 0; + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_CODING, value); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO1_LDPC_EXTRA, info1); + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_LDPC_XSYMSEG, value); + he_stbc = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO1_STBC, info1); + ppdu_info->is_stbc = he_stbc; + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_STBC, he_stbc); + + /* data4 */ + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_SPATIAL_REUSE, info0); + ppdu_info->he_data4 = + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA4_SU_MU_SPTL_REUSE, value); + + /* data5 */ + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_BW, info0); + ppdu_info->bw = value; + ppdu_info->he_data5 = + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC, value); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_CP_LTF_SIZE, info0); + switch (value) { case 0: + he_gi = HE_GI_0_8; + he_ltf = HE_LTF_1_X; + break; case 1: - ppdu_info->gi = HAL_RX_GI_0_8_US; - break; + he_gi = HE_GI_0_8; + he_ltf = HE_LTF_2_X; + break; case 2: - ppdu_info->gi = HAL_RX_GI_1_6_US; - break; + he_gi = HE_GI_1_6; + he_ltf = HE_LTF_2_X; + break; case 3: - if (dcm && ppdu_info->is_stbc) - ppdu_info->gi = HAL_RX_GI_0_8_US; - else - ppdu_info->gi = HAL_RX_GI_3_2_US; - break; + if (he_dcm && he_stbc) { + he_gi = HE_GI_0_8; + he_ltf = HE_LTF_4_X; + } else { + he_gi = HE_GI_3_2; + he_ltf = HE_LTF_4_X; + } + break; } + ppdu_info->gi = he_gi; + he_gi = (he_gi != 0) ? he_gi - 1 : 0; + ppdu_info->he_data5 |= FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_GI, he_gi); + ppdu_info->ltf_size = he_ltf; + ppdu_info->he_data5 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE, + (he_ltf == HE_LTF_4_X) ? he_ltf - 1 : he_ltf); + + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS, info0); + ppdu_info->he_data5 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_NUM_LTF_SYMS, value); + + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_FACTOR, info1); + ppdu_info->he_data5 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_PRE_FEC_PAD, value); + + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXBF, info1); + ppdu_info->beamformed = value; + ppdu_info->he_data5 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_TXBF, value); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_PE_DISAM, info1); + ppdu_info->he_data5 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_PE_DISAMBIG, value); + + /* data6 */ + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS, info0); + value++; + ppdu_info->nss = value; + ppdu_info->he_data6 = + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_NSTS, value); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO1_DOPPLER_IND, info1); + ppdu_info->he_data6 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_DOPPLER, value); + value = FIELD_GET(HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXOP_DURATION, info1); + ppdu_info->he_data6 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_TXOP, value); - ppdu_info->nss = nsts + 1; - ppdu_info->dcm = dcm; ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_SU; break; } @@ -1000,29 +1207,142 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab, struct hal_rx_he_sig_a_mu_dl_info *he_sig_a_mu_dl = (struct hal_rx_he_sig_a_mu_dl_info *)tlv_data; - u32 cp_ltf; - info0 = __le32_to_cpu(he_sig_a_mu_dl->info0); info1 = __le32_to_cpu(he_sig_a_mu_dl->info1); - ppdu_info->bw = - FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_TRANSMIT_BW, - info0); - cp_ltf = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_CP_LTF_SIZE, - info0); - - switch (cp_ltf) { + ppdu_info->he_mu_flags = 1; + + ppdu_info->he_data1 = IEEE80211_RADIOTAP_HE_DATA1_FORMAT_MU; + ppdu_info->he_data1 |= + IEEE80211_RADIOTAP_HE_DATA1_BSS_COLOR_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_UL_DL_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_LDPC_XSYMSEG_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_STBC_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_DOPPLER_KNOWN; + + ppdu_info->he_data2 = + IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_NUM_LTF_SYMS_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_PRE_FEC_PAD_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_PE_DISAMBIG_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_TXOP_KNOWN | + IEEE80211_RADIOTAP_HE_DATA2_MIDAMBLE_KNOWN; + + /*data3*/ + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_BSS_COLOR, info0); + ppdu_info->he_data3 = + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_BSS_COLOR, value); + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_UL_FLAG, info0); + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_UL_DL, value); + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_LDPC_EXTRA, info1); + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_LDPC_XSYMSEG, value); + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_STBC, info1); + he_stbc = value; + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_STBC, value); + + /*data4*/ + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_SPATIAL_REUSE, info0); + ppdu_info->he_data4 = + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA4_SU_MU_SPTL_REUSE, value); + + /*data5*/ + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_TRANSMIT_BW, info0); + ppdu_info->bw = value; + ppdu_info->he_data5 = + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC, value); + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_CP_LTF_SIZE, info0); + switch (value) { case 0: + he_gi = HE_GI_0_8; + he_ltf = HE_LTF_4_X; + break; case 1: - ppdu_info->gi = HAL_RX_GI_0_8_US; + he_gi = HE_GI_0_8; + he_ltf = HE_LTF_2_X; break; case 2: - ppdu_info->gi = HAL_RX_GI_1_6_US; + he_gi = HE_GI_1_6; + he_ltf = HE_LTF_2_X; break; case 3: - ppdu_info->gi = HAL_RX_GI_3_2_US; + he_gi = HE_GI_3_2; + he_ltf = HE_LTF_4_X; break; } + ppdu_info->gi = he_gi; + he_gi = (he_gi != 0) ? he_gi - 1 : 0; + ppdu_info->he_data5 |= FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_GI, he_gi); + ppdu_info->ltf_size = he_ltf; + ppdu_info->he_data5 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE, + (he_ltf == HE_LTF_4_X) ? he_ltf - 1 : he_ltf); + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_NUM_LTF_SYMB, info1); + ppdu_info->he_data5 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_NUM_LTF_SYMS, value); + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_PKT_EXT_FACTOR, + info1); + ppdu_info->he_data5 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_PRE_FEC_PAD, value); + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_PKT_EXT_PE_DISAM, + info1); + ppdu_info->he_data5 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA5_PE_DISAMBIG, value); + + /*data6*/ + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_DOPPLER_INDICATION, + info0); + ppdu_info->he_data6 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_DOPPLER, value); + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_TXOP_DURATION, info1); + ppdu_info->he_data6 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA6_TXOP, value); + + /* HE-MU Flags */ + /* HE-MU-flags1 */ + ppdu_info->he_flags1 = + IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_MCS_KNOWN | + IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_DCM_KNOWN | + IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_COMP_KNOWN | + IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN | + IEEE80211_RADIOTAP_HE_MU_FLAGS1_CH1_RU_KNOWN; + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_MCS_OF_SIGB, info0); + ppdu_info->he_flags1 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_MCS_KNOWN, + value); + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_DCM_OF_SIGB, info0); + ppdu_info->he_flags1 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_DCM_KNOWN, + value); + + /* HE-MU-flags2 */ + ppdu_info->he_flags2 = + IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN; + + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_TRANSMIT_BW, info0); + ppdu_info->he_flags2 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW, + value); + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_COMP_MODE_SIGB, info0); + ppdu_info->he_flags2 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS2_SIG_B_COMP, value); + value = FIELD_GET(HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_NUM_SIGB_SYMB, info0); + value = value - 1; + ppdu_info->he_flags2 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_MU_FLAGS2_SIG_B_SYMS_USERS, + value); ppdu_info->is_stbc = info1 & HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_STBC; @@ -1040,7 +1360,7 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab, info0); ppdu_info->ru_alloc = ath11k_mac_phy_he_ru_to_nl80211_he_ru_alloc(ru_tones); - + ppdu_info->he_RU[0] = ru_tones; ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_MIMO; break; } @@ -1050,14 +1370,25 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab, info0 = __le32_to_cpu(he_sig_b2_mu->info0); + ppdu_info->he_data1 |= IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_CODING_KNOWN; + ppdu_info->mcs = - FIELD_GET(HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_MCS, - info0); + FIELD_GET(HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_MCS, info0); + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_MCS, ppdu_info->mcs); + + value = FIELD_GET(HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_CODING, info0); + ppdu_info->ldpc = value; + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_CODING, value); + + value = FIELD_GET(HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_ID, info0); + ppdu_info->he_data4 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA4_MU_STA_ID, value); + ppdu_info->nss = - FIELD_GET(HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_NSTS, - info0) + 1; - ppdu_info->ldpc = FIELD_GET(HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_CODING, - info0); + FIELD_GET(HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_NSTS, info0) + 1; break; } case HAL_PHYRX_HE_SIG_B2_OFDMA: { @@ -1066,17 +1397,40 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab, info0 = __le32_to_cpu(he_sig_b2_ofdma->info0); + ppdu_info->he_data1 |= + IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_DATA_DCM_KNOWN | + IEEE80211_RADIOTAP_HE_DATA1_CODING_KNOWN; + + /* HE-data2 */ + ppdu_info->he_data2 |= IEEE80211_RADIOTAP_HE_DATA2_TXBF_KNOWN; + ppdu_info->mcs = FIELD_GET(HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_MCS, info0); + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_MCS, ppdu_info->mcs); + + value = FIELD_GET(HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_DCM, info0); + he_dcm = value; + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_DATA_DCM, value); + + value = FIELD_GET(HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_CODING, info0); + ppdu_info->ldpc = value; + ppdu_info->he_data3 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA3_CODING, value); + + /* HE-data4 */ + value = FIELD_GET(HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_ID, info0); + ppdu_info->he_data4 |= + FIELD_PREP(IEEE80211_RADIOTAP_HE_DATA4_MU_STA_ID, value); + ppdu_info->nss = FIELD_GET(HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_NSTS, info0) + 1; ppdu_info->beamformed = - info0 & - HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_TXBF; - ppdu_info->ldpc = FIELD_GET(HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_CODING, - info0); + info0 & HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_TXBF; ppdu_info->reception_type = HAL_RX_RECEPTION_TYPE_MU_OFDMA; break; } @@ -1118,6 +1472,9 @@ ath11k_hal_rx_parse_mon_status_tlv(struct ath11k_base *ab, ppdu_info->rx_duration = FIELD_GET(HAL_RX_PPDU_END_DURATION, __le32_to_cpu(ppdu_rx_duration->info0)); + ppdu_info->tsft = __le32_to_cpu(ppdu_rx_duration->rsvd0[1]); + ppdu_info->tsft = (ppdu_info->tsft << 32) | + __le32_to_cpu(ppdu_rx_duration->rsvd0[0]); break; } case HAL_DUMMY: @@ -1141,12 +1498,14 @@ ath11k_hal_rx_parse_mon_status(struct ath11k_base *ab, enum hal_rx_mon_status hal_status = HAL_RX_MON_STATUS_BUF_DONE; u16 tlv_tag; u16 tlv_len; + u32 tlv_userid = 0; u8 *ptr = skb->data; do { tlv = (struct hal_tlv_hdr *)ptr; tlv_tag = FIELD_GET(HAL_TLV_HDR_TAG, tlv->tl); tlv_len = FIELD_GET(HAL_TLV_HDR_LEN, tlv->tl); + tlv_userid = FIELD_GET(HAL_TLV_USR_ID, tlv->tl); ptr += sizeof(*tlv); /* The actual length of PPDU_END is the combined length of many PHY @@ -1158,7 +1517,7 @@ ath11k_hal_rx_parse_mon_status(struct ath11k_base *ab, tlv_len = sizeof(struct hal_rx_rxpcu_classification_overview); hal_status = ath11k_hal_rx_parse_mon_status_tlv(ab, ppdu_info, - tlv_tag, ptr); + tlv_tag, ptr, tlv_userid); ptr += tlv_len; ptr = PTR_ALIGN(ptr, HAL_TLV_ALIGN); diff --git a/drivers/net/wireless/ath/ath11k/hal_rx.h b/drivers/net/wireless/ath/ath11k/hal_rx.h index 571054c6d7f8..f6bae07abfd3 100644 --- a/drivers/net/wireless/ath/ath11k/hal_rx.h +++ b/drivers/net/wireless/ath/ath11k/hal_rx.h @@ -65,10 +65,6 @@ enum hal_rx_reception_type { HAL_RX_RECEPTION_TYPE_MAX, }; -#define HAL_TLV_STATUS_PPDU_NOT_DONE 0 -#define HAL_TLV_STATUS_PPDU_DONE 1 -#define HAL_TLV_STATUS_BUF_DONE 2 -#define HAL_TLV_STATUS_PPDU_NON_STD_DONE 3 #define HAL_RX_FCS_LEN 4 enum hal_rx_mon_status { @@ -77,6 +73,40 @@ enum hal_rx_mon_status { HAL_RX_MON_STATUS_BUF_DONE, }; +struct hal_rx_user_status { + u32 mcs:4, + nss:3, + ofdma_info_valid:1, + dl_ofdma_ru_start_index:7, + dl_ofdma_ru_width:7, + dl_ofdma_ru_size:8; + u32 ul_ofdma_user_v0_word0; + u32 ul_ofdma_user_v0_word1; + u32 ast_index; + u32 tid; + u16 tcp_msdu_count; + u16 udp_msdu_count; + u16 other_msdu_count; + u16 frame_control; + u8 frame_control_info_valid; + u8 data_sequence_control_info_valid; + u16 first_data_seq_ctrl; + u32 preamble_type; + u16 ht_flags; + u16 vht_flags; + u16 he_flags; + u8 rs_flags; + u32 mpdu_cnt_fcs_ok; + u32 mpdu_cnt_fcs_err; + u32 mpdu_fcs_ok_bitmap[8]; + u32 mpdu_ok_byte_count; + u32 mpdu_err_byte_count; +}; + +#define HAL_TLV_STATUS_PPDU_NOT_DONE HAL_RX_MON_STATUS_PPDU_NOT_DONE +#define HAL_TLV_STATUS_PPDU_DONE HAL_RX_MON_STATUS_PPDU_DONE +#define HAL_TLV_STATUS_BUF_DONE HAL_RX_MON_STATUS_BUF_DONE + struct hal_sw_mon_ring_entries { dma_addr_t mon_dst_paddr; dma_addr_t mon_status_paddr; @@ -107,6 +137,12 @@ struct hal_rx_mon_ppdu_info { u8 mcs; u8 nss; u8 bw; + u8 vht_flag_values1; + u8 vht_flag_values2; + u8 vht_flag_values3[4]; + u8 vht_flag_values4; + u8 vht_flag_values5; + u16 vht_flag_values6; u8 is_stbc; u8 gi; u8 ldpc; @@ -114,10 +150,46 @@ struct hal_rx_mon_ppdu_info { u8 rssi_comb; u8 rssi_chain_pri20[HAL_RX_MAX_NSS]; u8 tid; + u16 ht_flags; + u16 vht_flags; + u16 he_flags; + u16 he_mu_flags; u8 dcm; u8 ru_alloc; u8 reception_type; + u64 tsft; u64 rx_duration; + u16 frame_control; + u32 ast_index; + u8 rs_fcs_err; + u8 rs_flags; + u8 cck_flag; + u8 ofdm_flag; + u8 ulofdma_flag; + u8 frame_control_info_valid; + u16 he_per_user_1; + u16 he_per_user_2; + u8 he_per_user_position; + u8 he_per_user_known; + u16 he_flags1; + u16 he_flags2; + u8 he_RU[4]; + u16 he_data1; + u16 he_data2; + u16 he_data3; + u16 he_data4; + u16 he_data5; + u16 he_data6; + u32 ppdu_len; + u32 prev_ppdu_id; + u32 device_id; + u16 first_data_seq_ctrl; + u8 monitor_direct_used; + u8 data_sequence_control_info_valid; + u8 ltf_size; + u8 rxpcu_filter_pass; + char rssi_chain[8][8]; + struct hal_rx_user_status userstats; }; #define HAL_RX_PPDU_START_INFO0_PPDU_ID GENMASK(15, 0) @@ -150,6 +222,9 @@ struct hal_rx_ppdu_start { #define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_BITMAP GENMASK(15, 0) #define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_EOSP_BITMAP GENMASK(31, 16) +#define HAL_RX_PPDU_END_USER_STATS_RSVD2_6_MPDU_OK_BYTE_COUNT GENMASK(24, 0) +#define HAL_RX_PPDU_END_USER_STATS_RSVD2_8_MPDU_ERR_BYTE_COUNT GENMASK(24, 0) + struct hal_rx_ppdu_end_user_stats { __le32 rsvd0[2]; __le32 info0; @@ -164,6 +239,16 @@ struct hal_rx_ppdu_end_user_stats { __le32 rsvd2[11]; } __packed; +struct hal_rx_ppdu_end_user_stats_ext { + u32 info0; + u32 info1; + u32 info2; + u32 info3; + u32 info4; + u32 info5; + u32 info6; +} __packed; + #define HAL_RX_HT_SIG_INFO_INFO0_MCS GENMASK(6, 0) #define HAL_RX_HT_SIG_INFO_INFO0_BW BIT(7) @@ -212,25 +297,62 @@ enum hal_rx_vht_sig_a_gi_setting { HAL_RX_VHT_SIG_A_SHORT_GI_AMBIGUITY = 3, }; +#define HAL_RX_SU_MU_CODING_LDPC 0x01 + +#define HE_GI_0_8 0 +#define HE_GI_0_4 1 +#define HE_GI_1_6 2 +#define HE_GI_3_2 3 + +#define HE_LTF_1_X 0 +#define HE_LTF_2_X 1 +#define HE_LTF_4_X 2 +#define HE_LTF_UNKNOWN 3 + #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_MCS GENMASK(6, 3) #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_DCM BIT(7) #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_BW GENMASK(20, 19) #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_CP_LTF_SIZE GENMASK(22, 21) #define HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS GENMASK(25, 23) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_BSS_COLOR GENMASK(13, 8) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_SPATIAL_REUSE GENMASK(18, 15) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_FORMAT_IND BIT(0) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_BEAM_CHANGE BIT(1) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_DL_UL_FLAG BIT(2) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXOP_DURATION GENMASK(6, 0) #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_CODING BIT(7) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_LDPC_EXTRA BIT(8) #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_STBC BIT(9) #define HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXBF BIT(10) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_FACTOR GENMASK(12, 11) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_PE_DISAM BIT(13) +#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_DOPPLER_IND BIT(15) struct hal_rx_he_sig_a_su_info { __le32 info0; __le32 info1; } __packed; -#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_TRANSMIT_BW GENMASK(17, 15) -#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_CP_LTF_SIZE GENMASK(24, 23) - +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_UL_FLAG BIT(1) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_MCS_OF_SIGB GENMASK(3, 1) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_DCM_OF_SIGB BIT(4) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_BSS_COLOR GENMASK(10, 5) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_SPATIAL_REUSE GENMASK(14, 11) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_TRANSMIT_BW GENMASK(17, 15) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_NUM_SIGB_SYMB GENMASK(21, 18) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_COMP_MODE_SIGB BIT(22) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_CP_LTF_SIZE GENMASK(24, 23) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_DOPPLER_INDICATION BIT(25) + +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_TXOP_DURATION GENMASK(6, 0) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_CODING BIT(7) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_NUM_LTF_SYMB GENMASK(10, 8) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_LDPC_EXTRA BIT(11) #define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_STBC BIT(12) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_TXBF BIT(10) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_PKT_EXT_FACTOR GENMASK(14, 13) +#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_PKT_EXT_PE_DISAM BIT(15) struct hal_rx_he_sig_a_mu_dl_info { __le32 info0; @@ -243,6 +365,7 @@ struct hal_rx_he_sig_b1_mu_info { __le32 info0; } __packed; +#define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_ID GENMASK(10, 0) #define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_MCS GENMASK(18, 15) #define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_CODING BIT(20) #define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_NSTS GENMASK(31, 29) @@ -251,6 +374,7 @@ struct hal_rx_he_sig_b2_mu_info { __le32 info0; } __packed; +#define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_ID GENMASK(10, 0) #define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_NSTS GENMASK(13, 11) #define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_TXBF BIT(19) #define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_MCS GENMASK(18, 15) @@ -279,11 +403,14 @@ struct hal_rx_phyrx_rssi_legacy_info { #define HAL_RX_MPDU_INFO_INFO0_PEERID GENMASK(31, 16) #define HAL_RX_MPDU_INFO_INFO0_PEERID_WCN6855 GENMASK(15, 0) +#define HAL_RX_MPDU_INFO_INFO1_MPDU_LEN GENMASK(13, 0) struct hal_rx_mpdu_info { __le32 rsvd0; __le32 info0; - __le32 rsvd1[21]; + __le32 rsvd1[11]; + __le32 info1; + __le32 rsvd2[9]; } __packed; struct hal_rx_mpdu_info_wcn6855 { diff --git a/drivers/net/wireless/ath/ath11k/hw.c b/drivers/net/wireless/ath/ath11k/hw.c index 3b0fdc1a6b3f..d1b0e76d9ec2 100644 --- a/drivers/net/wireless/ath/ath11k/hw.c +++ b/drivers/net/wireless/ath/ath11k/hw.c @@ -273,6 +273,12 @@ static u8 ath11k_hw_ipq8074_rx_desc_get_mesh_ctl(struct hal_rx_desc *desc) __le32_to_cpu(desc->u.ipq8074.msdu_start.info2)); } +static bool ath11k_hw_ipq8074_rx_desc_get_ldpc_support(struct hal_rx_desc *desc) +{ + return FIELD_GET(RX_MSDU_START_INFO2_LDPC, + __le32_to_cpu(desc->u.ipq8074.msdu_start.info2)); +} + static bool ath11k_hw_ipq8074_rx_desc_get_mpdu_seq_ctl_vld(struct hal_rx_desc *desc) { return !!FIELD_GET(RX_MPDU_START_INFO1_MPDU_SEQ_CTRL_VALID, @@ -444,6 +450,12 @@ static u8 ath11k_hw_qcn9074_rx_desc_get_mesh_ctl(struct hal_rx_desc *desc) __le32_to_cpu(desc->u.qcn9074.msdu_start.info2)); } +static bool ath11k_hw_qcn9074_rx_desc_get_ldpc_support(struct hal_rx_desc *desc) +{ + return FIELD_GET(RX_MSDU_START_INFO2_LDPC, + __le32_to_cpu(desc->u.qcn9074.msdu_start.info2)); +} + static bool ath11k_hw_qcn9074_rx_desc_get_mpdu_seq_ctl_vld(struct hal_rx_desc *desc) { return !!FIELD_GET(RX_MPDU_START_INFO11_MPDU_SEQ_CTRL_VALID, @@ -801,6 +813,12 @@ static u16 ath11k_hw_wcn6855_mpdu_info_get_peerid(u8 *tlv_data) return peer_id; } +static bool ath11k_hw_wcn6855_rx_desc_get_ldpc_support(struct hal_rx_desc *desc) +{ + return FIELD_GET(RX_MSDU_START_INFO2_LDPC, + __le32_to_cpu(desc->u.wcn6855.msdu_start.info2)); +} + const struct ath11k_hw_ops ipq8074_ops = { .get_hw_mac_from_pdev_id = ath11k_hw_ipq8074_mac_from_pdev_id, .wmi_init_config = ath11k_init_wmi_config_ipq8074, @@ -815,6 +833,7 @@ const struct ath11k_hw_ops ipq8074_ops = { .rx_desc_get_encrypt_type = ath11k_hw_ipq8074_rx_desc_get_encrypt_type, .rx_desc_get_decap_type = ath11k_hw_ipq8074_rx_desc_get_decap_type, .rx_desc_get_mesh_ctl = ath11k_hw_ipq8074_rx_desc_get_mesh_ctl, + .rx_desc_get_ldpc_support = ath11k_hw_ipq8074_rx_desc_get_ldpc_support, .rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_ipq8074_rx_desc_get_mpdu_seq_ctl_vld, .rx_desc_get_mpdu_fc_valid = ath11k_hw_ipq8074_rx_desc_get_mpdu_fc_valid, .rx_desc_get_mpdu_start_seq_no = ath11k_hw_ipq8074_rx_desc_get_mpdu_start_seq_no, @@ -853,6 +872,7 @@ const struct ath11k_hw_ops ipq6018_ops = { .rx_desc_get_encrypt_type = ath11k_hw_ipq8074_rx_desc_get_encrypt_type, .rx_desc_get_decap_type = ath11k_hw_ipq8074_rx_desc_get_decap_type, .rx_desc_get_mesh_ctl = ath11k_hw_ipq8074_rx_desc_get_mesh_ctl, + .rx_desc_get_ldpc_support = ath11k_hw_ipq8074_rx_desc_get_ldpc_support, .rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_ipq8074_rx_desc_get_mpdu_seq_ctl_vld, .rx_desc_get_mpdu_fc_valid = ath11k_hw_ipq8074_rx_desc_get_mpdu_fc_valid, .rx_desc_get_mpdu_start_seq_no = ath11k_hw_ipq8074_rx_desc_get_mpdu_start_seq_no, @@ -891,6 +911,7 @@ const struct ath11k_hw_ops qca6390_ops = { .rx_desc_get_encrypt_type = ath11k_hw_ipq8074_rx_desc_get_encrypt_type, .rx_desc_get_decap_type = ath11k_hw_ipq8074_rx_desc_get_decap_type, .rx_desc_get_mesh_ctl = ath11k_hw_ipq8074_rx_desc_get_mesh_ctl, + .rx_desc_get_ldpc_support = ath11k_hw_ipq8074_rx_desc_get_ldpc_support, .rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_ipq8074_rx_desc_get_mpdu_seq_ctl_vld, .rx_desc_get_mpdu_fc_valid = ath11k_hw_ipq8074_rx_desc_get_mpdu_fc_valid, .rx_desc_get_mpdu_start_seq_no = ath11k_hw_ipq8074_rx_desc_get_mpdu_start_seq_no, @@ -929,6 +950,7 @@ const struct ath11k_hw_ops qcn9074_ops = { .rx_desc_get_encrypt_type = ath11k_hw_qcn9074_rx_desc_get_encrypt_type, .rx_desc_get_decap_type = ath11k_hw_qcn9074_rx_desc_get_decap_type, .rx_desc_get_mesh_ctl = ath11k_hw_qcn9074_rx_desc_get_mesh_ctl, + .rx_desc_get_ldpc_support = ath11k_hw_qcn9074_rx_desc_get_ldpc_support, .rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_qcn9074_rx_desc_get_mpdu_seq_ctl_vld, .rx_desc_get_mpdu_fc_valid = ath11k_hw_qcn9074_rx_desc_get_mpdu_fc_valid, .rx_desc_get_mpdu_start_seq_no = ath11k_hw_qcn9074_rx_desc_get_mpdu_start_seq_no, @@ -967,6 +989,7 @@ const struct ath11k_hw_ops wcn6855_ops = { .rx_desc_get_encrypt_type = ath11k_hw_wcn6855_rx_desc_get_encrypt_type, .rx_desc_get_decap_type = ath11k_hw_wcn6855_rx_desc_get_decap_type, .rx_desc_get_mesh_ctl = ath11k_hw_wcn6855_rx_desc_get_mesh_ctl, + .rx_desc_get_ldpc_support = ath11k_hw_wcn6855_rx_desc_get_ldpc_support, .rx_desc_get_mpdu_seq_ctl_vld = ath11k_hw_wcn6855_rx_desc_get_mpdu_seq_ctl_vld, .rx_desc_get_mpdu_fc_valid = ath11k_hw_wcn6855_rx_desc_get_mpdu_fc_valid, .rx_desc_get_mpdu_start_seq_no = ath11k_hw_wcn6855_rx_desc_get_mpdu_start_seq_no, diff --git a/drivers/net/wireless/ath/ath11k/hw.h b/drivers/net/wireless/ath/ath11k/hw.h index 29934b36c14e..27ca4a9c20fc 100644 --- a/drivers/net/wireless/ath/ath11k/hw.h +++ b/drivers/net/wireless/ath/ath11k/hw.h @@ -192,6 +192,8 @@ struct ath11k_hw_params { bool wakeup_mhi; bool supports_rssi_stats; bool fw_wmi_diag_event; + bool current_cc_support; + bool dbr_debug_support; }; struct ath11k_hw_ops { @@ -210,6 +212,7 @@ struct ath11k_hw_ops { u32 (*rx_desc_get_encrypt_type)(struct hal_rx_desc *desc); u8 (*rx_desc_get_decap_type)(struct hal_rx_desc *desc); u8 (*rx_desc_get_mesh_ctl)(struct hal_rx_desc *desc); + bool (*rx_desc_get_ldpc_support)(struct hal_rx_desc *desc); bool (*rx_desc_get_mpdu_seq_ctl_vld)(struct hal_rx_desc *desc); bool (*rx_desc_get_mpdu_fc_valid)(struct hal_rx_desc *desc); u16 (*rx_desc_get_mpdu_start_seq_no)(struct hal_rx_desc *desc); diff --git a/drivers/net/wireless/ath/ath11k/mac.c b/drivers/net/wireless/ath/ath11k/mac.c index 07f499d5ec92..d5b83f90d27a 100644 --- a/drivers/net/wireless/ath/ath11k/mac.c +++ b/drivers/net/wireless/ath/ath11k/mac.c @@ -2319,6 +2319,9 @@ static void ath11k_peer_assoc_h_he_6ghz(struct ath11k *ar, if (!arg->he_flag || band != NL80211_BAND_6GHZ || !sta->he_6ghz_capa.capa) return; + if (sta->bandwidth == IEEE80211_STA_RX_BW_40) + arg->bw_40 = true; + if (sta->bandwidth == IEEE80211_STA_RX_BW_80) arg->bw_80 = true; @@ -2862,6 +2865,11 @@ static void ath11k_recalculate_mgmt_rate(struct ath11k *ar, if (ret) ath11k_warn(ar->ab, "failed to set mgmt tx rate %d\n", ret); + /* For WCN6855, firmware will clear this param when vdev starts, hence + * cache it here so that we can reconfigure it once vdev starts. + */ + ar->hw_rate_code = hw_rate_code; + vdev_param = WMI_VDEV_PARAM_BEACON_RATE; ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, vdev_param, hw_rate_code); @@ -4504,24 +4512,30 @@ static int ath11k_mac_op_sta_state(struct ieee80211_hw *hw, sta->addr, arvif->vdev_id); } else if ((old_state == IEEE80211_STA_NONE && new_state == IEEE80211_STA_NOTEXIST)) { - ath11k_dp_peer_cleanup(ar, arvif->vdev_id, sta->addr); + bool skip_peer_delete = ar->ab->hw_params.vdev_start_delay && + vif->type == NL80211_IFTYPE_STATION; - if (ar->ab->hw_params.vdev_start_delay && - vif->type == NL80211_IFTYPE_STATION) - goto free; + ath11k_dp_peer_cleanup(ar, arvif->vdev_id, sta->addr); - ret = ath11k_peer_delete(ar, arvif->vdev_id, sta->addr); - if (ret) - ath11k_warn(ar->ab, "Failed to delete peer: %pM for VDEV: %d\n", - sta->addr, arvif->vdev_id); - else - ath11k_dbg(ar->ab, ATH11K_DBG_MAC, "Removed peer: %pM for VDEV: %d\n", - sta->addr, arvif->vdev_id); + if (!skip_peer_delete) { + ret = ath11k_peer_delete(ar, arvif->vdev_id, sta->addr); + if (ret) + ath11k_warn(ar->ab, + "Failed to delete peer: %pM for VDEV: %d\n", + sta->addr, arvif->vdev_id); + else + ath11k_dbg(ar->ab, + ATH11K_DBG_MAC, + "Removed peer: %pM for VDEV: %d\n", + sta->addr, arvif->vdev_id); + } ath11k_mac_dec_num_stations(arvif, sta); spin_lock_bh(&ar->ab->base_lock); peer = ath11k_peer_find(ar->ab, arvif->vdev_id, sta->addr); - if (peer && peer->sta == sta) { + if (skip_peer_delete && peer) { + peer->sta = NULL; + } else if (peer && peer->sta == sta) { ath11k_warn(ar->ab, "Found peer entry %pM n vdev %i after it was supposedly removed\n", vif->addr, arvif->vdev_id); peer->sta = NULL; @@ -4531,7 +4545,6 @@ static int ath11k_mac_op_sta_state(struct ieee80211_hw *hw, } spin_unlock_bh(&ar->ab->base_lock); -free: kfree(arsta->tx_stats); arsta->tx_stats = NULL; @@ -5566,7 +5579,7 @@ static int ath11k_mac_mgmt_tx(struct ath11k *ar, struct sk_buff *skb, skb_queue_tail(q, skb); atomic_inc(&ar->num_pending_mgmt_tx); - ieee80211_queue_work(ar->hw, &ar->wmi_mgmt_tx_work); + queue_work(ar->ab->workqueue, &ar->wmi_mgmt_tx_work); return 0; } @@ -6341,6 +6354,10 @@ static int ath11k_mac_op_add_interface(struct ieee80211_hw *hw, } } + ret = ath11k_debugfs_add_interface(arvif); + if (ret) + goto err_peer_del; + mutex_unlock(&ar->conf_mutex); return 0; @@ -6375,6 +6392,7 @@ err_vdev_del: spin_unlock_bh(&ar->data_lock); err: + ath11k_debugfs_remove_interface(arvif); mutex_unlock(&ar->conf_mutex); return ret; @@ -6473,6 +6491,8 @@ err_vdev_del: /* Recalc txpower for remaining vdev */ ath11k_mac_txpower_recalc(ar); + ath11k_debugfs_remove_interface(arvif); + /* TODO: recal traffic pause state based on the available vdevs */ mutex_unlock(&ar->conf_mutex); @@ -6610,12 +6630,13 @@ static void ath11k_mac_op_remove_chanctx(struct ieee80211_hw *hw, static int ath11k_mac_vdev_start_restart(struct ath11k_vif *arvif, - const struct cfg80211_chan_def *chandef, + struct ieee80211_chanctx_conf *ctx, bool restart) { struct ath11k *ar = arvif->ar; struct ath11k_base *ab = ar->ab; struct wmi_vdev_start_req_arg arg = {}; + const struct cfg80211_chan_def *chandef = &ctx->def; int he_support = arvif->vif->bss_conf.he_support; int ret = 0; @@ -6650,8 +6671,7 @@ ath11k_mac_vdev_start_restart(struct ath11k_vif *arvif, arg.channel.chan_radar = !!(chandef->chan->flags & IEEE80211_CHAN_RADAR); - arg.channel.freq2_radar = - !!(chandef->chan->flags & IEEE80211_CHAN_RADAR); + arg.channel.freq2_radar = ctx->radar_enabled; arg.channel.passive = arg.channel.chan_radar; @@ -6761,15 +6781,15 @@ err: } static int ath11k_mac_vdev_start(struct ath11k_vif *arvif, - const struct cfg80211_chan_def *chandef) + struct ieee80211_chanctx_conf *ctx) { - return ath11k_mac_vdev_start_restart(arvif, chandef, false); + return ath11k_mac_vdev_start_restart(arvif, ctx, false); } static int ath11k_mac_vdev_restart(struct ath11k_vif *arvif, - const struct cfg80211_chan_def *chandef) + struct ieee80211_chanctx_conf *ctx) { - return ath11k_mac_vdev_start_restart(arvif, chandef, true); + return ath11k_mac_vdev_start_restart(arvif, ctx, true); } struct ath11k_mac_change_chanctx_arg { @@ -6836,13 +6856,33 @@ ath11k_mac_update_vif_chan(struct ath11k *ar, if (WARN_ON(!arvif->is_started)) continue; - if (WARN_ON(!arvif->is_up)) - continue; + /* change_chanctx can be called even before vdev_up from + * ieee80211_start_ap->ieee80211_vif_use_channel-> + * ieee80211_recalc_radar_chanctx. + * + * Firmware expect vdev_restart only if vdev is up. + * If vdev is down then it expect vdev_stop->vdev_start. + */ + if (arvif->is_up) { + ret = ath11k_mac_vdev_restart(arvif, vifs[i].new_ctx); + if (ret) { + ath11k_warn(ab, "failed to restart vdev %d: %d\n", + arvif->vdev_id, ret); + continue; + } + } else { + ret = ath11k_mac_vdev_stop(arvif); + if (ret) { + ath11k_warn(ab, "failed to stop vdev %d: %d\n", + arvif->vdev_id, ret); + continue; + } + + ret = ath11k_mac_vdev_start(arvif, vifs[i].new_ctx); + if (ret) + ath11k_warn(ab, "failed to start vdev %d: %d\n", + arvif->vdev_id, ret); - ret = ath11k_mac_vdev_restart(arvif, &vifs[i].new_ctx->def); - if (ret) { - ath11k_warn(ab, "failed to restart vdev %d: %d\n", - arvif->vdev_id, ret); continue; } @@ -6927,7 +6967,8 @@ static void ath11k_mac_op_change_chanctx(struct ieee80211_hw *hw, if (WARN_ON(changed & IEEE80211_CHANCTX_CHANGE_CHANNEL)) goto unlock; - if (changed & IEEE80211_CHANCTX_CHANGE_WIDTH) + if (changed & IEEE80211_CHANCTX_CHANGE_WIDTH || + changed & IEEE80211_CHANCTX_CHANGE_RADAR) ath11k_mac_update_active_vif_chan(ar, ctx); /* TODO: Recalc radar detection */ @@ -6947,7 +6988,7 @@ static int ath11k_start_vdev_delay(struct ieee80211_hw *hw, if (WARN_ON(arvif->is_started)) return -EBUSY; - ret = ath11k_mac_vdev_start(arvif, &arvif->chanctx.def); + ret = ath11k_mac_vdev_start(arvif, &arvif->chanctx); if (ret) { ath11k_warn(ab, "failed to start vdev %i addr %pM on freq %d: %d\n", arvif->vdev_id, vif->addr, @@ -6955,6 +6996,19 @@ static int ath11k_start_vdev_delay(struct ieee80211_hw *hw, return ret; } + /* Reconfigure hardware rate code since it is cleared by firmware. + */ + if (ar->hw_rate_code > 0) { + u32 vdev_param = WMI_VDEV_PARAM_MGMT_RATE; + + ret = ath11k_wmi_vdev_set_param_cmd(ar, arvif->vdev_id, vdev_param, + ar->hw_rate_code); + if (ret) { + ath11k_warn(ar->ab, "failed to set mgmt tx rate %d\n", ret); + return ret; + } + } + if (arvif->vdev_type == WMI_VDEV_TYPE_MONITOR) { ret = ath11k_wmi_vdev_up(ar, arvif->vdev_id, 0, ar->mac_addr); if (ret) { @@ -7028,7 +7082,7 @@ ath11k_mac_op_assign_vif_chanctx(struct ieee80211_hw *hw, goto out; } - ret = ath11k_mac_vdev_start(arvif, &ctx->def); + ret = ath11k_mac_vdev_start(arvif, ctx); if (ret) { ath11k_warn(ab, "failed to start vdev %i addr %pM on freq %d: %d\n", arvif->vdev_id, vif->addr, @@ -8422,7 +8476,7 @@ static int __ath11k_mac_register(struct ath11k *ar) ar->hw->queues = ATH11K_HW_MAX_QUEUES; ar->hw->wiphy->tx_queue_len = ATH11K_QUEUE_LEN; ar->hw->offchannel_tx_hw_queue = ATH11K_HW_MAX_QUEUES - 1; - ar->hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; + ar->hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; ar->hw->vif_data_size = sizeof(struct ath11k_vif); ar->hw->sta_data_size = sizeof(struct ath11k_sta); diff --git a/drivers/net/wireless/ath/ath11k/mhi.c b/drivers/net/wireless/ath/ath11k/mhi.c index e4250ba8dfee..fc3524e83e52 100644 --- a/drivers/net/wireless/ath/ath11k/mhi.c +++ b/drivers/net/wireless/ath/ath11k/mhi.c @@ -13,6 +13,7 @@ #include "pci.h" #define MHI_TIMEOUT_DEFAULT_MS 90000 +#define RDDM_DUMP_SIZE 0x420000 static struct mhi_channel_config ath11k_mhi_channels_qca6390[] = { { @@ -332,6 +333,7 @@ static int ath11k_mhi_read_addr_from_dt(struct mhi_controller *mhi_ctrl) return -ENOENT; ret = of_address_to_resource(np, 0, &res); + of_node_put(np); if (ret) return ret; @@ -381,6 +383,7 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci) mhi_ctrl->iova_stop = 0xFFFFFFFF; } + mhi_ctrl->rddm_size = RDDM_DUMP_SIZE; mhi_ctrl->sbl_size = SZ_512K; mhi_ctrl->seg_len = SZ_512K; mhi_ctrl->fbc_download = true; @@ -560,7 +563,7 @@ static int ath11k_mhi_set_state(struct ath11k_pci *ab_pci, ret = 0; break; case ATH11K_MHI_POWER_ON: - ret = mhi_async_power_up(ab_pci->mhi_ctrl); + ret = mhi_sync_power_up(ab_pci->mhi_ctrl); break; case ATH11K_MHI_POWER_OFF: mhi_power_down(ab_pci->mhi_ctrl, true); diff --git a/drivers/net/wireless/ath/ath11k/pci.c b/drivers/net/wireless/ath/ath11k/pci.c index de71ad594f34..903758751c99 100644 --- a/drivers/net/wireless/ath/ath11k/pci.c +++ b/drivers/net/wireless/ath/ath11k/pci.c @@ -1571,6 +1571,11 @@ static __maybe_unused int ath11k_pci_pm_suspend(struct device *dev) struct ath11k_base *ab = dev_get_drvdata(dev); int ret; + if (test_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags)) { + ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot skipping pci suspend as qmi is not initialised\n"); + return 0; + } + ret = ath11k_core_suspend(ab); if (ret) ath11k_warn(ab, "failed to suspend core: %d\n", ret); @@ -1583,6 +1588,11 @@ static __maybe_unused int ath11k_pci_pm_resume(struct device *dev) struct ath11k_base *ab = dev_get_drvdata(dev); int ret; + if (test_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags)) { + ath11k_dbg(ab, ATH11K_DBG_BOOT, "boot skipping pci resume as qmi is not initialised\n"); + return 0; + } + ret = ath11k_core_resume(ab); if (ret) ath11k_warn(ab, "failed to resume core: %d\n", ret); diff --git a/drivers/net/wireless/ath/ath11k/peer.c b/drivers/net/wireless/ath/ath11k/peer.c index 85471f8b3563..332886bc6b33 100644 --- a/drivers/net/wireless/ath/ath11k/peer.c +++ b/drivers/net/wireless/ath/ath11k/peer.c @@ -252,7 +252,7 @@ int ath11k_peer_create(struct ath11k *ar, struct ath11k_vif *arvif, { struct ath11k_peer *peer; struct ath11k_sta *arsta; - int ret; + int ret, fbret; lockdep_assert_held(&ar->conf_mutex); @@ -291,22 +291,8 @@ int ath11k_peer_create(struct ath11k *ar, struct ath11k_vif *arvif, ath11k_warn(ar->ab, "failed to find peer %pM on vdev %i after creation\n", param->peer_addr, param->vdev_id); - reinit_completion(&ar->peer_delete_done); - - ret = ath11k_wmi_send_peer_delete_cmd(ar, param->peer_addr, - param->vdev_id); - if (ret) { - ath11k_warn(ar->ab, "failed to delete peer vdev_id %d addr %pM\n", - param->vdev_id, param->peer_addr); - return ret; - } - - ret = ath11k_wait_for_peer_delete_done(ar, param->vdev_id, - param->peer_addr); - if (ret) - return ret; - - return -ENOENT; + ret = -ENOENT; + goto cleanup; } peer->pdev_idx = ar->pdev_idx; @@ -335,4 +321,24 @@ int ath11k_peer_create(struct ath11k *ar, struct ath11k_vif *arvif, spin_unlock_bh(&ar->ab->base_lock); return 0; + +cleanup: + reinit_completion(&ar->peer_delete_done); + + fbret = ath11k_wmi_send_peer_delete_cmd(ar, param->peer_addr, + param->vdev_id); + if (fbret) { + ath11k_warn(ar->ab, "failed to delete peer vdev_id %d addr %pM\n", + param->vdev_id, param->peer_addr); + goto exit; + } + + fbret = ath11k_wait_for_peer_delete_done(ar, param->vdev_id, + param->peer_addr); + if (fbret) + ath11k_warn(ar->ab, "failed wait for peer %pM delete done id %d fallback ret %d\n", + param->peer_addr, param->vdev_id, fbret); + +exit: + return ret; } diff --git a/drivers/net/wireless/ath/ath11k/qmi.c b/drivers/net/wireless/ath/ath11k/qmi.c index 65d3c6ba35ae..04e966830c18 100644 --- a/drivers/net/wireless/ath/ath11k/qmi.c +++ b/drivers/net/wireless/ath/ath11k/qmi.c @@ -1932,10 +1932,11 @@ static int ath11k_qmi_assign_target_mem_chunk(struct ath11k_base *ab) if (!hremote_node) { ath11k_dbg(ab, ATH11K_DBG_QMI, "qmi fail to get hremote_node\n"); - return ret; + return -ENODEV; } ret = of_address_to_resource(hremote_node, 0, &res); + of_node_put(hremote_node); if (ret) { ath11k_dbg(ab, ATH11K_DBG_QMI, "qmi fail to get reg from hremote\n"); @@ -2341,6 +2342,7 @@ static void ath11k_qmi_m3_free(struct ath11k_base *ab) dma_free_coherent(ab->dev, m3_mem->size, m3_mem->vaddr, m3_mem->paddr); m3_mem->vaddr = NULL; + m3_mem->size = 0; } static int ath11k_qmi_wlanfw_m3_info_send(struct ath11k_base *ab) @@ -2958,7 +2960,11 @@ static void ath11k_qmi_driver_event_work(struct work_struct *work) clear_bit(ATH11K_FLAG_CRASH_FLUSH, &ab->dev_flags); clear_bit(ATH11K_FLAG_RECOVERY, &ab->dev_flags); - ath11k_core_qmi_firmware_ready(ab); + ret = ath11k_core_qmi_firmware_ready(ab); + if (ret) { + set_bit(ATH11K_FLAG_QMI_FAIL, &ab->dev_flags); + break; + } set_bit(ATH11K_FLAG_REGISTERED, &ab->dev_flags); } @@ -3024,3 +3030,8 @@ void ath11k_qmi_deinit_service(struct ath11k_base *ab) } EXPORT_SYMBOL(ath11k_qmi_deinit_service); +void ath11k_qmi_free_resource(struct ath11k_base *ab) +{ + ath11k_qmi_free_target_mem_chunk(ab); + ath11k_qmi_m3_free(ab); +} diff --git a/drivers/net/wireless/ath/ath11k/qmi.h b/drivers/net/wireless/ath/ath11k/qmi.h index ba2eff4d59cb..61678de56ac7 100644 --- a/drivers/net/wireless/ath/ath11k/qmi.h +++ b/drivers/net/wireless/ath/ath11k/qmi.h @@ -492,5 +492,6 @@ void ath11k_qmi_event_work(struct work_struct *work); void ath11k_qmi_msg_recv_work(struct work_struct *work); void ath11k_qmi_deinit_service(struct ath11k_base *ab); int ath11k_qmi_init_service(struct ath11k_base *ab); +void ath11k_qmi_free_resource(struct ath11k_base *ab); #endif diff --git a/drivers/net/wireless/ath/ath11k/reg.c b/drivers/net/wireless/ath/ath11k/reg.c index d6575feca5a2..81e11cde31d7 100644 --- a/drivers/net/wireless/ath/ath11k/reg.c +++ b/drivers/net/wireless/ath/ath11k/reg.c @@ -48,6 +48,7 @@ ath11k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) { struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); struct wmi_init_country_params init_country_param; + struct wmi_set_current_country_params set_current_param = {}; struct ath11k *ar = hw->priv; int ret; @@ -76,18 +77,26 @@ ath11k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *request) return; } - /* Set the country code to the firmware and wait for + /* Set the country code to the firmware and will receive * the WMI_REG_CHAN_LIST_CC EVENT for updating the * reg info */ - init_country_param.flags = ALPHA_IS_SET; - memcpy(&init_country_param.cc_info.alpha2, request->alpha2, 2); - init_country_param.cc_info.alpha2[2] = 0; + if (ar->ab->hw_params.current_cc_support) { + memcpy(&set_current_param.alpha2, request->alpha2, 2); + ret = ath11k_wmi_send_set_current_country_cmd(ar, &set_current_param); + if (ret) + ath11k_warn(ar->ab, + "failed set current country code: %d\n", ret); + } else { + init_country_param.flags = ALPHA_IS_SET; + memcpy(&init_country_param.cc_info.alpha2, request->alpha2, 2); + init_country_param.cc_info.alpha2[2] = 0; - ret = ath11k_wmi_send_init_country_cmd(ar, init_country_param); - if (ret) - ath11k_warn(ar->ab, - "INIT Country code set to fw failed : %d\n", ret); + ret = ath11k_wmi_send_init_country_cmd(ar, init_country_param); + if (ret) + ath11k_warn(ar->ab, + "INIT Country code set to fw failed : %d\n", ret); + } ath11k_mac_11d_scan_stop(ar); ar->regdom_set_by_user = true; diff --git a/drivers/net/wireless/ath/ath11k/rx_desc.h b/drivers/net/wireless/ath/ath11k/rx_desc.h index 79c50804d7dc..26ecc1bcd9d5 100644 --- a/drivers/net/wireless/ath/ath11k/rx_desc.h +++ b/drivers/net/wireless/ath/ath11k/rx_desc.h @@ -1445,7 +1445,7 @@ struct hal_rx_desc_ipq8074 { __le32 hdr_status_tag; __le32 phy_ppdu_id; u8 hdr_status[HAL_RX_DESC_HDR_STATUS_LEN]; - u8 msdu_payload[0]; + u8 msdu_payload[]; } __packed; struct hal_rx_desc_qcn9074 { @@ -1464,7 +1464,7 @@ struct hal_rx_desc_qcn9074 { __le32 hdr_status_tag; __le32 phy_ppdu_id; u8 hdr_status[HAL_RX_DESC_HDR_STATUS_LEN]; - u8 msdu_payload[0]; + u8 msdu_payload[]; } __packed; struct hal_rx_desc_wcn6855 { @@ -1483,7 +1483,7 @@ struct hal_rx_desc_wcn6855 { __le32 hdr_status_tag; __le32 phy_ppdu_id; u8 hdr_status[HAL_RX_DESC_HDR_STATUS_LEN]; - u8 msdu_payload[0]; + u8 msdu_payload[]; } __packed; struct hal_rx_desc { diff --git a/drivers/net/wireless/ath/ath11k/spectral.c b/drivers/net/wireless/ath/ath11k/spectral.c index 4100cc1449a2..2b18871d5f7c 100644 --- a/drivers/net/wireless/ath/ath11k/spectral.c +++ b/drivers/net/wireless/ath/ath11k/spectral.c @@ -107,7 +107,7 @@ struct spectral_search_fft_report { __le32 info1; __le32 info2; __le32 reserve0; - u8 bins[0]; + u8 bins[]; } __packed; struct ath11k_spectral_search_report { diff --git a/drivers/net/wireless/ath/ath11k/wmi.c b/drivers/net/wireless/ath/ath11k/wmi.c index 6b68ccf65e39..b4f86c45d81f 100644 --- a/drivers/net/wireless/ath/ath11k/wmi.c +++ b/drivers/net/wireless/ath/ath11k/wmi.c @@ -144,6 +144,8 @@ static const struct wmi_tlv_policy wmi_tlv_policies[] = { .min_len = sizeof(struct wmi_11d_new_cc_ev) }, [WMI_TAG_PER_CHAIN_RSSI_STATS] = { .min_len = sizeof(struct wmi_per_chain_rssi_stats) }, + [WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT] = { + .min_len = sizeof(struct wmi_twt_add_dialog_event) }, }; #define PRIMAP(_hw_mode_) \ @@ -3085,11 +3087,12 @@ ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id) /* TODO add MBSSID support */ cmd->mbss_support = 0; - ret = ath11k_wmi_cmd_send(wmi, skb, - WMI_TWT_ENABLE_CMDID); + ret = ath11k_wmi_cmd_send(wmi, skb, WMI_TWT_ENABLE_CMDID); if (ret) { ath11k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); dev_kfree_skb(skb); + } else { + ar->twt_enabled = 1; } return ret; } @@ -3114,11 +3117,181 @@ ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id) FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE); cmd->pdev_id = pdev_id; - ret = ath11k_wmi_cmd_send(wmi, skb, - WMI_TWT_DISABLE_CMDID); + ret = ath11k_wmi_cmd_send(wmi, skb, WMI_TWT_DISABLE_CMDID); if (ret) { ath11k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); dev_kfree_skb(skb); + } else { + ar->twt_enabled = 0; + } + return ret; +} + +int ath11k_wmi_send_twt_add_dialog_cmd(struct ath11k *ar, + struct wmi_twt_add_dialog_params *params) +{ + struct ath11k_pdev_wmi *wmi = ar->wmi; + struct ath11k_base *ab = wmi->wmi_ab->ab; + struct wmi_twt_add_dialog_params_cmd *cmd; + struct sk_buff *skb; + int ret, len; + + len = sizeof(*cmd); + + skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, len); + if (!skb) + return -ENOMEM; + + cmd = (struct wmi_twt_add_dialog_params_cmd *)skb->data; + cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_TWT_ADD_DIALOG_CMD) | + FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE); + + cmd->vdev_id = params->vdev_id; + ether_addr_copy(cmd->peer_macaddr.addr, params->peer_macaddr); + cmd->dialog_id = params->dialog_id; + cmd->wake_intvl_us = params->wake_intvl_us; + cmd->wake_intvl_mantis = params->wake_intvl_mantis; + cmd->wake_dura_us = params->wake_dura_us; + cmd->sp_offset_us = params->sp_offset_us; + cmd->flags = params->twt_cmd; + if (params->flag_bcast) + cmd->flags |= WMI_TWT_ADD_DIALOG_FLAG_BCAST; + if (params->flag_trigger) + cmd->flags |= WMI_TWT_ADD_DIALOG_FLAG_TRIGGER; + if (params->flag_flow_type) + cmd->flags |= WMI_TWT_ADD_DIALOG_FLAG_FLOW_TYPE; + if (params->flag_protection) + cmd->flags |= WMI_TWT_ADD_DIALOG_FLAG_PROTECTION; + + ath11k_dbg(ar->ab, ATH11K_DBG_WMI, + "wmi add twt dialog vdev %u dialog id %u wake interval %u mantissa %u wake duration %u service period offset %u flags 0x%x\n", + cmd->vdev_id, cmd->dialog_id, cmd->wake_intvl_us, + cmd->wake_intvl_mantis, cmd->wake_dura_us, cmd->sp_offset_us, + cmd->flags); + + ret = ath11k_wmi_cmd_send(wmi, skb, WMI_TWT_ADD_DIALOG_CMDID); + + if (ret) { + ath11k_warn(ab, + "failed to send wmi command to add twt dialog: %d", + ret); + dev_kfree_skb(skb); + } + return ret; +} + +int ath11k_wmi_send_twt_del_dialog_cmd(struct ath11k *ar, + struct wmi_twt_del_dialog_params *params) +{ + struct ath11k_pdev_wmi *wmi = ar->wmi; + struct ath11k_base *ab = wmi->wmi_ab->ab; + struct wmi_twt_del_dialog_params_cmd *cmd; + struct sk_buff *skb; + int ret, len; + + len = sizeof(*cmd); + + skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, len); + if (!skb) + return -ENOMEM; + + cmd = (struct wmi_twt_del_dialog_params_cmd *)skb->data; + cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_TWT_DEL_DIALOG_CMD) | + FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE); + + cmd->vdev_id = params->vdev_id; + ether_addr_copy(cmd->peer_macaddr.addr, params->peer_macaddr); + cmd->dialog_id = params->dialog_id; + + ath11k_dbg(ar->ab, ATH11K_DBG_WMI, + "wmi delete twt dialog vdev %u dialog id %u\n", + cmd->vdev_id, cmd->dialog_id); + + ret = ath11k_wmi_cmd_send(wmi, skb, WMI_TWT_DEL_DIALOG_CMDID); + if (ret) { + ath11k_warn(ab, + "failed to send wmi command to delete twt dialog: %d", + ret); + dev_kfree_skb(skb); + } + return ret; +} + +int ath11k_wmi_send_twt_pause_dialog_cmd(struct ath11k *ar, + struct wmi_twt_pause_dialog_params *params) +{ + struct ath11k_pdev_wmi *wmi = ar->wmi; + struct ath11k_base *ab = wmi->wmi_ab->ab; + struct wmi_twt_pause_dialog_params_cmd *cmd; + struct sk_buff *skb; + int ret, len; + + len = sizeof(*cmd); + + skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, len); + if (!skb) + return -ENOMEM; + + cmd = (struct wmi_twt_pause_dialog_params_cmd *)skb->data; + cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, + WMI_TAG_TWT_PAUSE_DIALOG_CMD) | + FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE); + + cmd->vdev_id = params->vdev_id; + ether_addr_copy(cmd->peer_macaddr.addr, params->peer_macaddr); + cmd->dialog_id = params->dialog_id; + + ath11k_dbg(ar->ab, ATH11K_DBG_WMI, + "wmi pause twt dialog vdev %u dialog id %u\n", + cmd->vdev_id, cmd->dialog_id); + + ret = ath11k_wmi_cmd_send(wmi, skb, WMI_TWT_PAUSE_DIALOG_CMDID); + if (ret) { + ath11k_warn(ab, + "failed to send wmi command to pause twt dialog: %d", + ret); + dev_kfree_skb(skb); + } + return ret; +} + +int ath11k_wmi_send_twt_resume_dialog_cmd(struct ath11k *ar, + struct wmi_twt_resume_dialog_params *params) +{ + struct ath11k_pdev_wmi *wmi = ar->wmi; + struct ath11k_base *ab = wmi->wmi_ab->ab; + struct wmi_twt_resume_dialog_params_cmd *cmd; + struct sk_buff *skb; + int ret, len; + + len = sizeof(*cmd); + + skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, len); + if (!skb) + return -ENOMEM; + + cmd = (struct wmi_twt_resume_dialog_params_cmd *)skb->data; + cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, + WMI_TAG_TWT_RESUME_DIALOG_CMD) | + FIELD_PREP(WMI_TLV_LEN, len - TLV_HDR_SIZE); + + cmd->vdev_id = params->vdev_id; + ether_addr_copy(cmd->peer_macaddr.addr, params->peer_macaddr); + cmd->dialog_id = params->dialog_id; + cmd->sp_offset_us = params->sp_offset_us; + cmd->next_twt_size = params->next_twt_size; + + ath11k_dbg(ar->ab, ATH11K_DBG_WMI, + "wmi resume twt dialog vdev %u dialog id %u service period offset %u next twt subfield size %u\n", + cmd->vdev_id, cmd->dialog_id, cmd->sp_offset_us, + cmd->next_twt_size); + + ret = ath11k_wmi_cmd_send(wmi, skb, WMI_TWT_RESUME_DIALOG_CMDID); + if (ret) { + ath11k_warn(ab, + "failed to send wmi command to resume twt dialog: %d", + ret); + dev_kfree_skb(skb); } return ret; } @@ -7532,6 +7705,66 @@ ath11k_wmi_diag_event(struct ath11k_base *ab, trace_ath11k_wmi_diag(ab, skb->data, skb->len); } +static const char *ath11k_wmi_twt_add_dialog_event_status(u32 status) +{ + switch (status) { + case WMI_ADD_TWT_STATUS_OK: + return "ok"; + case WMI_ADD_TWT_STATUS_TWT_NOT_ENABLED: + return "twt disabled"; + case WMI_ADD_TWT_STATUS_USED_DIALOG_ID: + return "dialog id in use"; + case WMI_ADD_TWT_STATUS_INVALID_PARAM: + return "invalid parameters"; + case WMI_ADD_TWT_STATUS_NOT_READY: + return "not ready"; + case WMI_ADD_TWT_STATUS_NO_RESOURCE: + return "resource unavailable"; + case WMI_ADD_TWT_STATUS_NO_ACK: + return "no ack"; + case WMI_ADD_TWT_STATUS_NO_RESPONSE: + return "no response"; + case WMI_ADD_TWT_STATUS_DENIED: + return "denied"; + case WMI_ADD_TWT_STATUS_UNKNOWN_ERROR: + fallthrough; + default: + return "unknown error"; + } +} + +static void ath11k_wmi_twt_add_dialog_event(struct ath11k_base *ab, + struct sk_buff *skb) +{ + const void **tb; + const struct wmi_twt_add_dialog_event *ev; + int ret; + + tb = ath11k_wmi_tlv_parse_alloc(ab, skb->data, skb->len, GFP_ATOMIC); + if (IS_ERR(tb)) { + ret = PTR_ERR(tb); + ath11k_warn(ab, + "failed to parse wmi twt add dialog status event tlv: %d\n", + ret); + return; + } + + ev = tb[WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT]; + if (!ev) { + ath11k_warn(ab, "failed to fetch twt add dialog wmi event\n"); + goto exit; + } + + if (ev->status) + ath11k_warn(ab, + "wmi add twt dialog event vdev %d dialog id %d status %s\n", + ev->vdev_id, ev->dialog_id, + ath11k_wmi_twt_add_dialog_event_status(ev->status)); + +exit: + kfree(tb); +} + static void ath11k_wmi_tlv_op_rx(struct ath11k_base *ab, struct sk_buff *skb) { struct wmi_cmd_hdr *cmd_hdr; @@ -7629,11 +7862,17 @@ static void ath11k_wmi_tlv_op_rx(struct ath11k_base *ab, struct sk_buff *skb) case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID: ath11k_wmi_obss_color_collision_event(ab, skb); break; + case WMI_TWT_ADD_DIALOG_EVENTID: + ath11k_wmi_twt_add_dialog_event(ab, skb); + break; /* add Unsupported events here */ case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: case WMI_PEER_OPER_MODE_CHANGE_EVENTID: case WMI_TWT_ENABLE_EVENTID: case WMI_TWT_DISABLE_EVENTID: + case WMI_TWT_DEL_DIALOG_EVENTID: + case WMI_TWT_PAUSE_DIALOG_EVENTID: + case WMI_TWT_RESUME_DIALOG_EVENTID: case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: case WMI_PEER_CREATE_CONF_EVENTID: ath11k_dbg(ab, ATH11K_DBG_WMI, @@ -7798,6 +8037,59 @@ int ath11k_wmi_simulate_radar(struct ath11k *ar) return ath11k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args); } +int ath11k_wmi_fw_dbglog_cfg(struct ath11k *ar, u32 *module_id_bitmap, + struct ath11k_fw_dbglog *dbglog) +{ + struct ath11k_pdev_wmi *wmi = ar->wmi; + struct wmi_debug_log_config_cmd_fixed_param *cmd; + struct sk_buff *skb; + struct wmi_tlv *tlv; + int ret, len; + + len = sizeof(*cmd) + TLV_HDR_SIZE + (MAX_MODULE_ID_BITMAP_WORDS * sizeof(u32)); + skb = ath11k_wmi_alloc_skb(wmi->wmi_ab, len); + if (!skb) + return -ENOMEM; + + cmd = (struct wmi_debug_log_config_cmd_fixed_param *)skb->data; + cmd->tlv_header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_DEBUG_LOG_CONFIG_CMD) | + FIELD_PREP(WMI_TLV_LEN, sizeof(*cmd) - TLV_HDR_SIZE); + cmd->dbg_log_param = dbglog->param; + + tlv = (struct wmi_tlv *)((u8 *)cmd + sizeof(*cmd)); + tlv->header = FIELD_PREP(WMI_TLV_TAG, WMI_TAG_ARRAY_UINT32) | + FIELD_PREP(WMI_TLV_LEN, MAX_MODULE_ID_BITMAP_WORDS * sizeof(u32)); + + switch (dbglog->param) { + case WMI_DEBUG_LOG_PARAM_LOG_LEVEL: + case WMI_DEBUG_LOG_PARAM_VDEV_ENABLE: + case WMI_DEBUG_LOG_PARAM_VDEV_DISABLE: + case WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP: + cmd->value = dbglog->value; + break; + case WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP: + case WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP: + cmd->value = dbglog->value; + memcpy(tlv->value, module_id_bitmap, + MAX_MODULE_ID_BITMAP_WORDS * sizeof(u32)); + /* clear current config to be used for next user config */ + memset(module_id_bitmap, 0, + MAX_MODULE_ID_BITMAP_WORDS * sizeof(u32)); + break; + default: + dev_kfree_skb(skb); + return -EINVAL; + } + + ret = ath11k_wmi_cmd_send(wmi, skb, WMI_DBGLOG_CFG_CMDID); + if (ret) { + ath11k_warn(ar->ab, + "failed to send WMI_DBGLOG_CFG_CMDID\n"); + dev_kfree_skb(skb); + } + return ret; +} + int ath11k_wmi_connect(struct ath11k_base *ab) { u32 i; diff --git a/drivers/net/wireless/ath/ath11k/wmi.h b/drivers/net/wireless/ath/ath11k/wmi.h index 2f26ec1a8aa3..587f42307250 100644 --- a/drivers/net/wireless/ath/ath11k/wmi.h +++ b/drivers/net/wireless/ath/ath11k/wmi.h @@ -12,6 +12,7 @@ struct ath11k_base; struct ath11k; struct ath11k_fw_stats; +struct ath11k_fw_dbglog; #define PSOC_HOST_MAX_NUM_SS (8) @@ -4952,6 +4953,112 @@ struct wmi_twt_disable_params_cmd { u32 pdev_id; } __packed; +enum WMI_HOST_TWT_COMMAND { + WMI_HOST_TWT_COMMAND_REQUEST_TWT = 0, + WMI_HOST_TWT_COMMAND_SUGGEST_TWT, + WMI_HOST_TWT_COMMAND_DEMAND_TWT, + WMI_HOST_TWT_COMMAND_TWT_GROUPING, + WMI_HOST_TWT_COMMAND_ACCEPT_TWT, + WMI_HOST_TWT_COMMAND_ALTERNATE_TWT, + WMI_HOST_TWT_COMMAND_DICTATE_TWT, + WMI_HOST_TWT_COMMAND_REJECT_TWT, +}; + +#define WMI_TWT_ADD_DIALOG_FLAG_BCAST BIT(8) +#define WMI_TWT_ADD_DIALOG_FLAG_TRIGGER BIT(9) +#define WMI_TWT_ADD_DIALOG_FLAG_FLOW_TYPE BIT(10) +#define WMI_TWT_ADD_DIALOG_FLAG_PROTECTION BIT(11) + +struct wmi_twt_add_dialog_params_cmd { + u32 tlv_header; + u32 vdev_id; + struct wmi_mac_addr peer_macaddr; + u32 dialog_id; + u32 wake_intvl_us; + u32 wake_intvl_mantis; + u32 wake_dura_us; + u32 sp_offset_us; + u32 flags; +} __packed; + +struct wmi_twt_add_dialog_params { + u32 vdev_id; + u8 peer_macaddr[ETH_ALEN]; + u32 dialog_id; + u32 wake_intvl_us; + u32 wake_intvl_mantis; + u32 wake_dura_us; + u32 sp_offset_us; + u8 twt_cmd; + u8 flag_bcast; + u8 flag_trigger; + u8 flag_flow_type; + u8 flag_protection; +} __packed; + +enum wmi_twt_add_dialog_status { + WMI_ADD_TWT_STATUS_OK, + WMI_ADD_TWT_STATUS_TWT_NOT_ENABLED, + WMI_ADD_TWT_STATUS_USED_DIALOG_ID, + WMI_ADD_TWT_STATUS_INVALID_PARAM, + WMI_ADD_TWT_STATUS_NOT_READY, + WMI_ADD_TWT_STATUS_NO_RESOURCE, + WMI_ADD_TWT_STATUS_NO_ACK, + WMI_ADD_TWT_STATUS_NO_RESPONSE, + WMI_ADD_TWT_STATUS_DENIED, + WMI_ADD_TWT_STATUS_UNKNOWN_ERROR, +}; + +struct wmi_twt_add_dialog_event { + u32 vdev_id; + struct wmi_mac_addr peer_macaddr; + u32 dialog_id; + u32 status; +} __packed; + +struct wmi_twt_del_dialog_params { + u32 vdev_id; + u8 peer_macaddr[ETH_ALEN]; + u32 dialog_id; +} __packed; + +struct wmi_twt_del_dialog_params_cmd { + u32 tlv_header; + u32 vdev_id; + struct wmi_mac_addr peer_macaddr; + u32 dialog_id; +} __packed; + +struct wmi_twt_pause_dialog_params { + u32 vdev_id; + u8 peer_macaddr[ETH_ALEN]; + u32 dialog_id; +} __packed; + +struct wmi_twt_pause_dialog_params_cmd { + u32 tlv_header; + u32 vdev_id; + struct wmi_mac_addr peer_macaddr; + u32 dialog_id; +} __packed; + +struct wmi_twt_resume_dialog_params { + u32 vdev_id; + u8 peer_macaddr[ETH_ALEN]; + u32 dialog_id; + u32 sp_offset_us; + u32 next_twt_size; +} __packed; + +struct wmi_twt_resume_dialog_params_cmd { + u32 tlv_header; + u32 vdev_id; + struct wmi_mac_addr peer_macaddr; + u32 dialog_id; + u32 sp_offset_us; + u32 next_twt_size; +} __packed; + struct wmi_obss_spatial_reuse_params_cmd { u32 tlv_header; u32 pdev_id; @@ -5240,6 +5347,21 @@ struct wmi_rfkill_state_change_ev { u32 radio_state; } __packed; +enum wmi_debug_log_param { + WMI_DEBUG_LOG_PARAM_LOG_LEVEL = 0x1, + WMI_DEBUG_LOG_PARAM_VDEV_ENABLE, + WMI_DEBUG_LOG_PARAM_VDEV_DISABLE, + WMI_DEBUG_LOG_PARAM_VDEV_ENABLE_BITMAP, + WMI_DEBUG_LOG_PARAM_MOD_ENABLE_BITMAP, + WMI_DEBUG_LOG_PARAM_WOW_MOD_ENABLE_BITMAP, +}; + +struct wmi_debug_log_config_cmd_fixed_param { + u32 tlv_header; + u32 dbg_log_param; + u32 value; +} __packed; + #define WMI_MAX_MEM_REQS 32 #define MAX_RADIOS 3 @@ -5546,6 +5668,14 @@ void ath11k_wmi_fw_stats_fill(struct ath11k *ar, int ath11k_wmi_simulate_radar(struct ath11k *ar); int ath11k_wmi_send_twt_enable_cmd(struct ath11k *ar, u32 pdev_id); int ath11k_wmi_send_twt_disable_cmd(struct ath11k *ar, u32 pdev_id); +int ath11k_wmi_send_twt_add_dialog_cmd(struct ath11k *ar, + struct wmi_twt_add_dialog_params *params); +int ath11k_wmi_send_twt_del_dialog_cmd(struct ath11k *ar, + struct wmi_twt_del_dialog_params *params); +int ath11k_wmi_send_twt_pause_dialog_cmd(struct ath11k *ar, + struct wmi_twt_pause_dialog_params *params); +int ath11k_wmi_send_twt_resume_dialog_cmd(struct ath11k *ar, + struct wmi_twt_resume_dialog_params *params); int ath11k_wmi_send_obss_spr_cmd(struct ath11k *ar, u32 vdev_id, struct ieee80211_he_obss_pd *he_obss_pd); int ath11k_wmi_pdev_set_srg_bss_color_bitmap(struct ath11k *ar, u32 *bitmap); @@ -5582,4 +5712,6 @@ int ath11k_wmi_wow_host_wakeup_ind(struct ath11k *ar); int ath11k_wmi_wow_enable(struct ath11k *ar); int ath11k_wmi_scan_prob_req_oui(struct ath11k *ar, const u8 mac_addr[ETH_ALEN]); +int ath11k_wmi_fw_dbglog_cfg(struct ath11k *ar, u32 *module_id_bitmap, + struct ath11k_fw_dbglog *dbglog); #endif diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h index 234ea939d316..f595204f493d 100644 --- a/drivers/net/wireless/ath/ath5k/ath5k.h +++ b/drivers/net/wireless/ath/ath5k/ath5k.h @@ -1395,10 +1395,6 @@ struct ath5k_hw { u32 ah_txq_imr_nofrm; u32 ah_txq_isr_txok_all; - u32 ah_txq_isr_txurn; - u32 ah_txq_isr_qcborn; - u32 ah_txq_isr_qcburn; - u32 ah_txq_isr_qtrig; u32 *ah_rf_banks; size_t ah_rf_banks_size; diff --git a/drivers/net/wireless/ath/ath5k/dma.c b/drivers/net/wireless/ath/ath5k/dma.c index e6c52f7c26e7..d9e376eb040e 100644 --- a/drivers/net/wireless/ath/ath5k/dma.c +++ b/drivers/net/wireless/ath/ath5k/dma.c @@ -650,6 +650,7 @@ ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask) */ *interrupt_mask = (pisr & AR5K_INT_COMMON) & ah->ah_imr; + ah->ah_txq_isr_txok_all = 0; /* We treat TXOK,TXDESC, TXERR and TXEOL * the same way (schedule the tx tasklet) @@ -670,13 +671,6 @@ ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask) ah->ah_txq_isr_txok_all |= AR5K_REG_MS(sisr1, AR5K_SISR1_QCU_TXEOL); - /* Currently this is not much useful since we treat - * all queues the same way if we get a TXURN (update - * tx trigger level) but we might need it later on*/ - if (pisr & AR5K_ISR_TXURN) - ah->ah_txq_isr_txurn |= AR5K_REG_MS(sisr2, - AR5K_SISR2_QCU_TXURN); - /* Misc Beacon related interrupts */ /* For AR5211 */ @@ -709,25 +703,16 @@ ath5k_hw_get_isr(struct ath5k_hw *ah, enum ath5k_int *interrupt_mask) *interrupt_mask |= AR5K_INT_BNR; /* A queue got CBR overrun */ - if (unlikely(pisr & (AR5K_ISR_QCBRORN))) { + if (unlikely(pisr & (AR5K_ISR_QCBRORN))) *interrupt_mask |= AR5K_INT_QCBRORN; - ah->ah_txq_isr_qcborn |= AR5K_REG_MS(sisr3, - AR5K_SISR3_QCBRORN); - } /* A queue got CBR underrun */ - if (unlikely(pisr & (AR5K_ISR_QCBRURN))) { + if (unlikely(pisr & (AR5K_ISR_QCBRURN))) *interrupt_mask |= AR5K_INT_QCBRURN; - ah->ah_txq_isr_qcburn |= AR5K_REG_MS(sisr3, - AR5K_SISR3_QCBRURN); - } /* A queue got triggered */ - if (unlikely(pisr & (AR5K_ISR_QTRIG))) { + if (unlikely(pisr & (AR5K_ISR_QTRIG))) *interrupt_mask |= AR5K_INT_QTRIG; - ah->ah_txq_isr_qtrig |= AR5K_REG_MS(sisr4, - AR5K_SISR4_QTRIG); - } data = pisr; } diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c index 1fbc2c19848f..d444b3d70ba2 100644 --- a/drivers/net/wireless/ath/ath5k/eeprom.c +++ b/drivers/net/wireless/ath/ath5k/eeprom.c @@ -746,6 +746,9 @@ ath5k_eeprom_convert_pcal_info_5111(struct ath5k_hw *ah, int mode, } } + if (idx == AR5K_EEPROM_N_PD_CURVES) + goto err_out; + ee->ee_pd_gains[mode] = 1; pd = &chinfo[pier].pd_curves[idx]; diff --git a/drivers/net/wireless/ath/ath6kl/txrx.c b/drivers/net/wireless/ath/ath6kl/txrx.c index b22ed499f7ba..a56fab6232a9 100644 --- a/drivers/net/wireless/ath/ath6kl/txrx.c +++ b/drivers/net/wireless/ath/ath6kl/txrx.c @@ -839,7 +839,7 @@ static void ath6kl_deliver_frames_to_nw_stack(struct net_device *dev, skb->protocol = eth_type_trans(skb, skb->dev); - netif_rx_ni(skb); + netif_rx(skb); } static void ath6kl_alloc_netbufs(struct sk_buff_head *q, u16 num) diff --git a/drivers/net/wireless/ath/ath6kl/usb.c b/drivers/net/wireless/ath/ath6kl/usb.c index aba70f35e574..65e683effdcb 100644 --- a/drivers/net/wireless/ath/ath6kl/usb.c +++ b/drivers/net/wireless/ath/ath6kl/usb.c @@ -1217,6 +1217,7 @@ static int ath6kl_usb_pm_resume(struct usb_interface *interface) static const struct usb_device_id ath6kl_usb_ids[] = { {USB_DEVICE(0x0cf3, 0x9375)}, {USB_DEVICE(0x0cf3, 0x9374)}, + {USB_DEVICE(0x04da, 0x390d)}, { /* Terminating entry */ }, }; diff --git a/drivers/net/wireless/ath/ath6kl/wmi.c b/drivers/net/wireless/ath/ath6kl/wmi.c index bd1ef6334997..3787b9fb0075 100644 --- a/drivers/net/wireless/ath/ath6kl/wmi.c +++ b/drivers/net/wireless/ath/ath6kl/wmi.c @@ -1750,7 +1750,6 @@ static int ath6kl_wmi_snr_threshold_event_rx(struct wmi *wmi, u8 *datap, static int ath6kl_wmi_aplist_event_rx(struct wmi *wmi, u8 *datap, int len) { - u16 ap_info_entry_size; struct wmi_aplist_event *ev = (struct wmi_aplist_event *) datap; struct wmi_ap_info_v1 *ap_info_v1; u8 index; @@ -1759,14 +1758,12 @@ static int ath6kl_wmi_aplist_event_rx(struct wmi *wmi, u8 *datap, int len) ev->ap_list_ver != APLIST_VER1) return -EINVAL; - ap_info_entry_size = sizeof(struct wmi_ap_info_v1); ap_info_v1 = (struct wmi_ap_info_v1 *) ev->ap_list; ath6kl_dbg(ATH6KL_DBG_WMI, "number of APs in aplist event: %d\n", ev->num_ap); - if (len < (int) (sizeof(struct wmi_aplist_event) + - (ev->num_ap - 1) * ap_info_entry_size)) + if (len < struct_size(ev, ap_list, ev->num_ap)) return -EINVAL; /* AP list version 1 contents */ @@ -1959,21 +1956,15 @@ static int ath6kl_wmi_startscan_cmd(struct wmi *wmi, u8 if_idx, { struct sk_buff *skb; struct wmi_start_scan_cmd *sc; - s8 size; int i, ret; - size = sizeof(struct wmi_start_scan_cmd); - if ((scan_type != WMI_LONG_SCAN) && (scan_type != WMI_SHORT_SCAN)) return -EINVAL; if (num_chan > WMI_MAX_CHANNELS) return -EINVAL; - if (num_chan) - size += sizeof(u16) * (num_chan - 1); - - skb = ath6kl_wmi_get_new_buf(size); + skb = ath6kl_wmi_get_new_buf(struct_size(sc, ch_list, num_chan)); if (!skb) return -ENOMEM; @@ -2008,7 +1999,7 @@ int ath6kl_wmi_beginscan_cmd(struct wmi *wmi, u8 if_idx, struct ieee80211_supported_band *sband; struct sk_buff *skb; struct wmi_begin_scan_cmd *sc; - s8 size, *supp_rates; + s8 *supp_rates; int i, band, ret; struct ath6kl *ar = wmi->parent_dev; int num_rates; @@ -2023,18 +2014,13 @@ int ath6kl_wmi_beginscan_cmd(struct wmi *wmi, u8 if_idx, num_chan, ch_list); } - size = sizeof(struct wmi_begin_scan_cmd); - if ((scan_type != WMI_LONG_SCAN) && (scan_type != WMI_SHORT_SCAN)) return -EINVAL; if (num_chan > WMI_MAX_CHANNELS) return -EINVAL; - if (num_chan) - size += sizeof(u16) * (num_chan - 1); - - skb = ath6kl_wmi_get_new_buf(size); + skb = ath6kl_wmi_get_new_buf(struct_size(sc, ch_list, num_chan)); if (!skb) return -ENOMEM; diff --git a/drivers/net/wireless/ath/ath6kl/wmi.h b/drivers/net/wireless/ath/ath6kl/wmi.h index 784940ba4c90..672014973cee 100644 --- a/drivers/net/wireless/ath/ath6kl/wmi.h +++ b/drivers/net/wireless/ath/ath6kl/wmi.h @@ -863,7 +863,7 @@ struct wmi_begin_scan_cmd { u8 num_ch; /* channels in Mhz */ - __le16 ch_list[1]; + __le16 ch_list[]; } __packed; /* wmi_start_scan_cmd is to be deprecated. Use @@ -889,7 +889,7 @@ struct wmi_start_scan_cmd { u8 num_ch; /* channels in Mhz */ - __le16 ch_list[1]; + __le16 ch_list[]; } __packed; /* @@ -1373,7 +1373,7 @@ struct wmi_channel_list_reply { u8 num_ch; /* channel in Mhz */ - __le16 ch_list[1]; + __le16 ch_list[]; } __packed; /* List of Events (target to host) */ @@ -1545,7 +1545,7 @@ struct wmi_connect_event { u8 beacon_ie_len; u8 assoc_req_len; u8 assoc_resp_len; - u8 assoc_info[1]; + u8 assoc_info[]; } __packed; /* Disconnect Event */ @@ -1596,7 +1596,7 @@ struct wmi_disconnect_event { u8 disconn_reason; u8 assoc_resp_len; - u8 assoc_info[1]; + u8 assoc_info[]; } __packed; /* @@ -1637,7 +1637,7 @@ struct bss_bias { struct bss_bias_info { u8 num_bss; - struct bss_bias bss_bias[0]; + struct bss_bias bss_bias[]; } __packed; struct low_rssi_scan_params { @@ -1720,7 +1720,7 @@ struct wmi_neighbor_info { struct wmi_neighbor_report_event { u8 num_neighbors; - struct wmi_neighbor_info neighbor[0]; + struct wmi_neighbor_info neighbor[]; } __packed; /* TKIP MIC Error Event */ @@ -1957,7 +1957,7 @@ union wmi_ap_info { struct wmi_aplist_event { u8 ap_list_ver; u8 num_ap; - union wmi_ap_info ap_list[1]; + union wmi_ap_info ap_list[]; } __packed; /* Developer Commands */ @@ -2051,7 +2051,7 @@ struct wmi_get_keepalive_cmd { struct wmi_set_appie_cmd { u8 mgmt_frm_type; /* enum wmi_mgmt_frame_type */ u8 ie_len; - u8 ie_info[0]; + u8 ie_info[]; } __packed; struct wmi_set_ie_cmd { @@ -2059,7 +2059,7 @@ struct wmi_set_ie_cmd { u8 ie_field; /* enum wmi_ie_field_type */ u8 ie_len; u8 reserved; - u8 ie_info[0]; + u8 ie_info[]; } __packed; /* Notify the WSC registration status to the target */ @@ -2127,7 +2127,7 @@ struct wmi_add_wow_pattern_cmd { u8 filter_list_id; u8 filter_size; u8 filter_offset; - u8 filter[0]; + u8 filter[]; } __packed; struct wmi_del_wow_pattern_cmd { @@ -2360,7 +2360,7 @@ struct wmi_send_action_cmd { __le32 freq; __le32 wait; __le16 len; - u8 data[0]; + u8 data[]; } __packed; struct wmi_send_mgmt_cmd { @@ -2369,7 +2369,7 @@ struct wmi_send_mgmt_cmd { __le32 wait; __le32 no_cck; __le16 len; - u8 data[0]; + u8 data[]; } __packed; struct wmi_tx_status_event { @@ -2389,7 +2389,7 @@ struct wmi_set_appie_extended_cmd { u8 role_id; u8 mgmt_frm_type; u8 ie_len; - u8 ie_info[0]; + u8 ie_info[]; } __packed; struct wmi_remain_on_chnl_event { @@ -2406,18 +2406,18 @@ struct wmi_cancel_remain_on_chnl_event { struct wmi_rx_action_event { __le32 freq; __le16 len; - u8 data[0]; + u8 data[]; } __packed; struct wmi_p2p_capabilities_event { __le16 len; - u8 data[0]; + u8 data[]; } __packed; struct wmi_p2p_rx_probe_req_event { __le32 freq; __le16 len; - u8 data[0]; + u8 data[]; } __packed; #define P2P_FLAG_CAPABILITIES_REQ (0x00000001) @@ -2431,7 +2431,7 @@ struct wmi_get_p2p_info { struct wmi_p2p_info_event { __le32 info_req_flags; __le16 len; - u8 data[0]; + u8 data[]; } __packed; struct wmi_p2p_capabilities { @@ -2450,7 +2450,7 @@ struct wmi_p2p_probe_response_cmd { __le32 freq; u8 destination_addr[ETH_ALEN]; __le16 len; - u8 data[0]; + u8 data[]; } __packed; /* Extended WMI (WMIX) diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index ef6f5ea06c1f..3ccf8cfc6b63 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h @@ -1071,8 +1071,9 @@ struct ath_softc { #endif #ifdef CONFIG_ATH9K_HWRNG + struct hwrng rng_ops; u32 rng_last; - struct task_struct *rng_task; + char rng_name[sizeof("ath9k_65535")]; #endif }; diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c index e6b3cd49ea18..efb7889142d4 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom.c +++ b/drivers/net/wireless/ath/ath9k/eeprom.c @@ -670,8 +670,6 @@ void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah, int ath9k_hw_eeprom_init(struct ath_hw *ah) { - int status; - if (AR_SREV_9300_20_OR_LATER(ah)) ah->eep_ops = &eep_ar9300_ops; else if (AR_SREV_9287(ah)) { @@ -685,7 +683,5 @@ int ath9k_hw_eeprom_init(struct ath_hw *ah) if (!ah->eep_ops->fill_eeprom(ah)) return -EIO; - status = ah->eep_ops->check_eeprom(ah); - - return status; + return ah->eep_ops->check_eeprom(ah); } diff --git a/drivers/net/wireless/ath/ath9k/htc_hst.c b/drivers/net/wireless/ath/ath9k/htc_hst.c index 510e61e97dbc..994ec48b2f66 100644 --- a/drivers/net/wireless/ath/ath9k/htc_hst.c +++ b/drivers/net/wireless/ath/ath9k/htc_hst.c @@ -30,6 +30,7 @@ static int htc_issue_send(struct htc_target *target, struct sk_buff* skb, hdr->endpoint_id = epid; hdr->flags = flags; hdr->payload_len = cpu_to_be16(len); + memset(hdr->control, 0, sizeof(hdr->control)); status = target->hif->send(target->hif_dev, endpoint->ul_pipeid, skb); @@ -272,6 +273,10 @@ int htc_connect_service(struct htc_target *target, conn_msg->dl_pipeid = endpoint->dl_pipeid; conn_msg->ul_pipeid = endpoint->ul_pipeid; + /* To prevent infoleak */ + conn_msg->svc_meta_len = 0; + conn_msg->pad = 0; + ret = htc_issue_send(target, skb, skb->len, 0, ENDPOINT0); if (ret) goto err; diff --git a/drivers/net/wireless/ath/ath9k/mci.c b/drivers/net/wireless/ath/ath9k/mci.c index 39d46c203f6b..039bf0c35fbe 100644 --- a/drivers/net/wireless/ath/ath9k/mci.c +++ b/drivers/net/wireless/ath/ath9k/mci.c @@ -43,7 +43,7 @@ static bool ath_mci_add_profile(struct ath_common *common, struct ath_mci_profile_info *info) { struct ath_mci_profile_info *entry; - u8 voice_priority[] = { 110, 110, 110, 112, 110, 110, 114, 116, 118 }; + static const u8 voice_priority[] = { 110, 110, 110, 112, 110, 110, 114, 116, 118 }; if ((mci->num_sco == ATH_MCI_MAX_SCO_PROFILE) && (info->type == MCI_GPM_COEX_PROFILE_VOICE)) diff --git a/drivers/net/wireless/ath/ath9k/rng.c b/drivers/net/wireless/ath/ath9k/rng.c index f9d3d6eedd3c..cb5414265a9b 100644 --- a/drivers/net/wireless/ath/ath9k/rng.c +++ b/drivers/net/wireless/ath/ath9k/rng.c @@ -21,11 +21,6 @@ #include "hw.h" #include "ar9003_phy.h" -#define ATH9K_RNG_BUF_SIZE 320 -#define ATH9K_RNG_ENTROPY(x) (((x) * 8 * 10) >> 5) /* quality: 10/32 */ - -static DECLARE_WAIT_QUEUE_HEAD(rng_queue); - static int ath9k_rng_data_read(struct ath_softc *sc, u32 *buf, u32 buf_size) { int i, j; @@ -71,61 +66,56 @@ static u32 ath9k_rng_delay_get(u32 fail_stats) return delay; } -static int ath9k_rng_kthread(void *data) +static int ath9k_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait) { - int bytes_read; - struct ath_softc *sc = data; - u32 *rng_buf; - u32 delay, fail_stats = 0; - - rng_buf = kmalloc_array(ATH9K_RNG_BUF_SIZE, sizeof(u32), GFP_KERNEL); - if (!rng_buf) - goto out; - - while (!kthread_should_stop()) { - bytes_read = ath9k_rng_data_read(sc, rng_buf, - ATH9K_RNG_BUF_SIZE); - if (unlikely(!bytes_read)) { - delay = ath9k_rng_delay_get(++fail_stats); - wait_event_interruptible_timeout(rng_queue, - kthread_should_stop(), - msecs_to_jiffies(delay)); - continue; + struct ath_softc *sc = container_of(rng, struct ath_softc, rng_ops); + u32 fail_stats = 0, word; + int bytes_read = 0; + + for (;;) { + if (max & ~3UL) + bytes_read = ath9k_rng_data_read(sc, buf, max >> 2); + if ((max & 3UL) && ath9k_rng_data_read(sc, &word, 1)) { + memcpy(buf + bytes_read, &word, max & 3UL); + bytes_read += max & 3UL; + memzero_explicit(&word, sizeof(word)); } + if (!wait || !max || likely(bytes_read) || fail_stats > 110) + break; - fail_stats = 0; - - /* sleep until entropy bits under write_wakeup_threshold */ - add_hwgenerator_randomness((void *)rng_buf, bytes_read, - ATH9K_RNG_ENTROPY(bytes_read)); + msleep_interruptible(ath9k_rng_delay_get(++fail_stats)); } - kfree(rng_buf); -out: - sc->rng_task = NULL; - - return 0; + if (wait && !bytes_read && max) + bytes_read = -EIO; + return bytes_read; } void ath9k_rng_start(struct ath_softc *sc) { + static atomic_t serial = ATOMIC_INIT(0); struct ath_hw *ah = sc->sc_ah; - if (sc->rng_task) + if (sc->rng_ops.read) return; if (!AR_SREV_9300_20_OR_LATER(ah)) return; - sc->rng_task = kthread_run(ath9k_rng_kthread, sc, "ath9k-hwrng"); - if (IS_ERR(sc->rng_task)) - sc->rng_task = NULL; + snprintf(sc->rng_name, sizeof(sc->rng_name), "ath9k_%u", + (atomic_inc_return(&serial) - 1) & U16_MAX); + sc->rng_ops.name = sc->rng_name; + sc->rng_ops.read = ath9k_rng_read; + sc->rng_ops.quality = 320; + + if (devm_hwrng_register(sc->dev, &sc->rng_ops)) + sc->rng_ops.read = NULL; } void ath9k_rng_stop(struct ath_softc *sc) { - if (sc->rng_task) { - kthread_stop(sc->rng_task); - sc->rng_task = NULL; + if (sc->rng_ops.read) { + devm_hwrng_unregister(sc->dev, &sc->rng_ops); + sc->rng_ops.read = NULL; } } diff --git a/drivers/net/wireless/ath/carl9170/carl9170.h b/drivers/net/wireless/ath/carl9170/carl9170.h index 84a8ce0784b1..ba29b4aebe9f 100644 --- a/drivers/net/wireless/ath/carl9170/carl9170.h +++ b/drivers/net/wireless/ath/carl9170/carl9170.h @@ -458,7 +458,6 @@ struct ar9170 { # define CARL9170_HWRNG_CACHE_SIZE CARL9170_MAX_CMD_PAYLOAD_LEN struct { struct hwrng rng; - bool initialized; char name[30 + 1]; u16 cache[CARL9170_HWRNG_CACHE_SIZE / sizeof(u16)]; unsigned int cache_idx; diff --git a/drivers/net/wireless/ath/carl9170/fwdesc.h b/drivers/net/wireless/ath/carl9170/fwdesc.h index 503b21abbba5..10acb6ad30d0 100644 --- a/drivers/net/wireless/ath/carl9170/fwdesc.h +++ b/drivers/net/wireless/ath/carl9170/fwdesc.h @@ -149,7 +149,7 @@ struct carl9170fw_fix_entry { struct carl9170fw_fix_desc { struct carl9170fw_desc_head head; - struct carl9170fw_fix_entry data[0]; + struct carl9170fw_fix_entry data[]; } __packed; #define CARL9170FW_FIX_DESC_SIZE \ (sizeof(struct carl9170fw_fix_desc)) diff --git a/drivers/net/wireless/ath/carl9170/main.c b/drivers/net/wireless/ath/carl9170/main.c index 49f7ee1c912b..76e84adf57c1 100644 --- a/drivers/net/wireless/ath/carl9170/main.c +++ b/drivers/net/wireless/ath/carl9170/main.c @@ -1412,7 +1412,7 @@ static int carl9170_op_ampdu_action(struct ieee80211_hw *hw, return -EOPNOTSUPP; tid_info = kzalloc(sizeof(struct carl9170_sta_tid), - GFP_ATOMIC); + GFP_KERNEL); if (!tid_info) return -ENOMEM; @@ -1494,7 +1494,7 @@ static int carl9170_register_wps_button(struct ar9170 *ar) if (!(ar->features & CARL9170_WPS_BUTTON)) return 0; - input = input_allocate_device(); + input = devm_input_allocate_device(&ar->udev->dev); if (!input) return -ENOMEM; @@ -1512,10 +1512,8 @@ static int carl9170_register_wps_button(struct ar9170 *ar) input_set_capability(input, EV_KEY, KEY_WPS_BUTTON); err = input_register_device(input); - if (err) { - input_free_device(input); + if (err) return err; - } ar->wps.pbc = input; return 0; @@ -1539,7 +1537,7 @@ static int carl9170_rng_get(struct ar9170 *ar) BUILD_BUG_ON(RB > CARL9170_MAX_CMD_PAYLOAD_LEN); - if (!IS_ACCEPTING_CMD(ar) || !ar->rng.initialized) + if (!IS_ACCEPTING_CMD(ar)) return -EAGAIN; count = ARRAY_SIZE(ar->rng.cache); @@ -1585,14 +1583,6 @@ static int carl9170_rng_read(struct hwrng *rng, u32 *data) return sizeof(u16); } -static void carl9170_unregister_hwrng(struct ar9170 *ar) -{ - if (ar->rng.initialized) { - hwrng_unregister(&ar->rng.rng); - ar->rng.initialized = false; - } -} - static int carl9170_register_hwrng(struct ar9170 *ar) { int err; @@ -1603,25 +1593,14 @@ static int carl9170_register_hwrng(struct ar9170 *ar) ar->rng.rng.data_read = carl9170_rng_read; ar->rng.rng.priv = (unsigned long)ar; - if (WARN_ON(ar->rng.initialized)) - return -EALREADY; - - err = hwrng_register(&ar->rng.rng); + err = devm_hwrng_register(&ar->udev->dev, &ar->rng.rng); if (err) { dev_err(&ar->udev->dev, "Failed to register the random " "number generator (%d)\n", err); return err; } - ar->rng.initialized = true; - - err = carl9170_rng_get(ar); - if (err) { - carl9170_unregister_hwrng(ar); - return err; - } - - return 0; + return carl9170_rng_get(ar); } #endif /* CONFIG_CARL9170_HWRNG */ @@ -1914,7 +1893,7 @@ static int carl9170_parse_eeprom(struct ar9170 *ar) WARN_ON(!(tx_streams >= 1 && tx_streams <= IEEE80211_HT_MCS_TX_MAX_STREAMS)); - tx_params = (tx_streams - 1) << + tx_params |= (tx_streams - 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT; carl9170_band_2GHz.ht_cap.mcs.tx_params |= tx_params; @@ -1937,7 +1916,8 @@ static int carl9170_parse_eeprom(struct ar9170 *ar) if (!bands) return -EINVAL; - ar->survey = kcalloc(chans, sizeof(struct survey_info), GFP_KERNEL); + ar->survey = devm_kcalloc(&ar->udev->dev, chans, + sizeof(struct survey_info), GFP_KERNEL); if (!ar->survey) return -ENOMEM; ar->num_channels = chans; @@ -1964,11 +1944,7 @@ int carl9170_register(struct ar9170 *ar) struct ath_regulatory *regulatory = &ar->common.regulatory; int err = 0, i; - if (WARN_ON(ar->mem_bitmap)) - return -EINVAL; - - ar->mem_bitmap = bitmap_zalloc(ar->fw.mem_blocks, GFP_KERNEL); - + ar->mem_bitmap = devm_bitmap_zalloc(&ar->udev->dev, ar->fw.mem_blocks, GFP_KERNEL); if (!ar->mem_bitmap) return -ENOMEM; @@ -2057,17 +2033,6 @@ void carl9170_unregister(struct ar9170 *ar) carl9170_debugfs_unregister(ar); #endif /* CONFIG_CARL9170_DEBUGFS */ -#ifdef CONFIG_CARL9170_WPC - if (ar->wps.pbc) { - input_unregister_device(ar->wps.pbc); - ar->wps.pbc = NULL; - } -#endif /* CONFIG_CARL9170_WPC */ - -#ifdef CONFIG_CARL9170_HWRNG - carl9170_unregister_hwrng(ar); -#endif /* CONFIG_CARL9170_HWRNG */ - carl9170_cancel_worker(ar); cancel_work_sync(&ar->restart_work); @@ -2082,12 +2047,6 @@ void carl9170_free(struct ar9170 *ar) kfree_skb(ar->rx_failover); ar->rx_failover = NULL; - bitmap_free(ar->mem_bitmap); - ar->mem_bitmap = NULL; - - kfree(ar->survey); - ar->survey = NULL; - mutex_destroy(&ar->mutex); ieee80211_free_hw(ar->hw); diff --git a/drivers/net/wireless/ath/carl9170/wlan.h b/drivers/net/wireless/ath/carl9170/wlan.h index bb73553fd7c2..0a4e42e806b9 100644 --- a/drivers/net/wireless/ath/carl9170/wlan.h +++ b/drivers/net/wireless/ath/carl9170/wlan.h @@ -327,7 +327,7 @@ struct _carl9170_tx_superdesc { struct _carl9170_tx_superframe { struct _carl9170_tx_superdesc s; struct _ar9170_tx_hwdesc f; - u8 frame_data[0]; + u8 frame_data[]; } __packed __aligned(4); #define CARL9170_TX_SUPERDESC_LEN 24 diff --git a/drivers/net/wireless/ath/dfs_pattern_detector.c b/drivers/net/wireless/ath/dfs_pattern_detector.c index 75cb53a3ec15..27f4d74a41c8 100644 --- a/drivers/net/wireless/ath/dfs_pattern_detector.c +++ b/drivers/net/wireless/ath/dfs_pattern_detector.c @@ -197,7 +197,7 @@ static void channel_detector_exit(struct dfs_pattern_detector *dpd, static struct channel_detector * channel_detector_create(struct dfs_pattern_detector *dpd, u16 freq) { - u32 sz, i; + u32 i; struct channel_detector *cd; cd = kmalloc(sizeof(*cd), GFP_ATOMIC); @@ -206,8 +206,8 @@ channel_detector_create(struct dfs_pattern_detector *dpd, u16 freq) INIT_LIST_HEAD(&cd->head); cd->freq = freq; - sz = sizeof(cd->detectors) * dpd->num_radar_types; - cd->detectors = kzalloc(sz, GFP_ATOMIC); + cd->detectors = kmalloc_array(dpd->num_radar_types, + sizeof(*cd->detectors), GFP_ATOMIC); if (cd->detectors == NULL) goto fail; diff --git a/drivers/net/wireless/ath/regd.c b/drivers/net/wireless/ath/regd.c index b2400e2417a5..f15e7bd690b5 100644 --- a/drivers/net/wireless/ath/regd.c +++ b/drivers/net/wireless/ath/regd.c @@ -667,14 +667,14 @@ ath_regd_init_wiphy(struct ath_regulatory *reg, /* * Some users have reported their EEPROM programmed with - * 0x8000 or 0x0 set, this is not a supported regulatory - * domain but since we have more than one user with it we - * need a solution for them. We default to 0x64, which is - * the default Atheros world regulatory domain. + * 0x8000 set, this is not a supported regulatory domain + * but since we have more than one user with it we need + * a solution for them. We default to 0x64, which is the + * default Atheros world regulatory domain. */ static void ath_regd_sanitize(struct ath_regulatory *reg) { - if (reg->current_rd != COUNTRY_ERD_FLAG && reg->current_rd != 0) + if (reg->current_rd != COUNTRY_ERD_FLAG) return; printk(KERN_DEBUG "ath: EEPROM regdomain sanitized\n"); reg->current_rd = 0x64; diff --git a/drivers/net/wireless/ath/spectral_common.h b/drivers/net/wireless/ath/spectral_common.h index e14f374f97d4..fe187c1fbeb0 100644 --- a/drivers/net/wireless/ath/spectral_common.h +++ b/drivers/net/wireless/ath/spectral_common.h @@ -108,7 +108,7 @@ struct fft_sample_ath10k { u8 avgpwr_db; u8 max_exp; - u8 data[0]; + u8 data[]; } __packed; struct fft_sample_ath11k { @@ -123,7 +123,7 @@ struct fft_sample_ath11k { __be32 tsf; __be32 noise; - u8 data[0]; + u8 data[]; } __packed; #endif /* SPECTRAL_COMMON_H */ diff --git a/drivers/net/wireless/ath/wcn36xx/main.c b/drivers/net/wireless/ath/wcn36xx/main.c index 9575d7373bf2..95ea7d040d8c 100644 --- a/drivers/net/wireless/ath/wcn36xx/main.c +++ b/drivers/net/wireless/ath/wcn36xx/main.c @@ -331,6 +331,7 @@ static int wcn36xx_start(struct ieee80211_hw *hw) INIT_LIST_HEAD(&wcn->vif_list); spin_lock_init(&wcn->dxe_lock); + spin_lock_init(&wcn->survey_lock); return 0; @@ -392,11 +393,41 @@ static void wcn36xx_change_opchannel(struct wcn36xx *wcn, int ch) { struct ieee80211_vif *vif = NULL; struct wcn36xx_vif *tmp; + struct ieee80211_supported_band *band; + struct ieee80211_channel *channel = NULL; + unsigned long flags; + int i, j; + + for (i = 0; i < ARRAY_SIZE(wcn->hw->wiphy->bands); i++) { + band = wcn->hw->wiphy->bands[i]; + if (!band) + break; + for (j = 0; j < band->n_channels; j++) { + if (HW_VALUE_CHANNEL(band->channels[j].hw_value) == ch) { + channel = &band->channels[j]; + break; + } + } + if (channel) + break; + } + + if (!channel) { + wcn36xx_err("Cannot tune to channel %d\n", ch); + return; + } + + spin_lock_irqsave(&wcn->survey_lock, flags); + wcn->band = band; + wcn->channel = channel; + spin_unlock_irqrestore(&wcn->survey_lock, flags); list_for_each_entry(tmp, &wcn->vif_list, list) { vif = wcn36xx_priv_to_vif(tmp); wcn36xx_smd_switch_channel(wcn, vif, ch); } + + return; } static int wcn36xx_config(struct ieee80211_hw *hw, u32 changed) @@ -1326,6 +1357,49 @@ static void wcn36xx_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif, } } +static int wcn36xx_get_survey(struct ieee80211_hw *hw, int idx, + struct survey_info *survey) +{ + struct wcn36xx *wcn = hw->priv; + struct ieee80211_supported_band *sband; + struct wcn36xx_chan_survey *chan_survey; + int band_idx; + unsigned long flags; + + sband = wcn->hw->wiphy->bands[NL80211_BAND_2GHZ]; + band_idx = idx; + if (band_idx >= sband->n_channels) { + band_idx -= sband->n_channels; + sband = wcn->hw->wiphy->bands[NL80211_BAND_5GHZ]; + } + + if (!sband || band_idx >= sband->n_channels) + return -ENOENT; + + spin_lock_irqsave(&wcn->survey_lock, flags); + + chan_survey = &wcn->chan_survey[idx]; + survey->channel = &sband->channels[band_idx]; + survey->noise = chan_survey->rssi - chan_survey->snr; + survey->filled = 0; + + if (chan_survey->rssi > -100 && chan_survey->rssi < 0) + survey->filled |= SURVEY_INFO_NOISE_DBM; + + if (survey->channel == wcn->channel) + survey->filled |= SURVEY_INFO_IN_USE; + + spin_unlock_irqrestore(&wcn->survey_lock, flags); + + wcn36xx_dbg(WCN36XX_DBG_MAC, + "ch %d rssi %d snr %d noise %d filled %x freq %d\n", + HW_VALUE_CHANNEL(survey->channel->hw_value), + chan_survey->rssi, chan_survey->snr, survey->noise, + survey->filled, survey->channel->center_freq); + + return 0; +} + static const struct ieee80211_ops wcn36xx_ops = { .start = wcn36xx_start, .stop = wcn36xx_stop, @@ -1354,6 +1428,7 @@ static const struct ieee80211_ops wcn36xx_ops = { .ipv6_addr_change = wcn36xx_ipv6_addr_change, #endif .flush = wcn36xx_flush, + .get_survey = wcn36xx_get_survey, CFG80211_TESTMODE_CMD(wcn36xx_tm_cmd) }; @@ -1446,25 +1521,20 @@ static int wcn36xx_platform_get_resources(struct wcn36xx *wcn, { struct device_node *mmio_node; struct device_node *iris_node; - struct resource *res; int index; int ret; /* Set TX IRQ */ - res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "tx"); - if (!res) { - wcn36xx_err("failed to get tx_irq\n"); - return -ENOENT; - } - wcn->tx_irq = res->start; + ret = platform_get_irq_byname(pdev, "tx"); + if (ret < 0) + return ret; + wcn->tx_irq = ret; /* Set RX IRQ */ - res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "rx"); - if (!res) { - wcn36xx_err("failed to get rx_irq\n"); - return -ENOENT; - } - wcn->rx_irq = res->start; + ret = platform_get_irq_byname(pdev, "rx"); + if (ret < 0) + return ret; + wcn->rx_irq = ret; /* Acquire SMSM tx enable handle */ wcn->tx_enable_state = qcom_smem_state_get(&pdev->dev, @@ -1513,6 +1583,9 @@ static int wcn36xx_platform_get_resources(struct wcn36xx *wcn, if (iris_node) { if (of_device_is_compatible(iris_node, "qcom,wcn3620")) wcn->rf_id = RF_IRIS_WCN3620; + if (of_device_is_compatible(iris_node, "qcom,wcn3660") || + of_device_is_compatible(iris_node, "qcom,wcn3660b")) + wcn->rf_id = RF_IRIS_WCN3660; if (of_device_is_compatible(iris_node, "qcom,wcn3680")) wcn->rf_id = RF_IRIS_WCN3680; of_node_put(iris_node); @@ -1535,6 +1608,7 @@ static int wcn36xx_probe(struct platform_device *pdev) void *wcnss; int ret; const u8 *addr; + int n_channels; wcn36xx_dbg(WCN36XX_DBG_MAC, "platform probe\n"); @@ -1562,6 +1636,13 @@ static int wcn36xx_probe(struct platform_device *pdev) goto out_wq; } + n_channels = wcn_band_2ghz.n_channels + wcn_band_5ghz.n_channels; + wcn->chan_survey = devm_kmalloc(wcn->dev, n_channels, GFP_KERNEL); + if (!wcn->chan_survey) { + ret = -ENOMEM; + goto out_wq; + } + ret = dma_set_mask_and_coherent(wcn->dev, DMA_BIT_MASK(32)); if (ret < 0) { wcn36xx_err("failed to set DMA mask: %d\n", ret); diff --git a/drivers/net/wireless/ath/wcn36xx/smd.c b/drivers/net/wireless/ath/wcn36xx/smd.c index caeb68901326..59ad332156ae 100644 --- a/drivers/net/wireless/ath/wcn36xx/smd.c +++ b/drivers/net/wireless/ath/wcn36xx/smd.c @@ -3347,7 +3347,7 @@ int wcn36xx_smd_rsp_process(struct rpmsg_device *rpdev, case WCN36XX_HAL_DELETE_STA_CONTEXT_IND: case WCN36XX_HAL_PRINT_REG_INFO_IND: case WCN36XX_HAL_SCAN_OFFLOAD_IND: - msg_ind = kmalloc(sizeof(*msg_ind) + len, GFP_ATOMIC); + msg_ind = kmalloc(struct_size(msg_ind, msg, len), GFP_ATOMIC); if (!msg_ind) { wcn36xx_err("Run out of memory while handling SMD_EVENT (%d)\n", msg_header->msg_type); diff --git a/drivers/net/wireless/ath/wcn36xx/txrx.c b/drivers/net/wireless/ath/wcn36xx/txrx.c index dd58dde8c836..df749b114568 100644 --- a/drivers/net/wireless/ath/wcn36xx/txrx.c +++ b/drivers/net/wireless/ath/wcn36xx/txrx.c @@ -23,6 +23,11 @@ static inline int get_rssi0(struct wcn36xx_rx_bd *bd) return 100 - ((bd->phy_stat0 >> 24) & 0xff); } +static inline int get_snr(struct wcn36xx_rx_bd *bd) +{ + return ((bd->phy_stat1 >> 24) & 0xff); +} + struct wcn36xx_rate { u16 bitrate; u16 mcs_or_legacy_index; @@ -266,6 +271,34 @@ static void __skb_queue_purge_irq(struct sk_buff_head *list) dev_kfree_skb_irq(skb); } +static void wcn36xx_update_survey(struct wcn36xx *wcn, int rssi, int snr, + int band, int freq) +{ + static struct ieee80211_channel *channel; + struct ieee80211_supported_band *sband; + int idx; + int i; + + idx = 0; + if (band == NL80211_BAND_5GHZ) + idx = wcn->hw->wiphy->bands[NL80211_BAND_2GHZ]->n_channels; + + sband = wcn->hw->wiphy->bands[band]; + channel = sband->channels; + + for (i = 0; i < sband->n_channels; i++, channel++) { + if (channel->center_freq == freq) { + idx += i; + break; + } + } + + spin_lock(&wcn->survey_lock); + wcn->chan_survey[idx].rssi = rssi; + wcn->chan_survey[idx].snr = snr; + spin_unlock(&wcn->survey_lock); +} + int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb) { struct ieee80211_rx_status status; @@ -343,6 +376,9 @@ int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb) status.freq = WCN36XX_CENTER_FREQ(wcn); } + wcn36xx_update_survey(wcn, status.signal, get_snr(bd), + status.band, status.freq); + if (bd->rate_id < ARRAY_SIZE(wcn36xx_rate_table)) { rate = &wcn36xx_rate_table[bd->rate_id]; status.encoding = rate->encoding; diff --git a/drivers/net/wireless/ath/wcn36xx/wcn36xx.h b/drivers/net/wireless/ath/wcn36xx/wcn36xx.h index fbd0558c2c19..9aa08b636d08 100644 --- a/drivers/net/wireless/ath/wcn36xx/wcn36xx.h +++ b/drivers/net/wireless/ath/wcn36xx/wcn36xx.h @@ -97,6 +97,7 @@ enum wcn36xx_ampdu_state { #define RF_UNKNOWN 0x0000 #define RF_IRIS_WCN3620 0x3620 +#define RF_IRIS_WCN3660 0x3660 #define RF_IRIS_WCN3680 0x3680 static inline void buff_to_be(u32 *buf, size_t len) @@ -194,7 +195,14 @@ struct wcn36xx_sta { enum wcn36xx_ampdu_state ampdu_state[16]; int non_agg_frame_ct; }; + struct wcn36xx_dxe_ch; + +struct wcn36xx_chan_survey { + s8 rssi; + u8 snr; +}; + struct wcn36xx { struct ieee80211_hw *hw; struct device *dev; @@ -281,6 +289,12 @@ struct wcn36xx { /* Debug file system entry */ struct wcn36xx_dfs_entry dfs; #endif /* CONFIG_WCN36XX_DEBUGFS */ + + struct ieee80211_supported_band *band; + struct ieee80211_channel *channel; + + spinlock_t survey_lock; /* protects chan_survey */ + struct wcn36xx_chan_survey *chan_survey; }; static inline bool wcn36xx_is_fw_version(struct wcn36xx *wcn, diff --git a/drivers/net/wireless/ath/wil6210/txrx.c b/drivers/net/wireless/ath/wil6210/txrx.c index cc830c795b33..5704defd7be1 100644 --- a/drivers/net/wireless/ath/wil6210/txrx.c +++ b/drivers/net/wireless/ath/wil6210/txrx.c @@ -958,7 +958,7 @@ void wil_netif_rx(struct sk_buff *skb, struct net_device *ndev, int cid, if (gro) napi_gro_receive(&wil->napi_rx, skb); else - netif_rx_ni(skb); + netif_rx(skb); } ndev->stats.rx_packets++; stats->rx_packets++; diff --git a/drivers/net/wireless/ath/wil6210/wmi.c b/drivers/net/wireless/ath/wil6210/wmi.c index dd8abbb28849..98b4c189eecc 100644 --- a/drivers/net/wireless/ath/wil6210/wmi.c +++ b/drivers/net/wireless/ath/wil6210/wmi.c @@ -1199,7 +1199,7 @@ static void wmi_evt_eapol_rx(struct wil6210_vif *vif, int id, void *d, int len) eth->h_proto = cpu_to_be16(ETH_P_PAE); skb_put_data(skb, evt->eapol, eapol_len); skb->protocol = eth_type_trans(skb, ndev); - if (likely(netif_rx_ni(skb) == NET_RX_SUCCESS)) { + if (likely(netif_rx(skb) == NET_RX_SUCCESS)) { ndev->stats.rx_packets++; ndev->stats.rx_bytes += sz; if (stats) { diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c index 3984fd7d918e..2c95a08a5871 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcdc.c @@ -397,9 +397,9 @@ brcmf_proto_bcdc_add_tdls_peer(struct brcmf_pub *drvr, int ifidx, } static void brcmf_proto_bcdc_rxreorder(struct brcmf_if *ifp, - struct sk_buff *skb, bool inirq) + struct sk_buff *skb) { - brcmf_fws_rxreorder(ifp, skb, inirq); + brcmf_fws_rxreorder(ifp, skb); } static void diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c index ba52318615ae..f0ad1e23f3c8 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c @@ -16,6 +16,7 @@ #include <brcmu_utils.h> #include <defs.h> #include <brcmu_wifi.h> +#include <brcm_hw_ids.h> #include "core.h" #include "debug.h" #include "tracepoint.h" @@ -4622,7 +4623,7 @@ exit: s32 brcmf_vif_clear_mgmt_ies(struct brcmf_cfg80211_vif *vif) { - s32 pktflags[] = { + static const s32 pktflags[] = { BRCMF_VNDR_IE_PRBREQ_FLAG, BRCMF_VNDR_IE_PRBRSP_FLAG, BRCMF_VNDR_IE_BEACON_FLAG @@ -7476,6 +7477,16 @@ int brcmf_cfg80211_wait_vif_event(struct brcmf_cfg80211_info *cfg, vif_event_equals(event, action), timeout); } +static bool brmcf_use_iso3166_ccode_fallback(struct brcmf_pub *drvr) +{ + switch (drvr->bus_if->chip) { + case BRCM_CC_4345_CHIP_ID: + return true; + default: + return false; + } +} + static s32 brcmf_translate_country_code(struct brcmf_pub *drvr, char alpha2[2], struct brcmf_fil_country_le *ccreq) { @@ -7484,18 +7495,28 @@ static s32 brcmf_translate_country_code(struct brcmf_pub *drvr, char alpha2[2], s32 found_index; int i; - country_codes = drvr->settings->country_codes; - if (!country_codes) { - brcmf_dbg(TRACE, "No country codes configured for device\n"); - return -EINVAL; - } - if ((alpha2[0] == ccreq->country_abbrev[0]) && (alpha2[1] == ccreq->country_abbrev[1])) { brcmf_dbg(TRACE, "Country code already set\n"); return -EAGAIN; } + country_codes = drvr->settings->country_codes; + if (!country_codes) { + if (brmcf_use_iso3166_ccode_fallback(drvr)) { + brcmf_dbg(TRACE, "No country codes configured for device, using ISO3166 code and 0 rev\n"); + memset(ccreq, 0, sizeof(*ccreq)); + ccreq->country_abbrev[0] = alpha2[0]; + ccreq->country_abbrev[1] = alpha2[1]; + ccreq->ccode[0] = alpha2[0]; + ccreq->ccode[1] = alpha2[1]; + return 0; + } + + brcmf_dbg(TRACE, "No country codes configured for device\n"); + return -EINVAL; + } + found_index = -1; for (i = 0; i < country_codes->table_size; i++) { cc = &country_codes->table[i]; diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c index 1ee49f9e325d..4ec7773b6906 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c @@ -704,6 +704,7 @@ static u32 brcmf_chip_tcm_rambase(struct brcmf_chip_priv *ci) { switch (ci->pub.chip) { case BRCM_CC_4345_CHIP_ID: + case BRCM_CC_43454_CHIP_ID: return 0x198000; case BRCM_CC_4335_CHIP_ID: case BRCM_CC_4339_CHIP_ID: @@ -1401,6 +1402,7 @@ bool brcmf_chip_sr_capable(struct brcmf_chip *pub) case BRCM_CC_4354_CHIP_ID: case BRCM_CC_4356_CHIP_ID: case BRCM_CC_4345_CHIP_ID: + case BRCM_CC_43454_CHIP_ID: /* explicitly check SR engine enable bit */ pmu_cc3_mask = BIT(2); fallthrough; diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c index fed9cd5f29a2..26fab4bee22c 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.c @@ -400,7 +400,7 @@ void brcmf_txflowblock_if(struct brcmf_if *ifp, spin_unlock_irqrestore(&ifp->netif_stop_lock, flags); } -void brcmf_netif_rx(struct brcmf_if *ifp, struct sk_buff *skb, bool inirq) +void brcmf_netif_rx(struct brcmf_if *ifp, struct sk_buff *skb) { /* Most of Broadcom's firmwares send 802.11f ADD frame every time a new * STA connects to the AP interface. This is an obsoleted standard most @@ -423,15 +423,7 @@ void brcmf_netif_rx(struct brcmf_if *ifp, struct sk_buff *skb, bool inirq) ifp->ndev->stats.rx_packets++; brcmf_dbg(DATA, "rx proto=0x%X\n", ntohs(skb->protocol)); - if (inirq) { - netif_rx(skb); - } else { - /* If the receive is not processed inside an ISR, - * the softirqd must be woken explicitly to service - * the NET_RX_SOFTIRQ. This is handled by netif_rx_ni(). - */ - netif_rx_ni(skb); - } + netif_rx(skb); } void brcmf_netif_mon_rx(struct brcmf_if *ifp, struct sk_buff *skb) @@ -480,7 +472,7 @@ void brcmf_netif_mon_rx(struct brcmf_if *ifp, struct sk_buff *skb) skb->pkt_type = PACKET_OTHERHOST; skb->protocol = htons(ETH_P_802_2); - brcmf_netif_rx(ifp, skb, false); + brcmf_netif_rx(ifp, skb); } static int brcmf_rx_hdrpull(struct brcmf_pub *drvr, struct sk_buff *skb, @@ -515,7 +507,7 @@ void brcmf_rx_frame(struct device *dev, struct sk_buff *skb, bool handle_event, return; if (brcmf_proto_is_reorder_skb(skb)) { - brcmf_proto_rxreorder(ifp, skb, inirq); + brcmf_proto_rxreorder(ifp, skb); } else { /* Process special event packets */ if (handle_event) { @@ -524,7 +516,7 @@ void brcmf_rx_frame(struct device *dev, struct sk_buff *skb, bool handle_event, brcmf_fweh_process_skb(ifp->drvr, skb, BCMILCP_SUBTYPE_VENDOR_LONG, gfp); } - brcmf_netif_rx(ifp, skb, inirq); + brcmf_netif_rx(ifp, skb); } } diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h index 8212c9de14f1..340346c122d3 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/core.h @@ -208,7 +208,7 @@ void brcmf_remove_interface(struct brcmf_if *ifp, bool locked); void brcmf_txflowblock_if(struct brcmf_if *ifp, enum brcmf_netif_stop_reason reason, bool state); void brcmf_txfinalize(struct brcmf_if *ifp, struct sk_buff *txp, bool success); -void brcmf_netif_rx(struct brcmf_if *ifp, struct sk_buff *skb, bool inirq); +void brcmf_netif_rx(struct brcmf_if *ifp, struct sk_buff *skb); void brcmf_netif_mon_rx(struct brcmf_if *ifp, struct sk_buff *skb); void brcmf_net_detach(struct net_device *ndev, bool locked); int brcmf_net_mon_attach(struct brcmf_if *ifp); diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c index 7c68d9849324..d2ac844e1e9f 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/feature.c @@ -248,7 +248,8 @@ void brcmf_feat_attach(struct brcmf_pub *drvr) brcmf_feat_firmware_capabilities(ifp); memset(&gscan_cfg, 0, sizeof(gscan_cfg)); if (drvr->bus_if->chip != BRCM_CC_43430_CHIP_ID && - drvr->bus_if->chip != BRCM_CC_4345_CHIP_ID) + drvr->bus_if->chip != BRCM_CC_4345_CHIP_ID && + drvr->bus_if->chip != BRCM_CC_43454_CHIP_ID) brcmf_feat_iovar_data_set(ifp, BRCMF_FEAT_GSCAN, "pfn_gscan_cfg", &gscan_cfg, sizeof(gscan_cfg)); diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c index d99140960a82..dcbe55b56e43 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c @@ -207,6 +207,8 @@ static int brcmf_init_nvram_parser(struct nvram_parser *nvp, size = BRCMF_FW_MAX_NVRAM_SIZE; else size = data_len; + /* Add space for properties we may add */ + size += strlen(BRCMF_FW_DEFAULT_BOARDREV) + 1; /* Alloc for extra 0 byte + roundup by 4 + length field */ size += 1 + 3 + sizeof(u32); nvp->nvram = kzalloc(size, GFP_KERNEL); diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.c index d5578ca681bb..72fe8bce6eaf 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.c @@ -192,7 +192,7 @@ brcmf_fil_cmd_int_get(struct brcmf_if *ifp, u32 cmd, u32 *data) } static u32 -brcmf_create_iovar(char *name, const char *data, u32 datalen, +brcmf_create_iovar(const char *name, const char *data, u32 datalen, char *buf, u32 buflen) { u32 len; @@ -213,7 +213,7 @@ brcmf_create_iovar(char *name, const char *data, u32 datalen, s32 -brcmf_fil_iovar_data_set(struct brcmf_if *ifp, char *name, const void *data, +brcmf_fil_iovar_data_set(struct brcmf_if *ifp, const char *name, const void *data, u32 len) { struct brcmf_pub *drvr = ifp->drvr; @@ -241,7 +241,7 @@ brcmf_fil_iovar_data_set(struct brcmf_if *ifp, char *name, const void *data, } s32 -brcmf_fil_iovar_data_get(struct brcmf_if *ifp, char *name, void *data, +brcmf_fil_iovar_data_get(struct brcmf_if *ifp, const char *name, void *data, u32 len) { struct brcmf_pub *drvr = ifp->drvr; @@ -272,7 +272,7 @@ brcmf_fil_iovar_data_get(struct brcmf_if *ifp, char *name, void *data, } s32 -brcmf_fil_iovar_int_set(struct brcmf_if *ifp, char *name, u32 data) +brcmf_fil_iovar_int_set(struct brcmf_if *ifp, const char *name, u32 data) { __le32 data_le = cpu_to_le32(data); @@ -280,7 +280,7 @@ brcmf_fil_iovar_int_set(struct brcmf_if *ifp, char *name, u32 data) } s32 -brcmf_fil_iovar_int_get(struct brcmf_if *ifp, char *name, u32 *data) +brcmf_fil_iovar_int_get(struct brcmf_if *ifp, const char *name, u32 *data) { __le32 data_le = cpu_to_le32(*data); s32 err; @@ -292,7 +292,7 @@ brcmf_fil_iovar_int_get(struct brcmf_if *ifp, char *name, u32 *data) } static u32 -brcmf_create_bsscfg(s32 bsscfgidx, char *name, char *data, u32 datalen, +brcmf_create_bsscfg(s32 bsscfgidx, const char *name, char *data, u32 datalen, char *buf, u32 buflen) { const s8 *prefix = "bsscfg:"; @@ -337,7 +337,7 @@ brcmf_create_bsscfg(s32 bsscfgidx, char *name, char *data, u32 datalen, } s32 -brcmf_fil_bsscfg_data_set(struct brcmf_if *ifp, char *name, +brcmf_fil_bsscfg_data_set(struct brcmf_if *ifp, const char *name, void *data, u32 len) { struct brcmf_pub *drvr = ifp->drvr; @@ -366,7 +366,7 @@ brcmf_fil_bsscfg_data_set(struct brcmf_if *ifp, char *name, } s32 -brcmf_fil_bsscfg_data_get(struct brcmf_if *ifp, char *name, +brcmf_fil_bsscfg_data_get(struct brcmf_if *ifp, const char *name, void *data, u32 len) { struct brcmf_pub *drvr = ifp->drvr; @@ -396,7 +396,7 @@ brcmf_fil_bsscfg_data_get(struct brcmf_if *ifp, char *name, } s32 -brcmf_fil_bsscfg_int_set(struct brcmf_if *ifp, char *name, u32 data) +brcmf_fil_bsscfg_int_set(struct brcmf_if *ifp, const char *name, u32 data) { __le32 data_le = cpu_to_le32(data); @@ -405,7 +405,7 @@ brcmf_fil_bsscfg_int_set(struct brcmf_if *ifp, char *name, u32 data) } s32 -brcmf_fil_bsscfg_int_get(struct brcmf_if *ifp, char *name, u32 *data) +brcmf_fil_bsscfg_int_get(struct brcmf_if *ifp, const char *name, u32 *data) { __le32 data_le = cpu_to_le32(*data); s32 err; @@ -417,7 +417,7 @@ brcmf_fil_bsscfg_int_get(struct brcmf_if *ifp, char *name, u32 *data) return err; } -static u32 brcmf_create_xtlv(char *name, u16 id, char *data, u32 len, +static u32 brcmf_create_xtlv(const char *name, u16 id, char *data, u32 len, char *buf, u32 buflen) { u32 iolen; @@ -438,7 +438,7 @@ static u32 brcmf_create_xtlv(char *name, u16 id, char *data, u32 len, return iolen; } -s32 brcmf_fil_xtlv_data_set(struct brcmf_if *ifp, char *name, u16 id, +s32 brcmf_fil_xtlv_data_set(struct brcmf_if *ifp, const char *name, u16 id, void *data, u32 len) { struct brcmf_pub *drvr = ifp->drvr; @@ -466,7 +466,7 @@ s32 brcmf_fil_xtlv_data_set(struct brcmf_if *ifp, char *name, u16 id, return err; } -s32 brcmf_fil_xtlv_data_get(struct brcmf_if *ifp, char *name, u16 id, +s32 brcmf_fil_xtlv_data_get(struct brcmf_if *ifp, const char *name, u16 id, void *data, u32 len) { struct brcmf_pub *drvr = ifp->drvr; @@ -495,7 +495,7 @@ s32 brcmf_fil_xtlv_data_get(struct brcmf_if *ifp, char *name, u16 id, return err; } -s32 brcmf_fil_xtlv_int_set(struct brcmf_if *ifp, char *name, u16 id, u32 data) +s32 brcmf_fil_xtlv_int_set(struct brcmf_if *ifp, const char *name, u16 id, u32 data) { __le32 data_le = cpu_to_le32(data); @@ -503,7 +503,7 @@ s32 brcmf_fil_xtlv_int_set(struct brcmf_if *ifp, char *name, u16 id, u32 data) sizeof(data_le)); } -s32 brcmf_fil_xtlv_int_get(struct brcmf_if *ifp, char *name, u16 id, u32 *data) +s32 brcmf_fil_xtlv_int_get(struct brcmf_if *ifp, const char *name, u16 id, u32 *data) { __le32 data_le = cpu_to_le32(*data); s32 err; @@ -514,12 +514,12 @@ s32 brcmf_fil_xtlv_int_get(struct brcmf_if *ifp, char *name, u16 id, u32 *data) return err; } -s32 brcmf_fil_xtlv_int8_get(struct brcmf_if *ifp, char *name, u16 id, u8 *data) +s32 brcmf_fil_xtlv_int8_get(struct brcmf_if *ifp, const char *name, u16 id, u8 *data) { return brcmf_fil_xtlv_data_get(ifp, name, id, data, sizeof(*data)); } -s32 brcmf_fil_xtlv_int16_get(struct brcmf_if *ifp, char *name, u16 id, u16 *data) +s32 brcmf_fil_xtlv_int16_get(struct brcmf_if *ifp, const char *name, u16 id, u16 *data) { __le16 data_le = cpu_to_le16(*data); s32 err; diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.h index cb26f8c59c21..bc693157c4b1 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.h +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil.h @@ -84,26 +84,26 @@ s32 brcmf_fil_cmd_data_get(struct brcmf_if *ifp, u32 cmd, void *data, u32 len); s32 brcmf_fil_cmd_int_set(struct brcmf_if *ifp, u32 cmd, u32 data); s32 brcmf_fil_cmd_int_get(struct brcmf_if *ifp, u32 cmd, u32 *data); -s32 brcmf_fil_iovar_data_set(struct brcmf_if *ifp, char *name, const void *data, +s32 brcmf_fil_iovar_data_set(struct brcmf_if *ifp, const char *name, const void *data, u32 len); -s32 brcmf_fil_iovar_data_get(struct brcmf_if *ifp, char *name, void *data, +s32 brcmf_fil_iovar_data_get(struct brcmf_if *ifp, const char *name, void *data, u32 len); -s32 brcmf_fil_iovar_int_set(struct brcmf_if *ifp, char *name, u32 data); -s32 brcmf_fil_iovar_int_get(struct brcmf_if *ifp, char *name, u32 *data); +s32 brcmf_fil_iovar_int_set(struct brcmf_if *ifp, const char *name, u32 data); +s32 brcmf_fil_iovar_int_get(struct brcmf_if *ifp, const char *name, u32 *data); -s32 brcmf_fil_bsscfg_data_set(struct brcmf_if *ifp, char *name, void *data, +s32 brcmf_fil_bsscfg_data_set(struct brcmf_if *ifp, const char *name, void *data, u32 len); -s32 brcmf_fil_bsscfg_data_get(struct brcmf_if *ifp, char *name, void *data, +s32 brcmf_fil_bsscfg_data_get(struct brcmf_if *ifp, const char *name, void *data, u32 len); -s32 brcmf_fil_bsscfg_int_set(struct brcmf_if *ifp, char *name, u32 data); -s32 brcmf_fil_bsscfg_int_get(struct brcmf_if *ifp, char *name, u32 *data); -s32 brcmf_fil_xtlv_data_set(struct brcmf_if *ifp, char *name, u16 id, +s32 brcmf_fil_bsscfg_int_set(struct brcmf_if *ifp, const char *name, u32 data); +s32 brcmf_fil_bsscfg_int_get(struct brcmf_if *ifp, const char *name, u32 *data); +s32 brcmf_fil_xtlv_data_set(struct brcmf_if *ifp, const char *name, u16 id, void *data, u32 len); -s32 brcmf_fil_xtlv_data_get(struct brcmf_if *ifp, char *name, u16 id, +s32 brcmf_fil_xtlv_data_get(struct brcmf_if *ifp, const char *name, u16 id, void *data, u32 len); -s32 brcmf_fil_xtlv_int_set(struct brcmf_if *ifp, char *name, u16 id, u32 data); -s32 brcmf_fil_xtlv_int_get(struct brcmf_if *ifp, char *name, u16 id, u32 *data); -s32 brcmf_fil_xtlv_int8_get(struct brcmf_if *ifp, char *name, u16 id, u8 *data); -s32 brcmf_fil_xtlv_int16_get(struct brcmf_if *ifp, char *name, u16 id, u16 *data); +s32 brcmf_fil_xtlv_int_set(struct brcmf_if *ifp, const char *name, u16 id, u32 data); +s32 brcmf_fil_xtlv_int_get(struct brcmf_if *ifp, const char *name, u16 id, u32 *data); +s32 brcmf_fil_xtlv_int8_get(struct brcmf_if *ifp, const char *name, u16 id, u8 *data); +s32 brcmf_fil_xtlv_int16_get(struct brcmf_if *ifp, const char *name, u16 id, u16 *data); #endif /* _fwil_h_ */ diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil_types.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil_types.h index e69d1e56996f..c87b829adb0d 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil_types.h +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil_types.h @@ -1068,7 +1068,7 @@ struct brcmf_mkeep_alive_pkt_le { __le32 period_msec; __le16 len_bytes; u8 keep_alive_id; - u8 data[0]; + u8 data[]; } __packed; #endif /* FWIL_TYPES_H_ */ diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c index 19b0f318f93e..d58525ebe618 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.c @@ -1664,7 +1664,7 @@ static void brcmf_rxreorder_get_skb_list(struct brcmf_ampdu_rx_reorder *rfi, rfi->pend_pkts -= skb_queue_len(skb_list); } -void brcmf_fws_rxreorder(struct brcmf_if *ifp, struct sk_buff *pkt, bool inirq) +void brcmf_fws_rxreorder(struct brcmf_if *ifp, struct sk_buff *pkt) { struct brcmf_pub *drvr = ifp->drvr; u8 *reorder_data; @@ -1682,7 +1682,7 @@ void brcmf_fws_rxreorder(struct brcmf_if *ifp, struct sk_buff *pkt, bool inirq) /* validate flags and flow id */ if (flags == 0xFF) { bphy_err(drvr, "invalid flags...so ignore this packet\n"); - brcmf_netif_rx(ifp, pkt, inirq); + brcmf_netif_rx(ifp, pkt); return; } @@ -1694,7 +1694,7 @@ void brcmf_fws_rxreorder(struct brcmf_if *ifp, struct sk_buff *pkt, bool inirq) if (rfi == NULL) { brcmf_dbg(INFO, "received flags to cleanup, but no flow (%d) yet\n", flow_id); - brcmf_netif_rx(ifp, pkt, inirq); + brcmf_netif_rx(ifp, pkt); return; } @@ -1719,7 +1719,7 @@ void brcmf_fws_rxreorder(struct brcmf_if *ifp, struct sk_buff *pkt, bool inirq) rfi = kzalloc(buf_size, GFP_ATOMIC); if (rfi == NULL) { bphy_err(drvr, "failed to alloc buffer\n"); - brcmf_netif_rx(ifp, pkt, inirq); + brcmf_netif_rx(ifp, pkt); return; } @@ -1833,7 +1833,7 @@ void brcmf_fws_rxreorder(struct brcmf_if *ifp, struct sk_buff *pkt, bool inirq) netif_rx: skb_queue_walk_safe(&reorder_list, pkt, pnext) { __skb_unlink(pkt, &reorder_list); - brcmf_netif_rx(ifp, pkt, inirq); + brcmf_netif_rx(ifp, pkt); } } diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h index 50e424b5880d..b16a9d1c0508 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwsignal.h @@ -42,6 +42,6 @@ void brcmf_fws_add_interface(struct brcmf_if *ifp); void brcmf_fws_del_interface(struct brcmf_if *ifp); void brcmf_fws_bustxfail(struct brcmf_fws_info *fws, struct sk_buff *skb); void brcmf_fws_bus_blocked(struct brcmf_pub *drvr, bool flow_blocked); -void brcmf_fws_rxreorder(struct brcmf_if *ifp, struct sk_buff *skb, bool inirq); +void brcmf_fws_rxreorder(struct brcmf_if *ifp, struct sk_buff *skb); #endif /* FWSIGNAL_H_ */ diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.c index 7c8e08ee8f0f..b2d0f7570aa9 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.c @@ -536,8 +536,7 @@ static int brcmf_msgbuf_hdrpull(struct brcmf_pub *drvr, bool do_fws, return -ENODEV; } -static void brcmf_msgbuf_rxreorder(struct brcmf_if *ifp, struct sk_buff *skb, - bool inirq) +static void brcmf_msgbuf_rxreorder(struct brcmf_if *ifp, struct sk_buff *skb) { } @@ -1191,7 +1190,7 @@ brcmf_msgbuf_process_rx_complete(struct brcmf_msgbuf *msgbuf, void *buf) } skb->protocol = eth_type_trans(skb, ifp->ndev); - brcmf_netif_rx(ifp, skb, false); + brcmf_netif_rx(ifp, skb); } static void brcmf_msgbuf_process_gen_status(struct brcmf_msgbuf *msgbuf, diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c index 513c7e6421b2..8623bde5eb70 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.c @@ -71,16 +71,18 @@ void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type, /* Set board-type to the first string of the machine compatible prop */ root = of_find_node_by_path("/"); if (root) { - int i, len; + int i; char *board_type; const char *tmp; of_property_read_string_index(root, "compatible", 0, &tmp); /* get rid of '/' in the compatible string to be able to find the FW */ - len = strlen(tmp) + 1; - board_type = devm_kzalloc(dev, len, GFP_KERNEL); - strscpy(board_type, tmp, len); + board_type = devm_kstrdup(dev, tmp, GFP_KERNEL); + if (!board_type) { + of_node_put(root); + return; + } for (i = 0; i < board_type[i]; i++) { if (board_type[i] == '/') board_type[i] = '-'; diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c index 4735063e4c03..479041f070f9 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/p2p.c @@ -90,8 +90,8 @@ #define P2PSD_ACTION_CATEGORY 0x04 /* Public action frame */ #define P2PSD_ACTION_ID_GAS_IREQ 0x0a /* GAS Initial Request AF */ #define P2PSD_ACTION_ID_GAS_IRESP 0x0b /* GAS Initial Response AF */ -#define P2PSD_ACTION_ID_GAS_CREQ 0x0c /* GAS Comback Request AF */ -#define P2PSD_ACTION_ID_GAS_CRESP 0x0d /* GAS Comback Response AF */ +#define P2PSD_ACTION_ID_GAS_CREQ 0x0c /* GAS Comeback Request AF */ +#define P2PSD_ACTION_ID_GAS_CRESP 0x0d /* GAS Comeback Response AF */ #define BRCMF_P2P_DISABLE_TIMEOUT msecs_to_jiffies(500) @@ -158,7 +158,7 @@ struct brcmf_p2p_pub_act_frame { u8 oui_type; u8 subtype; u8 dialog_token; - u8 elts[1]; + u8 elts[]; }; /** @@ -177,7 +177,7 @@ struct brcmf_p2p_action_frame { u8 type; u8 subtype; u8 dialog_token; - u8 elts[1]; + u8 elts[]; }; /** @@ -192,7 +192,7 @@ struct brcmf_p2psd_gas_pub_act_frame { u8 category; u8 action; u8 dialog_token; - u8 query_data[1]; + u8 query_data[]; }; /** @@ -225,7 +225,7 @@ static bool brcmf_p2p_is_pub_action(void *frame, u32 frame_len) return false; pact_frm = (struct brcmf_p2p_pub_act_frame *)frame; - if (frame_len < sizeof(struct brcmf_p2p_pub_act_frame) - 1) + if (frame_len < sizeof(*pact_frm)) return false; if (pact_frm->category == P2P_PUB_AF_CATEGORY && @@ -253,7 +253,7 @@ static bool brcmf_p2p_is_p2p_action(void *frame, u32 frame_len) return false; act_frm = (struct brcmf_p2p_action_frame *)frame; - if (frame_len < sizeof(struct brcmf_p2p_action_frame) - 1) + if (frame_len < sizeof(*act_frm)) return false; if (act_frm->category == P2P_AF_CATEGORY && @@ -280,7 +280,7 @@ static bool brcmf_p2p_is_gas_action(void *frame, u32 frame_len) return false; sd_act_frm = (struct brcmf_p2psd_gas_pub_act_frame *)frame; - if (frame_len < sizeof(struct brcmf_p2psd_gas_pub_act_frame) - 1) + if (frame_len < sizeof(*sd_act_frm)) return false; if (sd_act_frm->category != P2PSD_ACTION_CATEGORY) @@ -396,11 +396,11 @@ static void brcmf_p2p_print_actframe(bool tx, void *frame, u32 frame_len) (tx) ? "TX" : "RX"); break; case P2PSD_ACTION_ID_GAS_CREQ: - brcmf_dbg(TRACE, "%s P2P GAS Comback Request\n", + brcmf_dbg(TRACE, "%s P2P GAS Comeback Request\n", (tx) ? "TX" : "RX"); break; case P2PSD_ACTION_ID_GAS_CRESP: - brcmf_dbg(TRACE, "%s P2P GAS Comback Response\n", + brcmf_dbg(TRACE, "%s P2P GAS Comeback Response\n", (tx) ? "TX" : "RX"); break; default: diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c index 8b149996fc00..97f0f13dfe50 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c @@ -12,6 +12,7 @@ #include <linux/interrupt.h> #include <linux/bcma/bcma.h> #include <linux/sched.h> +#include <linux/io.h> #include <asm/unaligned.h> #include <soc.h> @@ -59,6 +60,13 @@ BRCMF_FW_DEF(4366B, "brcmfmac4366b-pcie"); BRCMF_FW_DEF(4366C, "brcmfmac4366c-pcie"); BRCMF_FW_DEF(4371, "brcmfmac4371-pcie"); +/* firmware config files */ +MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "brcmfmac*-pcie.txt"); +MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "brcmfmac*-pcie.*.txt"); + +/* per-board firmware binaries */ +MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "brcmfmac*-pcie.*.bin"); + static const struct brcmf_firmware_mapping brcmf_pcie_fwnames[] = { BRCMF_FW_ENTRY(BRCM_CC_43602_CHIP_ID, 0xFFFFFFFF, 43602), BRCMF_FW_ENTRY(BRCM_CC_43465_CHIP_ID, 0xFFFFFFF0, 4366C), @@ -448,47 +456,6 @@ brcmf_pcie_write_ram32(struct brcmf_pciedev_info *devinfo, u32 mem_offset, static void -brcmf_pcie_copy_mem_todev(struct brcmf_pciedev_info *devinfo, u32 mem_offset, - void *srcaddr, u32 len) -{ - void __iomem *address = devinfo->tcm + mem_offset; - __le32 *src32; - __le16 *src16; - u8 *src8; - - if (((ulong)address & 4) || ((ulong)srcaddr & 4) || (len & 4)) { - if (((ulong)address & 2) || ((ulong)srcaddr & 2) || (len & 2)) { - src8 = (u8 *)srcaddr; - while (len) { - iowrite8(*src8, address); - address++; - src8++; - len--; - } - } else { - len = len / 2; - src16 = (__le16 *)srcaddr; - while (len) { - iowrite16(le16_to_cpu(*src16), address); - address += 2; - src16++; - len--; - } - } - } else { - len = len / 4; - src32 = (__le32 *)srcaddr; - while (len) { - iowrite32(le32_to_cpu(*src32), address); - address += 4; - src32++; - len--; - } - } -} - - -static void brcmf_pcie_copy_dev_tomem(struct brcmf_pciedev_info *devinfo, u32 mem_offset, void *dstaddr, u32 len) { @@ -777,6 +744,8 @@ static void brcmf_pcie_bus_console_read(struct brcmf_pciedev_info *devinfo, return; console = &devinfo->shared.console; + if (!console->base_addr) + return; addr = console->base_addr + BRCMF_CONSOLE_WRITEIDX_OFFSET; newidx = brcmf_pcie_read_tcm32(devinfo, addr); while (newidx != console->read_idx) { @@ -1348,6 +1317,18 @@ static void brcmf_pcie_down(struct device *dev) { } +static int brcmf_pcie_preinit(struct device *dev) +{ + struct brcmf_bus *bus_if = dev_get_drvdata(dev); + struct brcmf_pciedev *buspub = bus_if->bus_priv.pcie; + + brcmf_dbg(PCIE, "Enter\n"); + + brcmf_pcie_intr_enable(buspub->devinfo); + brcmf_pcie_hostready(buspub->devinfo); + + return 0; +} static int brcmf_pcie_tx(struct device *dev, struct sk_buff *skb) { @@ -1456,6 +1437,7 @@ static int brcmf_pcie_reset(struct device *dev) } static const struct brcmf_bus_ops brcmf_pcie_bus_ops = { + .preinit = brcmf_pcie_preinit, .txdata = brcmf_pcie_tx, .stop = brcmf_pcie_down, .txctl = brcmf_pcie_tx_ctlpkt, @@ -1540,6 +1522,7 @@ brcmf_pcie_init_share_ram_info(struct brcmf_pciedev_info *devinfo, shared->max_rxbufpost, shared->rx_dataoffset); brcmf_pcie_bus_console_init(devinfo); + brcmf_pcie_bus_console_read(devinfo, false); return 0; } @@ -1563,8 +1546,8 @@ static int brcmf_pcie_download_fw_nvram(struct brcmf_pciedev_info *devinfo, return err; brcmf_dbg(PCIE, "Download FW %s\n", devinfo->fw_name); - brcmf_pcie_copy_mem_todev(devinfo, devinfo->ci->rambase, - (void *)fw->data, fw->size); + memcpy_toio(devinfo->tcm + devinfo->ci->rambase, + (void *)fw->data, fw->size); resetintr = get_unaligned_le32(fw->data); release_firmware(fw); @@ -1578,7 +1561,7 @@ static int brcmf_pcie_download_fw_nvram(struct brcmf_pciedev_info *devinfo, brcmf_dbg(PCIE, "Download NVRAM %s\n", devinfo->nvram_name); address = devinfo->ci->rambase + devinfo->ci->ramsize - nvram_len; - brcmf_pcie_copy_mem_todev(devinfo, address, nvram, nvram_len); + memcpy_toio(devinfo->tcm + address, nvram, nvram_len); brcmf_fw_nvram_free(nvram); } else { brcmf_dbg(PCIE, "No matching NVRAM file found %s\n", @@ -1777,6 +1760,8 @@ static void brcmf_pcie_setup(struct device *dev, int ret, ret = brcmf_chip_get_raminfo(devinfo->ci); if (ret) { brcmf_err(bus, "Failed to get RAM info\n"); + release_firmware(fw); + brcmf_fw_nvram_free(nvram); goto fail; } @@ -1826,9 +1811,6 @@ static void brcmf_pcie_setup(struct device *dev, int ret, init_waitqueue_head(&devinfo->mbdata_resp_wait); - brcmf_pcie_intr_enable(devinfo); - brcmf_pcie_hostready(devinfo); - ret = brcmf_attach(&devinfo->pdev->dev); if (ret) goto fail; @@ -1980,6 +1962,7 @@ brcmf_pcie_remove(struct pci_dev *pdev) return; devinfo = bus->bus_priv.pcie->devinfo; + brcmf_pcie_bus_console_read(devinfo, false); devinfo->state = BRCMFMAC_PCIE_STATE_DOWN; if (devinfo->ci) @@ -2106,6 +2089,7 @@ static const struct pci_device_id brcmf_pcie_devid_table[] = { BRCMF_PCIE_DEVICE(BRCM_PCIE_4356_DEVICE_ID), BRCMF_PCIE_DEVICE(BRCM_PCIE_43567_DEVICE_ID), BRCMF_PCIE_DEVICE(BRCM_PCIE_43570_DEVICE_ID), + BRCMF_PCIE_DEVICE(BRCM_PCIE_43570_RAW_DEVICE_ID), BRCMF_PCIE_DEVICE(BRCM_PCIE_4358_DEVICE_ID), BRCMF_PCIE_DEVICE(BRCM_PCIE_4359_DEVICE_ID), BRCMF_PCIE_DEVICE(BRCM_PCIE_43602_DEVICE_ID), diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h index f4a79e217da5..bd08d3aaa8f4 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/proto.h @@ -32,7 +32,7 @@ struct brcmf_proto { u8 peer[ETH_ALEN]); void (*add_tdls_peer)(struct brcmf_pub *drvr, int ifidx, u8 peer[ETH_ALEN]); - void (*rxreorder)(struct brcmf_if *ifp, struct sk_buff *skb, bool inirq); + void (*rxreorder)(struct brcmf_if *ifp, struct sk_buff *skb); void (*add_if)(struct brcmf_if *ifp); void (*del_if)(struct brcmf_if *ifp); void (*reset_if)(struct brcmf_if *ifp); @@ -109,9 +109,9 @@ static inline bool brcmf_proto_is_reorder_skb(struct sk_buff *skb) } static inline void -brcmf_proto_rxreorder(struct brcmf_if *ifp, struct sk_buff *skb, bool inirq) +brcmf_proto_rxreorder(struct brcmf_if *ifp, struct sk_buff *skb) { - ifp->drvr->proto->rxreorder(ifp, skb, inirq); + ifp->drvr->proto->rxreorder(ifp, skb); } static inline void diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c index 8effeb7a7269..ba3c159111d3 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c @@ -629,7 +629,6 @@ BRCMF_FW_CLM_DEF(43752, "brcmfmac43752-sdio"); /* firmware config files */ MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "brcmfmac*-sdio.*.txt"); -MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "brcmfmac*-pcie.*.txt"); /* per-board firmware binaries */ MODULE_FIRMWARE(BRCMF_FW_DEFAULT_PATH "brcmfmac*-sdio.*.bin"); @@ -652,6 +651,7 @@ static const struct brcmf_firmware_mapping brcmf_sdio_fwnames[] = { BRCMF_FW_ENTRY(BRCM_CC_43430_CHIP_ID, 0xFFFFFFFC, 43430B0), BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0x00000200, 43456), BRCMF_FW_ENTRY(BRCM_CC_4345_CHIP_ID, 0xFFFFFDC0, 43455), + BRCMF_FW_ENTRY(BRCM_CC_43454_CHIP_ID, 0x00000040, 43455), BRCMF_FW_ENTRY(BRCM_CC_4354_CHIP_ID, 0xFFFFFFFF, 4354), BRCMF_FW_ENTRY(BRCM_CC_4356_CHIP_ID, 0xFFFFFFFF, 4356), BRCMF_FW_ENTRY(BRCM_CC_4359_CHIP_ID, 0xFFFFFFFF, 4359), diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/xtlv.h b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/xtlv.h index e1930ce1b642..b2c7ae8966a1 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/xtlv.h +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/xtlv.h @@ -15,7 +15,7 @@ struct brcmf_xtlv { u16 id; u16 len; - u8 data[0]; + u8 data[]; }; enum brcmf_xtlv_option { diff --git a/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h b/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h index 9d81320164ce..ed0b707f0cdf 100644 --- a/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h +++ b/drivers/net/wireless/broadcom/brcm80211/include/brcm_hw_ids.h @@ -32,6 +32,7 @@ #define BRCM_CC_4339_CHIP_ID 0x4339 #define BRCM_CC_43430_CHIP_ID 43430 #define BRCM_CC_4345_CHIP_ID 0x4345 +#define BRCM_CC_43454_CHIP_ID 43454 #define BRCM_CC_43465_CHIP_ID 43465 #define BRCM_CC_4350_CHIP_ID 0x4350 #define BRCM_CC_43525_CHIP_ID 43525 @@ -71,6 +72,7 @@ #define BRCM_PCIE_4356_DEVICE_ID 0x43ec #define BRCM_PCIE_43567_DEVICE_ID 0x43d3 #define BRCM_PCIE_43570_DEVICE_ID 0x43d9 +#define BRCM_PCIE_43570_RAW_DEVICE_ID 0xaa31 #define BRCM_PCIE_4358_DEVICE_ID 0x43e9 #define BRCM_PCIE_4359_DEVICE_ID 0x43ef #define BRCM_PCIE_43602_DEVICE_ID 0x43ba diff --git a/drivers/net/wireless/cisco/airo.c b/drivers/net/wireless/cisco/airo.c index 452d08545d31..10daef81c355 100644 --- a/drivers/net/wireless/cisco/airo.c +++ b/drivers/net/wireless/cisco/airo.c @@ -545,7 +545,7 @@ struct ConfigRid { #define MODE_CFG_MASK cpu_to_le16(0xff) #define MODE_ETHERNET_HOST cpu_to_le16(0<<8) /* rx payloads converted */ #define MODE_LLC_HOST cpu_to_le16(1<<8) /* rx payloads left as is */ -#define MODE_AIRONET_EXTEND cpu_to_le16(1<<9) /* enable Aironet extenstions */ +#define MODE_AIRONET_EXTEND cpu_to_le16(1<<9) /* enable Aironet extensions */ #define MODE_AP_INTERFACE cpu_to_le16(1<<10) /* enable ap interface extensions */ #define MODE_ANTENNA_ALIGN cpu_to_le16(1<<11) /* enable antenna alignment */ #define MODE_ETHER_LLC cpu_to_le16(1<<12) /* enable ethernet LLC */ diff --git a/drivers/net/wireless/intel/iwlwifi/Kconfig b/drivers/net/wireless/intel/iwlwifi/Kconfig index 85e704283755..a647a406b87b 100644 --- a/drivers/net/wireless/intel/iwlwifi/Kconfig +++ b/drivers/net/wireless/intel/iwlwifi/Kconfig @@ -139,6 +139,7 @@ config IWLMEI tristate "Intel Management Engine communication over WLAN" depends on INTEL_MEI depends on PM + depends on CFG80211 help Enables the iwlmei kernel module. diff --git a/drivers/net/wireless/intel/iwlwifi/cfg/22000.c b/drivers/net/wireless/intel/iwlwifi/cfg/22000.c index 330ef04ca51a..8ff967edc8f0 100644 --- a/drivers/net/wireless/intel/iwlwifi/cfg/22000.c +++ b/drivers/net/wireless/intel/iwlwifi/cfg/22000.c @@ -1,15 +1,16 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* * Copyright (C) 2015-2017 Intel Deutschland GmbH - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation */ #include <linux/module.h> #include <linux/stringify.h> #include "iwl-config.h" #include "iwl-prph.h" +#include "fw/api/txq.h" /* Highest firmware API version supported */ -#define IWL_22000_UCODE_API_MAX 69 +#define IWL_22000_UCODE_API_MAX 72 /* Lowest firmware API version supported */ #define IWL_22000_UCODE_API_MIN 39 @@ -39,6 +40,7 @@ #define IWL_SO_A_GF_A_FW_PRE "iwlwifi-so-a0-gf-a0-" #define IWL_TY_A_GF_A_FW_PRE "iwlwifi-ty-a0-gf-a0-" #define IWL_SO_A_GF4_A_FW_PRE "iwlwifi-so-a0-gf4-a0-" +#define IWL_SO_A_MR_A_FW_PRE "iwlwifi-so-a0-mr-a0-" #define IWL_SNJ_A_GF4_A_FW_PRE "iwlwifi-SoSnj-a0-gf4-a0-" #define IWL_SNJ_A_GF_A_FW_PRE "iwlwifi-SoSnj-a0-gf-a0-" #define IWL_SNJ_A_HR_B_FW_PRE "iwlwifi-SoSnj-a0-hr-b0-" @@ -119,8 +121,6 @@ IWL_BZ_A_FM_A_FW_PRE __stringify(api) ".ucode" #define IWL_GL_A_FM_A_MODULE_FIRMWARE(api) \ IWL_GL_A_FM_A_FW_PRE __stringify(api) ".ucode" -#define IWL_BZ_Z_GF_A_MODULE_FIRMWARE(api) \ - IWL_BZ_Z_GF_A_FW_PRE __stringify(api) ".ucode" #define IWL_BNJ_A_FM_A_MODULE_FIRMWARE(api) \ IWL_BNJ_A_FM_A_FW_PRE __stringify(api) ".ucode" #define IWL_BNJ_A_FM4_A_MODULE_FIRMWARE(api) \ @@ -224,7 +224,7 @@ static const struct iwl_ht_params iwl_22000_ht_params = { .trans.base_params = &iwl_ax210_base_params, \ .min_txq_size = 128, \ .gp2_reg_addr = 0xd02c68, \ - .min_256_ba_txq_size = 1024, \ + .min_ba_txq_size = IWL_DEFAULT_QUEUE_SIZE_HE, \ .mon_dram_regs = { \ .write_ptr = { \ .addr = DBGC_CUR_DBGBUF_STATUS, \ @@ -285,7 +285,7 @@ static const struct iwl_ht_params iwl_22000_ht_params = { .trans.base_params = &iwl_ax210_base_params, \ .min_txq_size = 128, \ .gp2_reg_addr = 0xd02c68, \ - .min_256_ba_txq_size = 1024, \ + .min_ba_txq_size = IWL_DEFAULT_QUEUE_SIZE_EHT, \ .mon_dram_regs = { \ .write_ptr = { \ .addr = DBGC_CUR_DBGBUF_STATUS, \ @@ -299,6 +299,12 @@ static const struct iwl_ht_params iwl_22000_ht_params = { .addr = DBGC_CUR_DBGBUF_STATUS, \ .mask = DBGC_CUR_DBGBUF_STATUS_IDX_MSK, \ }, \ + }, \ + .mon_dbgi_regs = { \ + .write_ptr = { \ + .addr = DBGI_SRAM_FIFO_POINTERS, \ + .mask = DBGI_SRAM_FIFO_POINTERS_WR_PTR_MSK, \ + }, \ } const struct iwl_cfg_trans_params iwl_qnj_trans_cfg = { @@ -385,6 +391,21 @@ const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg = { .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, }; +const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg = { + .mq_rx_supported = true, + .use_tfh = true, + .rf_id = true, + .gen2 = true, + .device_family = IWL_DEVICE_FAMILY_AX210, + .base_params = &iwl_ax210_base_params, + .umac_prph_offset = 0x300000, + .integrated = true, + .low_latency_xtal = true, + .xtal_latency = 12000, + .ltr_delay = IWL_CFG_TRANS_LTR_DELAY_2500US, + .imr_enabled = true, +}; + /* * If the device doesn't support HE, no need to have that many buffers. * 22000 devices can split multiple frames into a single RB, so fewer are @@ -476,6 +497,7 @@ const char iwl_ax101_name[] = "Intel(R) Wi-Fi 6 AX101"; const char iwl_ax200_name[] = "Intel(R) Wi-Fi 6 AX200 160MHz"; const char iwl_ax201_name[] = "Intel(R) Wi-Fi 6 AX201 160MHz"; const char iwl_ax203_name[] = "Intel(R) Wi-Fi 6 AX203"; +const char iwl_ax204_name[] = "Intel(R) Wi-Fi 6 AX204 160MHz"; const char iwl_ax211_name[] = "Intel(R) Wi-Fi 6E AX211 160MHz"; const char iwl_ax221_name[] = "Intel(R) Wi-Fi 6E AX221 160MHz"; const char iwl_ax231_name[] = "Intel(R) Wi-Fi 6E AX231 160MHz"; @@ -816,6 +838,20 @@ const struct iwl_cfg iwl_cfg_ma_a0_mr_a0 = { .num_rbds = IWL_NUM_RBDS_AX210_HE, }; +const struct iwl_cfg iwl_cfg_ma_a0_ms_a0 = { + .fw_name_pre = IWL_MA_A_MR_A_FW_PRE, + .uhb_supported = false, + IWL_DEVICE_AX210, + .num_rbds = IWL_NUM_RBDS_AX210_HE, +}; + +const struct iwl_cfg iwl_cfg_so_a0_ms_a0 = { + .fw_name_pre = IWL_SO_A_MR_A_FW_PRE, + .uhb_supported = false, + IWL_DEVICE_AX210, + .num_rbds = IWL_NUM_RBDS_AX210_HE, +}; + const struct iwl_cfg iwl_cfg_ma_a0_fm_a0 = { .fw_name_pre = IWL_MA_A_FM_A_FW_PRE, .uhb_supported = true, @@ -830,6 +866,13 @@ const struct iwl_cfg iwl_cfg_snj_a0_mr_a0 = { .num_rbds = IWL_NUM_RBDS_AX210_HE, }; +const struct iwl_cfg iwl_cfg_snj_a0_ms_a0 = { + .fw_name_pre = IWL_SNJ_A_MR_A_FW_PRE, + .uhb_supported = false, + IWL_DEVICE_AX210, + .num_rbds = IWL_NUM_RBDS_AX210_HE, +}; + const struct iwl_cfg iwl_cfg_so_a0_hr_a0 = { .fw_name_pre = IWL_SO_A_HR_B_FW_PRE, IWL_DEVICE_AX210, diff --git a/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c b/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c index 754876cd27ce..e8bd4f0e3d2d 100644 --- a/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c +++ b/drivers/net/wireless/intel/iwlwifi/dvm/mac80211.c @@ -299,7 +299,7 @@ static int iwlagn_mac_start(struct ieee80211_hw *hw) priv->is_open = 1; IWL_DEBUG_MAC80211(priv, "leave\n"); - return 0; + return ret; } static void iwlagn_mac_stop(struct ieee80211_hw *hw) diff --git a/drivers/net/wireless/intel/iwlwifi/dvm/main.c b/drivers/net/wireless/intel/iwlwifi/dvm/main.c index 90b9becd1673..caf452922dbd 100644 --- a/drivers/net/wireless/intel/iwlwifi/dvm/main.c +++ b/drivers/net/wireless/intel/iwlwifi/dvm/main.c @@ -48,6 +48,7 @@ #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux" MODULE_DESCRIPTION(DRV_DESCRIPTION); MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(IWLWIFI); /* Please keep this array *SORTED* by hex value. * Access is done through binary search. diff --git a/drivers/net/wireless/intel/iwlwifi/dvm/rx.c b/drivers/net/wireless/intel/iwlwifi/dvm/rx.c index db0c41bbeb0e..e9d2717362cf 100644 --- a/drivers/net/wireless/intel/iwlwifi/dvm/rx.c +++ b/drivers/net/wireless/intel/iwlwifi/dvm/rx.c @@ -3,7 +3,7 @@ * * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved. * Copyright(c) 2015 Intel Deutschland GmbH - * Copyright(c) 2018, 2020 Intel Corporation + * Copyright(c) 2018, 2020-2021 Intel Corporation * * Portions of this file are derived from the ipw3945 project, as well * as portionhelp of the ieee80211 subsystem header files. @@ -915,7 +915,7 @@ static void iwlagn_rx_noa_notification(struct iwl_priv *priv, len += 1 + 2; copylen += 1 + 2; - new_data = kmalloc(sizeof(*new_data) + len, GFP_ATOMIC); + new_data = kmalloc(struct_size(new_data, data, len), GFP_ATOMIC); if (new_data) { new_data->length = len; new_data->data[0] = WLAN_EID_VENDOR_SPECIFIC; @@ -1015,8 +1015,7 @@ void iwl_rx_dispatch(struct iwl_op_mode *op_mode, struct napi_struct *napi, /* No handling needed */ IWL_DEBUG_RX(priv, "No handler needed for %s, 0x%02x\n", iwl_get_cmd_string(priv->trans, - iwl_cmd_id(pkt->hdr.cmd, - 0, 0)), + WIDE_ID(0, pkt->hdr.cmd)), pkt->hdr.cmd); } } diff --git a/drivers/net/wireless/intel/iwlwifi/fw/acpi.c b/drivers/net/wireless/intel/iwlwifi/fw/acpi.c index c17ab53fcd8f..33aae639ad37 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/acpi.c +++ b/drivers/net/wireless/intel/iwlwifi/fw/acpi.c @@ -4,6 +4,7 @@ * Copyright (C) 2019-2022 Intel Corporation */ #include <linux/uuid.h> +#include <linux/dmi.h> #include "iwl-drv.h" #include "iwl-debug.h" #include "acpi.h" @@ -19,6 +20,30 @@ const guid_t iwl_rfi_guid = GUID_INIT(0x7266172C, 0x220B, 0x4B29, 0xDD, 0x26, 0xB5, 0xFD); IWL_EXPORT_SYMBOL(iwl_rfi_guid); +static const struct dmi_system_id dmi_ppag_approved_list[] = { + { .ident = "HP", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "HP"), + }, + }, + { .ident = "SAMSUNG", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), + }, + }, + { .ident = "MSFT", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), + }, + }, + { .ident = "ASUS", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."), + }, + }, + {} +}; + static int iwl_acpi_get_handle(struct device *dev, acpi_string method, acpi_handle *ret_handle) { @@ -242,7 +267,7 @@ found: IWL_EXPORT_SYMBOL(iwl_acpi_get_wifi_pkg_range); int iwl_acpi_get_tas(struct iwl_fw_runtime *fwrt, - struct iwl_tas_config_cmd_v3 *cmd) + union iwl_tas_config_cmd *cmd, int fw_ver) { union acpi_object *wifi_pkg, *data; int ret, tbl_rev, i, block_list_size, enabled; @@ -268,10 +293,18 @@ int iwl_acpi_get_tas(struct iwl_fw_runtime *fwrt, (tas_selection & ACPI_WTAS_OVERRIDE_IEC_MSK) >> ACPI_WTAS_OVERRIDE_IEC_POS; u16 enabled_iec = (tas_selection & ACPI_WTAS_ENABLE_IEC_MSK) >> ACPI_WTAS_ENABLE_IEC_POS; + u8 usa_tas_uhb = (tas_selection & ACPI_WTAS_USA_UHB_MSK) >> ACPI_WTAS_USA_UHB_POS; + enabled = tas_selection & ACPI_WTAS_ENABLED_MSK; - cmd->override_tas_iec = cpu_to_le16(override_iec); - cmd->enable_tas_iec = cpu_to_le16(enabled_iec); + if (fw_ver <= 3) { + cmd->v3.override_tas_iec = cpu_to_le16(override_iec); + cmd->v3.enable_tas_iec = cpu_to_le16(enabled_iec); + } else { + cmd->v4.usa_tas_uhb_allowed = usa_tas_uhb; + cmd->v4.override_tas_iec = (u8)override_iec; + cmd->v4.enable_tas_iec = (u8)enabled_iec; + } } else if (tbl_rev == 0 && wifi_pkg->package.elements[1].type == ACPI_TYPE_INTEGER) { @@ -297,7 +330,7 @@ int iwl_acpi_get_tas(struct iwl_fw_runtime *fwrt, goto out_free; } block_list_size = wifi_pkg->package.elements[2].integer.value; - cmd->block_list_size = cpu_to_le32(block_list_size); + cmd->v4.block_list_size = cpu_to_le32(block_list_size); IWL_DEBUG_RADIO(fwrt, "TAS array size %u\n", block_list_size); if (block_list_size > APCI_WTAS_BLACK_LIST_MAX) { @@ -319,7 +352,7 @@ int iwl_acpi_get_tas(struct iwl_fw_runtime *fwrt, } country = wifi_pkg->package.elements[3 + i].integer.value; - cmd->block_list_array[i] = cpu_to_le32(country); + cmd->v4.block_list_array[i] = cpu_to_le32(country); IWL_DEBUG_RADIO(fwrt, "TAS block list country %d\n", country); } @@ -529,8 +562,8 @@ IWL_EXPORT_SYMBOL(iwl_sar_select_profile); int iwl_sar_get_wrds_table(struct iwl_fw_runtime *fwrt) { union acpi_object *wifi_pkg, *table, *data; - bool enabled; int ret, tbl_rev; + u32 flags; u8 num_chains, num_sub_bands; data = iwl_acpi_get_object(fwrt->dev, ACPI_WRDS_METHOD); @@ -596,7 +629,8 @@ read_table: IWL_DEBUG_RADIO(fwrt, "Reading WRDS tbl_rev=%d\n", tbl_rev); - enabled = !!(wifi_pkg->package.elements[1].integer.value); + flags = wifi_pkg->package.elements[1].integer.value; + fwrt->reduced_power_flags = flags >> IWL_REDUCE_POWER_FLAGS_POS; /* position of the actual table */ table = &wifi_pkg->package.elements[2]; @@ -604,7 +638,8 @@ read_table: /* The profile from WRDS is officially profile 1, but goes * into sar_profiles[0] (because we don't have a profile 0). */ - ret = iwl_sar_set_profile(table, &fwrt->sar_profiles[0], enabled, + ret = iwl_sar_set_profile(table, &fwrt->sar_profiles[0], + flags & IWL_SAR_ENABLE_MSK, num_chains, num_sub_bands); out_free: kfree(data); @@ -962,3 +997,181 @@ __le32 iwl_acpi_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt) return config_bitmap; } IWL_EXPORT_SYMBOL(iwl_acpi_get_lari_config_bitmap); + +int iwl_acpi_get_ppag_table(struct iwl_fw_runtime *fwrt) +{ + union acpi_object *wifi_pkg, *data, *flags; + int i, j, ret, tbl_rev, num_sub_bands = 0; + int idx = 2; + + fwrt->ppag_flags = 0; + + data = iwl_acpi_get_object(fwrt->dev, ACPI_PPAG_METHOD); + if (IS_ERR(data)) + return PTR_ERR(data); + + /* try to read ppag table rev 2 or 1 (both have the same data size) */ + wifi_pkg = iwl_acpi_get_wifi_pkg(fwrt->dev, data, + ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev); + + if (!IS_ERR(wifi_pkg)) { + if (tbl_rev == 1 || tbl_rev == 2) { + num_sub_bands = IWL_NUM_SUB_BANDS_V2; + IWL_DEBUG_RADIO(fwrt, + "Reading PPAG table v2 (tbl_rev=%d)\n", + tbl_rev); + goto read_table; + } else { + ret = -EINVAL; + goto out_free; + } + } + + /* try to read ppag table revision 0 */ + wifi_pkg = iwl_acpi_get_wifi_pkg(fwrt->dev, data, + ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev); + + if (!IS_ERR(wifi_pkg)) { + if (tbl_rev != 0) { + ret = -EINVAL; + goto out_free; + } + num_sub_bands = IWL_NUM_SUB_BANDS_V1; + IWL_DEBUG_RADIO(fwrt, "Reading PPAG table v1 (tbl_rev=0)\n"); + goto read_table; + } + +read_table: + fwrt->ppag_ver = tbl_rev; + flags = &wifi_pkg->package.elements[1]; + + if (flags->type != ACPI_TYPE_INTEGER) { + ret = -EINVAL; + goto out_free; + } + + fwrt->ppag_flags = flags->integer.value & ACPI_PPAG_MASK; + + if (!fwrt->ppag_flags) { + ret = 0; + goto out_free; + } + + /* + * read, verify gain values and save them into the PPAG table. + * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the + * following sub-bands to High-Band (5GHz). + */ + for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { + for (j = 0; j < num_sub_bands; j++) { + union acpi_object *ent; + + ent = &wifi_pkg->package.elements[idx++]; + if (ent->type != ACPI_TYPE_INTEGER) { + ret = -EINVAL; + goto out_free; + } + + fwrt->ppag_chains[i].subbands[j] = ent->integer.value; + + if ((j == 0 && + (fwrt->ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_LB || + fwrt->ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_LB)) || + (j != 0 && + (fwrt->ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_HB || + fwrt->ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_HB))) { + fwrt->ppag_flags = 0; + ret = -EINVAL; + goto out_free; + } + } + } + + + ret = 0; + +out_free: + kfree(data); + return ret; +} +IWL_EXPORT_SYMBOL(iwl_acpi_get_ppag_table); + +int iwl_read_ppag_table(struct iwl_fw_runtime *fwrt, union iwl_ppag_table_cmd *cmd, + int *cmd_size) +{ + u8 cmd_ver; + int i, j, num_sub_bands; + s8 *gain; + + if (!fw_has_capa(&fwrt->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) { + IWL_DEBUG_RADIO(fwrt, + "PPAG capability not supported by FW, command not sent.\n"); + return -EINVAL; + } + if (!fwrt->ppag_flags) { + IWL_DEBUG_RADIO(fwrt, "PPAG not enabled, command not sent.\n"); + return -EINVAL; + } + + /* The 'flags' field is the same in v1 and in v2 so we can just + * use v1 to access it. + */ + cmd->v1.flags = cpu_to_le32(fwrt->ppag_flags); + cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw, + WIDE_ID(PHY_OPS_GROUP, PER_PLATFORM_ANT_GAIN_CMD), + IWL_FW_CMD_VER_UNKNOWN); + if (cmd_ver == 1) { + num_sub_bands = IWL_NUM_SUB_BANDS_V1; + gain = cmd->v1.gain[0]; + *cmd_size = sizeof(cmd->v1); + if (fwrt->ppag_ver == 1 || fwrt->ppag_ver == 2) { + IWL_DEBUG_RADIO(fwrt, + "PPAG table rev is %d but FW supports v1, sending truncated table\n", + fwrt->ppag_ver); + cmd->v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK); + } + } else if (cmd_ver == 2 || cmd_ver == 3) { + num_sub_bands = IWL_NUM_SUB_BANDS_V2; + gain = cmd->v2.gain[0]; + *cmd_size = sizeof(cmd->v2); + if (fwrt->ppag_ver == 0) { + IWL_DEBUG_RADIO(fwrt, + "PPAG table is v1 but FW supports v2, sending padded table\n"); + } else if (cmd_ver == 2 && fwrt->ppag_ver == 2) { + IWL_DEBUG_RADIO(fwrt, + "PPAG table is v3 but FW supports v2, sending partial bitmap.\n"); + cmd->v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK); + } + } else { + IWL_DEBUG_RADIO(fwrt, "Unsupported PPAG command version\n"); + return -EINVAL; + } + + for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { + for (j = 0; j < num_sub_bands; j++) { + gain[i * num_sub_bands + j] = + fwrt->ppag_chains[i].subbands[j]; + IWL_DEBUG_RADIO(fwrt, + "PPAG table: chain[%d] band[%d]: gain = %d\n", + i, j, gain[i * num_sub_bands + j]); + } + } + + return 0; +} +IWL_EXPORT_SYMBOL(iwl_read_ppag_table); + +bool iwl_acpi_is_ppag_approved(struct iwl_fw_runtime *fwrt) +{ + + if (!dmi_check_system(dmi_ppag_approved_list)) { + IWL_DEBUG_RADIO(fwrt, + "System vendor '%s' is not in the approved list, disabling PPAG.\n", + dmi_get_system_info(DMI_SYS_VENDOR)); + fwrt->ppag_flags = 0; + return false; + } + + return true; +} +IWL_EXPORT_SYMBOL(iwl_acpi_is_ppag_approved); diff --git a/drivers/net/wireless/intel/iwlwifi/fw/acpi.h b/drivers/net/wireless/intel/iwlwifi/fw/acpi.h index 22b3c665f91a..6f361c59106f 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/acpi.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/acpi.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* * Copyright (C) 2017 Intel Deutschland GmbH - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation */ #ifndef __iwl_fw_acpi__ #define __iwl_fw_acpi__ @@ -77,6 +77,8 @@ #define ACPI_WTAS_ENABLE_IEC_MSK 0x4 #define ACPI_WTAS_OVERRIDE_IEC_POS 0x1 #define ACPI_WTAS_ENABLE_IEC_POS 0x2 +#define ACPI_WTAS_USA_UHB_MSK BIT(16) +#define ACPI_WTAS_USA_UHB_POS 16 #define ACPI_PPAG_WIFI_DATA_SIZE_V1 ((IWL_NUM_CHAIN_LIMITS * \ @@ -89,6 +91,11 @@ #define ACPI_PPAG_MAX_LB 24 #define ACPI_PPAG_MIN_HB -16 #define ACPI_PPAG_MAX_HB 40 +#define ACPI_PPAG_MASK 3 +#define IWL_PPAG_ETSI_MASK BIT(0) + +#define IWL_SAR_ENABLE_MSK BIT(0) +#define IWL_REDUCE_POWER_FLAGS_POS 1 /* * The profile for revision 2 is a superset of revision 1, which is in @@ -126,7 +133,8 @@ enum iwl_dsm_funcs_rev_0 { DSM_FUNC_ENABLE_6E = 3, DSM_FUNC_11AX_ENABLEMENT = 6, DSM_FUNC_ENABLE_UNII4_CHAN = 7, - DSM_FUNC_ACTIVATE_CHANNEL = 8 + DSM_FUNC_ACTIVATE_CHANNEL = 8, + DSM_FUNC_FORCE_DISABLE_CHANNELS = 9 }; enum iwl_dsm_values_srd { @@ -213,10 +221,17 @@ int iwl_sar_geo_init(struct iwl_fw_runtime *fwrt, u32 n_bands, u32 n_profiles); int iwl_acpi_get_tas(struct iwl_fw_runtime *fwrt, - struct iwl_tas_config_cmd_v3 *cmd); + union iwl_tas_config_cmd *cmd, int fw_ver); __le32 iwl_acpi_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt); +int iwl_acpi_get_ppag_table(struct iwl_fw_runtime *fwrt); + +int iwl_read_ppag_table(struct iwl_fw_runtime *fwrt, union iwl_ppag_table_cmd *cmd, + int *cmd_size); + +bool iwl_acpi_is_ppag_approved(struct iwl_fw_runtime *fwrt); + #else /* CONFIG_ACPI */ static inline void *iwl_acpi_get_object(struct device *dev, acpi_string method) @@ -294,7 +309,7 @@ static inline bool iwl_sar_geo_support(struct iwl_fw_runtime *fwrt) } static inline int iwl_acpi_get_tas(struct iwl_fw_runtime *fwrt, - struct iwl_tas_config_cmd_v3 *cmd) + union iwl_tas_config_cmd *cmd, int fw_ver) { return -ENOENT; } @@ -304,6 +319,22 @@ static inline __le32 iwl_acpi_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt return 0; } +static inline int iwl_acpi_get_ppag_table(struct iwl_fw_runtime *fwrt) +{ + return -ENOENT; +} + +static inline int iwl_read_ppag_table(struct iwl_fw_runtime *fwrt, + union iwl_ppag_table_cmd *cmd, int *cmd_size) +{ + return -ENOENT; +} + +static inline bool iwl_acpi_is_ppag_approved(struct iwl_fw_runtime *fwrt) +{ + return false; +} + #endif /* CONFIG_ACPI */ static inline union acpi_object * diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/commands.h b/drivers/net/wireless/intel/iwlwifi/fw/api/commands.h index 35b8856e511f..c78d2f1c722c 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/commands.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/commands.h @@ -323,14 +323,6 @@ enum iwl_legacy_cmds { REPLY_THERMAL_MNG_BACKOFF = 0x7e, /** - * @DC2DC_CONFIG_CMD: - * Set/Get DC2DC frequency tune - * Command is &struct iwl_dc2dc_config_cmd, - * response is &struct iwl_dc2dc_config_resp - */ - DC2DC_CONFIG_CMD = 0x83, - - /** * @NVM_ACCESS_CMD: using &struct iwl_nvm_access_cmd */ NVM_ACCESS_CMD = 0x88, @@ -608,6 +600,11 @@ enum iwl_system_subcmd_ids { * @SYSTEM_FEATURES_CONTROL_CMD: &struct iwl_system_features_control_cmd */ SYSTEM_FEATURES_CONTROL_CMD = 0xd, + + /** + * @RFI_DEACTIVATE_NOTIF: &struct iwl_rfi_deactivate_notif + */ + RFI_DEACTIVATE_NOTIF = 0xff, }; #endif /* __iwl_fw_api_commands_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/config.h b/drivers/net/wireless/intel/iwlwifi/fw/api/config.h index 1ab92f62c414..087354b3c308 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/config.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/config.h @@ -114,37 +114,4 @@ enum iwl_dc2dc_config_id { DCDC_FREQ_TUNE_SET = 0x2, }; /* MARKER_ID_API_E_VER_1 */ -/** - * struct iwl_dc2dc_config_cmd - configure dc2dc values - * - * (DC2DC_CONFIG_CMD = 0x83) - * - * Set/Get & configure dc2dc values. - * The command always returns the current dc2dc values. - * - * @flags: set/get dc2dc - * @enable_low_power_mode: not used. - * @dc2dc_freq_tune0: frequency divider - digital domain - * @dc2dc_freq_tune1: frequency divider - analog domain - */ -struct iwl_dc2dc_config_cmd { - __le32 flags; - __le32 enable_low_power_mode; /* not used */ - __le32 dc2dc_freq_tune0; - __le32 dc2dc_freq_tune1; -} __packed; /* DC2DC_CONFIG_CMD_API_S_VER_1 */ - -/** - * struct iwl_dc2dc_config_resp - response for iwl_dc2dc_config_cmd - * - * Current dc2dc values returned by the FW. - * - * @dc2dc_freq_tune0: frequency divider - digital domain - * @dc2dc_freq_tune1: frequency divider - analog domain - */ -struct iwl_dc2dc_config_resp { - __le32 dc2dc_freq_tune0; - __le32 dc2dc_freq_tune1; -} __packed; /* DC2DC_CONFIG_RESP_API_S_VER_1 */ - #endif /* __iwl_fw_api_config_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h b/drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h index 89236f42c5a4..43619acc29fd 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/datapath.h @@ -42,7 +42,7 @@ enum iwl_data_path_subcmd_ids { RFH_QUEUE_CONFIG_CMD = 0xD, /** - * @TLC_MNG_CONFIG_CMD: &struct iwl_tlc_config_cmd + * @TLC_MNG_CONFIG_CMD: &struct iwl_tlc_config_cmd_v4 */ TLC_MNG_CONFIG_CMD = 0xF, @@ -58,6 +58,20 @@ enum iwl_data_path_subcmd_ids { CHEST_COLLECTOR_FILTER_CONFIG_CMD = 0x14, /** + * @RX_BAID_ALLOCATION_CONFIG_CMD: Allocate/deallocate a BAID for an RX + * blockack session, uses &struct iwl_rx_baid_cfg_cmd for the + * command, and &struct iwl_rx_baid_cfg_resp as a response. + */ + RX_BAID_ALLOCATION_CONFIG_CMD = 0x16, + + /** + * @SCD_QUEUE_CONFIG_CMD: new scheduler queue allocation/config/removal + * command, uses &struct iwl_scd_queue_cfg_cmd and the response + * is (same as before) &struct iwl_tx_queue_cfg_rsp. + */ + SCD_QUEUE_CONFIG_CMD = 0x17, + + /** * @MONITOR_NOTIF: Datapath monitoring notification, using * &struct iwl_datapath_monitor_notif */ @@ -257,4 +271,136 @@ struct iwl_rlc_config_cmd { u8 reserved[3]; } __packed; /* RLC_CONFIG_CMD_API_S_VER_2 */ +#define IWL_MAX_BAID_OLD 16 /* MAX_IMMEDIATE_BA_API_D_VER_2 */ +#define IWL_MAX_BAID 32 /* MAX_IMMEDIATE_BA_API_D_VER_3 */ + +/** + * enum iwl_rx_baid_action - BAID allocation/config action + * @IWL_RX_BAID_ACTION_ADD: add a new BAID session + * @IWL_RX_BAID_ACTION_MODIFY: modify the BAID session + * @IWL_RX_BAID_ACTION_REMOVE: remove the BAID session + */ +enum iwl_rx_baid_action { + IWL_RX_BAID_ACTION_ADD, + IWL_RX_BAID_ACTION_MODIFY, + IWL_RX_BAID_ACTION_REMOVE, +}; /* RX_BAID_ALLOCATION_ACTION_E_VER_1 */ + +/** + * struct iwl_rx_baid_cfg_cmd_alloc - BAID allocation data + * @sta_id_mask: station ID mask + * @tid: the TID for this session + * @reserved: reserved + * @ssn: the starting sequence number + * @win_size: RX BA session window size + */ +struct iwl_rx_baid_cfg_cmd_alloc { + __le32 sta_id_mask; + u8 tid; + u8 reserved[3]; + __le16 ssn; + __le16 win_size; +} __packed; /* RX_BAID_ALLOCATION_ADD_CMD_API_S_VER_1 */ + +/** + * struct iwl_rx_baid_cfg_cmd_modify - BAID modification data + * @old_sta_id_mask: old station ID mask + * @new_sta_id_mask: new station ID mask + * @tid: TID of the BAID + */ +struct iwl_rx_baid_cfg_cmd_modify { + __le32 old_sta_id_mask; + __le32 new_sta_id_mask; + __le32 tid; +} __packed; /* RX_BAID_ALLOCATION_MODIFY_CMD_API_S_VER_2 */ + +/** + * struct iwl_rx_baid_cfg_cmd_remove_v1 - BAID removal data + * @baid: the BAID to remove + */ +struct iwl_rx_baid_cfg_cmd_remove_v1 { + __le32 baid; +} __packed; /* RX_BAID_ALLOCATION_REMOVE_CMD_API_S_VER_1 */ + +/** + * struct iwl_rx_baid_cfg_cmd_remove - BAID removal data + * @sta_id_mask: the station mask of the BAID to remove + * @tid: the TID of the BAID to remove + */ +struct iwl_rx_baid_cfg_cmd_remove { + __le32 sta_id_mask; + __le32 tid; +} __packed; /* RX_BAID_ALLOCATION_REMOVE_CMD_API_S_VER_2 */ + +/** + * struct iwl_rx_baid_cfg_cmd - BAID allocation/config command + * @action: the action, from &enum iwl_rx_baid_action + */ +struct iwl_rx_baid_cfg_cmd { + __le32 action; + union { + struct iwl_rx_baid_cfg_cmd_alloc alloc; + struct iwl_rx_baid_cfg_cmd_modify modify; + struct iwl_rx_baid_cfg_cmd_remove_v1 remove_v1; + struct iwl_rx_baid_cfg_cmd_remove remove; + }; /* RX_BAID_ALLOCATION_OPERATION_API_U_VER_2 */ +} __packed; /* RX_BAID_ALLOCATION_CONFIG_CMD_API_S_VER_2 */ + +/** + * struct iwl_rx_baid_cfg_resp - BAID allocation response + * @baid: the allocated BAID + */ +struct iwl_rx_baid_cfg_resp { + __le32 baid; +}; /* RX_BAID_ALLOCATION_RESPONSE_API_S_VER_1 */ + +/** + * enum iwl_scd_queue_cfg_operation - scheduler queue operation + * @IWL_SCD_QUEUE_ADD: allocate a new queue + * @IWL_SCD_QUEUE_REMOVE: remove a queue + * @IWL_SCD_QUEUE_MODIFY: modify a queue + */ +enum iwl_scd_queue_cfg_operation { + IWL_SCD_QUEUE_ADD = 0, + IWL_SCD_QUEUE_REMOVE = 1, + IWL_SCD_QUEUE_MODIFY = 2, +}; + +/** + * struct iwl_scd_queue_cfg_cmd - scheduler queue allocation command + * @operation: the operation, see &enum iwl_scd_queue_cfg_operation + * @u.add.sta_mask: station mask + * @u.add.tid: TID + * @u.add.reserved: reserved + * @u.add.flags: flags from &enum iwl_tx_queue_cfg_actions, except + * %TX_QUEUE_CFG_ENABLE_QUEUE is not valid + * @u.add.cb_size: size code + * @u.add.bc_dram_addr: byte-count table IOVA + * @u.add.tfdq_dram_addr: TFD queue IOVA + * @u.remove.queue: queue ID for removal + * @u.modify.sta_mask: new station mask for modify + * @u.modify.queue: queue ID to modify + */ +struct iwl_scd_queue_cfg_cmd { + __le32 operation; + union { + struct { + __le32 sta_mask; + u8 tid; + u8 reserved[3]; + __le32 flags; + __le32 cb_size; + __le64 bc_dram_addr; + __le64 tfdq_dram_addr; + } __packed add; /* TX_QUEUE_CFG_CMD_ADD_API_S_VER_1 */ + struct { + __le32 queue; + } __packed remove; /* TX_QUEUE_CFG_CMD_REMOVE_API_S_VER_1 */ + struct { + __le32 sta_mask; + __le32 queue; + } __packed modify; /* TX_QUEUE_CFG_CMD_MODIFY_API_S_VER_1 */ + } __packed u; /* TX_QUEUE_CFG_CMD_OPERATION_API_U_VER_1 */ +} __packed; /* TX_QUEUE_CFG_CMD_API_S_VER_3 */ + #endif /* __iwl_fw_api_datapath_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h b/drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h index 456b7eaac570..52bf96585fc6 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/dbg-tlv.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation */ #ifndef __iwl_fw_dbg_tlv_h__ #define __iwl_fw_dbg_tlv_h__ @@ -11,7 +11,8 @@ #define IWL_FW_INI_MAX_NAME 32 #define IWL_FW_INI_MAX_CFG_NAME 64 #define IWL_FW_INI_DOMAIN_ALWAYS_ON 0 -#define IWL_FW_INI_REGION_V2_MASK 0x0000FFFF +#define IWL_FW_INI_REGION_ID_MASK GENMASK(15, 0) +#define IWL_FW_INI_REGION_DUMP_POLICY_MASK GENMASK(31, 16) /** * struct iwl_fw_ini_hcmd @@ -249,11 +250,10 @@ struct iwl_fw_ini_hcmd_tlv { } __packed; /* FW_TLV_DEBUG_HCMD_API_S_VER_1 */ /** -* struct iwl_fw_ini_conf_tlv - preset configuration TLV +* struct iwl_fw_ini_addr_val - Address and value to set it to * * @address: the base address * @value: value to set at address - */ struct iwl_fw_ini_addr_val { __le32 address; @@ -475,6 +475,7 @@ enum iwl_fw_ini_time_point { * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG: override trigger configuration * @IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA: override trigger data. * Append otherwise + * @IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD: send cmd once dump collected */ enum iwl_fw_ini_trigger_apply_policy { IWL_FW_INI_APPLY_POLICY_MATCH_TIME_POINT = BIT(0), @@ -482,6 +483,7 @@ enum iwl_fw_ini_trigger_apply_policy { IWL_FW_INI_APPLY_POLICY_OVERRIDE_REGIONS = BIT(8), IWL_FW_INI_APPLY_POLICY_OVERRIDE_CFG = BIT(9), IWL_FW_INI_APPLY_POLICY_OVERRIDE_DATA = BIT(10), + IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD = BIT(16), }; /** @@ -496,4 +498,31 @@ enum iwl_fw_ini_trigger_reset_fw_policy { IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY, IWL_FW_INI_RESET_FW_MODE_STOP_AND_RELOAD_FW }; + +/** + * enum iwl_fw_ini_dump_policy - Determines how to handle dump based on enabled flags + * + * @IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT: OS has no limit of dump size + * @IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB: mini dump only 600KB region dump + * @IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB: mini dump 5MB size dump + */ +enum iwl_fw_ini_dump_policy { + IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT = BIT(0), + IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB = BIT(1), + IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB = BIT(2), + +}; + +/** + * enum iwl_fw_ini_dump_type - Determines dump type based on size defined by FW. + * + * @IWL_FW_INI_DUMP_BRIEF : only dump the most important regions + * @IWL_FW_INI_DEBUG_MEDIUM: dump more regions than "brief", but not all regions + * @IWL_FW_INI_DUMP_VERBOSE : dump all regions + */ +enum iwl_fw_ini_dump_type { + IWL_FW_INI_DUMP_BRIEF, + IWL_FW_INI_DUMP_MEDIUM, + IWL_FW_INI_DUMP_VERBOSE, +}; #endif diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/debug.h b/drivers/net/wireless/intel/iwlwifi/fw/api/debug.h index 029ae64bf2b2..6255257ddebe 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/debug.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/debug.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2005-2014, 2018-2020 Intel Corporation + * Copyright (C) 2005-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -43,6 +43,12 @@ enum iwl_debug_cmds { */ BUFFER_ALLOCATION = 0x8, /** + * @FW_DUMP_COMPLETE_CMD: + * sends command to fw once dump collection completed + * &struct iwl_dbg_dump_complete_cmd + */ + FW_DUMP_COMPLETE_CMD = 0xB, + /** * @MFU_ASSERT_DUMP_NTF: * &struct iwl_mfu_assert_dump_notif */ @@ -404,4 +410,15 @@ struct iwl_dbg_host_event_cfg_cmd { __le32 enabled_severities; } __packed; /* DEBUG_HOST_EVENT_CFG_CMD_API_S_VER_1 */ +/** + * struct iwl_dbg_dump_complete_cmd - dump complete cmd + * + * @tp: timepoint whose dump has completed + * @tp_data: timepoint data + */ +struct iwl_dbg_dump_complete_cmd { + __le32 tp; + __le32 tp_data; +} __packed; /* FW_DUMP_COMPLETE_CMD_API_S_VER_1 */ + #endif /* __iwl_fw_api_debug_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h b/drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h index d088c820b1a9..712532f17630 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/mac-cfg.h @@ -27,6 +27,10 @@ enum iwl_mac_conf_subcmd_ids { * @SESSION_PROTECTION_CMD: &struct iwl_mvm_session_prot_cmd */ SESSION_PROTECTION_CMD = 0x5, + /** + * @CANCEL_CHANNEL_SWITCH_CMD: &struct iwl_cancel_channel_switch_cmd + */ + CANCEL_CHANNEL_SWITCH_CMD = 0x6, /** * @SESSION_PROTECTION_NOTIF: &struct iwl_mvm_session_prot_notif @@ -42,6 +46,11 @@ enum iwl_mac_conf_subcmd_ids { * @CHANNEL_SWITCH_START_NOTIF: &struct iwl_channel_switch_start_notif */ CHANNEL_SWITCH_START_NOTIF = 0xFF, + + /** + *@CHANNEL_SWITCH_ERROR_NOTIF: &struct iwl_channel_switch_error_notif + */ + CHANNEL_SWITCH_ERROR_NOTIF = 0xF9, }; #define IWL_P2P_NOA_DESC_COUNT (2) @@ -110,6 +119,31 @@ struct iwl_channel_switch_start_notif { __le32 id_and_color; } __packed; /* CHANNEL_SWITCH_START_NTFY_API_S_VER_1 */ +#define CS_ERR_COUNT_ERROR BIT(0) +#define CS_ERR_LONG_DELAY_AFTER_CS BIT(1) +#define CS_ERR_LONG_TX_BLOCK BIT(2) +#define CS_ERR_TX_BLOCK_TIMER_EXPIRED BIT(3) + +/** + * struct iwl_channel_switch_error_notif - Channel switch error notification + * + * @mac_id: the mac for which the ucode sends the notification for + * @csa_err_mask: mask of channel switch error that can occur + */ +struct iwl_channel_switch_error_notif { + __le32 mac_id; + __le32 csa_err_mask; +} __packed; /* CHANNEL_SWITCH_ERROR_NTFY_API_S_VER_1 */ + +/** + * struct iwl_cancel_channel_switch_cmd - Cancel Channel Switch command + * + * @mac_id: the mac that should cancel the channel switch + */ +struct iwl_cancel_channel_switch_cmd { + __le32 mac_id; +} __packed; /* MAC_CANCEL_CHANNEL_SWITCH_S_VER_1 */ + /** * struct iwl_chan_switch_te_cmd - Channel Switch Time Event command * diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/mac.h b/drivers/net/wireless/intel/iwlwifi/fw/api/mac.h index 11f0bd283e49..9b7caf968346 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/mac.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/mac.h @@ -413,10 +413,11 @@ enum iwl_he_pkt_ext_constellations { }; #define MAX_HE_SUPP_NSS 2 -#define MAX_HE_CHANNEL_BW_INDX 4 +#define MAX_CHANNEL_BW_INDX_API_D_VER_2 4 +#define MAX_CHANNEL_BW_INDX_API_D_VER_3 5 /** - * struct iwl_he_pkt_ext - QAM thresholds + * struct iwl_he_pkt_ext_v1 - QAM thresholds * The required PPE is set via HE Capabilities IE, per Nss x BW x MCS * The IE is organized in the following way: * Support for Nss x BW (or RU) matrix: @@ -435,9 +436,34 @@ enum iwl_he_pkt_ext_constellations { * Nss (0-siso, 1-mimo2) x BW (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz) x * (0-low_th, 1-high_th) */ -struct iwl_he_pkt_ext { - u8 pkt_ext_qam_th[MAX_HE_SUPP_NSS][MAX_HE_CHANNEL_BW_INDX][2]; -} __packed; /* PKT_EXT_DOT11AX_API_S */ +struct iwl_he_pkt_ext_v1 { + u8 pkt_ext_qam_th[MAX_HE_SUPP_NSS][MAX_CHANNEL_BW_INDX_API_D_VER_2][2]; +} __packed; /* PKT_EXT_DOT11AX_API_S_VER_1 */ + +/** + * struct iwl_he_pkt_ext_v2 - QAM thresholds + * The required PPE is set via HE Capabilities IE, per Nss x BW x MCS + * The IE is organized in the following way: + * Support for Nss x BW (or RU) matrix: + * (0=SISO, 1=MIMO2) x (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz) + * Each entry contains 2 QAM thresholds for 8us and 16us: + * 0=BPSK, 1=QPSK, 2=16QAM, 3=64QAM, 4=256QAM, 5=1024QAM, 6=RES, 7=NONE + * i.e. QAM_th1 < QAM_th2 such if TX uses QAM_tx: + * QAM_tx < QAM_th1 --> PPE=0us + * QAM_th1 <= QAM_tx < QAM_th2 --> PPE=8us + * QAM_th2 <= QAM_tx --> PPE=16us + * @pkt_ext_qam_th: QAM thresholds + * For each Nss/Bw define 2 QAM thrsholds (0..5) + * For rates below the low_th, no need for PPE + * For rates between low_th and high_th, need 8us PPE + * For rates equal or higher then the high_th, need 16us PPE + * Nss (0-siso, 1-mimo2) x + * BW (0-20MHz, 1-40MHz, 2-80MHz, 3-160MHz, 4-320MHz) x + * (0-low_th, 1-high_th) + */ +struct iwl_he_pkt_ext_v2 { + u8 pkt_ext_qam_th[MAX_HE_SUPP_NSS][MAX_CHANNEL_BW_INDX_API_D_VER_3][2]; +} __packed; /* PKT_EXT_DOT11AX_API_S_VER_2 */ /** * enum iwl_he_sta_ctxt_flags - HE STA context flags @@ -464,6 +490,11 @@ struct iwl_he_pkt_ext { * @STA_CTXT_HE_RU_2MHZ_BLOCK: indicates that 26-tone RU OFDMA transmission are * not allowed (as there are OBSS that might classify such transmissions as * radar pulses). + * @STA_CTXT_HE_NDP_FEEDBACK_ENABLED: mark support for NDP feedback and change + * of threshold + * @STA_CTXT_EHT_PUNCTURE_MASK_VALID: indicates the puncture_mask field is valid + * @STA_CTXT_EHT_LONG_PPE_ENABLED: indicates the PPE requirement should be + * extended to 20us for BW > 160Mhz or for MCS w/ 4096-QAM. */ enum iwl_he_sta_ctxt_flags { STA_CTXT_HE_REF_BSSID_VALID = BIT(4), @@ -477,6 +508,9 @@ enum iwl_he_sta_ctxt_flags { STA_CTXT_HE_MU_EDCA_CW = BIT(12), STA_CTXT_HE_NIC_NOT_ACK_ENABLED = BIT(13), STA_CTXT_HE_RU_2MHZ_BLOCK = BIT(14), + STA_CTXT_HE_NDP_FEEDBACK_ENABLED = BIT(15), + STA_CTXT_EHT_PUNCTURE_MASK_VALID = BIT(16), + STA_CTXT_EHT_LONG_PPE_ENABLED = BIT(17), }; /** @@ -551,7 +585,7 @@ struct iwl_he_sta_context_cmd_v1 { u8 frag_min_size; /* The below fields are set via PPE thresholds element */ - struct iwl_he_pkt_ext pkt_ext; + struct iwl_he_pkt_ext_v1 pkt_ext; /* The below fields are set via HE-Operation IE */ u8 bss_color; @@ -568,7 +602,7 @@ struct iwl_he_sta_context_cmd_v1 { } __packed; /* STA_CONTEXT_DOT11AX_API_S_VER_1 */ /** - * struct iwl_he_sta_context_cmd - configure FW to work with HE AP + * struct iwl_he_sta_context_cmd_v2 - configure FW to work with HE AP * @sta_id: STA id * @tid_limit: max num of TIDs in TX HE-SU multi-TID agg * 0 - bad value, 1 - multi-tid not supported, 2..8 - tid limit @@ -599,7 +633,7 @@ struct iwl_he_sta_context_cmd_v1 { * @bssid_count: actual number of VAPs in the MultiBSS Set * @reserved4: alignment */ -struct iwl_he_sta_context_cmd { +struct iwl_he_sta_context_cmd_v2 { u8 sta_id; u8 tid_limit; u8 reserved1; @@ -619,7 +653,7 @@ struct iwl_he_sta_context_cmd { u8 frag_min_size; /* The below fields are set via PPE thresholds element */ - struct iwl_he_pkt_ext pkt_ext; + struct iwl_he_pkt_ext_v1 pkt_ext; /* The below fields are set via HE-Operation IE */ u8 bss_color; @@ -643,6 +677,81 @@ struct iwl_he_sta_context_cmd { } __packed; /* STA_CONTEXT_DOT11AX_API_S_VER_2 */ /** + * struct iwl_he_sta_context_cmd_v3 - configure FW to work with HE AP + * @sta_id: STA id + * @tid_limit: max num of TIDs in TX HE-SU multi-TID agg + * 0 - bad value, 1 - multi-tid not supported, 2..8 - tid limit + * @reserved1: reserved byte for future use + * @reserved2: reserved byte for future use + * @flags: see %iwl_11ax_sta_ctxt_flags + * @ref_bssid_addr: reference BSSID used by the AP + * @reserved0: reserved 2 bytes for aligning the ref_bssid_addr field to 8 bytes + * @htc_flags: which features are supported in HTC + * @frag_flags: frag support in A-MSDU + * @frag_level: frag support level + * @frag_max_num: max num of "open" MSDUs in the receiver (in power of 2) + * @frag_min_size: min frag size (except last frag) + * @pkt_ext: optional, exists according to PPE-present bit in the HE-PHY capa + * @bss_color: 11ax AP ID that is used in the HE SIG-A to mark inter BSS frame + * @htc_trig_based_pkt_ext: default PE in 4us units + * @frame_time_rts_th: HE duration RTS threshold, in units of 32us + * @rand_alloc_ecwmin: random CWmin = 2**ECWmin-1 + * @rand_alloc_ecwmax: random CWmax = 2**ECWmax-1 + * @puncture_mask: puncture mask for EHT + * @trig_based_txf: MU EDCA Parameter set for the trigger based traffic queues + * @max_bssid_indicator: indicator of the max bssid supported on the associated + * bss + * @bssid_index: index of the associated VAP + * @ema_ap: AP supports enhanced Multi BSSID advertisement + * @profile_periodicity: number of Beacon periods that are needed to receive the + * complete VAPs info + * @bssid_count: actual number of VAPs in the MultiBSS Set + * @reserved4: alignment + */ +struct iwl_he_sta_context_cmd_v3 { + u8 sta_id; + u8 tid_limit; + u8 reserved1; + u8 reserved2; + __le32 flags; + + /* The below fields are set via Multiple BSSID IE */ + u8 ref_bssid_addr[6]; + __le16 reserved0; + + /* The below fields are set via HE-capabilities IE */ + __le32 htc_flags; + + u8 frag_flags; + u8 frag_level; + u8 frag_max_num; + u8 frag_min_size; + + /* The below fields are set via PPE thresholds element */ + struct iwl_he_pkt_ext_v2 pkt_ext; + + /* The below fields are set via HE-Operation IE */ + u8 bss_color; + u8 htc_trig_based_pkt_ext; + __le16 frame_time_rts_th; + + /* Random access parameter set (i.e. RAPS) */ + u8 rand_alloc_ecwmin; + u8 rand_alloc_ecwmax; + __le16 puncture_mask; + + /* The below fields are set via MU EDCA parameter set element */ + struct iwl_he_backoff_conf trig_based_txf[AC_NUM]; + + u8 max_bssid_indicator; + u8 bssid_index; + u8 ema_ap; + u8 profile_periodicity; + u8 bssid_count; + u8 reserved4[3]; +} __packed; /* STA_CONTEXT_DOT11AX_API_S_VER_2 */ + +/** * struct iwl_he_monitor_cmd - configure air sniffer for HE * @bssid: the BSSID to sniff for * @reserved1: reserved for dword alignment diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h b/drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h index 4949fcf85257..91bfde6d5367 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/nvm-reg.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2012-2014, 2018-2021 Intel Corporation + * Copyright (C) 2012-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -420,6 +420,30 @@ struct iwl_tas_config_cmd_v3 { } __packed; /* TAS_CONFIG_CMD_API_S_VER_3 */ /** + * struct iwl_tas_config_cmd_v3 - configures the TAS + * @block_list_size: size of relevant field in block_list_array + * @block_list_array: list of countries where TAS must be disabled + * @override_tas_iec: indicates whether to override default value of IEC regulatory + * @enable_tas_iec: in case override_tas_iec is set - + * indicates whether IEC regulatory is enabled or disabled + * @usa_tas_uhb_allowed: if set, allow TAS UHB in the USA + * @reserved: reserved +*/ +struct iwl_tas_config_cmd_v4 { + __le32 block_list_size; + __le32 block_list_array[IWL_TAS_BLOCK_LIST_MAX]; + u8 override_tas_iec; + u8 enable_tas_iec; + u8 usa_tas_uhb_allowed; + u8 reserved; +} __packed; /* TAS_CONFIG_CMD_API_S_VER_4 */ + +union iwl_tas_config_cmd { + struct iwl_tas_config_cmd_v2 v2; + struct iwl_tas_config_cmd_v3 v3; + struct iwl_tas_config_cmd_v4 v4; +}; +/** * enum iwl_lari_configs - bit masks for the various LARI config operations * @LARI_CONFIG_DISABLE_11AC_UKRAINE_MSK: disable 11ac in ukraine * @LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK: ETSI 5.8GHz SRD passive scan @@ -515,6 +539,32 @@ struct iwl_lari_config_change_cmd_v5 { } __packed; /* LARI_CHANGE_CONF_CMD_S_VER_5 */ /** + * struct iwl_lari_config_change_cmd_v6 - change LARI configuration + * @config_bitmap: Bitmap of the config commands. Each bit will trigger a + * different predefined FW config operation. + * @oem_uhb_allow_bitmap: Bitmap of UHB enabled MCC sets. + * @oem_11ax_allow_bitmap: Bitmap of 11ax allowed MCCs. There are two bits + * per country, one to indicate whether to override and the other to + * indicate the value to use. + * @oem_unii4_allow_bitmap: Bitmap of unii4 allowed MCCs.There are two bits + * per country, one to indicate whether to override and the other to + * indicate allow/disallow unii4 channels. + * @chan_state_active_bitmap: Bitmap for overriding channel state to active. + * Each bit represents a country or region to activate, according to the BIOS + * definitions. + * @force_disable_channels_bitmap: Bitmap of disabled bands/channels. + * Each bit represents a set of channels in a specific band that should be disabled + */ +struct iwl_lari_config_change_cmd_v6 { + __le32 config_bitmap; + __le32 oem_uhb_allow_bitmap; + __le32 oem_11ax_allow_bitmap; + __le32 oem_unii4_allow_bitmap; + __le32 chan_state_active_bitmap; + __le32 force_disable_channels_bitmap; +} __packed; /* LARI_CHANGE_CONF_CMD_S_VER_6 */ + +/** * struct iwl_pnvm_init_complete_ntfy - PNVM initialization complete * @status: PNVM image loading status */ diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/phy.h b/drivers/net/wireless/intel/iwlwifi/fw/api/phy.h index c04f2521fcb3..b1b9c29859c1 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/phy.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/phy.h @@ -166,14 +166,24 @@ struct iwl_dts_measurement_resp { /** * struct ct_kill_notif - CT-kill entry notification + * This structure represent both versions of this notification. * * @temperature: the current temperature in celsius - * @reserved: reserved + * @dts: only in v2: DTS that trigger the CT Kill bitmap: + * bit 0: ToP master + * bit 1: PA chain A master + * bit 2: PA chain B master + * bit 3: ToP slave + * bit 4: PA chain A slave + * bit 5: PA chain B slave) + * bits 6,7: reserved (set to 0) + * @scheme: only for v2: scheme that trigger the CT Kill (0-SW, 1-HW) */ struct ct_kill_notif { __le16 temperature; - __le16 reserved; -} __packed; /* GRP_PHY_CT_KILL_NTF */ + u8 dts; + u8 scheme; +} __packed; /* CT_KILL_NOTIFICATION_API_S_VER_1, CT_KILL_NOTIFICATION_API_S_VER_2 */ /** * enum ctdp_cmd_operation - CTDP command operations diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/power.h b/drivers/net/wireless/intel/iwlwifi/fw/api/power.h index 81318208f2f6..f92cac1da764 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/power.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/power.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2012-2014, 2018-2021 Intel Corporation + * Copyright (C) 2012-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2014 Intel Mobile Communications GmbH * Copyright (C) 2015-2017 Intel Deutschland GmbH */ @@ -340,7 +340,7 @@ struct iwl_dev_tx_power_cmd_v5 { } __packed; /* TX_REDUCED_POWER_API_S_VER_5 */ /** - * struct iwl_dev_tx_power_cmd_v5 - TX power reduction command version 5 + * struct iwl_dev_tx_power_cmd_v6 - TX power reduction command version 6 * @per_chain: per chain restrictions * @enable_ack_reduction: enable or disable close range ack TX power * reduction. @@ -361,6 +361,28 @@ struct iwl_dev_tx_power_cmd_v6 { } __packed; /* TX_REDUCED_POWER_API_S_VER_6 */ /** + * struct iwl_dev_tx_power_cmd_v7 - TX power reduction command version 7 + * @per_chain: per chain restrictions + * @enable_ack_reduction: enable or disable close range ack TX power + * reduction. + * @per_chain_restriction_changed: is per_chain_restriction has changed + * from last command. used if set_mode is + * IWL_TX_POWER_MODE_SET_SAR_TIMER. + * note: if not changed, the command is used for keep alive only. + * @reserved: reserved (padding) + * @timer_period: timer in milliseconds. if expires FW will change to default + * BIOS values. relevant if setMode is IWL_TX_POWER_MODE_SET_SAR_TIMER + * @flags: reduce power flags. + */ +struct iwl_dev_tx_power_cmd_v7 { + __le16 per_chain[IWL_NUM_CHAIN_TABLES_V2][IWL_NUM_CHAIN_LIMITS][IWL_NUM_SUB_BANDS_V2]; + u8 enable_ack_reduction; + u8 per_chain_restriction_changed; + u8 reserved[2]; + __le32 timer_period; + __le32 flags; +} __packed; /* TX_REDUCED_POWER_API_S_VER_7 */ +/** * struct iwl_dev_tx_power_cmd - TX power reduction command (multiversion) * @common: common part of the command * @v3: version 3 part of the command @@ -375,6 +397,7 @@ struct iwl_dev_tx_power_cmd { struct iwl_dev_tx_power_cmd_v4 v4; struct iwl_dev_tx_power_cmd_v5 v5; struct iwl_dev_tx_power_cmd_v6 v6; + struct iwl_dev_tx_power_cmd_v7 v7; }; }; diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/rfi.h b/drivers/net/wireless/intel/iwlwifi/fw/api/rfi.h index c678b9aa9b55..1a84a4081e7c 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/rfi.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/rfi.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2020 Intel Corporation + * Copyright (C) 2020-2021 Intel Corporation */ #ifndef __iwl_fw_api_rfi_h__ #define __iwl_fw_api_rfi_h__ @@ -57,4 +57,12 @@ struct iwl_rfi_freq_table_resp_cmd { __le32 status; } __packed; /* RFI_CONFIG_CMD_API_S_VER_1 */ +/** + * struct iwl_rfi_deactivate_notif - notifcation that FW disaled RFIm + * + * @reason: used only for a log message + */ +struct iwl_rfi_deactivate_notif { + __le32 reason; +} __packed; /* RFI_DEACTIVATE_NTF_S_VER_1 */ #endif /* __iwl_fw_api_rfi_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/rs.h b/drivers/net/wireless/intel/iwlwifi/fw/api/rs.h index 4a7723eb8c1d..687f804c46b7 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/rs.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/rs.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2012-2014, 2018-2020 Intel Corporation + * Copyright (C) 2012-2014, 2018-2022 Intel Corporation * Copyright (C) 2017 Intel Deutschland GmbH */ #ifndef __iwl_fw_api_rs_h__ @@ -133,7 +133,7 @@ enum IWL_TLC_MCS_PER_BW { }; /** - * struct tlc_config_cmd - TLC configuration + * struct iwl_tlc_config_cmd_v3 - TLC configuration * @sta_id: station id * @reserved1: reserved * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw @@ -168,7 +168,7 @@ struct iwl_tlc_config_cmd_v3 { } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_3 */ /** - * struct tlc_config_cmd - TLC configuration + * struct iwl_tlc_config_cmd_v4 - TLC configuration * @sta_id: station id * @reserved1: reserved * @max_ch_width: max supported channel width from &enum iwl_tlc_mng_cfg_cw diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/tx.h b/drivers/net/wireless/intel/iwlwifi/fw/api/tx.h index e73cc7380a26..ecc6706f66ed 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/tx.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/tx.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2012-2014, 2018-2021 Intel Corporation + * Copyright (C) 2012-2014, 2018-2022 Intel Corporation * Copyright (C) 2016-2017 Intel Deutschland GmbH */ #ifndef __iwl_fw_api_tx_h__ @@ -296,8 +296,7 @@ struct iwl_tx_cmd_gen2 { * @dram_info: FW internal DRAM storage * @rate_n_flags: rate for *all* Tx attempts, if TX_CMD_FLG_STA_RATE_MSK is * cleared. Combination of RATE_MCS_* - * @ttl: time to live - packet lifetime limit. The FW should drop if - * passed. + * @reserved: reserved * @hdr: 802.11 header */ struct iwl_tx_cmd_gen3 { @@ -306,7 +305,7 @@ struct iwl_tx_cmd_gen3 { __le32 offload_assist; struct iwl_dram_sec_info dram_info; __le32 rate_n_flags; - __le64 ttl; + u8 reserved[8]; struct ieee80211_hdr hdr[]; } __packed; /* TX_CMD_API_S_VER_8, TX_CMD_API_S_VER_10 */ diff --git a/drivers/net/wireless/intel/iwlwifi/fw/api/txq.h b/drivers/net/wireless/intel/iwlwifi/fw/api/txq.h index 8b3a00df41da..e018946310d1 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/api/txq.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/api/txq.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2005-2014, 2019-2020 Intel Corporation + * Copyright (C) 2005-2014, 2019-2021 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -76,6 +76,8 @@ enum iwl_tx_queue_cfg_actions { TX_QUEUE_CFG_TFD_SHORT_FORMAT = BIT(1), }; +#define IWL_DEFAULT_QUEUE_SIZE_EHT (1024 * 4) +#define IWL_DEFAULT_QUEUE_SIZE_HE 1024 #define IWL_DEFAULT_QUEUE_SIZE 256 #define IWL_MGMT_QUEUE_SIZE 16 #define IWL_CMD_QUEUE_SIZE 32 diff --git a/drivers/net/wireless/intel/iwlwifi/fw/dbg.c b/drivers/net/wireless/intel/iwlwifi/fw/dbg.c index 7ad9cee925da..abf49022edbe 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/dbg.c +++ b/drivers/net/wireless/intel/iwlwifi/fw/dbg.c @@ -12,7 +12,7 @@ #include "iwl-io.h" #include "iwl-prph.h" #include "iwl-csr.h" - +#include "iwl-fh.h" /** * struct iwl_fw_dump_ptrs - set of pointers needed for the fw-error-dump * @@ -303,9 +303,6 @@ static void iwl_fw_dump_txf(struct iwl_fw_runtime *fwrt, iwl_trans_release_nic_access(fwrt->trans); } -#define IWL8260_ICCM_OFFSET 0x44000 /* Only for B-step */ -#define IWL8260_ICCM_LEN 0xC000 /* Only for B-step */ - struct iwl_prph_range { u32 start, end; }; @@ -1027,7 +1024,7 @@ struct iwl_dump_ini_region_data { static int iwl_dump_ini_prph_mac_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1052,7 +1049,7 @@ iwl_dump_ini_prph_mac_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_prph_phy_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1102,7 +1099,7 @@ iwl_dump_ini_prph_phy_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_csr_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1121,7 +1118,7 @@ static int iwl_dump_ini_csr_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_config_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_trans *trans = fwrt->trans; struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; @@ -1153,7 +1150,7 @@ static int iwl_dump_ini_config_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_dev_mem_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1175,7 +1172,7 @@ static int iwl_dump_ini_dev_mem_iter(struct iwl_fw_runtime *fwrt, } static int _iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct page *page = fwrt->fw_paging_db[idx].fw_paging_block; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1195,7 +1192,7 @@ static int _iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_error_dump_range *range; u32 page_size; @@ -1204,7 +1201,7 @@ static int iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt, idx++; if (!fwrt->trans->trans_cfg->gen2) - return _iwl_dump_ini_paging_iter(fwrt, range_ptr, idx); + return _iwl_dump_ini_paging_iter(fwrt, range_ptr, range_len, idx); range = range_ptr; page_size = fwrt->trans->init_dram.paging[idx].size; @@ -1220,7 +1217,7 @@ static int iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_mon_dram_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1239,7 +1236,7 @@ iwl_dump_ini_mon_dram_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_mon_smem_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1307,7 +1304,7 @@ static bool iwl_ini_txf_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1442,7 +1439,7 @@ static void iwl_ini_get_rxf_data(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1509,7 +1506,7 @@ out: static int iwl_dump_ini_err_table_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_region_err_table *err_table = ®->err_table; @@ -1528,7 +1525,7 @@ iwl_dump_ini_err_table_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_special_mem_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_region_special_device_memory *special_mem = @@ -1549,7 +1546,7 @@ iwl_dump_ini_special_mem_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_dbgi_sram_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_error_dump_range *range = range_ptr; @@ -1561,8 +1558,6 @@ iwl_dump_ini_dbgi_sram_iter(struct iwl_fw_runtime *fwrt, return -EBUSY; range->range_data_size = reg->dev_addr.size; - iwl_write_prph_no_grab(fwrt->trans, DBGI_SRAM_TARGET_ACCESS_CFG, - DBGI_SRAM_TARGET_ACCESS_CFG_RESET_ADDRESS_MSK); for (i = 0; i < (le32_to_cpu(reg->dev_addr.size) / 4); i++) { prph_data = iwl_read_prph_no_grab(fwrt->trans, (i % 2) ? DBGI_SRAM_TARGET_ACCESS_RDATA_MSB : @@ -1579,7 +1574,7 @@ iwl_dump_ini_dbgi_sram_iter(struct iwl_fw_runtime *fwrt, static int iwl_dump_ini_fw_pkt_iter(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range_ptr, int idx) + void *range_ptr, u32 range_len, int idx) { struct iwl_fw_ini_error_dump_range *range = range_ptr; struct iwl_rx_packet *pkt = reg_data->dump_data->fw_pkt; @@ -1598,10 +1593,37 @@ static int iwl_dump_ini_fw_pkt_iter(struct iwl_fw_runtime *fwrt, return sizeof(*range) + le32_to_cpu(range->range_data_size); } +static int iwl_dump_ini_imr_iter(struct iwl_fw_runtime *fwrt, + struct iwl_dump_ini_region_data *reg_data, + void *range_ptr, u32 range_len, int idx) +{ + /* read the IMR memory and DMA it to SRAM */ + struct iwl_fw_ini_error_dump_range *range = range_ptr; + u64 imr_curr_addr = fwrt->trans->dbg.imr_data.imr_curr_addr; + u32 imr_rem_bytes = fwrt->trans->dbg.imr_data.imr2sram_remainbyte; + u32 sram_addr = fwrt->trans->dbg.imr_data.sram_addr; + u32 sram_size = fwrt->trans->dbg.imr_data.sram_size; + u32 size_to_dump = (imr_rem_bytes > sram_size) ? sram_size : imr_rem_bytes; + + range->range_data_size = cpu_to_le32(size_to_dump); + if (iwl_trans_write_imr_mem(fwrt->trans, sram_addr, + imr_curr_addr, size_to_dump)) { + IWL_ERR(fwrt, "WRT_DEBUG: IMR Memory transfer failed\n"); + return -1; + } + + fwrt->trans->dbg.imr_data.imr_curr_addr = imr_curr_addr + size_to_dump; + fwrt->trans->dbg.imr_data.imr2sram_remainbyte -= size_to_dump; + + iwl_trans_read_mem_bytes(fwrt->trans, sram_addr, range->data, + size_to_dump); + return sizeof(*range) + le32_to_cpu(range->range_data_size); +} + static void * iwl_dump_ini_mem_fill_header(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *data) + void *data, u32 data_len) { struct iwl_fw_ini_error_dump *dump = data; @@ -1677,7 +1699,7 @@ iwl_dump_ini_mon_fill_header(struct iwl_fw_runtime *fwrt, static void * iwl_dump_ini_mon_dram_fill_header(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *data) + void *data, u32 data_len) { struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data; @@ -1688,7 +1710,7 @@ iwl_dump_ini_mon_dram_fill_header(struct iwl_fw_runtime *fwrt, static void * iwl_dump_ini_mon_smem_fill_header(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *data) + void *data, u32 data_len) { struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data; @@ -1697,9 +1719,20 @@ iwl_dump_ini_mon_smem_fill_header(struct iwl_fw_runtime *fwrt, } static void * +iwl_dump_ini_mon_dbgi_fill_header(struct iwl_fw_runtime *fwrt, + struct iwl_dump_ini_region_data *reg_data, + void *data, u32 data_len) +{ + struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data; + + return iwl_dump_ini_mon_fill_header(fwrt, reg_data, mon_dump, + &fwrt->trans->cfg->mon_dbgi_regs); +} + +static void * iwl_dump_ini_err_table_fill_header(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *data) + void *data, u32 data_len) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_err_table_dump *dump = data; @@ -1713,7 +1746,7 @@ iwl_dump_ini_err_table_fill_header(struct iwl_fw_runtime *fwrt, static void * iwl_dump_ini_special_mem_fill_header(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *data) + void *data, u32 data_len) { struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; struct iwl_fw_ini_special_device_memory *dump = data; @@ -1725,6 +1758,18 @@ iwl_dump_ini_special_mem_fill_header(struct iwl_fw_runtime *fwrt, return dump->data; } +static void * +iwl_dump_ini_imr_fill_header(struct iwl_fw_runtime *fwrt, + struct iwl_dump_ini_region_data *reg_data, + void *data, u32 data_len) +{ + struct iwl_fw_ini_error_dump *dump = data; + + dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER); + + return dump->data; +} + static u32 iwl_dump_ini_mem_ranges(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data) { @@ -1784,6 +1829,26 @@ static u32 iwl_dump_ini_single_range(struct iwl_fw_runtime *fwrt, return 1; } +static u32 iwl_dump_ini_imr_ranges(struct iwl_fw_runtime *fwrt, + struct iwl_dump_ini_region_data *reg_data) +{ + /* range is total number of pages need to copied from + *IMR memory to SRAM and later from SRAM to DRAM + */ + u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable; + u32 imr_size = fwrt->trans->dbg.imr_data.imr_size; + u32 sram_size = fwrt->trans->dbg.imr_data.sram_size; + + if (imr_enable == 0 || imr_size == 0 || sram_size == 0) { + IWL_DEBUG_INFO(fwrt, + "WRT: Invalid imr data enable: %d, imr_size: %d, sram_size: %d\n", + imr_enable, imr_size, sram_size); + return 0; + } + + return((imr_size % sram_size) ? (imr_size / sram_size + 1) : (imr_size / sram_size)); +} + static u32 iwl_dump_ini_mem_get_size(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data) { @@ -1861,6 +1926,20 @@ iwl_dump_ini_mon_smem_get_size(struct iwl_fw_runtime *fwrt, return size; } +static u32 iwl_dump_ini_mon_dbgi_get_size(struct iwl_fw_runtime *fwrt, + struct iwl_dump_ini_region_data *reg_data) +{ + struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data; + u32 size = le32_to_cpu(reg->dev_addr.size); + u32 ranges = iwl_dump_ini_mem_ranges(fwrt, reg_data); + + if (!size || !ranges) + return 0; + + return sizeof(struct iwl_fw_ini_monitor_dump) + ranges * + (size + sizeof(struct iwl_fw_ini_error_dump_range)); +} + static u32 iwl_dump_ini_txf_get_size(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data) { @@ -1948,6 +2027,33 @@ iwl_dump_ini_fw_pkt_get_size(struct iwl_fw_runtime *fwrt, return size; } +static u32 +iwl_dump_ini_imr_get_size(struct iwl_fw_runtime *fwrt, + struct iwl_dump_ini_region_data *reg_data) +{ + u32 size = 0; + u32 ranges = 0; + u32 imr_enable = fwrt->trans->dbg.imr_data.imr_enable; + u32 imr_size = fwrt->trans->dbg.imr_data.imr_size; + u32 sram_size = fwrt->trans->dbg.imr_data.sram_size; + + if (imr_enable == 0 || imr_size == 0 || sram_size == 0) { + IWL_DEBUG_INFO(fwrt, + "WRT: Invalid imr data enable: %d, imr_size: %d, sram_size: %d\n", + imr_enable, imr_size, sram_size); + return size; + } + size = imr_size; + ranges = iwl_dump_ini_imr_ranges(fwrt, reg_data); + if (!size && !ranges) { + IWL_ERR(fwrt, "WRT: imr_size :=%d, ranges :=%d\n", size, ranges); + return 0; + } + size += sizeof(struct iwl_fw_ini_error_dump) + + ranges * sizeof(struct iwl_fw_ini_error_dump_range); + return size; +} + /** * struct iwl_dump_ini_mem_ops - ini memory dump operations * @get_num_of_ranges: returns the number of memory ranges in the region. @@ -1964,10 +2070,10 @@ struct iwl_dump_ini_mem_ops { struct iwl_dump_ini_region_data *reg_data); void *(*fill_mem_hdr)(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *data); + void *data, u32 data_len); int (*fill_range)(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data *reg_data, - void *range, int idx); + void *range, u32 range_len, int idx); }; /** @@ -1990,24 +2096,53 @@ static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt, struct list_head *list, struct iwl_fw_ini_error_dump_data *tlv; struct iwl_fw_ini_error_dump_header *header; u32 type = reg->type; - u32 id = le32_to_cpu(reg->id); + u32 id = le32_get_bits(reg->id, IWL_FW_INI_REGION_ID_MASK); u32 num_of_ranges, i, size; - void *range; - - /* - * The higher part of the ID from 2 is irrelevant for - * us, so mask it out. - */ - if (le32_to_cpu(reg->hdr.version) >= 2) - id &= IWL_FW_INI_REGION_V2_MASK; + u8 *range; + u32 free_size; + u64 header_size; + u32 dump_policy = IWL_FW_INI_DUMP_VERBOSE; + + IWL_DEBUG_FW(fwrt, "WRT: Collecting region: dump type=%d, id=%d, type=%d\n", + dump_policy, id, type); + + if (le32_to_cpu(reg->hdr.version) >= 2) { + u32 dp = le32_get_bits(reg->id, + IWL_FW_INI_REGION_DUMP_POLICY_MASK); + + if (dump_policy == IWL_FW_INI_DUMP_VERBOSE && + !(dp & IWL_FW_INI_DEBUG_DUMP_POLICY_NO_LIMIT)) { + IWL_DEBUG_FW(fwrt, + "WRT: no dump - type %d and policy mismatch=%d\n", + dump_policy, dp); + return 0; + } else if (dump_policy == IWL_FW_INI_DUMP_MEDIUM && + !(dp & IWL_FW_IWL_DEBUG_DUMP_POLICY_MAX_LIMIT_5MB)) { + IWL_DEBUG_FW(fwrt, + "WRT: no dump - type %d and policy mismatch=%d\n", + dump_policy, dp); + return 0; + } else if (dump_policy == IWL_FW_INI_DUMP_BRIEF && + !(dp & IWL_FW_INI_DEBUG_DUMP_POLICY_MAX_LIMIT_600KB)) { + IWL_DEBUG_FW(fwrt, + "WRT: no dump - type %d and policy mismatch=%d\n", + dump_policy, dp); + return 0; + } + } if (!ops->get_num_of_ranges || !ops->get_size || !ops->fill_mem_hdr || - !ops->fill_range) + !ops->fill_range) { + IWL_DEBUG_FW(fwrt, "WRT: no ops for collecting data\n"); return 0; + } size = ops->get_size(fwrt, reg_data); - if (!size) + + if (size < sizeof(*header)) { + IWL_DEBUG_FW(fwrt, "WRT: size didn't include space for header\n"); return 0; + } entry = vzalloc(sizeof(*entry) + sizeof(*tlv) + size); if (!entry) @@ -2022,9 +2157,6 @@ static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt, struct list_head *list, tlv->reserved = reg->reserved; tlv->len = cpu_to_le32(size); - IWL_DEBUG_FW(fwrt, "WRT: Collecting region: id=%d, type=%d\n", id, - type); - num_of_ranges = ops->get_num_of_ranges(fwrt, reg_data); header = (void *)tlv->data; @@ -2033,7 +2165,8 @@ static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt, struct list_head *list, header->name_len = cpu_to_le32(IWL_FW_INI_MAX_NAME); memcpy(header->name, reg->name, IWL_FW_INI_MAX_NAME); - range = ops->fill_mem_hdr(fwrt, reg_data, header); + free_size = size; + range = ops->fill_mem_hdr(fwrt, reg_data, header, free_size); if (!range) { IWL_ERR(fwrt, "WRT: Failed to fill region header: id=%d, type=%d\n", @@ -2041,8 +2174,21 @@ static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt, struct list_head *list, goto out_err; } + header_size = range - (u8 *)header; + + if (WARN(header_size > free_size, + "header size %llu > free_size %d", + header_size, free_size)) { + IWL_ERR(fwrt, + "WRT: fill_mem_hdr used more than given free_size\n"); + goto out_err; + } + + free_size -= header_size; + for (i = 0; i < num_of_ranges; i++) { - int range_size = ops->fill_range(fwrt, reg_data, range, i); + int range_size = ops->fill_range(fwrt, reg_data, range, + free_size, i); if (range_size < 0) { IWL_ERR(fwrt, @@ -2050,6 +2196,15 @@ static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt, struct list_head *list, id, type); goto out_err; } + + if (WARN(range_size > free_size, "range_size %d > free_size %d", + range_size, free_size)) { + IWL_ERR(fwrt, + "WRT: fill_raged used more than given free_size\n"); + goto out_err; + } + + free_size -= range_size; range = range + range_size; } @@ -2240,7 +2395,12 @@ static const struct iwl_dump_ini_mem_ops iwl_dump_ini_region_ops[] = { .fill_mem_hdr = iwl_dump_ini_mem_fill_header, .fill_range = iwl_dump_ini_csr_iter, }, - [IWL_FW_INI_REGION_DRAM_IMR] = {}, + [IWL_FW_INI_REGION_DRAM_IMR] = { + .get_num_of_ranges = iwl_dump_ini_imr_ranges, + .get_size = iwl_dump_ini_imr_get_size, + .fill_mem_hdr = iwl_dump_ini_imr_fill_header, + .fill_range = iwl_dump_ini_imr_iter, + }, [IWL_FW_INI_REGION_PCI_IOSF_CONFIG] = { .get_num_of_ranges = iwl_dump_ini_mem_ranges, .get_size = iwl_dump_ini_mem_get_size, @@ -2255,8 +2415,8 @@ static const struct iwl_dump_ini_mem_ops iwl_dump_ini_region_ops[] = { }, [IWL_FW_INI_REGION_DBGI_SRAM] = { .get_num_of_ranges = iwl_dump_ini_mem_ranges, - .get_size = iwl_dump_ini_mem_get_size, - .fill_mem_hdr = iwl_dump_ini_mem_fill_header, + .get_size = iwl_dump_ini_mon_dbgi_get_size, + .fill_mem_hdr = iwl_dump_ini_mon_dbgi_fill_header, .fill_range = iwl_dump_ini_dbgi_sram_iter, }, }; @@ -2270,6 +2430,9 @@ static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt, struct iwl_dump_ini_region_data reg_data = { .dump_data = dump_data, }; + struct iwl_dump_ini_region_data imr_reg_data = { + .dump_data = dump_data, + }; int i; u32 size = 0; u64 regions_mask = le64_to_cpu(trigger->regions_mask) & @@ -2305,10 +2468,32 @@ static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt, tp_id); continue; } + /* + * DRAM_IMR can be collected only for FW/HW error timepoint + * when fw is not alive. In addition, it must be collected + * lastly as it overwrites SRAM that can possibly contain + * debug data which also need to be collected. + */ + if (reg_type == IWL_FW_INI_REGION_DRAM_IMR) { + if (tp_id == IWL_FW_INI_TIME_POINT_FW_ASSERT || + tp_id == IWL_FW_INI_TIME_POINT_FW_HW_ERROR) + imr_reg_data.reg_tlv = fwrt->trans->dbg.active_regions[i]; + else + IWL_INFO(fwrt, + "WRT: trying to collect DRAM_IMR at time point: %d, skipping\n", + tp_id); + /* continue to next region */ + continue; + } + size += iwl_dump_ini_mem(fwrt, list, ®_data, &iwl_dump_ini_region_ops[reg_type]); } + /* collect DRAM_IMR region in the last */ + if (imr_reg_data.reg_tlv) + size += iwl_dump_ini_mem(fwrt, list, ®_data, + &iwl_dump_ini_region_ops[IWL_FW_INI_REGION_DRAM_IMR]); if (size) size += iwl_dump_ini_info(fwrt, trigger, list); @@ -2444,7 +2629,7 @@ static void iwl_fw_error_dump_data_free(struct iwl_fwrt_dump_data *dump_data) static void iwl_fw_error_ini_dump(struct iwl_fw_runtime *fwrt, struct iwl_fwrt_dump_data *dump_data) { - struct list_head dump_list = LIST_HEAD_INIT(dump_list); + LIST_HEAD(dump_list); struct scatterlist *sg_dump_data; u32 file_len = iwl_dump_ini_file_gen(fwrt, dump_data, &dump_list); @@ -2589,7 +2774,7 @@ int iwl_fw_dbg_collect(struct iwl_fw_runtime *fwrt, delay = le32_to_cpu(trigger->stop_delay) * USEC_PER_MSEC; } - desc = kzalloc(sizeof(*desc) + len, GFP_ATOMIC); + desc = kzalloc(struct_size(desc, trig_desc.data, len), GFP_ATOMIC); if (!desc) return -ENOMEM; @@ -2685,6 +2870,28 @@ int iwl_fw_start_dbg_conf(struct iwl_fw_runtime *fwrt, u8 conf_id) } IWL_EXPORT_SYMBOL(iwl_fw_start_dbg_conf); +void iwl_send_dbg_dump_complete_cmd(struct iwl_fw_runtime *fwrt, + u32 timepoint, + u32 timepoint_data) +{ + struct iwl_dbg_dump_complete_cmd hcmd_data; + struct iwl_host_cmd hcmd = { + .id = WIDE_ID(DEBUG_GROUP, FW_DUMP_COMPLETE_CMD), + .data[0] = &hcmd_data, + .len[0] = sizeof(hcmd_data), + }; + + if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status)) + return; + + if (fw_has_capa(&fwrt->fw->ucode_capa, + IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT)) { + hcmd_data.tp = cpu_to_le32(timepoint); + hcmd_data.tp_data = cpu_to_le32(timepoint_data); + iwl_trans_send_cmd(fwrt->trans, &hcmd); + } +} + /* this function assumes dump_start was called beforehand and dump_end will be * called afterwards */ @@ -2693,10 +2900,16 @@ static void iwl_fw_dbg_collect_sync(struct iwl_fw_runtime *fwrt, u8 wk_idx) struct iwl_fw_dbg_params params = {0}; struct iwl_fwrt_dump_data *dump_data = &fwrt->dump.wks[wk_idx].dump_data; - + u32 policy; + u32 time_point; if (!test_bit(wk_idx, &fwrt->dump.active_wks)) return; + if (!dump_data->trig) { + IWL_ERR(fwrt, "dump trigger data is not set\n"); + goto out; + } + if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status)) { IWL_ERR(fwrt, "Device is not enabled - cannot dump error\n"); goto out; @@ -2719,6 +2932,13 @@ static void iwl_fw_dbg_collect_sync(struct iwl_fw_runtime *fwrt, u8 wk_idx) iwl_fw_dbg_stop_restart_recording(fwrt, ¶ms, false); + policy = le32_to_cpu(dump_data->trig->apply_policy); + time_point = le32_to_cpu(dump_data->trig->time_point); + + if (policy & IWL_FW_INI_APPLY_POLICY_DUMP_COMPLETE_CMD) { + IWL_DEBUG_FW_INFO(fwrt, "WRT: sending dump complete\n"); + iwl_send_dbg_dump_complete_cmd(fwrt, time_point, 0); + } if (fwrt->trans->dbg.last_tp_resetfw == IWL_FW_INI_RESET_FW_MODE_STOP_FW_ONLY) iwl_force_nmi(fwrt->trans); @@ -2777,10 +2997,10 @@ int iwl_fw_dbg_ini_collect(struct iwl_fw_runtime *fwrt, "WRT: Collecting data: ini trigger %d fired (delay=%dms).\n", tp_id, (u32)(delay / USEC_PER_MSEC)); - schedule_delayed_work(&fwrt->dump.wks[idx].wk, usecs_to_jiffies(delay)); - if (sync) iwl_fw_dbg_collect_sync(fwrt, idx); + else + schedule_delayed_work(&fwrt->dump.wks[idx].wk, usecs_to_jiffies(delay)); return 0; } @@ -2795,9 +3015,8 @@ void iwl_fw_error_dump_wk(struct work_struct *work) /* assumes the op mode mutex is locked in dump_start since * iwl_fw_dbg_collect_sync can't run in parallel */ - if (fwrt->ops && fwrt->ops->dump_start && - fwrt->ops->dump_start(fwrt->ops_ctx)) - return; + if (fwrt->ops && fwrt->ops->dump_start) + fwrt->ops->dump_start(fwrt->ops_ctx); iwl_fw_dbg_collect_sync(fwrt, wks->idx); diff --git a/drivers/net/wireless/intel/iwlwifi/fw/dbg.h b/drivers/net/wireless/intel/iwlwifi/fw/dbg.h index 8c3c890066b0..be7806407de8 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/dbg.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/dbg.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2005-2014, 2018-2019, 2021 Intel Corporation + * Copyright (C) 2005-2014, 2018-2019, 2021-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2015-2017 Intel Deutschland GmbH */ @@ -324,4 +324,7 @@ static inline void iwl_fwrt_update_fw_versions(struct iwl_fw_runtime *fwrt, } void iwl_fwrt_dump_error_logs(struct iwl_fw_runtime *fwrt); +void iwl_send_dbg_dump_complete_cmd(struct iwl_fw_runtime *fwrt, + u32 timepoint, + u32 timepoint_data); #endif /* __iwl_fw_dbg_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/fw/debugfs.c b/drivers/net/wireless/intel/iwlwifi/fw/debugfs.c index a152ce306475..43e997283db0 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/debugfs.c +++ b/drivers/net/wireless/intel/iwlwifi/fw/debugfs.c @@ -150,7 +150,7 @@ static int iwl_dbgfs_enabled_severities_write(struct iwl_fw_runtime *fwrt, { struct iwl_dbg_host_event_cfg_cmd event_cfg; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(HOST_EVENT_CFG, DEBUG_GROUP, 0), + .id = WIDE_ID(DEBUG_GROUP, HOST_EVENT_CFG), .flags = CMD_ASYNC, .data[0] = &event_cfg, .len[0] = sizeof(event_cfg), @@ -358,7 +358,7 @@ static int iwl_dbgfs_fw_info_seq_show(struct seq_file *seq, void *v) ver = &fw->ucode_capa.cmd_versions[state->pos]; - cmd_id = iwl_cmd_id(ver->cmd, ver->group, 0); + cmd_id = WIDE_ID(ver->group, ver->cmd); seq_printf(seq, " 0x%04x:\n", cmd_id); seq_printf(seq, " name: %s\n", diff --git a/drivers/net/wireless/intel/iwlwifi/fw/file.h b/drivers/net/wireless/intel/iwlwifi/fw/file.h index efc6540d31af..5679a78758be 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/file.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/file.h @@ -119,7 +119,7 @@ enum iwl_ucode_tlv_type { struct iwl_ucode_tlv { __le32 type; /* see above */ __le32 length; /* not including type/length fields */ - u8 data[0]; + u8 data[]; }; #define IWL_TLV_UCODE_MAGIC 0x0a4c5749 @@ -310,7 +310,6 @@ typedef unsigned int __bitwise iwl_ucode_tlv_capa_t; * @IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH: supports TDLS channel switching * @IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG: Consolidated D3-D0 image * @IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT: supports Hot Spot Command - * @IWL_UCODE_TLV_CAPA_DC2DC_SUPPORT: supports DC2DC Command * @IWL_UCODE_TLV_CAPA_CSUM_SUPPORT: supports TCP Checksum Offload * @IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS: support radio and beacon statistics * @IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD: supports U-APSD on p2p interface when it @@ -368,6 +367,8 @@ typedef unsigned int __bitwise iwl_ucode_tlv_capa_t; * reset flow * @IWL_UCODE_TLV_CAPA_PASSIVE_6GHZ_SCAN: Support for passive scan on 6GHz PSC * channels even when these are not enabled. + * @IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT: Support for indicating dump collection + * complete to FW. * * @NUM_IWL_UCODE_TLV_CAPA: number of bits used */ @@ -386,7 +387,6 @@ enum iwl_ucode_tlv_capa { IWL_UCODE_TLV_CAPA_TDLS_CHANNEL_SWITCH = (__force iwl_ucode_tlv_capa_t)13, IWL_UCODE_TLV_CAPA_CNSLDTD_D3_D0_IMG = (__force iwl_ucode_tlv_capa_t)17, IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT = (__force iwl_ucode_tlv_capa_t)18, - IWL_UCODE_TLV_CAPA_DC2DC_CONFIG_SUPPORT = (__force iwl_ucode_tlv_capa_t)19, IWL_UCODE_TLV_CAPA_CSUM_SUPPORT = (__force iwl_ucode_tlv_capa_t)21, IWL_UCODE_TLV_CAPA_RADIO_BEACON_STATS = (__force iwl_ucode_tlv_capa_t)22, IWL_UCODE_TLV_CAPA_P2P_SCM_UAPSD = (__force iwl_ucode_tlv_capa_t)26, @@ -419,6 +419,7 @@ enum iwl_ucode_tlv_capa { IWL_UCODE_TLV_CAPA_BROADCAST_TWT = (__force iwl_ucode_tlv_capa_t)60, IWL_UCODE_TLV_CAPA_COEX_HIGH_PRIO = (__force iwl_ucode_tlv_capa_t)61, IWL_UCODE_TLV_CAPA_RFIM_SUPPORT = (__force iwl_ucode_tlv_capa_t)62, + IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT = (__force iwl_ucode_tlv_capa_t)63, /* set 2 */ IWL_UCODE_TLV_CAPA_EXTENDED_DTS_MEASURE = (__force iwl_ucode_tlv_capa_t)64, @@ -453,6 +454,7 @@ enum iwl_ucode_tlv_capa { IWL_UCODE_TLV_CAPA_BIGTK_SUPPORT = (__force iwl_ucode_tlv_capa_t)100, IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT = (__force iwl_ucode_tlv_capa_t)104, + IWL_UCODE_TLV_CAPA_DUMP_COMPLETE_SUPPORT = (__force iwl_ucode_tlv_capa_t)105, #ifdef __CHECKER__ /* sparse says it cannot increment the previous enum member */ @@ -514,34 +516,6 @@ enum iwl_fw_phy_cfg { FW_PHY_CFG_SHARED_CLK = BIT(31), }; -#define IWL_UCODE_MAX_CS 1 - -/** - * struct iwl_fw_cipher_scheme - a cipher scheme supported by FW. - * @cipher: a cipher suite selector - * @flags: cipher scheme flags (currently reserved for a future use) - * @hdr_len: a size of MPDU security header - * @pn_len: a size of PN - * @pn_off: an offset of pn from the beginning of the security header - * @key_idx_off: an offset of key index byte in the security header - * @key_idx_mask: a bit mask of key_idx bits - * @key_idx_shift: bit shift needed to get key_idx - * @mic_len: mic length in bytes - * @hw_cipher: a HW cipher index used in host commands - */ -struct iwl_fw_cipher_scheme { - __le32 cipher; - u8 flags; - u8 hdr_len; - u8 pn_len; - u8 pn_off; - u8 key_idx_off; - u8 key_idx_mask; - u8 key_idx_shift; - u8 mic_len; - u8 hw_cipher; -} __packed; - enum iwl_fw_dbg_reg_operator { CSR_ASSIGN, CSR_SETBIT, diff --git a/drivers/net/wireless/intel/iwlwifi/fw/img.c b/drivers/net/wireless/intel/iwlwifi/fw/img.c index 530674a35eeb..b7deca05a953 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/img.c +++ b/drivers/net/wireless/intel/iwlwifi/fw/img.c @@ -2,13 +2,16 @@ /* * Copyright(c) 2019 - 2021 Intel Corporation */ - +#include <fw/api/commands.h> #include "img.h" -u8 iwl_fw_lookup_cmd_ver(const struct iwl_fw *fw, u8 grp, u8 cmd, u8 def) +u8 iwl_fw_lookup_cmd_ver(const struct iwl_fw *fw, u32 cmd_id, u8 def) { const struct iwl_fw_cmd_version *entry; unsigned int i; + /* prior to LONG_GROUP, we never used this CMD version API */ + u8 grp = iwl_cmd_groupid(cmd_id) ?: LONG_GROUP; + u8 cmd = iwl_cmd_opcode(cmd_id); if (!fw->ucode_capa.cmd_versions || !fw->ucode_capa.n_cmd_versions) diff --git a/drivers/net/wireless/intel/iwlwifi/fw/img.h b/drivers/net/wireless/intel/iwlwifi/fw/img.h index fa7b1780064c..f878ac508801 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/img.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/img.h @@ -134,16 +134,6 @@ struct iwl_fw_paging { }; /** - * struct iwl_fw_cscheme_list - a cipher scheme list - * @size: a number of entries - * @cs: cipher scheme entries - */ -struct iwl_fw_cscheme_list { - u8 size; - struct iwl_fw_cipher_scheme cs[]; -} __packed; - -/** * enum iwl_fw_type - iwlwifi firmware type * @IWL_FW_DVM: DVM firmware * @IWL_FW_MVM: MVM firmware @@ -197,7 +187,6 @@ struct iwl_dump_exclude { * @inst_evtlog_size: event log size for runtime ucode. * @inst_errlog_ptr: error log offfset for runtime ucode. * @type: firmware type (&enum iwl_fw_type) - * @cipher_scheme: optional external cipher scheme. * @human_readable: human readable version * we get the ALIVE from the uCode * @phy_integration_ver: PHY integration version string @@ -228,7 +217,6 @@ struct iwl_fw { enum iwl_fw_type type; - struct iwl_fw_cipher_scheme cs[IWL_UCODE_MAX_CS]; u8 human_readable[FW_VER_HUMAN_READABLE_SZ]; struct iwl_fw_dbg dbg; @@ -275,7 +263,7 @@ iwl_get_ucode_image(const struct iwl_fw *fw, enum iwl_ucode_type ucode_type) return &fw->img[ucode_type]; } -u8 iwl_fw_lookup_cmd_ver(const struct iwl_fw *fw, u8 grp, u8 cmd, u8 def); +u8 iwl_fw_lookup_cmd_ver(const struct iwl_fw *fw, u32 cmd_id, u8 def); u8 iwl_fw_lookup_notif_ver(const struct iwl_fw *fw, u8 grp, u8 cmd, u8 def); const char *iwl_fw_lookup_assert_desc(u32 num); diff --git a/drivers/net/wireless/intel/iwlwifi/fw/init.c b/drivers/net/wireless/intel/iwlwifi/fw/init.c index 139ece879fab..135bd48bfe9f 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/init.c +++ b/drivers/net/wireless/intel/iwlwifi/fw/init.c @@ -58,7 +58,7 @@ int iwl_set_soc_latency(struct iwl_fw_runtime *fwrt) { struct iwl_soc_configuration_cmd cmd = {}; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(SOC_CONFIGURATION_CMD, SYSTEM_GROUP, 0), + .id = WIDE_ID(SYSTEM_GROUP, SOC_CONFIGURATION_CMD), .data[0] = &cmd, .len[0] = sizeof(cmd), }; @@ -87,8 +87,7 @@ int iwl_set_soc_latency(struct iwl_fw_runtime *fwrt) cmd.flags |= le32_encode_bits(fwrt->trans->trans_cfg->ltr_delay, SOC_FLAGS_LTR_APPLY_DELAY_MASK); - if (iwl_fw_lookup_cmd_ver(fwrt->fw, IWL_ALWAYS_LONG_GROUP, - SCAN_REQ_UMAC, + if (iwl_fw_lookup_cmd_ver(fwrt->fw, SCAN_REQ_UMAC, IWL_FW_CMD_VER_UNKNOWN) >= 2 && fwrt->trans->trans_cfg->low_latency_xtal) cmd.flags |= cpu_to_le32(SOC_CONFIG_CMD_FLAGS_LOW_LATENCY); diff --git a/drivers/net/wireless/intel/iwlwifi/fw/paging.c b/drivers/net/wireless/intel/iwlwifi/fw/paging.c index 58ca3849d1f3..945bc4160cc9 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/paging.c +++ b/drivers/net/wireless/intel/iwlwifi/fw/paging.c @@ -197,7 +197,7 @@ static int iwl_fill_paging_mem(struct iwl_fw_runtime *fwrt, } memcpy(page_address(block->fw_paging_block), - image->sec[sec_idx].data + offset, len); + (const u8 *)image->sec[sec_idx].data + offset, len); block->fw_offs = image->sec[sec_idx].offset + offset; dma_sync_single_for_device(fwrt->trans->dev, block->fw_paging_phys, @@ -243,7 +243,7 @@ static int iwl_send_paging_cmd(struct iwl_fw_runtime *fwrt, .block_num = cpu_to_le32(fwrt->num_of_paging_blk), }; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(FW_PAGING_BLOCK_CMD, IWL_ALWAYS_LONG_GROUP, 0), + .id = WIDE_ID(IWL_ALWAYS_LONG_GROUP, FW_PAGING_BLOCK_CMD), .len = { sizeof(paging_cmd), }, .data = { &paging_cmd, }, }; diff --git a/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c b/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c index 7d4aa398729a..b6d3ac6ed440 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c +++ b/drivers/net/wireless/intel/iwlwifi/fw/pnvm.c @@ -33,7 +33,7 @@ static bool iwl_pnvm_complete_fn(struct iwl_notif_wait_data *notif_wait, static int iwl_pnvm_handle_section(struct iwl_trans *trans, const u8 *data, size_t len) { - struct iwl_ucode_tlv *tlv; + const struct iwl_ucode_tlv *tlv; u32 sha1 = 0; u16 mac_type = 0, rf_id = 0; u8 *pnvm_data = NULL, *tmp; @@ -47,7 +47,7 @@ static int iwl_pnvm_handle_section(struct iwl_trans *trans, const u8 *data, u32 tlv_len, tlv_type; len -= sizeof(*tlv); - tlv = (void *)data; + tlv = (const void *)data; tlv_len = le32_to_cpu(tlv->length); tlv_type = le32_to_cpu(tlv->type); @@ -70,7 +70,7 @@ static int iwl_pnvm_handle_section(struct iwl_trans *trans, const u8 *data, break; } - sha1 = le32_to_cpup((__le32 *)data); + sha1 = le32_to_cpup((const __le32 *)data); IWL_DEBUG_FW(trans, "Got IWL_UCODE_TLV_PNVM_VERSION %0x\n", @@ -87,8 +87,8 @@ static int iwl_pnvm_handle_section(struct iwl_trans *trans, const u8 *data, if (hw_match) break; - mac_type = le16_to_cpup((__le16 *)data); - rf_id = le16_to_cpup((__le16 *)(data + sizeof(__le16))); + mac_type = le16_to_cpup((const __le16 *)data); + rf_id = le16_to_cpup((const __le16 *)(data + sizeof(__le16))); IWL_DEBUG_FW(trans, "Got IWL_UCODE_TLV_HW_TYPE mac_type 0x%0x rf_id 0x%0x\n", @@ -99,7 +99,7 @@ static int iwl_pnvm_handle_section(struct iwl_trans *trans, const u8 *data, hw_match = true; break; case IWL_UCODE_TLV_SEC_RT: { - struct iwl_pnvm_section *section = (void *)data; + const struct iwl_pnvm_section *section = (const void *)data; u32 data_len = tlv_len - sizeof(*section); IWL_DEBUG_FW(trans, @@ -107,7 +107,7 @@ static int iwl_pnvm_handle_section(struct iwl_trans *trans, const u8 *data, tlv_len); /* TODO: remove, this is a deprecated separator */ - if (le32_to_cpup((__le32 *)data) == 0xddddeeee) { + if (le32_to_cpup((const __le32 *)data) == 0xddddeeee) { IWL_DEBUG_FW(trans, "Ignoring separator.\n"); break; } @@ -173,7 +173,7 @@ out: static int iwl_pnvm_parse(struct iwl_trans *trans, const u8 *data, size_t len) { - struct iwl_ucode_tlv *tlv; + const struct iwl_ucode_tlv *tlv; IWL_DEBUG_FW(trans, "Parsing PNVM file\n"); @@ -181,7 +181,7 @@ static int iwl_pnvm_parse(struct iwl_trans *trans, const u8 *data, u32 tlv_len, tlv_type; len -= sizeof(*tlv); - tlv = (void *)data; + tlv = (const void *)data; tlv_len = le32_to_cpu(tlv->length); tlv_type = le32_to_cpu(tlv->type); @@ -193,8 +193,8 @@ static int iwl_pnvm_parse(struct iwl_trans *trans, const u8 *data, } if (tlv_type == IWL_UCODE_TLV_PNVM_SKU) { - struct iwl_sku_id *sku_id = - (void *)(data + sizeof(*tlv)); + const struct iwl_sku_id *sku_id = + (const void *)(data + sizeof(*tlv)); IWL_DEBUG_FW(trans, "Got IWL_UCODE_TLV_PNVM_SKU len %d\n", diff --git a/drivers/net/wireless/intel/iwlwifi/fw/runtime.h b/drivers/net/wireless/intel/iwlwifi/fw/runtime.h index 3cb0ddbe3ab2..d3cb1ae68a96 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/runtime.h +++ b/drivers/net/wireless/intel/iwlwifi/fw/runtime.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* * Copyright (C) 2017 Intel Deutschland GmbH - * Copyright (C) 2018-2020 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation */ #ifndef __iwl_fw_runtime_h__ #define __iwl_fw_runtime_h__ @@ -16,7 +16,7 @@ #include "fw/acpi.h" struct iwl_fw_runtime_ops { - int (*dump_start)(void *ctx); + void (*dump_start)(void *ctx); void (*dump_end)(void *ctx); bool (*fw_running)(void *ctx); int (*send_hcmd)(void *ctx, struct iwl_host_cmd *host_cmd); @@ -163,6 +163,7 @@ struct iwl_fw_runtime { u32 ppag_ver; struct iwl_sar_offset_mapping_cmd sgom_table; bool sgom_enabled; + u8 reduced_power_flags; #endif }; diff --git a/drivers/net/wireless/intel/iwlwifi/fw/smem.c b/drivers/net/wireless/intel/iwlwifi/fw/smem.c index f2f1789f470d..3f1272014daf 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/smem.c +++ b/drivers/net/wireless/intel/iwlwifi/fw/smem.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2012-2014, 2018-2020 Intel Corporation + * Copyright (C) 2012-2014, 2018-2021 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -89,7 +89,7 @@ void iwl_get_shared_mem_conf(struct iwl_fw_runtime *fwrt) if (fw_has_capa(&fwrt->fw->ucode_capa, IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) - cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0); + cmd.id = WIDE_ID(SYSTEM_GROUP, SHARED_MEM_CFG_CMD); else cmd.id = SHARED_MEM_CFG; diff --git a/drivers/net/wireless/intel/iwlwifi/fw/uefi.c b/drivers/net/wireless/intel/iwlwifi/fw/uefi.c index bd82c24811c8..23b1d689ba7b 100644 --- a/drivers/net/wireless/intel/iwlwifi/fw/uefi.c +++ b/drivers/net/wireless/intel/iwlwifi/fw/uefi.c @@ -69,7 +69,7 @@ out: static void *iwl_uefi_reduce_power_section(struct iwl_trans *trans, const u8 *data, size_t len) { - struct iwl_ucode_tlv *tlv; + const struct iwl_ucode_tlv *tlv; u8 *reduce_power_data = NULL, *tmp; u32 size = 0; @@ -79,7 +79,7 @@ static void *iwl_uefi_reduce_power_section(struct iwl_trans *trans, u32 tlv_len, tlv_type; len -= sizeof(*tlv); - tlv = (void *)data; + tlv = (const void *)data; tlv_len = le32_to_cpu(tlv->length); tlv_type = le32_to_cpu(tlv->type); @@ -154,7 +154,7 @@ out: static void *iwl_uefi_reduce_power_parse(struct iwl_trans *trans, const u8 *data, size_t len) { - struct iwl_ucode_tlv *tlv; + const struct iwl_ucode_tlv *tlv; void *sec_data; IWL_DEBUG_FW(trans, "Parsing REDUCE_POWER data\n"); @@ -163,7 +163,7 @@ static void *iwl_uefi_reduce_power_parse(struct iwl_trans *trans, u32 tlv_len, tlv_type; len -= sizeof(*tlv); - tlv = (void *)data; + tlv = (const void *)data; tlv_len = le32_to_cpu(tlv->length); tlv_type = le32_to_cpu(tlv->type); @@ -175,8 +175,8 @@ static void *iwl_uefi_reduce_power_parse(struct iwl_trans *trans, } if (tlv_type == IWL_UCODE_TLV_PNVM_SKU) { - struct iwl_sku_id *sku_id = - (void *)(data + sizeof(*tlv)); + const struct iwl_sku_id *sku_id = + (const void *)(data + sizeof(*tlv)); IWL_DEBUG_FW(trans, "Got IWL_UCODE_TLV_PNVM_SKU len %d\n", diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-config.h b/drivers/net/wireless/intel/iwlwifi/iwl-config.h index e122b8b4e1fc..f5b556a103e8 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-config.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-config.h @@ -260,6 +260,7 @@ enum iwl_cfg_trans_ltr_delay { * @integrated: discrete or integrated * @low_latency_xtal: use the low latency xtal if supported * @ltr_delay: LTR delay parameter, &enum iwl_cfg_trans_ltr_delay. + * @imr_enabled: use the IMR if supported. */ struct iwl_cfg_trans_params { const struct iwl_base_params *base_params; @@ -274,7 +275,8 @@ struct iwl_cfg_trans_params { integrated:1, low_latency_xtal:1, bisr_workaround:1, - ltr_delay:2; + ltr_delay:2, + imr_enabled:1; }; /** @@ -343,8 +345,8 @@ struct iwl_fw_mon_regs { * @bisr_workaround: BISR hardware workaround (for 22260 series devices) * @min_txq_size: minimum number of slots required in a TX queue * @uhb_supported: ultra high band channels supported - * @min_256_ba_txq_size: minimum number of slots required in a TX queue which - * supports 256 BA aggregation + * @min_ba_txq_size: minimum number of slots required in a TX queue which + * based on hardware support (HE - 256, EHT - 1K). * @num_rbds: number of receive buffer descriptors to use * (only used for multi-queue capable devices) * @mac_addr_csr_base: CSR base register for MAC address access, if not set @@ -405,9 +407,10 @@ struct iwl_cfg { u32 d3_debug_data_length; u32 min_txq_size; u32 gp2_reg_addr; - u32 min_256_ba_txq_size; + u32 min_ba_txq_size; const struct iwl_fw_mon_regs mon_dram_regs; const struct iwl_fw_mon_regs mon_smem_regs; + const struct iwl_fw_mon_regs mon_dbgi_regs; }; #define IWL_CFG_ANY (~0) @@ -433,6 +436,7 @@ struct iwl_cfg { #define IWL_CFG_RF_TYPE_HR1 0x10C #define IWL_CFG_RF_TYPE_GF 0x10D #define IWL_CFG_RF_TYPE_MR 0x110 +#define IWL_CFG_RF_TYPE_MS 0x111 #define IWL_CFG_RF_TYPE_FM 0x112 #define IWL_CFG_RF_ID_TH 0x1 @@ -489,6 +493,7 @@ extern const struct iwl_cfg_trans_params iwl_ax200_trans_cfg; extern const struct iwl_cfg_trans_params iwl_snj_trans_cfg; extern const struct iwl_cfg_trans_params iwl_so_trans_cfg; extern const struct iwl_cfg_trans_params iwl_so_long_latency_trans_cfg; +extern const struct iwl_cfg_trans_params iwl_so_long_latency_imr_trans_cfg; extern const struct iwl_cfg_trans_params iwl_ma_trans_cfg; extern const struct iwl_cfg_trans_params iwl_bz_trans_cfg; extern const char iwl9162_name[]; @@ -509,6 +514,7 @@ extern const char iwl9560_killer_1550i_name[]; extern const char iwl9560_killer_1550s_name[]; extern const char iwl_ax200_name[]; extern const char iwl_ax203_name[]; +extern const char iwl_ax204_name[]; extern const char iwl_ax201_name[]; extern const char iwl_ax101_name[]; extern const char iwl_ax200_killer_1650w_name[]; @@ -631,9 +637,12 @@ extern const struct iwl_cfg iwl_cfg_ma_a0_hr_b0; extern const struct iwl_cfg iwl_cfg_ma_a0_gf_a0; extern const struct iwl_cfg iwl_cfg_ma_a0_gf4_a0; extern const struct iwl_cfg iwl_cfg_ma_a0_mr_a0; +extern const struct iwl_cfg iwl_cfg_ma_a0_ms_a0; extern const struct iwl_cfg iwl_cfg_ma_a0_fm_a0; extern const struct iwl_cfg iwl_cfg_snj_a0_mr_a0; +extern const struct iwl_cfg iwl_cfg_snj_a0_ms_a0; extern const struct iwl_cfg iwl_cfg_so_a0_hr_a0; +extern const struct iwl_cfg iwl_cfg_so_a0_ms_a0; extern const struct iwl_cfg iwl_cfg_quz_a0_hr_b0; extern const struct iwl_cfg iwl_cfg_bz_a0_hr_b0; extern const struct iwl_cfg iwl_cfg_bz_a0_gf_a0; diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h b/drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h index 5adf485db38e..b84884034c74 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-context-info-gen3.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2018, 2020-2021 Intel Corporation + * Copyright (C) 2018, 2020-2022 Intel Corporation */ #ifndef __iwl_context_info_file_gen3_h__ #define __iwl_context_info_file_gen3_h__ @@ -34,6 +34,7 @@ enum iwl_prph_scratch_mtr_format { /** * enum iwl_prph_scratch_flags - PRPH scratch control flags + * @IWL_PRPH_SCRATCH_IMR_DEBUG_EN: IMR support for debug * @IWL_PRPH_SCRATCH_EARLY_DEBUG_EN: enable early debug conf * @IWL_PRPH_SCRATCH_EDBG_DEST_DRAM: use DRAM, with size allocated * in hwm config. @@ -55,6 +56,7 @@ enum iwl_prph_scratch_mtr_format { * @IWL_PRPH_SCRATCH_RB_SIZE_EXT_16K: 16kB RB size */ enum iwl_prph_scratch_flags { + IWL_PRPH_SCRATCH_IMR_DEBUG_EN = BIT(1), IWL_PRPH_SCRATCH_EARLY_DEBUG_EN = BIT(4), IWL_PRPH_SCRATCH_EDBG_DEST_DRAM = BIT(8), IWL_PRPH_SCRATCH_EDBG_DEST_INTERNAL = BIT(9), diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-csr.h b/drivers/net/wireless/intel/iwlwifi/iwl-csr.h index 8e10ba88afb3..3e1f011e93aa 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-csr.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-csr.h @@ -534,6 +534,9 @@ enum { * 11-8: queue selector */ #define HBUS_TARG_WRPTR (HBUS_BASE+0x060) +/* This register is common for Tx and Rx, Rx queues start from 512 */ +#define HBUS_TARG_WRPTR_Q_SHIFT (16) +#define HBUS_TARG_WRPTR_RX_Q(q) (((q) + 512) << HBUS_TARG_WRPTR_Q_SHIFT) /********************************************************** * CSR values diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c b/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c index c73672d61356..866a33f49915 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c +++ b/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation */ #include <linux/firmware.h> #include "iwl-drv.h" @@ -74,7 +74,8 @@ static int iwl_dbg_tlv_add(const struct iwl_ucode_tlv *tlv, if (!node) return -ENOMEM; - memcpy(&node->tlv, tlv, sizeof(node->tlv) + len); + memcpy(&node->tlv, tlv, sizeof(node->tlv)); + memcpy(node->tlv.data, tlv->data, len); list_add_tail(&node->list, list); return 0; @@ -181,11 +182,11 @@ static int iwl_dbg_tlv_alloc_region(struct iwl_trans *trans, u32 tlv_len = sizeof(*tlv) + le32_to_cpu(tlv->length); /* - * The higher part of the ID in from version 2 is irrelevant for - * us, so mask it out. + * The higher part of the ID from version 2 is debug policy. + * The id will be only lsb 16 bits, so mask it out. */ if (le32_to_cpu(reg->hdr.version) >= 2) - id &= IWL_FW_INI_REGION_V2_MASK; + id &= IWL_FW_INI_REGION_ID_MASK; if (le32_to_cpu(tlv->length) < sizeof(*reg)) return -EINVAL; @@ -211,6 +212,14 @@ static int iwl_dbg_tlv_alloc_region(struct iwl_trans *trans, return -EOPNOTSUPP; } + if (type == IWL_FW_INI_REGION_INTERNAL_BUFFER) { + trans->dbg.imr_data.sram_addr = + le32_to_cpu(reg->internal_buffer.base_addr); + trans->dbg.imr_data.sram_size = + le32_to_cpu(reg->internal_buffer.size); + } + + active_reg = &trans->dbg.active_regions[id]; if (*active_reg) { IWL_WARN(trans, "WRT: Overriding region id %u\n", id); @@ -271,7 +280,7 @@ static int iwl_dbg_tlv_alloc_trigger(struct iwl_trans *trans, static int iwl_dbg_tlv_config_set(struct iwl_trans *trans, const struct iwl_ucode_tlv *tlv) { - struct iwl_fw_ini_conf_set_tlv *conf_set = (void *)tlv->data; + const struct iwl_fw_ini_conf_set_tlv *conf_set = (const void *)tlv->data; u32 tp = le32_to_cpu(conf_set->time_point); u32 type = le32_to_cpu(conf_set->set_type); @@ -460,7 +469,7 @@ static int iwl_dbg_tlv_parse_bin(struct iwl_trans *trans, const u8 *data, while (len >= sizeof(*tlv)) { len -= sizeof(*tlv); - tlv = (void *)data; + tlv = (const void *)data; tlv_len = le32_to_cpu(tlv->length); @@ -577,8 +586,7 @@ static int iwl_dbg_tlv_alloc_fragments(struct iwl_fw_runtime *fwrt, return 0; num_frags = le32_to_cpu(fw_mon_cfg->max_frags_num); - if (!fw_has_capa(&fwrt->fw->ucode_capa, - IWL_UCODE_TLV_CAPA_DBG_BUF_ALLOC_CMD_SUPP)) { + if (fwrt->trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) { if (alloc_id != IWL_FW_INI_ALLOCATION_ID_DBGC1) return -EIO; num_frags = 1; @@ -762,33 +770,40 @@ static int iwl_dbg_tlv_update_dram(struct iwl_fw_runtime *fwrt, static void iwl_dbg_tlv_update_drams(struct iwl_fw_runtime *fwrt) { - int ret, i, dram_alloc = 0; - struct iwl_dram_info dram_info; + int ret, i; + bool dram_alloc = false; struct iwl_dram_data *frags = &fwrt->trans->dbg.fw_mon_ini[IWL_FW_INI_ALLOCATION_ID_DBGC1].frags[0]; + struct iwl_dram_info *dram_info; + + if (!frags || !frags->block) + return; + + dram_info = frags->block; if (!fw_has_capa(&fwrt->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DRAM_FRAG_SUPPORT)) return; - dram_info.first_word = cpu_to_le32(DRAM_INFO_FIRST_MAGIC_WORD); - dram_info.second_word = cpu_to_le32(DRAM_INFO_SECOND_MAGIC_WORD); + dram_info->first_word = cpu_to_le32(DRAM_INFO_FIRST_MAGIC_WORD); + dram_info->second_word = cpu_to_le32(DRAM_INFO_SECOND_MAGIC_WORD); for (i = IWL_FW_INI_ALLOCATION_ID_DBGC1; i <= IWL_FW_INI_ALLOCATION_ID_DBGC3; i++) { - ret = iwl_dbg_tlv_update_dram(fwrt, i, &dram_info); + ret = iwl_dbg_tlv_update_dram(fwrt, i, dram_info); if (!ret) - dram_alloc++; + dram_alloc = true; else IWL_WARN(fwrt, "WRT: Failed to set DRAM buffer for alloc id %d, ret=%d\n", i, ret); } - if (dram_alloc) { - memcpy(frags->block, &dram_info, sizeof(dram_info)); - IWL_DEBUG_FW(fwrt, "block data after %016x\n", - *((int *)fwrt->trans->dbg.fw_mon_ini[1].frags[0].block)); - } + + if (dram_alloc) + IWL_DEBUG_FW(fwrt, "block data after %08x\n", + dram_info->first_word); + else + memset(frags->block, 0, sizeof(*dram_info)); } static void iwl_dbg_tlv_send_hcmds(struct iwl_fw_runtime *fwrt, @@ -811,11 +826,11 @@ static void iwl_dbg_tlv_send_hcmds(struct iwl_fw_runtime *fwrt, } static void iwl_dbg_tlv_apply_config(struct iwl_fw_runtime *fwrt, - struct list_head *config_list) + struct list_head *conf_list) { struct iwl_dbg_tlv_node *node; - list_for_each_entry(node, config_list, list) { + list_for_each_entry(node, conf_list, list) { struct iwl_fw_ini_conf_set_tlv *config_list = (void *)node->tlv.data; u32 count, address, value; u32 len = (le32_to_cpu(node->tlv.length) - sizeof(*config_list)) / 8; @@ -861,11 +876,18 @@ static void iwl_dbg_tlv_apply_config(struct iwl_fw_runtime *fwrt, case IWL_FW_INI_CONFIG_SET_TYPE_DBGC_DRAM_ADDR: { struct iwl_dbgc1_info dram_info = {}; struct iwl_dram_data *frags = &fwrt->trans->dbg.fw_mon_ini[1].frags[0]; - __le64 dram_base_addr = cpu_to_le64(frags->physical); - __le32 dram_size = cpu_to_le32(frags->size); - u64 dram_addr = le64_to_cpu(dram_base_addr); + __le64 dram_base_addr; + __le32 dram_size; + u64 dram_addr; u32 ret; + if (!frags) + break; + + dram_base_addr = cpu_to_le64(frags->physical); + dram_size = cpu_to_le32(frags->size); + dram_addr = le64_to_cpu(dram_base_addr); + IWL_DEBUG_FW(fwrt, "WRT: dram_base_addr 0x%016llx, dram_size 0x%x\n", dram_base_addr, dram_size); IWL_DEBUG_FW(fwrt, "WRT: config_list->addr_offset: %u\n", diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.h b/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.h index 79287708bd6e..128059ca77e6 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation */ #ifndef __iwl_dbg_tlv_h__ #define __iwl_dbg_tlv_h__ @@ -10,6 +10,8 @@ #include <fw/file.h> #include <fw/api/dbg-tlv.h> +#define IWL_DBG_TLV_MAX_PRESET 15 + /** * struct iwl_dbg_tlv_node - debug TLV node * @list: list of &struct iwl_dbg_tlv_node diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-drv.c b/drivers/net/wireless/intel/iwlwifi/iwl-drv.c index 6651e78b39ec..a2203f661321 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-drv.c +++ b/drivers/net/wireless/intel/iwlwifi/iwl-drv.c @@ -243,14 +243,14 @@ struct iwl_firmware_pieces { /* FW debug data parsed for driver usage */ bool dbg_dest_tlv_init; - u8 *dbg_dest_ver; + const u8 *dbg_dest_ver; union { - struct iwl_fw_dbg_dest_tlv *dbg_dest_tlv; - struct iwl_fw_dbg_dest_tlv_v1 *dbg_dest_tlv_v1; + const struct iwl_fw_dbg_dest_tlv *dbg_dest_tlv; + const struct iwl_fw_dbg_dest_tlv_v1 *dbg_dest_tlv_v1; }; - struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX]; + const struct iwl_fw_dbg_conf_tlv *dbg_conf_tlv[FW_DBG_CONF_MAX]; size_t dbg_conf_tlv_len[FW_DBG_CONF_MAX]; - struct iwl_fw_dbg_trigger_tlv *dbg_trigger_tlv[FW_DBG_TRIGGER_MAX]; + const struct iwl_fw_dbg_trigger_tlv *dbg_trigger_tlv[FW_DBG_TRIGGER_MAX]; size_t dbg_trigger_tlv_len[FW_DBG_TRIGGER_MAX]; struct iwl_fw_dbg_mem_seg_tlv *dbg_mem_tlv; size_t n_mem_tlv; @@ -324,29 +324,6 @@ static void set_sec_offset(struct iwl_firmware_pieces *pieces, pieces->img[type].sec[sec].offset = offset; } -static int iwl_store_cscheme(struct iwl_fw *fw, const u8 *data, const u32 len) -{ - int i, j; - struct iwl_fw_cscheme_list *l = (struct iwl_fw_cscheme_list *)data; - struct iwl_fw_cipher_scheme *fwcs; - - if (len < sizeof(*l) || - len < sizeof(l->size) + l->size * sizeof(l->cs[0])) - return -EINVAL; - - for (i = 0, j = 0; i < IWL_UCODE_MAX_CS && i < l->size; i++) { - fwcs = &l->cs[j]; - - /* we skip schemes with zero cipher suite selector */ - if (!fwcs->cipher) - continue; - - fw->cs[j++] = *fwcs; - } - - return 0; -} - /* * Gets uCode section from tlv. */ @@ -356,13 +333,13 @@ static int iwl_store_ucode_sec(struct iwl_firmware_pieces *pieces, { struct fw_img_parsing *img; struct fw_sec *sec; - struct fw_sec_parsing *sec_parse; + const struct fw_sec_parsing *sec_parse; size_t alloc_size; if (WARN_ON(!pieces || !data || type >= IWL_UCODE_TYPE_MAX)) return -1; - sec_parse = (struct fw_sec_parsing *)data; + sec_parse = (const struct fw_sec_parsing *)data; img = &pieces->img[type]; @@ -385,8 +362,8 @@ static int iwl_store_ucode_sec(struct iwl_firmware_pieces *pieces, static int iwl_set_default_calib(struct iwl_drv *drv, const u8 *data) { - struct iwl_tlv_calib_data *def_calib = - (struct iwl_tlv_calib_data *)data; + const struct iwl_tlv_calib_data *def_calib = + (const struct iwl_tlv_calib_data *)data; u32 ucode_type = le32_to_cpu(def_calib->ucode_type); if (ucode_type >= IWL_UCODE_TYPE_MAX) { IWL_ERR(drv, "Wrong ucode_type %u for default calibration.\n", @@ -404,7 +381,7 @@ static int iwl_set_default_calib(struct iwl_drv *drv, const u8 *data) static void iwl_set_ucode_api_flags(struct iwl_drv *drv, const u8 *data, struct iwl_ucode_capabilities *capa) { - const struct iwl_ucode_api *ucode_api = (void *)data; + const struct iwl_ucode_api *ucode_api = (const void *)data; u32 api_index = le32_to_cpu(ucode_api->api_index); u32 api_flags = le32_to_cpu(ucode_api->api_flags); int i; @@ -425,7 +402,7 @@ static void iwl_set_ucode_api_flags(struct iwl_drv *drv, const u8 *data, static void iwl_set_ucode_capabilities(struct iwl_drv *drv, const u8 *data, struct iwl_ucode_capabilities *capa) { - const struct iwl_ucode_capa *ucode_capa = (void *)data; + const struct iwl_ucode_capa *ucode_capa = (const void *)data; u32 api_index = le32_to_cpu(ucode_capa->api_index); u32 api_flags = le32_to_cpu(ucode_capa->api_capa); int i; @@ -457,7 +434,7 @@ static int iwl_parse_v1_v2_firmware(struct iwl_drv *drv, const struct firmware *ucode_raw, struct iwl_firmware_pieces *pieces) { - struct iwl_ucode_header *ucode = (void *)ucode_raw->data; + const struct iwl_ucode_header *ucode = (const void *)ucode_raw->data; u32 api_ver, hdr_size, build; char buildstr[25]; const u8 *src; @@ -600,7 +577,7 @@ static void iwl_parse_dbg_tlv_assert_tables(struct iwl_drv *drv, sizeof(region->special_mem)) return; - region = (void *)tlv->data; + region = (const void *)tlv->data; addr = le32_to_cpu(region->special_mem.base_addr); addr += le32_to_cpu(region->special_mem.offset); addr &= ~FW_ADDR_CACHE_CONTROL; @@ -655,7 +632,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, struct iwl_ucode_capabilities *capa, bool *usniffer_images) { - struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data; + const struct iwl_tlv_ucode_header *ucode = (const void *)ucode_raw->data; const struct iwl_ucode_tlv *tlv; size_t len = ucode_raw->size; const u8 *data; @@ -704,8 +681,8 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, while (len >= sizeof(*tlv)) { len -= sizeof(*tlv); - tlv = (void *)data; + tlv = (const void *)data; tlv_len = le32_to_cpu(tlv->length); tlv_type = le32_to_cpu(tlv->type); tlv_data = tlv->data; @@ -762,7 +739,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, if (tlv_len != sizeof(u32)) goto invalid_tlv_len; capa->max_probe_length = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_PAN: if (tlv_len) @@ -783,7 +760,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, * will not work with the new firmware, or * it'll not take advantage of new features. */ - capa->flags = le32_to_cpup((__le32 *)tlv_data); + capa->flags = le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_API_CHANGES_SET: if (tlv_len != sizeof(struct iwl_ucode_api)) @@ -799,37 +776,37 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, if (tlv_len != sizeof(u32)) goto invalid_tlv_len; pieces->init_evtlog_ptr = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_INIT_EVTLOG_SIZE: if (tlv_len != sizeof(u32)) goto invalid_tlv_len; pieces->init_evtlog_size = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_INIT_ERRLOG_PTR: if (tlv_len != sizeof(u32)) goto invalid_tlv_len; pieces->init_errlog_ptr = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_RUNT_EVTLOG_PTR: if (tlv_len != sizeof(u32)) goto invalid_tlv_len; pieces->inst_evtlog_ptr = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE: if (tlv_len != sizeof(u32)) goto invalid_tlv_len; pieces->inst_evtlog_size = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_RUNT_ERRLOG_PTR: if (tlv_len != sizeof(u32)) goto invalid_tlv_len; pieces->inst_errlog_ptr = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_ENHANCE_SENS_TBL: if (tlv_len) @@ -858,7 +835,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, if (tlv_len != sizeof(u32)) goto invalid_tlv_len; capa->standard_phy_calibration_size = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_SEC_RT: iwl_store_ucode_sec(pieces, tlv_data, IWL_UCODE_REGULAR, @@ -884,7 +861,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, case IWL_UCODE_TLV_PHY_SKU: if (tlv_len != sizeof(u32)) goto invalid_tlv_len; - drv->fw.phy_config = le32_to_cpup((__le32 *)tlv_data); + drv->fw.phy_config = le32_to_cpup((const __le32 *)tlv_data); drv->fw.valid_tx_ant = (drv->fw.phy_config & FW_PHY_CFG_TX_CHAIN) >> FW_PHY_CFG_TX_CHAIN_POS; @@ -911,7 +888,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, if (tlv_len != sizeof(u32)) goto invalid_tlv_len; num_of_cpus = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); if (num_of_cpus == 2) { drv->fw.img[IWL_UCODE_REGULAR].is_dual_cpus = @@ -925,18 +902,14 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, return -EINVAL; } break; - case IWL_UCODE_TLV_CSCHEME: - if (iwl_store_cscheme(&drv->fw, tlv_data, tlv_len)) - goto invalid_tlv_len; - break; case IWL_UCODE_TLV_N_SCAN_CHANNELS: if (tlv_len != sizeof(u32)) goto invalid_tlv_len; capa->n_scan_channels = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_FW_VERSION: { - __le32 *ptr = (void *)tlv_data; + const __le32 *ptr = (const void *)tlv_data; u32 major, minor; u8 local_comp; @@ -960,15 +933,15 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, break; } case IWL_UCODE_TLV_FW_DBG_DEST: { - struct iwl_fw_dbg_dest_tlv *dest = NULL; - struct iwl_fw_dbg_dest_tlv_v1 *dest_v1 = NULL; + const struct iwl_fw_dbg_dest_tlv *dest = NULL; + const struct iwl_fw_dbg_dest_tlv_v1 *dest_v1 = NULL; u8 mon_mode; - pieces->dbg_dest_ver = (u8 *)tlv_data; + pieces->dbg_dest_ver = (const u8 *)tlv_data; if (*pieces->dbg_dest_ver == 1) { - dest = (void *)tlv_data; + dest = (const void *)tlv_data; } else if (*pieces->dbg_dest_ver == 0) { - dest_v1 = (void *)tlv_data; + dest_v1 = (const void *)tlv_data; } else { IWL_ERR(drv, "The version is %d, and it is invalid\n", @@ -1009,7 +982,8 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, break; } case IWL_UCODE_TLV_FW_DBG_CONF: { - struct iwl_fw_dbg_conf_tlv *conf = (void *)tlv_data; + const struct iwl_fw_dbg_conf_tlv *conf = + (const void *)tlv_data; if (!pieces->dbg_dest_tlv_init) { IWL_ERR(drv, @@ -1043,8 +1017,8 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, break; } case IWL_UCODE_TLV_FW_DBG_TRIGGER: { - struct iwl_fw_dbg_trigger_tlv *trigger = - (void *)tlv_data; + const struct iwl_fw_dbg_trigger_tlv *trigger = + (const void *)tlv_data; u32 trigger_id = le32_to_cpu(trigger->id); if (trigger_id >= ARRAY_SIZE(drv->fw.dbg.trigger_tlv)) { @@ -1075,7 +1049,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, } drv->fw.dbg.dump_mask = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; } case IWL_UCODE_TLV_SEC_RT_USNIFFER: @@ -1087,7 +1061,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, case IWL_UCODE_TLV_PAGING: if (tlv_len != sizeof(u32)) goto invalid_tlv_len; - paging_mem_size = le32_to_cpup((__le32 *)tlv_data); + paging_mem_size = le32_to_cpup((const __le32 *)tlv_data); IWL_DEBUG_FW(drv, "Paging: paging enabled (size = %u bytes)\n", @@ -1117,8 +1091,8 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, /* ignored */ break; case IWL_UCODE_TLV_FW_MEM_SEG: { - struct iwl_fw_dbg_mem_seg_tlv *dbg_mem = - (void *)tlv_data; + const struct iwl_fw_dbg_mem_seg_tlv *dbg_mem = + (const void *)tlv_data; size_t size; struct iwl_fw_dbg_mem_seg_tlv *n; @@ -1146,10 +1120,10 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, break; } case IWL_UCODE_TLV_FW_RECOVERY_INFO: { - struct { + const struct { __le32 buf_addr; __le32 buf_size; - } *recov_info = (void *)tlv_data; + } *recov_info = (const void *)tlv_data; if (tlv_len != sizeof(*recov_info)) goto invalid_tlv_len; @@ -1160,10 +1134,10 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, } break; case IWL_UCODE_TLV_FW_FSEQ_VERSION: { - struct { + const struct { u8 version[32]; u8 sha1[20]; - } *fseq_ver = (void *)tlv_data; + } *fseq_ver = (const void *)tlv_data; if (tlv_len != sizeof(*fseq_ver)) goto invalid_tlv_len; @@ -1174,19 +1148,19 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, case IWL_UCODE_TLV_FW_NUM_STATIONS: if (tlv_len != sizeof(u32)) goto invalid_tlv_len; - if (le32_to_cpup((__le32 *)tlv_data) > + if (le32_to_cpup((const __le32 *)tlv_data) > IWL_MVM_STATION_COUNT_MAX) { IWL_ERR(drv, "%d is an invalid number of station\n", - le32_to_cpup((__le32 *)tlv_data)); + le32_to_cpup((const __le32 *)tlv_data)); goto tlv_error; } capa->num_stations = - le32_to_cpup((__le32 *)tlv_data); + le32_to_cpup((const __le32 *)tlv_data); break; case IWL_UCODE_TLV_UMAC_DEBUG_ADDRS: { - struct iwl_umac_debug_addrs *dbg_ptrs = - (void *)tlv_data; + const struct iwl_umac_debug_addrs *dbg_ptrs = + (const void *)tlv_data; if (tlv_len != sizeof(*dbg_ptrs)) goto invalid_tlv_len; @@ -1201,8 +1175,8 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, break; } case IWL_UCODE_TLV_LMAC_DEBUG_ADDRS: { - struct iwl_lmac_debug_addrs *dbg_ptrs = - (void *)tlv_data; + const struct iwl_lmac_debug_addrs *dbg_ptrs = + (const void *)tlv_data; if (tlv_len != sizeof(*dbg_ptrs)) goto invalid_tlv_len; @@ -1277,7 +1251,7 @@ static int iwl_parse_tlv_firmware(struct iwl_drv *drv, if (len) { IWL_ERR(drv, "invalid TLV after parsing: %zd\n", len); - iwl_print_hex_dump(drv, IWL_DL_FW, (u8 *)data, len); + iwl_print_hex_dump(drv, IWL_DL_FW, data, len); return -EINVAL; } @@ -1418,7 +1392,7 @@ static void iwl_req_fw_callback(const struct firmware *ucode_raw, void *context) { struct iwl_drv *drv = context; struct iwl_fw *fw = &drv->fw; - struct iwl_ucode_header *ucode; + const struct iwl_ucode_header *ucode; struct iwlwifi_opmode_table *op; int err; struct iwl_firmware_pieces *pieces; @@ -1456,7 +1430,7 @@ static void iwl_req_fw_callback(const struct firmware *ucode_raw, void *context) } /* Data from ucode file: header followed by uCode images */ - ucode = (struct iwl_ucode_header *)ucode_raw->data; + ucode = (const struct iwl_ucode_header *)ucode_raw->data; if (ucode->ver) err = iwl_parse_v1_v2_firmware(drv, ucode_raw, pieces); @@ -1645,6 +1619,8 @@ static void iwl_req_fw_callback(const struct firmware *ucode_raw, void *context) /* We have our copies now, allow OS release its copies */ release_firmware(ucode_raw); + iwl_dbg_tlv_load_bin(drv->trans->dev, drv->trans); + mutex_lock(&iwlwifi_opmode_table_mtx); switch (fw->type) { case IWL_FW_DVM: @@ -1661,8 +1637,6 @@ static void iwl_req_fw_callback(const struct firmware *ucode_raw, void *context) IWL_INFO(drv, "loaded firmware version %s op_mode %s\n", drv->fw.fw_version, op->name); - iwl_dbg_tlv_load_bin(drv->trans->dev, drv->trans); - /* add this device to the list of devices using this op_mode */ list_add_tail(&drv->list, &op->drv); @@ -1796,6 +1770,7 @@ void iwl_drv_stop(struct iwl_drv *drv) kfree(drv); } +#define ENABLE_INI (IWL_DBG_TLV_MAX_PRESET + 1) /* shared module parameters */ struct iwl_mod_params iwlwifi_mod_params = { @@ -1803,7 +1778,7 @@ struct iwl_mod_params iwlwifi_mod_params = { .bt_coex_active = true, .power_level = IWL_POWER_INDEX_1, .uapsd_disable = IWL_DISABLE_UAPSD_BSS | IWL_DISABLE_UAPSD_P2P_CLIENT, - .enable_ini = true, + .enable_ini = ENABLE_INI, /* the rest are 0 by default */ }; IWL_EXPORT_SYMBOL(iwlwifi_mod_params); @@ -1915,10 +1890,42 @@ MODULE_PARM_DESC(nvm_file, "NVM file name"); module_param_named(uapsd_disable, iwlwifi_mod_params.uapsd_disable, uint, 0644); MODULE_PARM_DESC(uapsd_disable, "disable U-APSD functionality bitmap 1: BSS 2: P2P Client (default: 3)"); -module_param_named(enable_ini, iwlwifi_mod_params.enable_ini, - bool, S_IRUGO | S_IWUSR); + +static int enable_ini_set(const char *arg, const struct kernel_param *kp) +{ + int ret = 0; + bool res; + __u32 new_enable_ini; + + /* in case the argument type is a number */ + ret = kstrtou32(arg, 0, &new_enable_ini); + if (!ret) { + if (new_enable_ini > ENABLE_INI) { + pr_err("enable_ini cannot be %d, in range 0-16\n", new_enable_ini); + return -EINVAL; + } + goto out; + } + + /* in case the argument type is boolean */ + ret = kstrtobool(arg, &res); + if (ret) + return ret; + new_enable_ini = (res ? ENABLE_INI : 0); + +out: + iwlwifi_mod_params.enable_ini = new_enable_ini; + return 0; +} + +static const struct kernel_param_ops enable_ini_ops = { + .set = enable_ini_set +}; + +module_param_cb(enable_ini, &enable_ini_ops, &iwlwifi_mod_params.enable_ini, 0644); MODULE_PARM_DESC(enable_ini, - "Enable debug INI TLV FW debug infrastructure (default: true"); + "0:disable, 1-15:FW_DBG_PRESET Values, 16:enabled without preset value defined," + "Debug INI TLV FW debug infrastructure (default: 16)"); /* * set bt_coex_active to true, uCode will do kill/defer diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-drv.h b/drivers/net/wireless/intel/iwlwifi/iwl-drv.h index 0fd009e6d685..80073f973334 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-drv.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-drv.h @@ -84,7 +84,7 @@ void iwl_drv_stop(struct iwl_drv *drv); * everything is built-in, then we can avoid that. */ #ifdef CONFIG_IWLWIFI_OPMODE_MODULAR -#define IWL_EXPORT_SYMBOL(sym) EXPORT_SYMBOL_GPL(sym) +#define IWL_EXPORT_SYMBOL(sym) EXPORT_SYMBOL_NS_GPL(sym, IWLWIFI) #else #define IWL_EXPORT_SYMBOL(sym) #endif diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c b/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c index b9e86bf972e5..5f386bb1a353 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c +++ b/drivers/net/wireless/intel/iwlwifi/iwl-eeprom-read.c @@ -23,26 +23,22 @@ */ #define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */ -#define IWL_EEPROM_SEM_TIMEOUT 10 /* microseconds */ -#define IWL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ - - /* * The device's EEPROM semaphore prevents conflicts between driver and uCode * when accessing the EEPROM; each access is a series of pulses to/from the * EEPROM chip, not a single event, so even reads could conflict if they * weren't arbitrated by the semaphore. */ +#define IWL_EEPROM_SEM_TIMEOUT 10 /* microseconds */ +#define IWL_EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ -#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */ -#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */ static int iwl_eeprom_acquire_semaphore(struct iwl_trans *trans) { u16 count; int ret; - for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) { + for (count = 0; count < IWL_EEPROM_SEM_RETRY_LIMIT; count++) { /* Request semaphore */ iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); @@ -51,7 +47,7 @@ static int iwl_eeprom_acquire_semaphore(struct iwl_trans *trans) ret = iwl_poll_bit(trans, CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, - EEPROM_SEM_TIMEOUT); + IWL_EEPROM_SEM_TIMEOUT); if (ret >= 0) { IWL_DEBUG_EEPROM(trans->dev, "Acquired semaphore after %d tries.\n", diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-fh.h b/drivers/net/wireless/intel/iwlwifi/iwl-fh.h index e6fd4941a4cb..bedd78a47f67 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-fh.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-fh.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2005-2014, 2018-2020 Intel Corporation + * Copyright (C) 2005-2014, 2018-2021 Intel Corporation * Copyright (C) 2015-2017 Intel Deutschland GmbH */ #ifndef __iwl_fh_h__ @@ -590,11 +590,31 @@ struct iwl_rb_status { #define TFD_QUEUE_CB_SIZE(x) (ilog2(x) - 3) #define TFD_QUEUE_SIZE_BC_DUP (64) #define TFD_QUEUE_BC_SIZE (TFD_QUEUE_SIZE_MAX + TFD_QUEUE_SIZE_BC_DUP) -#define TFD_QUEUE_BC_SIZE_GEN3 1024 +#define TFD_QUEUE_BC_SIZE_GEN3_AX210 1024 +#define TFD_QUEUE_BC_SIZE_GEN3_BZ (1024 * 4) #define IWL_TX_DMA_MASK DMA_BIT_MASK(36) #define IWL_NUM_OF_TBS 20 #define IWL_TFH_NUM_TBS 25 +/* IMR DMA registers */ +#define IMR_TFH_SRV_DMA_CHNL0_CTRL 0x00a0a51c +#define IMR_TFH_SRV_DMA_CHNL0_SRAM_ADDR 0x00a0a520 +#define IMR_TFH_SRV_DMA_CHNL0_DRAM_ADDR_LSB 0x00a0a524 +#define IMR_TFH_SRV_DMA_CHNL0_DRAM_ADDR_MSB 0x00a0a528 +#define IMR_TFH_SRV_DMA_CHNL0_BC 0x00a0a52c +#define TFH_SRV_DMA_CHNL0_LEFT_BC 0x00a0a530 + +/* RFH S2D DMA registers */ +#define IMR_RFH_GEN_CFG_SERVICE_DMA_RS_MSK 0x0000000c +#define IMR_RFH_GEN_CFG_SERVICE_DMA_SNOOP_MSK 0x00000002 + +/* TFH D2S DMA registers */ +#define IMR_UREG_CHICK_HALT_UMAC_PERMANENTLY_MSK 0x80000000 +#define IMR_UREG_CHICK 0x00d05c00 +#define IMR_TFH_SRV_DMA_CHNL0_CTRL_D2S_IRQ_TARGET_POS 0x00800000 +#define IMR_TFH_SRV_DMA_CHNL0_CTRL_D2S_RS_MSK 0x00000030 +#define IMR_TFH_SRV_DMA_CHNL0_CTRL_D2S_DMA_EN_POS 0x80000000 + static inline u8 iwl_get_dma_hi_addr(dma_addr_t addr) { return (sizeof(addr) > sizeof(u32) ? upper_32_bits(addr) : 0) & 0xF; @@ -707,14 +727,14 @@ struct iwlagn_scd_bc_tbl { } __packed; /** - * struct iwl_gen3_bc_tbl scheduler byte count table gen3 + * struct iwl_gen3_bc_tbl_entry scheduler byte count table entry gen3 * For AX210 and on: * @tfd_offset: 0-12 - tx command byte count * 12-13 - number of 64 byte chunks * 14-16 - reserved */ -struct iwl_gen3_bc_tbl { - __le16 tfd_offset[TFD_QUEUE_BC_SIZE_GEN3]; +struct iwl_gen3_bc_tbl_entry { + __le16 tfd_offset; } __packed; #endif /* !__iwl_fh_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-io.c b/drivers/net/wireless/intel/iwlwifi/iwl-io.c index 253eac4cbf59..396f2c997da6 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-io.c +++ b/drivers/net/wireless/intel/iwlwifi/iwl-io.c @@ -65,14 +65,14 @@ IWL_EXPORT_SYMBOL(iwl_poll_bit); u32 iwl_read_direct32(struct iwl_trans *trans, u32 reg) { - u32 value = 0x5a5a5a5a; - if (iwl_trans_grab_nic_access(trans)) { - value = iwl_read32(trans, reg); + u32 value = iwl_read32(trans, reg); + iwl_trans_release_nic_access(trans); + return value; } - return value; + return 0x5a5a5a5a; } IWL_EXPORT_SYMBOL(iwl_read_direct32); @@ -135,13 +135,15 @@ IWL_EXPORT_SYMBOL(iwl_write_prph64_no_grab); u32 iwl_read_prph(struct iwl_trans *trans, u32 ofs) { - u32 val = 0x5a5a5a5a; - if (iwl_trans_grab_nic_access(trans)) { - val = iwl_read_prph_no_grab(trans, ofs); + u32 val = iwl_read_prph_no_grab(trans, ofs); + iwl_trans_release_nic_access(trans); + + return val; } - return val; + + return 0x5a5a5a5a; } IWL_EXPORT_SYMBOL(iwl_read_prph); diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h b/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h index 004ebdac4535..d0b4d02bdab9 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-modparams.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2005-2014, 2018-2020 Intel Corporation + * Copyright (C) 2005-2014, 2018-2022 Intel Corporation */ #ifndef __iwl_modparams_h__ #define __iwl_modparams_h__ @@ -83,7 +83,8 @@ struct iwl_mod_params { */ bool disable_11ax; bool remove_when_gone; - bool enable_ini; + u32 enable_ini; + bool disable_11be; }; static inline bool iwl_enable_rx_ampdu(void) diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c b/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c index 04addf964d83..9040da3dcce3 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c +++ b/drivers/net/wireless/intel/iwlwifi/iwl-nvm-parse.c @@ -375,10 +375,10 @@ static int iwl_init_channel_map(struct device *dev, const struct iwl_cfg *cfg, if (v4) ch_flags = - __le32_to_cpup((__le32 *)nvm_ch_flags + ch_idx); + __le32_to_cpup((const __le32 *)nvm_ch_flags + ch_idx); else ch_flags = - __le16_to_cpup((__le16 *)nvm_ch_flags + ch_idx); + __le16_to_cpup((const __le16 *)nvm_ch_flags + ch_idx); if (band == NL80211_BAND_5GHZ && !data->sku_cap_band_52ghz_enable) @@ -583,9 +583,9 @@ static const struct ieee80211_sband_iftype_data iwl_he_capa[] = { IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US | IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ, .phy_cap_info[3] = - IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_NO_DCM | + IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | - IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_NO_DCM | + IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, .phy_cap_info[4] = IEEE80211_HE_PHY_CAP4_SU_BEAMFORMEE | @@ -653,9 +653,9 @@ static const struct ieee80211_sband_iftype_data iwl_he_capa[] = { IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ | IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US, .phy_cap_info[3] = - IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_NO_DCM | + IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_BPSK | IEEE80211_HE_PHY_CAP3_DCM_MAX_TX_NSS_1 | - IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_NO_DCM | + IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_BPSK | IEEE80211_HE_PHY_CAP3_DCM_MAX_RX_NSS_1, .phy_cap_info[6] = IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT, @@ -731,7 +731,7 @@ static void iwl_init_he_6ghz_capa(struct iwl_trans *trans, IWL_DEBUG_EEPROM(trans->dev, "he_6ghz_capa=0x%x\n", he_6ghz_capa); /* we know it's writable - we set it before ourselves */ - iftype_data = (void *)sband->iftype_data; + iftype_data = (void *)(uintptr_t)sband->iftype_data; for (i = 0; i < sband->n_iftype_data; i++) iftype_data[i].he_6ghz_capa.capa = cpu_to_le16(he_6ghz_capa); } @@ -783,6 +783,7 @@ iwl_nvm_fixup_sband_iftd(struct iwl_trans *trans, switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) { case IWL_CFG_RF_TYPE_GF: case IWL_CFG_RF_TYPE_MR: + case IWL_CFG_RF_TYPE_MS: iftype_data->he_cap.he_cap_elem.phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU; if (!is_ap) @@ -911,7 +912,7 @@ static int iwl_get_sku(const struct iwl_cfg *cfg, const __le16 *nvm_sw, if (cfg->nvm_type != IWL_NVM_EXT) return le16_to_cpup(nvm_sw + SKU); - return le32_to_cpup((__le32 *)(phy_sku + SKU_FAMILY_8000)); + return le32_to_cpup((const __le32 *)(phy_sku + SKU_FAMILY_8000)); } static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw) @@ -919,8 +920,8 @@ static int iwl_get_nvm_version(const struct iwl_cfg *cfg, const __le16 *nvm_sw) if (cfg->nvm_type != IWL_NVM_EXT) return le16_to_cpup(nvm_sw + NVM_VERSION); else - return le32_to_cpup((__le32 *)(nvm_sw + - NVM_VERSION_EXT_NVM)); + return le32_to_cpup((const __le32 *)(nvm_sw + + NVM_VERSION_EXT_NVM)); } static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw, @@ -929,7 +930,7 @@ static int iwl_get_radio_cfg(const struct iwl_cfg *cfg, const __le16 *nvm_sw, if (cfg->nvm_type != IWL_NVM_EXT) return le16_to_cpup(nvm_sw + RADIO_CFG); - return le32_to_cpup((__le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM)); + return le32_to_cpup((const __le32 *)(phy_sku + RADIO_CFG_FAMILY_EXT_NVM)); } @@ -940,7 +941,7 @@ static int iwl_get_n_hw_addrs(const struct iwl_cfg *cfg, const __le16 *nvm_sw) if (cfg->nvm_type != IWL_NVM_EXT) return le16_to_cpup(nvm_sw + N_HW_ADDRS); - n_hw_addr = le32_to_cpup((__le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000)); + n_hw_addr = le32_to_cpup((const __le32 *)(nvm_sw + N_HW_ADDRS_FAMILY_8000)); return n_hw_addr & N_HW_ADDR_MASK; } @@ -1079,7 +1080,9 @@ static int iwl_set_hw_address(struct iwl_trans *trans, return -EINVAL; } - IWL_INFO(trans, "base HW address: %pM\n", data->hw_addr); + if (!trans->csme_own) + IWL_INFO(trans, "base HW address: %pM, OTP minor version: 0x%x\n", + data->hw_addr, iwl_read_prph(trans, REG_OTP_MINOR)); return 0; } @@ -1384,8 +1387,12 @@ iwl_parse_nvm_mcc_info(struct device *dev, const struct iwl_cfg *cfg, nvm_chan = iwl_nvm_channels; } - if (WARN_ON(num_of_ch > max_num_ch)) + if (num_of_ch > max_num_ch) { + IWL_DEBUG_DEV(dev, IWL_DL_LAR, + "Num of channels (%d) is greater than expected. Truncating to %d\n", + num_of_ch, max_num_ch); num_of_ch = max_num_ch; + } if (WARN_ON_ONCE(num_of_ch > NL80211_MAX_SUPP_REG_RULES)) return ERR_PTR(-EINVAL); @@ -1591,7 +1598,7 @@ int iwl_read_external_nvm(struct iwl_trans *trans, } eof = fw_entry->data + fw_entry->size; - dword_buff = (__le32 *)fw_entry->data; + dword_buff = (const __le32 *)fw_entry->data; /* some NVM file will contain a header. * The header is identified by 2 dwords header as follow: @@ -1603,7 +1610,7 @@ int iwl_read_external_nvm(struct iwl_trans *trans, if (fw_entry->size > NVM_HEADER_SIZE && dword_buff[0] == cpu_to_le32(NVM_HEADER_0) && dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) { - file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE); + file_sec = (const void *)(fw_entry->data + NVM_HEADER_SIZE); IWL_INFO(trans, "NVM Version %08X\n", le32_to_cpu(dword_buff[2])); IWL_INFO(trans, "NVM Manufacturing date %08X\n", le32_to_cpu(dword_buff[3])); @@ -1616,7 +1623,7 @@ int iwl_read_external_nvm(struct iwl_trans *trans, goto out; } } else { - file_sec = (void *)fw_entry->data; + file_sec = (const void *)fw_entry->data; } while (true) { @@ -1684,7 +1691,7 @@ int iwl_read_external_nvm(struct iwl_trans *trans, nvm_sections[section_id].length = section_size; /* advance to the next section */ - file_sec = (void *)(file_sec->data + section_size); + file_sec = (const void *)(file_sec->data + section_size); } out: release_firmware(fw_entry); diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-phy-db.c b/drivers/net/wireless/intel/iwlwifi/iwl-phy-db.c index 5378315d0179..0a93ac769f66 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-phy-db.c +++ b/drivers/net/wireless/intel/iwlwifi/iwl-phy-db.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2005-2014, 2020 Intel Corporation + * Copyright (C) 2005-2014, 2020-2021 Intel Corporation * Copyright (C) 2016 Intel Deutschland GmbH */ #include <linux/slab.h> @@ -13,8 +13,6 @@ #include "iwl-op-mode.h" #include "iwl-trans.h" -#define CHANNEL_NUM_SIZE 4 /* num of channels in calib_ch size */ - struct iwl_phy_db_entry { u16 size; u8 *data; diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-prph.h b/drivers/net/wireless/intel/iwlwifi/iwl-prph.h index 95b3dae7b504..a22788a68168 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-prph.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-prph.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2005-2014, 2018-2021 Intel Corporation + * Copyright (C) 2005-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016 Intel Deutschland GmbH */ @@ -354,10 +354,10 @@ #define WFPM_GP2 0xA030B4 /* DBGI SRAM Register details */ -#define DBGI_SRAM_TARGET_ACCESS_CFG 0x00A2E14C -#define DBGI_SRAM_TARGET_ACCESS_CFG_RESET_ADDRESS_MSK 0x10000 #define DBGI_SRAM_TARGET_ACCESS_RDATA_LSB 0x00A2E154 #define DBGI_SRAM_TARGET_ACCESS_RDATA_MSB 0x00A2E158 +#define DBGI_SRAM_FIFO_POINTERS 0x00A2E148 +#define DBGI_SRAM_FIFO_POINTERS_WR_PTR_MSK 0x00000FFF enum { ENABLE_WFPM = BIT(31), @@ -386,6 +386,11 @@ enum { #define UREG_LMAC1_CURRENT_PC 0xa05c1c #define UREG_LMAC2_CURRENT_PC 0xa05c20 +#define WFPM_LMAC1_PD_NOTIFICATION 0xa0338c +#define WFPM_ARC1_PD_NOTIFICATION 0xa03044 +#define HPM_SECONDARY_DEVICE_STATE 0xa03404 + + /* For UMAG_GEN_HW_STATUS reg check */ enum { UMAG_GEN_HW_IS_FPGA = BIT(1), @@ -491,4 +496,6 @@ enum { #define HBUS_TIMEOUT 0xA5A5A5A1 #define WFPM_DPHY_OFF 0xDF10FF +#define REG_OTP_MINOR 0xA0333C + #endif /* __iwl_prph_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-trans.c b/drivers/net/wireless/intel/iwlwifi/iwl-trans.c index 9236f9106826..b1af9359cea5 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-trans.c +++ b/drivers/net/wireless/intel/iwlwifi/iwl-trans.c @@ -78,8 +78,12 @@ int iwl_trans_init(struct iwl_trans *trans) if (WARN_ON(trans->trans_cfg->gen2 && txcmd_size >= txcmd_align)) return -EINVAL; - if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) - trans->txqs.bc_tbl_size = sizeof(struct iwl_gen3_bc_tbl); + if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) + trans->txqs.bc_tbl_size = + sizeof(struct iwl_gen3_bc_tbl_entry) * TFD_QUEUE_BC_SIZE_GEN3_BZ; + else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) + trans->txqs.bc_tbl_size = + sizeof(struct iwl_gen3_bc_tbl_entry) * TFD_QUEUE_BC_SIZE_GEN3_AX210; else trans->txqs.bc_tbl_size = sizeof(struct iwlagn_scd_bc_tbl); /* @@ -203,10 +207,10 @@ IWL_EXPORT_SYMBOL(iwl_trans_send_cmd); static int iwl_hcmd_names_cmp(const void *key, const void *elt) { const struct iwl_hcmd_names *name = elt; - u8 cmd1 = *(u8 *)key; + const u8 *cmd1 = key; u8 cmd2 = name->cmd_id; - return (cmd1 - cmd2); + return (*cmd1 - cmd2); } const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id) diff --git a/drivers/net/wireless/intel/iwlwifi/iwl-trans.h b/drivers/net/wireless/intel/iwlwifi/iwl-trans.h index 1bcaa3598785..d659ccd065f7 100644 --- a/drivers/net/wireless/intel/iwlwifi/iwl-trans.h +++ b/drivers/net/wireless/intel/iwlwifi/iwl-trans.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2005-2014, 2018-2021 Intel Corporation + * Copyright (C) 2005-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -406,6 +406,9 @@ struct iwl_dump_sanitize_ops { * @cb_data_offs: offset inside skb->cb to store transport data at, must have * space for at least two pointers * @fw_reset_handshake: firmware supports reset flow handshake + * @queue_alloc_cmd_ver: queue allocation command version, set to 0 + * for using the older SCD_QUEUE_CFG, set to the version of + * SCD_QUEUE_CONFIG_CMD otherwise. */ struct iwl_trans_config { struct iwl_op_mode *op_mode; @@ -424,6 +427,7 @@ struct iwl_trans_config { u8 cb_data_offs; bool fw_reset_handshake; + u8 queue_alloc_cmd_ver; }; struct iwl_trans_dump_data { @@ -569,10 +573,9 @@ struct iwl_trans_ops { void (*txq_disable)(struct iwl_trans *trans, int queue, bool configure_scd); /* 22000 functions */ - int (*txq_alloc)(struct iwl_trans *trans, - __le16 flags, u8 sta_id, u8 tid, - int cmd_id, int size, - unsigned int queue_wdg_timeout); + int (*txq_alloc)(struct iwl_trans *trans, u32 flags, + u32 sta_mask, u8 tid, + int size, unsigned int queue_wdg_timeout); void (*txq_free)(struct iwl_trans *trans, int queue); int (*rxq_dma_data)(struct iwl_trans *trans, int queue, struct iwl_trans_rxq_dma_data *data); @@ -615,6 +618,10 @@ struct iwl_trans_ops { int (*set_reduce_power)(struct iwl_trans *trans, const void *data, u32 len); void (*interrupts)(struct iwl_trans *trans, bool enable); + int (*imr_dma_data)(struct iwl_trans *trans, + u32 dst_addr, u64 src_addr, + u32 byte_cnt); + }; /** @@ -722,6 +729,26 @@ struct iwl_self_init_dram { }; /** + * struct iwl_imr_data - imr dram data used during debug process + * @imr_enable: imr enable status received from fw + * @imr_size: imr dram size received from fw + * @sram_addr: sram address from debug tlv + * @sram_size: sram size from debug tlv + * @imr2sram_remainbyte`: size remained after each dma transfer + * @imr_curr_addr: current dst address used during dma transfer + * @imr_base_addr: imr address received from fw + */ +struct iwl_imr_data { + u32 imr_enable; + u32 imr_size; + u32 sram_addr; + u32 sram_size; + u32 imr2sram_remainbyte; + u64 imr_curr_addr; + __le64 imr_base_addr; +}; + +/** * struct iwl_trans_debug - transport debug related data * * @n_dest_reg: num of reg_ops in %dbg_dest_tlv @@ -785,6 +812,7 @@ struct iwl_trans_debug { u32 ucode_preset; bool restart_required; u32 last_tp_resetfw; + struct iwl_imr_data imr_data; }; struct iwl_dma_ptr { @@ -904,6 +932,7 @@ struct iwl_txq { * @queue_used - bit mask of used queues * @queue_stopped - bit mask of stopped queues * @scd_bc_tbls: gen1 pointer to the byte count table of the scheduler + * @queue_alloc_cmd_ver: queue allocation command version */ struct iwl_trans_txqs { unsigned long queue_used[BITS_TO_LONGS(IWL_MAX_TVQM_QUEUES)]; @@ -929,6 +958,8 @@ struct iwl_trans_txqs { } tfd; struct iwl_dma_ptr scd_bc_tbls; + + u8 queue_alloc_cmd_ver; }; /** @@ -1220,9 +1251,8 @@ iwl_trans_txq_free(struct iwl_trans *trans, int queue) static inline int iwl_trans_txq_alloc(struct iwl_trans *trans, - __le16 flags, u8 sta_id, u8 tid, - int cmd_id, int size, - unsigned int wdg_timeout) + u32 flags, u32 sta_mask, u8 tid, + int size, unsigned int wdg_timeout) { might_sleep(); @@ -1234,8 +1264,8 @@ iwl_trans_txq_alloc(struct iwl_trans *trans, return -EIO; } - return trans->ops->txq_alloc(trans, flags, sta_id, tid, - cmd_id, size, wdg_timeout); + return trans->ops->txq_alloc(trans, flags, sta_mask, tid, + size, wdg_timeout); } static inline void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans, @@ -1368,6 +1398,15 @@ static inline int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr, iwl_trans_read_mem(trans, addr, buf, (bufsize) / sizeof(u32));\ } while (0) +static inline int iwl_trans_write_imr_mem(struct iwl_trans *trans, + u32 dst_addr, u64 src_addr, + u32 byte_cnt) +{ + if (trans->ops->imr_dma_data) + return trans->ops->imr_dma_data(trans, dst_addr, src_addr, byte_cnt); + return 0; +} + static inline u32 iwl_trans_read_mem32(struct iwl_trans *trans, u32 addr) { u32 value; diff --git a/drivers/net/wireless/intel/iwlwifi/mei/main.c b/drivers/net/wireless/intel/iwlwifi/mei/main.c index 2f7f0f994ca3..b4f45234cfc8 100644 --- a/drivers/net/wireless/intel/iwlwifi/mei/main.c +++ b/drivers/net/wireless/intel/iwlwifi/mei/main.c @@ -312,7 +312,7 @@ static ssize_t iwl_mei_write_cyclic_buf(struct mei_cl_device *cldev, memcpy(q_head + wr, hdr, tx_sz); } else { memcpy(q_head + wr, hdr, q_sz - wr); - memcpy(q_head, (u8 *)hdr + q_sz - wr, tx_sz - (q_sz - wr)); + memcpy(q_head, (const u8 *)hdr + q_sz - wr, tx_sz - (q_sz - wr)); } WRITE_ONCE(notif_q->wr_ptr, cpu_to_le32((wr + tx_sz) % q_sz)); @@ -432,7 +432,7 @@ void iwl_mei_add_data_to_ring(struct sk_buff *skb, bool cb_tx) u32 q_sz; u32 rd; u32 wr; - void *q_head; + u8 *q_head; if (!iwl_mei_global_cldev) return; @@ -2003,7 +2003,11 @@ static void iwl_mei_remove(struct mei_cl_device *cldev) } static const struct mei_cl_device_id iwl_mei_tbl[] = { - { KBUILD_MODNAME, MEI_WLAN_UUID, MEI_CL_VERSION_ANY}, + { + .name = KBUILD_MODNAME, + .uuid = MEI_WLAN_UUID, + .version = MEI_CL_VERSION_ANY, + }, /* required last entry */ { } diff --git a/drivers/net/wireless/intel/iwlwifi/mei/net.c b/drivers/net/wireless/intel/iwlwifi/mei/net.c index 468102a95e1b..3472167c8370 100644 --- a/drivers/net/wireless/intel/iwlwifi/mei/net.c +++ b/drivers/net/wireless/intel/iwlwifi/mei/net.c @@ -102,8 +102,8 @@ static bool iwl_mei_rx_filter_arp(struct sk_buff *skb, * src IP address - 4 bytes * target MAC addess - 6 bytes */ - target_ip = (void *)((u8 *)(arp + 1) + - ETH_ALEN + sizeof(__be32) + ETH_ALEN); + target_ip = (const void *)((const u8 *)(arp + 1) + + ETH_ALEN + sizeof(__be32) + ETH_ALEN); /* * ARP request is forwarded to ME only if IP address match in the diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/d3.c b/drivers/net/wireless/intel/iwlwifi/mvm/d3.c index b400867e94f0..a995bba0ba81 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/d3.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/d3.c @@ -31,7 +31,7 @@ void iwl_mvm_set_rekey_data(struct ieee80211_hw *hw, memcpy(mvmvif->rekey_data.kck, data->kck, data->kck_len); mvmvif->rekey_data.akm = data->akm & 0xFF; mvmvif->rekey_data.replay_ctr = - cpu_to_le64(be64_to_cpup((__be64 *)data->replay_ctr)); + cpu_to_le64(be64_to_cpup((const __be64 *)data->replay_ctr)); mvmvif->rekey_data.valid = true; mutex_unlock(&mvm->mutex); @@ -453,8 +453,7 @@ static int iwl_mvm_wowlan_config_rsc_tsc(struct iwl_mvm *mvm, struct ieee80211_vif *vif) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); - int ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - WOWLAN_TSC_RSC_PARAM, + int ver = iwl_fw_lookup_cmd_ver(mvm->fw, WOWLAN_TSC_RSC_PARAM, IWL_FW_CMD_VER_UNKNOWN); int ret; @@ -672,8 +671,7 @@ static int iwl_mvm_send_patterns(struct iwl_mvm *mvm, .dataflags[0] = IWL_HCMD_DFL_NOCOPY, }; int i, err; - int ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - WOWLAN_PATTERNS, + int ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, IWL_FW_CMD_VER_UNKNOWN); if (!wowlan->n_patterns) @@ -921,8 +919,7 @@ iwl_mvm_get_wowlan_config(struct iwl_mvm *mvm, wowlan_config_cmd->flags = ENABLE_L3_FILTERING | ENABLE_NBNS_FILTERING | ENABLE_DHCP_FILTERING; - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - WOWLAN_CONFIGURATION, 0) < 6) { + if (iwl_fw_lookup_cmd_ver(mvm->fw, WOWLAN_CONFIGURATION, 0) < 6) { /* Query the last used seqno and set it */ int ret = iwl_mvm_get_last_nonqos_seq(mvm, vif); @@ -1017,8 +1014,7 @@ static int iwl_mvm_wowlan_config_key_params(struct iwl_mvm *mvm, if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_TKIP_MIC_KEYS)) { - int ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - WOWLAN_TKIP_PARAM, + int ver = iwl_fw_lookup_cmd_ver(mvm->fw, WOWLAN_TKIP_PARAM, IWL_FW_CMD_VER_UNKNOWN); struct wowlan_key_tkip_data tkip_data = {}; int size; @@ -1058,7 +1054,6 @@ static int iwl_mvm_wowlan_config_key_params(struct iwl_mvm *mvm, }; cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, - IWL_ALWAYS_LONG_GROUP, WOWLAN_KEK_KCK_MATERIAL, IWL_FW_CMD_VER_UNKNOWN); if (WARN_ON(cmd_ver != 2 && cmd_ver != 3 && cmd_ver != 4 && @@ -1089,7 +1084,7 @@ static int iwl_mvm_wowlan_config_key_params(struct iwl_mvm *mvm, sizeof(struct iwl_wowlan_kek_kck_material_cmd_v2); /* skip the sta_id at the beginning */ _kek_kck_cmd = (void *) - ((u8 *)_kek_kck_cmd) + sizeof(kek_kck_cmd.sta_id); + ((u8 *)_kek_kck_cmd + sizeof(kek_kck_cmd.sta_id)); } IWL_DEBUG_WOWLAN(mvm, "setting akm %d\n", @@ -1489,7 +1484,7 @@ static void iwl_mvm_report_wakeup_reasons(struct iwl_mvm *mvm, int pktsize = status->wake_packet_bufsize; int pktlen = status->wake_packet_length; const u8 *pktdata = status->wake_packet; - struct ieee80211_hdr *hdr = (void *)pktdata; + const struct ieee80211_hdr *hdr = (const void *)pktdata; int truncated = pktlen - pktsize; /* this would be a firmware bug */ @@ -2074,8 +2069,7 @@ iwl_mvm_send_wowlan_get_status(struct iwl_mvm *mvm, u8 sta_id) }; int ret, len; u8 notif_ver; - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - WOWLAN_GET_STATUSES, + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, IWL_FW_CMD_VER_UNKNOWN); if (cmd_ver == IWL_FW_CMD_VER_UNKNOWN) @@ -2182,8 +2176,7 @@ out_free_resp: static struct iwl_wowlan_status_data * iwl_mvm_get_wakeup_status(struct iwl_mvm *mvm, u8 sta_id) { - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - OFFLOADS_QUERY_CMD, + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, OFFLOADS_QUERY_CMD, IWL_FW_CMD_VER_UNKNOWN); __le32 station_id = cpu_to_le32(sta_id); u32 cmd_size = cmd_ver != IWL_FW_CMD_VER_UNKNOWN ? sizeof(station_id) : 0; @@ -2704,7 +2697,9 @@ static int iwl_mvm_d3_test_open(struct inode *inode, struct file *file) /* start pseudo D3 */ rtnl_lock(); + wiphy_lock(mvm->hw->wiphy); err = __iwl_mvm_suspend(mvm->hw, mvm->hw->wiphy->wowlan_config, true); + wiphy_unlock(mvm->hw->wiphy); rtnl_unlock(); if (err > 0) err = -EINVAL; @@ -2760,7 +2755,9 @@ static int iwl_mvm_d3_test_release(struct inode *inode, struct file *file) iwl_fw_dbg_read_d3_debug_data(&mvm->fwrt); rtnl_lock(); + wiphy_lock(mvm->hw->wiphy); __iwl_mvm_resume(mvm, true); + wiphy_unlock(mvm->hw->wiphy); rtnl_unlock(); iwl_mvm_resume_tcm(mvm); diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c b/drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c index 445c94adb076..49898fd99594 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/debugfs.c @@ -426,8 +426,7 @@ static ssize_t iwl_dbgfs_amsdu_len_write(struct ieee80211_sta *sta, return -EINVAL; /* only change from debug set <-> debug unset */ - if ((amsdu_len && mvmsta->orig_amsdu_len) || - (!!amsdu_len && mvmsta->orig_amsdu_len)) + if (amsdu_len && mvmsta->orig_amsdu_len) return -EBUSY; if (amsdu_len) { @@ -1479,7 +1478,7 @@ iwl_dbgfs_he_sniffer_params_write(struct iwl_mvm *mvm, char *buf, .mvm = mvm, }; u16 wait_cmds[] = { - iwl_cmd_id(HE_AIR_SNIFFER_CONFIG_CMD, DATA_PATH_GROUP, 0), + WIDE_ID(DATA_PATH_GROUP, HE_AIR_SNIFFER_CONFIG_CMD), }; u32 aid; int ret; @@ -1514,8 +1513,9 @@ iwl_dbgfs_he_sniffer_params_write(struct iwl_mvm *mvm, char *buf, wait_cmds, ARRAY_SIZE(wait_cmds), iwl_mvm_sniffer_apply, &apply); - ret = iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(HE_AIR_SNIFFER_CONFIG_CMD, - DATA_PATH_GROUP, 0), 0, + ret = iwl_mvm_send_cmd_pdu(mvm, + WIDE_ID(DATA_PATH_GROUP, HE_AIR_SNIFFER_CONFIG_CMD), + 0, sizeof(he_mon_cmd), &he_mon_cmd); /* no need to really wait, we already did anyway */ @@ -1727,8 +1727,7 @@ static ssize_t iwl_dbgfs_mem_read(struct file *file, char __user *user_buf, if (!iwl_mvm_firmware_running(mvm)) return -EIO; - hcmd.id = iwl_cmd_id(*ppos >> 24 ? UMAC_RD_WR : LMAC_RD_WR, - DEBUG_GROUP, 0); + hcmd.id = WIDE_ID(DEBUG_GROUP, *ppos >> 24 ? UMAC_RD_WR : LMAC_RD_WR); cmd.op = cpu_to_le32(DEBUG_MEM_OP_READ); /* Take care of alignment of both the position and the length */ @@ -1758,7 +1757,7 @@ static ssize_t iwl_dbgfs_mem_read(struct file *file, char __user *user_buf, goto out; } - ret = len - copy_to_user(user_buf, (void *)rsp->data + delta, len); + ret = len - copy_to_user(user_buf, (u8 *)rsp->data + delta, len); *ppos += ret; out: @@ -1782,8 +1781,7 @@ static ssize_t iwl_dbgfs_mem_write(struct file *file, if (!iwl_mvm_firmware_running(mvm)) return -EIO; - hcmd.id = iwl_cmd_id(*ppos >> 24 ? UMAC_RD_WR : LMAC_RD_WR, - DEBUG_GROUP, 0); + hcmd.id = WIDE_ID(DEBUG_GROUP, *ppos >> 24 ? UMAC_RD_WR : LMAC_RD_WR); if (*ppos & 0x3 || count < 4) { op = DEBUG_MEM_OP_WRITE_BYTES; diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c b/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c index 628aee634b2a..430044bc4755 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/ftm-initiator.c @@ -346,8 +346,8 @@ iwl_mvm_ftm_target_chandef_v2(struct iwl_mvm *mvm, *format_bw |= IWL_LOCATION_BW_80MHZ << LOCATION_BW_POS; break; case NL80211_CHAN_WIDTH_160: - cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LOCATION_GROUP, - TOF_RANGE_REQ_CMD, + cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, + WIDE_ID(LOCATION_GROUP, TOF_RANGE_REQ_CMD), IWL_FW_CMD_VER_UNKNOWN); if (cmd_ver >= 13) { @@ -548,7 +548,7 @@ static int iwl_mvm_ftm_start_v5(struct iwl_mvm *mvm, struct ieee80211_vif *vif, { struct iwl_tof_range_req_cmd_v5 cmd_v5; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(TOF_RANGE_REQ_CMD, LOCATION_GROUP, 0), + .id = WIDE_ID(LOCATION_GROUP, TOF_RANGE_REQ_CMD), .dataflags[0] = IWL_HCMD_DFL_DUP, .data[0] = &cmd_v5, .len[0] = sizeof(cmd_v5), @@ -574,7 +574,7 @@ static int iwl_mvm_ftm_start_v7(struct iwl_mvm *mvm, struct ieee80211_vif *vif, { struct iwl_tof_range_req_cmd_v7 cmd_v7; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(TOF_RANGE_REQ_CMD, LOCATION_GROUP, 0), + .id = WIDE_ID(LOCATION_GROUP, TOF_RANGE_REQ_CMD), .dataflags[0] = IWL_HCMD_DFL_DUP, .data[0] = &cmd_v7, .len[0] = sizeof(cmd_v7), @@ -604,7 +604,7 @@ static int iwl_mvm_ftm_start_v8(struct iwl_mvm *mvm, struct ieee80211_vif *vif, { struct iwl_tof_range_req_cmd_v8 cmd; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(TOF_RANGE_REQ_CMD, LOCATION_GROUP, 0), + .id = WIDE_ID(LOCATION_GROUP, TOF_RANGE_REQ_CMD), .dataflags[0] = IWL_HCMD_DFL_DUP, .data[0] = &cmd, .len[0] = sizeof(cmd), @@ -630,7 +630,7 @@ static int iwl_mvm_ftm_start_v9(struct iwl_mvm *mvm, struct ieee80211_vif *vif, { struct iwl_tof_range_req_cmd_v9 cmd; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(TOF_RANGE_REQ_CMD, LOCATION_GROUP, 0), + .id = WIDE_ID(LOCATION_GROUP, TOF_RANGE_REQ_CMD), .dataflags[0] = IWL_HCMD_DFL_DUP, .data[0] = &cmd, .len[0] = sizeof(cmd), @@ -728,7 +728,7 @@ static int iwl_mvm_ftm_start_v11(struct iwl_mvm *mvm, { struct iwl_tof_range_req_cmd_v11 cmd; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(TOF_RANGE_REQ_CMD, LOCATION_GROUP, 0), + .id = WIDE_ID(LOCATION_GROUP, TOF_RANGE_REQ_CMD), .dataflags[0] = IWL_HCMD_DFL_DUP, .data[0] = &cmd, .len[0] = sizeof(cmd), @@ -799,7 +799,7 @@ static int iwl_mvm_ftm_start_v12(struct iwl_mvm *mvm, { struct iwl_tof_range_req_cmd_v12 cmd; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(TOF_RANGE_REQ_CMD, LOCATION_GROUP, 0), + .id = WIDE_ID(LOCATION_GROUP, TOF_RANGE_REQ_CMD), .dataflags[0] = IWL_HCMD_DFL_DUP, .data[0] = &cmd, .len[0] = sizeof(cmd), @@ -827,7 +827,7 @@ static int iwl_mvm_ftm_start_v13(struct iwl_mvm *mvm, { struct iwl_tof_range_req_cmd_v13 cmd; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(TOF_RANGE_REQ_CMD, LOCATION_GROUP, 0), + .id = WIDE_ID(LOCATION_GROUP, TOF_RANGE_REQ_CMD), .dataflags[0] = IWL_HCMD_DFL_DUP, .data[0] = &cmd, .len[0] = sizeof(cmd), @@ -877,8 +877,8 @@ int iwl_mvm_ftm_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif, return -EBUSY; if (new_api) { - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LOCATION_GROUP, - TOF_RANGE_REQ_CMD, + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, + WIDE_ID(LOCATION_GROUP, TOF_RANGE_REQ_CMD), IWL_FW_CMD_VER_UNKNOWN); switch (cmd_ver) { @@ -927,8 +927,7 @@ void iwl_mvm_ftm_abort(struct iwl_mvm *mvm, struct cfg80211_pmsr_request *req) iwl_mvm_ftm_reset(mvm); - if (iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(TOF_RANGE_ABORT_CMD, - LOCATION_GROUP, 0), + if (iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(LOCATION_GROUP, TOF_RANGE_ABORT_CMD), 0, sizeof(cmd), &cmd)) IWL_ERR(mvm, "failed to abort FTM process\n"); } diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/ftm-responder.c b/drivers/net/wireless/intel/iwlwifi/mvm/ftm-responder.c index bda6da7d988e..9729680476fd 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/ftm-responder.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/ftm-responder.c @@ -106,6 +106,7 @@ iwl_mvm_ftm_responder_cmd(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct cfg80211_chan_def *chandef) { + u32 cmd_id = WIDE_ID(LOCATION_GROUP, TOF_RESPONDER_CONFIG_CMD); struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); /* * The command structure is the same for versions 6, 7 and 8 (only the @@ -120,8 +121,7 @@ iwl_mvm_ftm_responder_cmd(struct iwl_mvm *mvm, IWL_TOF_RESPONDER_CMD_VALID_STA_ID), .sta_id = mvmvif->bcast_sta.sta_id, }; - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LOCATION_GROUP, - TOF_RESPONDER_CONFIG_CMD, 6); + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 6); int err; int cmd_size; @@ -161,9 +161,7 @@ iwl_mvm_ftm_responder_cmd(struct iwl_mvm *mvm, memcpy(cmd.bssid, vif->addr, ETH_ALEN); - return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(TOF_RESPONDER_CONFIG_CMD, - LOCATION_GROUP, 0), - 0, cmd_size, &cmd); + return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); } static int @@ -177,8 +175,7 @@ iwl_mvm_ftm_responder_dyn_cfg_v2(struct iwl_mvm *mvm, }; u8 data[IWL_LCI_CIVIC_IE_MAX_SIZE] = {0}; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(TOF_RESPONDER_DYN_CONFIG_CMD, - LOCATION_GROUP, 0), + .id = WIDE_ID(LOCATION_GROUP, TOF_RESPONDER_DYN_CONFIG_CMD), .data[0] = &cmd, .len[0] = sizeof(cmd), .data[1] = &data, @@ -220,8 +217,7 @@ iwl_mvm_ftm_responder_dyn_cfg_v3(struct iwl_mvm *mvm, { struct iwl_tof_responder_dyn_config_cmd cmd; struct iwl_host_cmd hcmd = { - .id = iwl_cmd_id(TOF_RESPONDER_DYN_CONFIG_CMD, - LOCATION_GROUP, 0), + .id = WIDE_ID(LOCATION_GROUP, TOF_RESPONDER_DYN_CONFIG_CMD), .data[0] = &cmd, .len[0] = sizeof(cmd), /* may not be able to DMA from stack */ @@ -278,8 +274,9 @@ iwl_mvm_ftm_responder_dyn_cfg_cmd(struct iwl_mvm *mvm, struct ieee80211_ftm_responder_params *params) { int ret; - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LOCATION_GROUP, - TOF_RESPONDER_DYN_CONFIG_CMD, 2); + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, + WIDE_ID(LOCATION_GROUP, TOF_RESPONDER_DYN_CONFIG_CMD), + 2); switch (cmd_ver) { case 2: @@ -320,8 +317,9 @@ int iwl_mvm_ftm_respoder_add_pasn_sta(struct iwl_mvm *mvm, .addr = addr, .hltk = hltk, }; - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LOCATION_GROUP, - TOF_RESPONDER_DYN_CONFIG_CMD, 2); + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, + WIDE_ID(LOCATION_GROUP, TOF_RESPONDER_DYN_CONFIG_CMD), + 2); lockdep_assert_held(&mvm->mutex); diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/fw.c b/drivers/net/wireless/intel/iwlwifi/mvm/fw.c index ae589b3b8c46..e842816134f1 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/fw.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/fw.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2012-2014, 2018-2021 Intel Corporation + * Copyright (C) 2012-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -25,11 +25,6 @@ #define MVM_UCODE_ALIVE_TIMEOUT (HZ) #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ) -#define UCODE_VALID_OK cpu_to_le32(0x1) - -#define IWL_PPAG_MASK 3 -#define IWL_PPAG_ETSI_MASK BIT(0) - #define IWL_TAS_US_MCC 0x5553 #define IWL_TAS_CANADA_MCC 0x4341 @@ -79,7 +74,7 @@ static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm) struct iwl_dqa_enable_cmd dqa_cmd = { .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE), }; - u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0); + u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD); int ret; ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd); @@ -126,13 +121,54 @@ static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait, u32 lmac_error_event_table, umac_error_table; u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP, UCODE_ALIVE_NTFY, 0); + u32 i; - /* - * For v5 and above, we can check the version, for older - * versions we need to check the size. - */ - if (version == 5 || version == 6) { - /* v5 and v6 are compatible (only IMR addition) */ + if (version == 6) { + struct iwl_alive_ntf_v6 *palive; + + if (pkt_len < sizeof(*palive)) + return false; + + palive = (void *)pkt->data; + mvm->trans->dbg.imr_data.imr_enable = + le32_to_cpu(palive->imr.enabled); + mvm->trans->dbg.imr_data.imr_size = + le32_to_cpu(palive->imr.size); + mvm->trans->dbg.imr_data.imr2sram_remainbyte = + mvm->trans->dbg.imr_data.imr_size; + mvm->trans->dbg.imr_data.imr_base_addr = + palive->imr.base_addr; + mvm->trans->dbg.imr_data.imr_curr_addr = + le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr); + IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n", + mvm->trans->dbg.imr_data.imr_enable, + mvm->trans->dbg.imr_data.imr_size, + le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr)); + + if (!mvm->trans->dbg.imr_data.imr_enable) { + for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) { + struct iwl_ucode_tlv *reg_tlv; + struct iwl_fw_ini_region_tlv *reg; + + reg_tlv = mvm->trans->dbg.active_regions[i]; + if (!reg_tlv) + continue; + + reg = (void *)reg_tlv->data; + /* + * We have only one DRAM IMR region, so we + * can break as soon as we find the first + * one. + */ + if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) { + mvm->trans->dbg.unsupported_region_msk |= BIT(i); + break; + } + } + } + } + + if (version >= 5) { struct iwl_alive_ntf_v5 *palive; if (pkt_len < sizeof(*palive)) @@ -249,6 +285,26 @@ static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait, return false; } +static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm) +{ + struct iwl_trans *trans = mvm->trans; + enum iwl_device_family device_family = trans->trans_cfg->device_family; + + if (device_family < IWL_DEVICE_FAMILY_8000) + return; + + if (device_family <= IWL_DEVICE_FAMILY_9000) + IWL_ERR(mvm, "WFPM_ARC1_PD_NOTIFICATION: 0x%x\n", + iwl_read_umac_prph(trans, WFPM_ARC1_PD_NOTIFICATION)); + else + IWL_ERR(mvm, "WFPM_LMAC1_PD_NOTIFICATION: 0x%x\n", + iwl_read_umac_prph(trans, WFPM_LMAC1_PD_NOTIFICATION)); + + IWL_ERR(mvm, "HPM_SECONDARY_DEVICE_STATE: 0x%x\n", + iwl_read_umac_prph(trans, HPM_SECONDARY_DEVICE_STATE)); + +} + static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, enum iwl_ucode_type ucode_type) { @@ -314,6 +370,8 @@ static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm, iwl_read_prph(trans, SB_CPU_2_STATUS)); } + iwl_mvm_print_pd_notification(mvm); + /* LMAC/UMAC PC info */ if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_9000) { @@ -546,8 +604,7 @@ static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) return 0; } - cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, REGULATORY_AND_NVM_GROUP, - SAR_OFFSET_MAPPING_TABLE_CMD, + cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, IWL_FW_CMD_VER_UNKNOWN); if (cmd_ver != 2) { @@ -572,6 +629,7 @@ static int iwl_mvm_sgom_init(struct iwl_mvm *mvm) static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) { + u32 cmd_id = PHY_CONFIGURATION_CMD; struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd; enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img; struct iwl_phy_specific_cfg phy_filters = {}; @@ -603,8 +661,7 @@ static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) phy_cfg_cmd.calib_control.flow_trigger = mvm->fw->default_calib[ucode_type].flow_trigger; - cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, - PHY_CONFIGURATION_CMD, + cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, IWL_FW_CMD_VER_UNKNOWN); if (cmd_ver == 3) { iwl_mvm_phy_filter_init(mvm, &phy_filters); @@ -616,8 +673,7 @@ static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm) phy_cfg_cmd.phy_cfg); cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) : sizeof(struct iwl_phy_cfg_cmd_v1); - return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0, - cmd_size, &phy_cfg_cmd); + return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd); } int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm) @@ -737,7 +793,7 @@ out: mvm->nvm_data->bands[0].n_channels = 1; mvm->nvm_data->bands[0].n_bitrates = 1; mvm->nvm_data->bands[0].bitrates = - (void *)mvm->nvm_data->channels + 1; + (void *)((u8 *)mvm->nvm_data->channels + 1); mvm->nvm_data->bands[0].bitrates->hw_value = 10; } @@ -760,6 +816,7 @@ static int iwl_mvm_config_ltr(struct iwl_mvm *mvm) #ifdef CONFIG_ACPI int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) { + u32 cmd_id = REDUCE_TX_POWER_CMD; struct iwl_dev_tx_power_cmd cmd = { .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS), }; @@ -767,11 +824,14 @@ int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) int ret; u16 len = 0; u32 n_subbands; - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - REDUCE_TX_POWER_CMD, + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, IWL_FW_CMD_VER_UNKNOWN); - - if (cmd_ver == 6) { + if (cmd_ver == 7) { + len = sizeof(cmd.v7); + n_subbands = IWL_NUM_SUB_BANDS_V2; + per_chain = cmd.v7.per_chain[0][0]; + cmd.v7.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags); + } else if (cmd_ver == 6) { len = sizeof(cmd.v6); n_subbands = IWL_NUM_SUB_BANDS_V2; per_chain = cmd.v6.per_chain[0][0]; @@ -805,7 +865,7 @@ int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b) iwl_mei_set_power_limit(per_chain); IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n"); - return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); + return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); } int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) @@ -814,9 +874,12 @@ int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) struct iwl_geo_tx_power_profiles_resp *resp; u16 len; int ret; - struct iwl_host_cmd cmd; - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, - PER_CHAIN_LIMIT_OFFSET_CMD, + struct iwl_host_cmd cmd = { + .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), + .flags = CMD_WANT_SKB, + .data = { &geo_tx_cmd }, + }; + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id, IWL_FW_CMD_VER_UNKNOWN); /* the ops field is at the same spot for all versions, so set in v1 */ @@ -838,12 +901,7 @@ int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) if (!iwl_sar_geo_support(&mvm->fwrt)) return -EOPNOTSUPP; - cmd = (struct iwl_host_cmd){ - .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD), - .len = { len, }, - .flags = CMD_WANT_SKB, - .data = { &geo_tx_cmd }, - }; + cmd.len[0] = len; ret = iwl_mvm_send_cmd(mvm, &cmd); if (ret) { @@ -863,14 +921,14 @@ int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) { + u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD); union iwl_geo_tx_power_profiles_cmd cmd; u16 len; u32 n_bands; u32 n_profiles; u32 sk = 0; int ret; - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, - PER_CHAIN_LIMIT_OFFSET_CMD, + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, IWL_FW_CMD_VER_UNKNOWN); BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) != @@ -948,167 +1006,19 @@ static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm) IWL_UCODE_TLV_API_SAR_TABLE_VER)) cmd.v2.table_revision = cpu_to_le32(sk); - return iwl_mvm_send_cmd_pdu(mvm, - WIDE_ID(PHY_OPS_GROUP, - PER_CHAIN_LIMIT_OFFSET_CMD), - 0, len, &cmd); -} - -static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm) -{ - union acpi_object *wifi_pkg, *data, *flags; - int i, j, ret, tbl_rev, num_sub_bands; - int idx = 2; - - mvm->fwrt.ppag_flags = 0; - - data = iwl_acpi_get_object(mvm->dev, ACPI_PPAG_METHOD); - if (IS_ERR(data)) - return PTR_ERR(data); - - /* try to read ppag table rev 2 or 1 (both have the same data size) */ - wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, - ACPI_PPAG_WIFI_DATA_SIZE_V2, &tbl_rev); - if (!IS_ERR(wifi_pkg)) { - if (tbl_rev == 1 || tbl_rev == 2) { - num_sub_bands = IWL_NUM_SUB_BANDS_V2; - IWL_DEBUG_RADIO(mvm, - "Reading PPAG table v2 (tbl_rev=%d)\n", - tbl_rev); - goto read_table; - } else { - ret = -EINVAL; - goto out_free; - } - } - - /* try to read ppag table revision 0 */ - wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, - ACPI_PPAG_WIFI_DATA_SIZE_V1, &tbl_rev); - if (!IS_ERR(wifi_pkg)) { - if (tbl_rev != 0) { - ret = -EINVAL; - goto out_free; - } - num_sub_bands = IWL_NUM_SUB_BANDS_V1; - IWL_DEBUG_RADIO(mvm, "Reading PPAG table v1 (tbl_rev=0)\n"); - goto read_table; - } - ret = PTR_ERR(wifi_pkg); - goto out_free; - -read_table: - mvm->fwrt.ppag_ver = tbl_rev; - flags = &wifi_pkg->package.elements[1]; - - if (flags->type != ACPI_TYPE_INTEGER) { - ret = -EINVAL; - goto out_free; - } - - mvm->fwrt.ppag_flags = flags->integer.value & IWL_PPAG_MASK; - - if (!mvm->fwrt.ppag_flags) { - ret = 0; - goto out_free; - } - - /* - * read, verify gain values and save them into the PPAG table. - * first sub-band (j=0) corresponds to Low-Band (2.4GHz), and the - * following sub-bands to High-Band (5GHz). - */ - for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { - for (j = 0; j < num_sub_bands; j++) { - union acpi_object *ent; - - ent = &wifi_pkg->package.elements[idx++]; - if (ent->type != ACPI_TYPE_INTEGER) { - ret = -EINVAL; - goto out_free; - } - - mvm->fwrt.ppag_chains[i].subbands[j] = ent->integer.value; - - if ((j == 0 && - (mvm->fwrt.ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_LB || - mvm->fwrt.ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_LB)) || - (j != 0 && - (mvm->fwrt.ppag_chains[i].subbands[j] > ACPI_PPAG_MAX_HB || - mvm->fwrt.ppag_chains[i].subbands[j] < ACPI_PPAG_MIN_HB))) { - mvm->fwrt.ppag_flags = 0; - ret = -EINVAL; - goto out_free; - } - } - } - - ret = 0; -out_free: - kfree(data); - return ret; + return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); } int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) { union iwl_ppag_table_cmd cmd; - u8 cmd_ver; - int i, j, ret, num_sub_bands, cmd_size; - s8 *gain; + int ret, cmd_size; - if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) { - IWL_DEBUG_RADIO(mvm, - "PPAG capability not supported by FW, command not sent.\n"); - return 0; - } - if (!mvm->fwrt.ppag_flags) { - IWL_DEBUG_RADIO(mvm, "PPAG not enabled, command not sent.\n"); + ret = iwl_read_ppag_table(&mvm->fwrt, &cmd, &cmd_size); + /* Not supporting PPAG table is a valid scenario */ + if(ret < 0) return 0; - } - /* The 'flags' field is the same in v1 and in v2 so we can just - * use v1 to access it. - */ - cmd.v1.flags = cpu_to_le32(mvm->fwrt.ppag_flags); - cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, - PER_PLATFORM_ANT_GAIN_CMD, - IWL_FW_CMD_VER_UNKNOWN); - if (cmd_ver == 1) { - num_sub_bands = IWL_NUM_SUB_BANDS_V1; - gain = cmd.v1.gain[0]; - cmd_size = sizeof(cmd.v1); - if (mvm->fwrt.ppag_ver == 1 || mvm->fwrt.ppag_ver == 2) { - IWL_DEBUG_RADIO(mvm, - "PPAG table rev is %d but FW supports v1, sending truncated table\n", - mvm->fwrt.ppag_ver); - cmd.v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK); - } - } else if (cmd_ver == 2 || cmd_ver == 3) { - num_sub_bands = IWL_NUM_SUB_BANDS_V2; - gain = cmd.v2.gain[0]; - cmd_size = sizeof(cmd.v2); - if (mvm->fwrt.ppag_ver == 0) { - IWL_DEBUG_RADIO(mvm, - "PPAG table is v1 but FW supports v2, sending padded table\n"); - } else if (cmd_ver == 2 && mvm->fwrt.ppag_ver == 2) { - IWL_DEBUG_RADIO(mvm, - "PPAG table is v3 but FW supports v2, sending partial bitmap.\n"); - cmd.v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK); - } - } else { - IWL_DEBUG_RADIO(mvm, "Unsupported PPAG command version\n"); - return 0; - } - - for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) { - for (j = 0; j < num_sub_bands; j++) { - gain[i * num_sub_bands + j] = - mvm->fwrt.ppag_chains[i].subbands[j]; - IWL_DEBUG_RADIO(mvm, - "PPAG table: chain[%d] band[%d]: gain = %d\n", - i, j, gain[i * num_sub_bands + j]); - } - } IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n"); ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP, PER_PLATFORM_ANT_GAIN_CMD), @@ -1120,40 +1030,11 @@ int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm) return ret; } -static const struct dmi_system_id dmi_ppag_approved_list[] = { - { .ident = "HP", - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "HP"), - }, - }, - { .ident = "SAMSUNG", - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD"), - }, - }, - { .ident = "MSFT", - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Microsoft Corporation"), - }, - }, - { .ident = "ASUS", - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "ASUSTek COMPUTER INC."), - }, - }, - {} -}; - static int iwl_mvm_ppag_init(struct iwl_mvm *mvm) { /* no need to read the table, done in INIT stage */ - if (!dmi_check_system(dmi_ppag_approved_list)) { - IWL_DEBUG_RADIO(mvm, - "System vendor '%s' is not in the approved list, disabling PPAG.\n", - dmi_get_system_info(DMI_SYS_VENDOR)); - mvm->fwrt.ppag_flags = 0; + if (!(iwl_acpi_is_ppag_approved(&mvm->fwrt))) return 0; - } return iwl_mvm_ppag_send_cmd(mvm); } @@ -1205,11 +1086,12 @@ static bool iwl_mvm_add_to_tas_block_list(__le32 *list, __le32 *le_size, unsigne static void iwl_mvm_tas_init(struct iwl_mvm *mvm) { + u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG); int ret; - struct iwl_tas_config_cmd_v3 cmd = {}; - int cmd_size; + union iwl_tas_config_cmd cmd = {}; + int cmd_size, fw_ver; - BUILD_BUG_ON(ARRAY_SIZE(cmd.block_list_array) < + BUILD_BUG_ON(ARRAY_SIZE(cmd.v3.block_list_array) < APCI_WTAS_BLACK_LIST_MAX); if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) { @@ -1217,7 +1099,10 @@ static void iwl_mvm_tas_init(struct iwl_mvm *mvm) return; } - ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd); + fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, + IWL_FW_CMD_VER_UNKNOWN); + + ret = iwl_acpi_get_tas(&mvm->fwrt, &cmd, fw_ver); if (ret < 0) { IWL_DEBUG_RADIO(mvm, "TAS table invalid or unavailable. (%d)\n", @@ -1232,25 +1117,24 @@ static void iwl_mvm_tas_init(struct iwl_mvm *mvm) IWL_DEBUG_RADIO(mvm, "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n", dmi_get_system_info(DMI_SYS_VENDOR)); - if ((!iwl_mvm_add_to_tas_block_list(cmd.block_list_array, - &cmd.block_list_size, IWL_TAS_US_MCC)) || - (!iwl_mvm_add_to_tas_block_list(cmd.block_list_array, - &cmd.block_list_size, IWL_TAS_CANADA_MCC))) { + if ((!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, + &cmd.v4.block_list_size, + IWL_TAS_US_MCC)) || + (!iwl_mvm_add_to_tas_block_list(cmd.v4.block_list_array, + &cmd.v4.block_list_size, + IWL_TAS_CANADA_MCC))) { IWL_DEBUG_RADIO(mvm, "Unable to add US/Canada to TAS block list, disabling TAS\n"); return; } } - cmd_size = iwl_fw_lookup_cmd_ver(mvm->fw, REGULATORY_AND_NVM_GROUP, - TAS_CONFIG, - IWL_FW_CMD_VER_UNKNOWN) < 3 ? + /* v4 is the same size as v3, so no need to differentiate here */ + cmd_size = fw_ver < 3 ? sizeof(struct iwl_tas_config_cmd_v2) : sizeof(struct iwl_tas_config_cmd_v3); - ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, - TAS_CONFIG), - 0, cmd_size, &cmd); + ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &cmd); if (ret < 0) IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret); } @@ -1283,7 +1167,7 @@ static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) { int ret; u32 value; - struct iwl_lari_config_change_cmd_v5 cmd = {}; + struct iwl_lari_config_change_cmd_v6 cmd = {}; cmd.config_bitmap = iwl_acpi_get_lari_config_bitmap(&mvm->fwrt); @@ -1310,25 +1194,43 @@ static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) if (!ret) cmd.oem_uhb_allow_bitmap = cpu_to_le32(value); + ret = iwl_acpi_get_dsm_u32(mvm->fwrt.dev, 0, + DSM_FUNC_FORCE_DISABLE_CHANNELS, + &iwl_guid, &value); + if (!ret) + cmd.force_disable_channels_bitmap = cpu_to_le32(value); + if (cmd.config_bitmap || cmd.oem_uhb_allow_bitmap || cmd.oem_11ax_allow_bitmap || cmd.oem_unii4_allow_bitmap || - cmd.chan_state_active_bitmap) { + cmd.chan_state_active_bitmap || + cmd.force_disable_channels_bitmap) { size_t cmd_size; u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, - REGULATORY_AND_NVM_GROUP, - LARI_CONFIG_CHANGE, 1); - if (cmd_ver == 5) + WIDE_ID(REGULATORY_AND_NVM_GROUP, + LARI_CONFIG_CHANGE), + 1); + switch (cmd_ver) { + case 6: + cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6); + break; + case 5: cmd_size = sizeof(struct iwl_lari_config_change_cmd_v5); - else if (cmd_ver == 4) + break; + case 4: cmd_size = sizeof(struct iwl_lari_config_change_cmd_v4); - else if (cmd_ver == 3) + break; + case 3: cmd_size = sizeof(struct iwl_lari_config_change_cmd_v3); - else if (cmd_ver == 2) + break; + case 2: cmd_size = sizeof(struct iwl_lari_config_change_cmd_v2); - else + break; + default: cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1); + break; + } IWL_DEBUG_RADIO(mvm, "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n", @@ -1340,8 +1242,9 @@ static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm) le32_to_cpu(cmd.chan_state_active_bitmap), cmd_ver); IWL_DEBUG_RADIO(mvm, - "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x\n", - le32_to_cpu(cmd.oem_uhb_allow_bitmap)); + "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n", + le32_to_cpu(cmd.oem_uhb_allow_bitmap), + le32_to_cpu(cmd.force_disable_channels_bitmap)); ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP, LARI_CONFIG_CHANGE), @@ -1358,7 +1261,7 @@ void iwl_mvm_get_acpi_tables(struct iwl_mvm *mvm) int ret; /* read PPAG table */ - ret = iwl_mvm_get_ppag_table(mvm); + ret = iwl_acpi_get_ppag_table(&mvm->fwrt); if (ret < 0) { IWL_DEBUG_RADIO(mvm, "PPAG BIOS table invalid or unavailable. (%d)\n", @@ -1641,9 +1544,7 @@ int iwl_mvm_up(struct iwl_mvm *mvm) * internal aux station for all aux activities that don't * requires a dedicated data queue. */ - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - ADD_STA, - 0) < 12) { + if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { /* * In old version the aux station uses mac id like other * station and not lmac id @@ -1658,8 +1559,10 @@ int iwl_mvm_up(struct iwl_mvm *mvm) while (!sband && i < NUM_NL80211_BANDS) sband = mvm->hw->wiphy->bands[i++]; - if (WARN_ON_ONCE(!sband)) + if (WARN_ON_ONCE(!sband)) { + ret = -ENODEV; goto error; + } chan = &sband->channels[0]; @@ -1800,9 +1703,7 @@ int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm) for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL); - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - ADD_STA, - 0) < 12) { + if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { /* * Add auxiliary station for scanning. * Newer versions of this command implies that the fw uses diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c b/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c index fd7d4abfb454..5aa4520b70ac 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/mac-ctxt.c @@ -821,10 +821,7 @@ u8 iwl_mvm_mac_ctxt_get_lowest_rate(struct ieee80211_tx_info *info, u16 iwl_mvm_mac_ctxt_get_beacon_flags(const struct iwl_fw *fw, u8 rate_idx) { u16 flags = iwl_mvm_mac80211_idx_to_hwrate(fw, rate_idx); - bool is_new_rate = iwl_fw_lookup_cmd_ver(fw, - LONG_GROUP, - BEACON_TEMPLATE_CMD, - 0) > 10; + bool is_new_rate = iwl_fw_lookup_cmd_ver(fw, BEACON_TEMPLATE_CMD, 0) > 10; if (rate_idx <= IWL_FIRST_CCK_RATE) flags |= is_new_rate ? IWL_MAC_BEACON_CCK @@ -960,8 +957,7 @@ static int iwl_mvm_mac_ctxt_send_beacon_v9(struct iwl_mvm *mvm, WARN_ON(channel == 0); if (cfg80211_channel_is_psc(ctx->def.chan) && !IWL_MVM_DISABLE_AP_FILS) { - flags |= iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - BEACON_TEMPLATE_CMD, + flags |= iwl_fw_lookup_cmd_ver(mvm->fw, BEACON_TEMPLATE_CMD, 0) > 10 ? IWL_MAC_BEACON_FILS : IWL_MAC_BEACON_FILS_V1; @@ -1458,8 +1454,9 @@ void iwl_mvm_rx_stored_beacon_notif(struct iwl_mvm *mvm, struct sk_buff *skb; u8 *data; u32 size = le32_to_cpu(sb->byte_count); - int ver = iwl_fw_lookup_cmd_ver(mvm->fw, PROT_OFFLOAD_GROUP, - STORED_BEACON_NTF, 0); + int ver = iwl_fw_lookup_cmd_ver(mvm->fw, + WIDE_ID(PROT_OFFLOAD_GROUP, STORED_BEACON_NTF), + 0); if (size == 0) return; @@ -1602,6 +1599,18 @@ void iwl_mvm_channel_switch_start_notif(struct iwl_mvm *mvm, RCU_INIT_POINTER(mvm->csa_vif, NULL); return; case NL80211_IFTYPE_STATION: + /* + * if we don't know about an ongoing channel switch, + * make sure FW cancels it + */ + if (iwl_fw_lookup_notif_ver(mvm->fw, MAC_CONF_GROUP, + CHANNEL_SWITCH_ERROR_NOTIF, + 0) && !vif->csa_active) { + IWL_DEBUG_INFO(mvm, "Channel Switch was canceled\n"); + iwl_mvm_cancel_channel_switch(mvm, vif, mac_id); + break; + } + iwl_mvm_csa_client_absent(mvm, vif); cancel_delayed_work(&mvmvif->csa_work); ieee80211_chswitch_done(vif, true); @@ -1615,6 +1624,31 @@ out_unlock: rcu_read_unlock(); } +void iwl_mvm_channel_switch_error_notif(struct iwl_mvm *mvm, + struct iwl_rx_cmd_buffer *rxb) +{ + struct iwl_rx_packet *pkt = rxb_addr(rxb); + struct iwl_channel_switch_error_notif *notif = (void *)pkt->data; + struct ieee80211_vif *vif; + u32 id = le32_to_cpu(notif->mac_id); + u32 csa_err_mask = le32_to_cpu(notif->csa_err_mask); + + rcu_read_lock(); + vif = iwl_mvm_rcu_dereference_vif_id(mvm, id, true); + if (!vif) { + rcu_read_unlock(); + return; + } + + IWL_DEBUG_INFO(mvm, "FW reports CSA error: mac_id=%u, csa_err_mask=%u\n", + id, csa_err_mask); + if (csa_err_mask & (CS_ERR_COUNT_ERROR | + CS_ERR_LONG_DELAY_AFTER_CS | + CS_ERR_TX_BLOCK_TIMER_EXPIRED)) + ieee80211_channel_switch_disconnect(vif, true); + rcu_read_unlock(); +} + void iwl_mvm_rx_missed_vap_notif(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb) { diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c b/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c index 709a3df57b10..784d91281c02 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2012-2014, 2018-2021 Intel Corporation + * Copyright (C) 2012-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -374,28 +374,6 @@ int iwl_mvm_mac_setup_register(struct iwl_mvm *mvm) hw->wiphy->n_cipher_suites++; } - /* currently FW API supports only one optional cipher scheme */ - if (mvm->fw->cs[0].cipher) { - const struct iwl_fw_cipher_scheme *fwcs = &mvm->fw->cs[0]; - struct ieee80211_cipher_scheme *cs = &mvm->cs[0]; - - mvm->hw->n_cipher_schemes = 1; - - cs->cipher = le32_to_cpu(fwcs->cipher); - cs->iftype = BIT(NL80211_IFTYPE_STATION); - cs->hdr_len = fwcs->hdr_len; - cs->pn_len = fwcs->pn_len; - cs->pn_off = fwcs->pn_off; - cs->key_idx_off = fwcs->key_idx_off; - cs->key_idx_mask = fwcs->key_idx_mask; - cs->key_idx_shift = fwcs->key_idx_shift; - cs->mic_len = fwcs->mic_len; - - mvm->hw->cipher_schemes = mvm->cs; - mvm->ciphers[hw->wiphy->n_cipher_suites] = cs->cipher; - hw->wiphy->n_cipher_suites++; - } - if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_FTM_CALIBRATED)) { wiphy_ext_feature_set(hw->wiphy, @@ -553,8 +531,7 @@ int iwl_mvm_mac_setup_register(struct iwl_mvm *mvm) IWL_UCODE_TLV_CAPA_WFA_TPC_REP_IE_SUPPORT)) hw->wiphy->features |= NL80211_FEATURE_WFA_TPC_IE_IN_PROBES; - if (iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, - WOWLAN_KEK_KCK_MATERIAL, + if (iwl_fw_lookup_cmd_ver(mvm->fw, WOWLAN_KEK_KCK_MATERIAL, IWL_FW_CMD_VER_UNKNOWN) == 3) hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_EXT_KEK_KCK; @@ -567,9 +544,7 @@ int iwl_mvm_mac_setup_register(struct iwl_mvm *mvm) } if (iwl_mvm_is_oce_supported(mvm)) { - u8 scan_ver = iwl_fw_lookup_cmd_ver(mvm->fw, - IWL_ALWAYS_LONG_GROUP, - SCAN_REQ_UMAC, 0); + u8 scan_ver = iwl_fw_lookup_cmd_ver(mvm->fw, SCAN_REQ_UMAC, 0); wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_ACCEPT_BCAST_PROBE_RESP); @@ -1154,7 +1129,7 @@ void __iwl_mvm_mac_stop(struct iwl_mvm *mvm) /* async_handlers_wk is now blocked */ - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, ADD_STA, 0) < 12) + if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) iwl_mvm_rm_aux_sta(mvm); iwl_mvm_stop_device(mvm); @@ -1246,6 +1221,7 @@ static struct iwl_mvm_phy_ctxt *iwl_mvm_get_free_phy_ctxt(struct iwl_mvm *mvm) static int iwl_mvm_set_tx_power(struct iwl_mvm *mvm, struct ieee80211_vif *vif, s16 tx_power) { + u32 cmd_id = REDUCE_TX_POWER_CMD; int len; struct iwl_dev_tx_power_cmd cmd = { .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_MAC), @@ -1253,14 +1229,15 @@ static int iwl_mvm_set_tx_power(struct iwl_mvm *mvm, struct ieee80211_vif *vif, cpu_to_le32(iwl_mvm_vif_from_mac80211(vif)->id), .common.pwr_restriction = cpu_to_le16(8 * tx_power), }; - u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - REDUCE_TX_POWER_CMD, + u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, IWL_FW_CMD_VER_UNKNOWN); if (tx_power == IWL_DEFAULT_MAX_TX_POWER) cmd.common.pwr_restriction = cpu_to_le16(IWL_DEV_MAX_TX_POWER); - if (cmd_ver == 6) + if (cmd_ver == 7) + len = sizeof(cmd.v7); + else if (cmd_ver == 6) len = sizeof(cmd.v6); else if (fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_REDUCE_TX_POWER)) @@ -1274,7 +1251,7 @@ static int iwl_mvm_set_tx_power(struct iwl_mvm *mvm, struct ieee80211_vif *vif, /* all structs have the same common part, add it */ len += sizeof(cmd.common); - return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd); + return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd); } static int iwl_mvm_post_channel_switch(struct ieee80211_hw *hw, @@ -1335,6 +1312,15 @@ static void iwl_mvm_abort_channel_switch(struct ieee80211_hw *hw, .action = cpu_to_le32(FW_CTXT_ACTION_REMOVE), }; + /* + * In the new flow since FW is in charge of the timing, + * if driver has canceled the channel switch he will receive the + * CHANNEL_SWITCH_START_NOTIF notification from FW and then cancel it + */ + if (iwl_fw_lookup_notif_ver(mvm->fw, MAC_CONF_GROUP, + CHANNEL_SWITCH_ERROR_NOTIF, 0)) + return; + IWL_DEBUG_MAC80211(mvm, "Abort CSA on mac %d\n", mvmvif->id); mutex_lock(&mvm->mutex); @@ -1845,11 +1831,108 @@ static u8 iwl_mvm_he_get_ppe_val(u8 *ppe, u8 ppe_pos_bit) return res; } +static void iwl_mvm_parse_ppe(struct iwl_mvm *mvm, + struct iwl_he_pkt_ext_v2 *pkt_ext, u8 nss, + u8 ru_index_bitmap, u8 *ppe, u8 ppe_pos_bit) +{ + int i; + + /* + * FW currently supports only nss == MAX_HE_SUPP_NSS + * + * If nss > MAX: we can ignore values we don't support + * If nss < MAX: we can set zeros in other streams + */ + if (nss > MAX_HE_SUPP_NSS) { + IWL_INFO(mvm, "Got NSS = %d - trimming to %d\n", nss, + MAX_HE_SUPP_NSS); + nss = MAX_HE_SUPP_NSS; + } + + for (i = 0; i < nss; i++) { + u8 ru_index_tmp = ru_index_bitmap << 1; + u8 low_th = IWL_HE_PKT_EXT_NONE, high_th = IWL_HE_PKT_EXT_NONE; + u8 bw; + + for (bw = 0; + bw < ARRAY_SIZE(pkt_ext->pkt_ext_qam_th[i]); + bw++) { + ru_index_tmp >>= 1; + + if (!(ru_index_tmp & 1)) + continue; + + high_th = iwl_mvm_he_get_ppe_val(ppe, ppe_pos_bit); + ppe_pos_bit += IEEE80211_PPE_THRES_INFO_PPET_SIZE; + low_th = iwl_mvm_he_get_ppe_val(ppe, ppe_pos_bit); + ppe_pos_bit += IEEE80211_PPE_THRES_INFO_PPET_SIZE; + + pkt_ext->pkt_ext_qam_th[i][bw][0] = low_th; + pkt_ext->pkt_ext_qam_th[i][bw][1] = high_th; + } + } +} + +static void iwl_mvm_set_pkt_ext_from_he_ppe(struct iwl_mvm *mvm, + struct ieee80211_sta *sta, + struct iwl_he_pkt_ext_v2 *pkt_ext) +{ + u8 nss = (sta->he_cap.ppe_thres[0] & IEEE80211_PPE_THRES_NSS_MASK) + 1; + u8 *ppe = &sta->he_cap.ppe_thres[0]; + u8 ru_index_bitmap = + u8_get_bits(*ppe, + IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK); + /* Starting after PPE header */ + u8 ppe_pos_bit = IEEE80211_HE_PPE_THRES_INFO_HEADER_SIZE; + + iwl_mvm_parse_ppe(mvm, pkt_ext, nss, ru_index_bitmap, ppe, ppe_pos_bit); +} + +static void iwl_mvm_set_pkt_ext_from_nominal_padding(struct iwl_he_pkt_ext_v2 *pkt_ext, + u8 nominal_padding, + u32 *flags) +{ + int low_th = -1; + int high_th = -1; + int i; + + switch (nominal_padding) { + case IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_0US: + low_th = IWL_HE_PKT_EXT_NONE; + high_th = IWL_HE_PKT_EXT_NONE; + break; + case IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_8US: + low_th = IWL_HE_PKT_EXT_BPSK; + high_th = IWL_HE_PKT_EXT_NONE; + break; + case IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US: + low_th = IWL_HE_PKT_EXT_NONE; + high_th = IWL_HE_PKT_EXT_BPSK; + break; + } + + /* Set the PPE thresholds accordingly */ + if (low_th >= 0 && high_th >= 0) { + for (i = 0; i < MAX_HE_SUPP_NSS; i++) { + u8 bw; + + for (bw = 0; + bw < ARRAY_SIZE(pkt_ext->pkt_ext_qam_th[i]); + bw++) { + pkt_ext->pkt_ext_qam_th[i][bw][0] = low_th; + pkt_ext->pkt_ext_qam_th[i][bw][1] = high_th; + } + } + + *flags |= STA_CTXT_HE_PACKET_EXT; + } +} + static void iwl_mvm_cfg_he_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif, u8 sta_id) { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); - struct iwl_he_sta_context_cmd sta_ctxt_cmd = { + struct iwl_he_sta_context_cmd_v3 sta_ctxt_cmd = { .sta_id = sta_id, .tid_limit = IWL_MAX_TID_COUNT, .bss_color = vif->bss_conf.he_bss_color.color, @@ -1857,16 +1940,39 @@ static void iwl_mvm_cfg_he_sta(struct iwl_mvm *mvm, .frame_time_rts_th = cpu_to_le16(vif->bss_conf.frame_time_rts_th), }; - int size = fw_has_api(&mvm->fw->ucode_capa, - IWL_UCODE_TLV_API_MBSSID_HE) ? - sizeof(sta_ctxt_cmd) : - sizeof(struct iwl_he_sta_context_cmd_v1); + struct iwl_he_sta_context_cmd_v2 sta_ctxt_cmd_v2 = {}; + u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, STA_HE_CTXT_CMD); + u8 ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 2); + int size; struct ieee80211_sta *sta; u32 flags; int i; const struct ieee80211_sta_he_cap *own_he_cap = NULL; struct ieee80211_chanctx_conf *chanctx_conf; const struct ieee80211_supported_band *sband; + void *cmd; + + if (!fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_MBSSID_HE)) + ver = 1; + + switch (ver) { + case 1: + /* same layout as v2 except some data at the end */ + cmd = &sta_ctxt_cmd_v2; + size = sizeof(struct iwl_he_sta_context_cmd_v1); + break; + case 2: + cmd = &sta_ctxt_cmd_v2; + size = sizeof(struct iwl_he_sta_context_cmd_v2); + break; + case 3: + cmd = &sta_ctxt_cmd; + size = sizeof(struct iwl_he_sta_context_cmd_v3); + break; + default: + IWL_ERR(mvm, "bad STA_HE_CTXT_CMD version %d\n", ver); + return; + } rcu_read_lock(); @@ -1931,97 +2037,25 @@ static void iwl_mvm_cfg_he_sta(struct iwl_mvm *mvm, * Initialize the PPE thresholds to "None" (7), as described in Table * 9-262ac of 80211.ax/D3.0. */ - memset(&sta_ctxt_cmd.pkt_ext, 7, sizeof(sta_ctxt_cmd.pkt_ext)); + memset(&sta_ctxt_cmd.pkt_ext, IWL_HE_PKT_EXT_NONE, + sizeof(sta_ctxt_cmd.pkt_ext)); /* If PPE Thresholds exist, parse them into a FW-familiar format. */ if (sta->he_cap.he_cap_elem.phy_cap_info[6] & - IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) { - u8 nss = (sta->he_cap.ppe_thres[0] & - IEEE80211_PPE_THRES_NSS_MASK) + 1; - u8 ru_index_bitmap = - (sta->he_cap.ppe_thres[0] & - IEEE80211_PPE_THRES_RU_INDEX_BITMASK_MASK) >> - IEEE80211_PPE_THRES_RU_INDEX_BITMASK_POS; - u8 *ppe = &sta->he_cap.ppe_thres[0]; - u8 ppe_pos_bit = 7; /* Starting after PPE header */ - - /* - * FW currently supports only nss == MAX_HE_SUPP_NSS - * - * If nss > MAX: we can ignore values we don't support - * If nss < MAX: we can set zeros in other streams - */ - if (nss > MAX_HE_SUPP_NSS) { - IWL_INFO(mvm, "Got NSS = %d - trimming to %d\n", nss, - MAX_HE_SUPP_NSS); - nss = MAX_HE_SUPP_NSS; - } - - for (i = 0; i < nss; i++) { - u8 ru_index_tmp = ru_index_bitmap << 1; - u8 bw; - - for (bw = 0; bw < MAX_HE_CHANNEL_BW_INDX; bw++) { - ru_index_tmp >>= 1; - if (!(ru_index_tmp & 1)) - continue; - - sta_ctxt_cmd.pkt_ext.pkt_ext_qam_th[i][bw][1] = - iwl_mvm_he_get_ppe_val(ppe, - ppe_pos_bit); - ppe_pos_bit += - IEEE80211_PPE_THRES_INFO_PPET_SIZE; - sta_ctxt_cmd.pkt_ext.pkt_ext_qam_th[i][bw][0] = - iwl_mvm_he_get_ppe_val(ppe, - ppe_pos_bit); - ppe_pos_bit += - IEEE80211_PPE_THRES_INFO_PPET_SIZE; - } - } - + IEEE80211_HE_PHY_CAP6_PPE_THRESHOLD_PRESENT) { + iwl_mvm_set_pkt_ext_from_he_ppe(mvm, sta, + &sta_ctxt_cmd.pkt_ext); flags |= STA_CTXT_HE_PACKET_EXT; - } else if (u8_get_bits(sta->he_cap.he_cap_elem.phy_cap_info[9], - IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK) - != IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED) { - int low_th = -1; - int high_th = -1; - - /* Take the PPE thresholds from the nominal padding info */ - switch (u8_get_bits(sta->he_cap.he_cap_elem.phy_cap_info[9], - IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK)) { - case IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_0US: - low_th = IWL_HE_PKT_EXT_NONE; - high_th = IWL_HE_PKT_EXT_NONE; - break; - case IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_8US: - low_th = IWL_HE_PKT_EXT_BPSK; - high_th = IWL_HE_PKT_EXT_NONE; - break; - case IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US: - low_th = IWL_HE_PKT_EXT_NONE; - high_th = IWL_HE_PKT_EXT_BPSK; - break; - } - - /* Set the PPE thresholds accordingly */ - if (low_th >= 0 && high_th >= 0) { - struct iwl_he_pkt_ext *pkt_ext = - (struct iwl_he_pkt_ext *)&sta_ctxt_cmd.pkt_ext; - - for (i = 0; i < MAX_HE_SUPP_NSS; i++) { - u8 bw; - - for (bw = 0; bw < MAX_HE_CHANNEL_BW_INDX; - bw++) { - pkt_ext->pkt_ext_qam_th[i][bw][0] = - low_th; - pkt_ext->pkt_ext_qam_th[i][bw][1] = - high_th; - } - } - - flags |= STA_CTXT_HE_PACKET_EXT; - } + /* PPE Thresholds doesn't exist - set the API PPE values + * according to Common Nominal Packet Padding fiels. */ + } else { + u8 nominal_padding = + u8_get_bits(sta->he_cap.he_cap_elem.phy_cap_info[9], + IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK); + if (nominal_padding != IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_RESERVED) + iwl_mvm_set_pkt_ext_from_nominal_padding(&sta_ctxt_cmd.pkt_ext, + nominal_padding, + &flags); } if (sta->he_cap.he_cap_elem.mac_cap_info[2] & @@ -2084,9 +2118,46 @@ static void iwl_mvm_cfg_he_sta(struct iwl_mvm *mvm, sta_ctxt_cmd.flags = cpu_to_le32(flags); - if (iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(STA_HE_CTXT_CMD, - DATA_PATH_GROUP, 0), - 0, size, &sta_ctxt_cmd)) + if (ver < 3) { + /* fields before pkt_ext */ + BUILD_BUG_ON(offsetof(typeof(sta_ctxt_cmd), pkt_ext) != + offsetof(typeof(sta_ctxt_cmd_v2), pkt_ext)); + memcpy(&sta_ctxt_cmd_v2, &sta_ctxt_cmd, + offsetof(typeof(sta_ctxt_cmd), pkt_ext)); + + /* pkt_ext */ + for (i = 0; + i < ARRAY_SIZE(sta_ctxt_cmd_v2.pkt_ext.pkt_ext_qam_th); + i++) { + u8 bw; + + for (bw = 0; + bw < ARRAY_SIZE(sta_ctxt_cmd_v2.pkt_ext.pkt_ext_qam_th[i]); + bw++) { + BUILD_BUG_ON(sizeof(sta_ctxt_cmd.pkt_ext.pkt_ext_qam_th[i][bw]) != + sizeof(sta_ctxt_cmd_v2.pkt_ext.pkt_ext_qam_th[i][bw])); + + memcpy(&sta_ctxt_cmd_v2.pkt_ext.pkt_ext_qam_th[i][bw], + &sta_ctxt_cmd.pkt_ext.pkt_ext_qam_th[i][bw], + sizeof(sta_ctxt_cmd.pkt_ext.pkt_ext_qam_th[i][bw])); + } + } + + /* fields after pkt_ext */ + BUILD_BUG_ON(sizeof(sta_ctxt_cmd) - + offsetofend(typeof(sta_ctxt_cmd), pkt_ext) != + sizeof(sta_ctxt_cmd_v2) - + offsetofend(typeof(sta_ctxt_cmd_v2), pkt_ext)); + memcpy((u8 *)&sta_ctxt_cmd_v2 + + offsetofend(typeof(sta_ctxt_cmd_v2), pkt_ext), + (u8 *)&sta_ctxt_cmd + + offsetofend(typeof(sta_ctxt_cmd), pkt_ext), + sizeof(sta_ctxt_cmd) - + offsetofend(typeof(sta_ctxt_cmd), pkt_ext)); + sta_ctxt_cmd_v2.reserved3 = 0; + } + + if (iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, size, cmd)) IWL_ERR(mvm, "Failed to config FW to work HE!\n"); } @@ -2301,11 +2372,8 @@ static void iwl_mvm_bss_info_changed_station(struct iwl_mvm *mvm, /* * We received a beacon from the associated AP so * remove the session protection. - * A firmware with the new API will remove it automatically. */ - if (!fw_has_capa(&mvm->fw->ucode_capa, - IWL_UCODE_TLV_CAPA_SESSION_PROT_CMD)) - iwl_mvm_stop_session_protection(mvm, vif); + iwl_mvm_stop_session_protection(mvm, vif); iwl_mvm_sf_update(mvm, vif, false); WARN_ON(iwl_mvm_enable_beacon_filter(mvm, vif, 0)); @@ -2949,7 +3017,7 @@ static void iwl_mvm_reset_cca_40mhz_workaround(struct iwl_mvm *mvm, if (he_cap) { /* we know that ours is writable */ - struct ieee80211_sta_he_cap *he = (void *)he_cap; + struct ieee80211_sta_he_cap *he = (void *)(uintptr_t)he_cap; he->he_cap_elem.phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; @@ -3413,12 +3481,7 @@ static int __iwl_mvm_mac_set_key(struct ieee80211_hw *hw, /* support HW crypto on TX */ return 0; default: - /* currently FW supports only one optional cipher scheme */ - if (hw->n_cipher_schemes && - hw->cipher_schemes->cipher == key->cipher) - key->flags |= IEEE80211_KEY_FLAG_PUT_IV_SPACE; - else - return -EOPNOTSUPP; + return -EOPNOTSUPP; } switch (cmd) { @@ -3801,8 +3864,7 @@ static int iwl_mvm_roc(struct ieee80211_hw *hw, if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_HOTSPOT_SUPPORT)) { /* Use aux roc framework (HS20) */ - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - ADD_STA, 0) >= 12) { + if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) >= 12) { u32 lmac_id; lmac_id = iwl_mvm_get_lmac_id(mvm->fw, @@ -4606,6 +4668,15 @@ static int iwl_mvm_pre_channel_switch(struct ieee80211_hw *hw, break; case NL80211_IFTYPE_STATION: /* + * In the new flow FW is in charge of timing the switch so there + * is no need for all of this + */ + if (iwl_fw_lookup_notif_ver(mvm->fw, MAC_CONF_GROUP, + CHANNEL_SWITCH_ERROR_NOTIF, + 0)) + break; + + /* * We haven't configured the firmware to be associated yet since * we don't know the dtim period. In this case, the firmware can't * track the beacons. @@ -4676,6 +4747,14 @@ static void iwl_mvm_channel_switch_rx_beacon(struct ieee80211_hw *hw, .cs_mode = chsw->block_tx, }; + /* + * In the new flow FW is in charge of timing the switch so there is no + * need for all of this + */ + if (iwl_fw_lookup_notif_ver(mvm->fw, MAC_CONF_GROUP, + CHANNEL_SWITCH_ERROR_NOTIF, 0)) + return; + if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_CS_MODIFY)) return; diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h b/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h index d78f40730594..c6bc85d4600a 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h +++ b/drivers/net/wireless/intel/iwlwifi/mvm/mvm.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2012-2014, 2018-2020 Intel Corporation + * Copyright (C) 2012-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -1064,7 +1064,6 @@ struct iwl_mvm { u32 ciphers[IWL_MVM_NUM_CIPHERS]; - struct ieee80211_cipher_scheme cs[IWL_UCODE_MAX_CS]; struct cfg80211_ftm_responder_stats ftm_resp_stats; struct { @@ -1086,7 +1085,6 @@ struct iwl_mvm { } cmd_ver; struct ieee80211_vif *nan_vif; -#define IWL_MAX_BAID 32 struct iwl_mvm_baid_data __rcu *baid_map[IWL_MAX_BAID]; /* @@ -1106,6 +1104,8 @@ struct iwl_mvm { unsigned long last_6ghz_passive_scan_jiffies; unsigned long last_reset_or_resume_time_jiffies; + + bool sta_remove_requires_queue_remove; }; /* Extract MVM priv from op_mode and _hw */ @@ -1671,6 +1671,8 @@ void iwl_mvm_rx_missed_vap_notif(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); void iwl_mvm_channel_switch_start_notif(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb); +void iwl_mvm_channel_switch_error_notif(struct iwl_mvm *mvm, + struct iwl_rx_cmd_buffer *rxb); /* Bindings */ int iwl_mvm_binding_add_vif(struct iwl_mvm *mvm, struct ieee80211_vif *vif); int iwl_mvm_binding_remove_vif(struct iwl_mvm *mvm, struct ieee80211_vif *vif); @@ -1932,10 +1934,6 @@ static inline u32 iwl_mvm_flushable_queues(struct iwl_mvm *mvm) void iwl_mvm_stop_device(struct iwl_mvm *mvm); -/* Re-configure the SCD for a queue that has already been configured */ -int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id, - int tid, int frame_limit, u16 ssn); - /* Thermal management and CT-kill */ void iwl_mvm_tt_tx_backoff(struct iwl_mvm *mvm, u32 backoff); void iwl_mvm_temp_notif(struct iwl_mvm *mvm, @@ -2085,6 +2083,8 @@ void iwl_mvm_sta_add_debugfs(struct ieee80211_hw *hw, int iwl_rfi_send_config_cmd(struct iwl_mvm *mvm, struct iwl_rfi_lut_entry *rfi_table); struct iwl_rfi_freq_table_resp_cmd *iwl_rfi_get_freq_table(struct iwl_mvm *mvm); +void iwl_rfi_deactivate_notif_handler(struct iwl_mvm *mvm, + struct iwl_rx_cmd_buffer *rxb); static inline u8 iwl_mvm_phy_band_from_nl80211(enum nl80211_band band) { @@ -2159,8 +2159,7 @@ iwl_mvm_set_chan_info_chandef(struct iwl_mvm *mvm, static inline int iwl_umac_scan_get_max_profiles(const struct iwl_fw *fw) { - u8 ver = iwl_fw_lookup_cmd_ver(fw, IWL_ALWAYS_LONG_GROUP, - SCAN_OFFLOAD_UPDATE_PROFILES_CMD, + u8 ver = iwl_fw_lookup_cmd_ver(fw, SCAN_OFFLOAD_UPDATE_PROFILES_CMD, IWL_FW_CMD_VER_UNKNOWN); return (ver == IWL_FW_CMD_VER_UNKNOWN || ver < 3) ? IWL_SCAN_MAX_PROFILES : IWL_SCAN_MAX_PROFILES_V2; diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/offloading.c b/drivers/net/wireless/intel/iwlwifi/mvm/offloading.c index 41880517e8bb..c7dabc6b3765 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/offloading.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/offloading.c @@ -47,8 +47,7 @@ int iwl_mvm_send_proto_offload(struct iwl_mvm *mvm, struct iwl_proto_offload_cmd_common *common; u32 enabled = 0, size; u32 capa_flags = mvm->fw->ucode_capa.flags; - int ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - PROT_OFFLOAD_CONFIG_CMD, 0); + int ver = iwl_fw_lookup_cmd_ver(mvm->fw, hcmd.id, 0); #if IS_ENABLED(CONFIG_IPV6) struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/ops.c b/drivers/net/wireless/intel/iwlwifi/mvm/ops.c index 1f8b97995b94..b2f33ebdf485 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/ops.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/ops.c @@ -24,6 +24,7 @@ #include "iwl-prph.h" #include "rs.h" #include "fw/api/scan.h" +#include "fw/api/rfi.h" #include "time-event.h" #include "fw-api.h" #include "fw/acpi.h" @@ -32,6 +33,7 @@ #define DRV_DESCRIPTION "The new Intel(R) wireless AGN driver for Linux" MODULE_DESCRIPTION(DRV_DESCRIPTION); MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS(IWLWIFI); static const struct iwl_op_mode_ops iwl_mvm_ops; static const struct iwl_op_mode_ops iwl_mvm_ops_mq; @@ -191,7 +193,7 @@ static void iwl_mvm_rx_monitor_notif(struct iwl_mvm *mvm, if (he_cap) { /* we know that ours is writable */ - struct ieee80211_sta_he_cap *he = (void *)he_cap; + struct ieee80211_sta_he_cap *he = (void *)(uintptr_t)he_cap; WARN_ON(!he->has_he); WARN_ON(!(he->he_cap_elem.phy_cap_info[0] & @@ -235,7 +237,8 @@ static void iwl_mvm_rx_thermal_dual_chain_req(struct iwl_mvm *mvm, */ mvm->fw_static_smps_request = req->event == cpu_to_le32(THERMAL_DUAL_CHAIN_REQ_DISABLE); - ieee80211_iterate_interfaces(mvm->hw, IEEE80211_IFACE_ITER_NORMAL, + ieee80211_iterate_interfaces(mvm->hw, + IEEE80211_IFACE_SKIP_SDATA_NOT_IN_DRIVER, iwl_mvm_intf_dual_chain_req, NULL); } @@ -382,6 +385,10 @@ static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = { RX_HANDLER_GRP(MAC_CONF_GROUP, CHANNEL_SWITCH_START_NOTIF, iwl_mvm_channel_switch_start_notif, RX_HANDLER_SYNC, struct iwl_channel_switch_start_notif), + RX_HANDLER_GRP(MAC_CONF_GROUP, CHANNEL_SWITCH_ERROR_NOTIF, + iwl_mvm_channel_switch_error_notif, + RX_HANDLER_ASYNC_UNLOCKED, + struct iwl_channel_switch_error_notif), RX_HANDLER_GRP(DATA_PATH_GROUP, MONITOR_NOTIF, iwl_mvm_rx_monitor_notif, RX_HANDLER_ASYNC_LOCKED, struct iwl_datapath_monitor_notif), @@ -390,6 +397,10 @@ static const struct iwl_rx_handlers iwl_mvm_rx_handlers[] = { iwl_mvm_rx_thermal_dual_chain_req, RX_HANDLER_ASYNC_LOCKED, struct iwl_thermal_dual_chain_request), + + RX_HANDLER_GRP(SYSTEM_GROUP, RFI_DEACTIVATE_NOTIF, + iwl_rfi_deactivate_notif_handler, RX_HANDLER_ASYNC_UNLOCKED, + struct iwl_rfi_deactivate_notif), }; #undef RX_HANDLER #undef RX_HANDLER_GRP @@ -443,7 +454,6 @@ static const struct iwl_hcmd_names iwl_mvm_legacy_names[] = { HCMD_NAME(POWER_TABLE_CMD), HCMD_NAME(PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION), HCMD_NAME(REPLY_THERMAL_MNG_BACKOFF), - HCMD_NAME(DC2DC_CONFIG_CMD), HCMD_NAME(NVM_ACCESS_CMD), HCMD_NAME(BEACON_NOTIFICATION), HCMD_NAME(BEACON_TEMPLATE_CMD), @@ -499,6 +509,7 @@ static const struct iwl_hcmd_names iwl_mvm_system_names[] = { HCMD_NAME(RFI_CONFIG_CMD), HCMD_NAME(RFI_GET_FREQ_TABLE_CMD), HCMD_NAME(SYSTEM_FEATURES_CONTROL_CMD), + HCMD_NAME(RFI_DEACTIVATE_NOTIF), }; /* Please keep this array *SORTED* by hex value. @@ -535,6 +546,7 @@ static const struct iwl_hcmd_names iwl_mvm_data_path_names[] = { HCMD_NAME(RFH_QUEUE_CONFIG_CMD), HCMD_NAME(TLC_MNG_CONFIG_CMD), HCMD_NAME(CHEST_COLLECTOR_FILTER_CONFIG_CMD), + HCMD_NAME(SCD_QUEUE_CONFIG_CMD), HCMD_NAME(MONITOR_NOTIF), HCMD_NAME(THERMAL_DUAL_CHAIN_REQUEST), HCMD_NAME(STA_PM_NOTIF), @@ -633,13 +645,11 @@ unlock: mutex_unlock(&mvm->mutex); } -static int iwl_mvm_fwrt_dump_start(void *ctx) +static void iwl_mvm_fwrt_dump_start(void *ctx) { struct iwl_mvm *mvm = ctx; mutex_lock(&mvm->mutex); - - return 0; } static void iwl_mvm_fwrt_dump_end(void *ctx) @@ -1076,12 +1086,12 @@ iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, if (!hw) return NULL; - hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; + hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; if (cfg->max_tx_agg_size) hw->max_tx_aggregation_subframes = cfg->max_tx_agg_size; else - hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; + hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; op_mode = hw->priv; @@ -1244,6 +1254,14 @@ iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg, trans_cfg.fw_reset_handshake = fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_FW_RESET_HANDSHAKE); + trans_cfg.queue_alloc_cmd_ver = + iwl_fw_lookup_cmd_ver(mvm->fw, + WIDE_ID(DATA_PATH_GROUP, + SCD_QUEUE_CONFIG_CMD), + 0); + mvm->sta_remove_requires_queue_remove = + trans_cfg.queue_alloc_cmd_ver > 0; + /* Configure transport layer */ iwl_trans_configure(mvm->trans, &trans_cfg); diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c b/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c index 9af40b0fa37a..a3cefbc43e80 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/phy-ctxt.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2012-2014, 2018-2021 Intel Corporation + * Copyright (C) 2012-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2014 Intel Mobile Communications GmbH * Copyright (C) 2017 Intel Deutschland GmbH */ @@ -158,8 +158,7 @@ static void iwl_mvm_phy_ctxt_cmd_data(struct iwl_mvm *mvm, iwl_mvm_set_chan_info_chandef(mvm, &cmd->ci, chandef); /* we only support RLC command version 2 */ - if (iwl_fw_lookup_cmd_ver(mvm->fw, DATA_PATH_GROUP, - RLC_CONFIG_CMD, 0) < 2) + if (iwl_fw_lookup_cmd_ver(mvm->fw, WIDE_ID(DATA_PATH_GROUP, RLC_CONFIG_CMD), 0) < 2) iwl_mvm_phy_ctxt_set_rxchain(mvm, ctxt, &cmd->rxchain_info, chains_static, chains_dynamic); } @@ -172,8 +171,7 @@ static int iwl_mvm_phy_send_rlc(struct iwl_mvm *mvm, .phy_id = cpu_to_le32(ctxt->id), }; - if (iwl_fw_lookup_cmd_ver(mvm->fw, DATA_PATH_GROUP, - RLC_CONFIG_CMD, 0) < 2) + if (iwl_fw_lookup_cmd_ver(mvm->fw, WIDE_ID(DATA_PATH_GROUP, RLC_CONFIG_CMD), 0) < 2) return 0; BUILD_BUG_ON(IWL_RLC_CHAIN_INFO_DRIVER_FORCE != @@ -209,8 +207,7 @@ static int iwl_mvm_phy_ctxt_apply(struct iwl_mvm *mvm, u32 action) { int ret; - int ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, - PHY_CONTEXT_CMD, 1); + int ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_CONTEXT_CMD, 1); if (ver == 3 || ver == 4) { struct iwl_phy_context_cmd cmd = {}; @@ -301,8 +298,7 @@ int iwl_mvm_phy_ctxt_changed(struct iwl_mvm *mvm, struct iwl_mvm_phy_ctxt *ctxt, lockdep_assert_held(&mvm->mutex); - if (iwl_fw_lookup_cmd_ver(mvm->fw, DATA_PATH_GROUP, - RLC_CONFIG_CMD, 0) >= 2 && + if (iwl_fw_lookup_cmd_ver(mvm->fw, WIDE_ID(DATA_PATH_GROUP, RLC_CONFIG_CMD), 0) >= 2 && ctxt->channel == chandef->chan && ctxt->width == chandef->width && ctxt->center_freq1 == chandef->center_freq1) @@ -349,18 +345,31 @@ void iwl_mvm_phy_ctxt_unref(struct iwl_mvm *mvm, struct iwl_mvm_phy_ctxt *ctxt) * otherwise we might not be able to reuse this phy. */ if (ctxt->ref == 0) { - struct ieee80211_channel *chan; + struct ieee80211_channel *chan = NULL; struct cfg80211_chan_def chandef; - struct ieee80211_supported_band *sband = NULL; - enum nl80211_band band = NL80211_BAND_2GHZ; + struct ieee80211_supported_band *sband; + enum nl80211_band band; + int channel; - while (!sband && band < NUM_NL80211_BANDS) - sband = mvm->hw->wiphy->bands[band++]; + for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { + sband = mvm->hw->wiphy->bands[band]; - if (WARN_ON(!sband)) - return; + if (!sband) + continue; + + for (channel = 0; channel < sband->n_channels; channel++) + if (!(sband->channels[channel].flags & + IEEE80211_CHAN_DISABLED)) { + chan = &sband->channels[channel]; + break; + } - chan = &sband->channels[0]; + if (chan) + break; + } + + if (WARN_ON(!chan)) + return; cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT); iwl_mvm_phy_ctxt_changed(mvm, ctxt, &chandef, 1, 1); diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/quota.c b/drivers/net/wireless/intel/iwlwifi/mvm/quota.c index 3d0166df2002..c862bd243b55 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/quota.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/quota.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2012-2014, 2018 Intel Corporation + * Copyright (C) 2012-2014, 2018, 2021 Intel Corporation * Copyright (C) 2013-2014 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/rfi.c b/drivers/net/wireless/intel/iwlwifi/mvm/rfi.c index f054ce76bed5..bb77bc9aa821 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/rfi.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/rfi.c @@ -125,12 +125,19 @@ struct iwl_rfi_freq_table_resp_cmd *iwl_rfi_get_freq_table(struct iwl_mvm *mvm) if (WARN_ON_ONCE(iwl_rx_packet_payload_len(cmd.resp_pkt) != resp_size)) return ERR_PTR(-EIO); - resp = kzalloc(resp_size, GFP_KERNEL); + resp = kmemdup(cmd.resp_pkt->data, resp_size, GFP_KERNEL); if (!resp) return ERR_PTR(-ENOMEM); - memcpy(resp, cmd.resp_pkt->data, resp_size); - iwl_free_resp(&cmd); return resp; } + +void iwl_rfi_deactivate_notif_handler(struct iwl_mvm *mvm, + struct iwl_rx_cmd_buffer *rxb) +{ + struct iwl_rx_packet *pkt = rxb_addr(rxb); + struct iwl_rfi_deactivate_notif *notif = (void *)pkt->data; + + IWL_INFO(mvm, "RFIm is deactivated, reason = %d\n", notif->reason); +} diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c b/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c index 66808c55aa0e..9830d2663689 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/rs-fw.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* * Copyright (C) 2017 Intel Deutschland GmbH - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation */ #include "rs.h" #include "fw-api.h" @@ -97,7 +97,10 @@ static u16 rs_fw_get_config_flags(struct iwl_mvm *mvm, if (he_cap->has_he && (he_cap->he_cap_elem.phy_cap_info[3] & - IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_MASK)) + IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_RX_MASK && + sband->iftype_data && + sband->iftype_data->he_cap.he_cap_elem.phy_cap_info[3] & + IEEE80211_HE_PHY_CAP3_DCM_MAX_CONST_TX_MASK)) flags |= IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK; return flags; @@ -420,7 +423,7 @@ void rs_fw_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta, struct ieee80211_hw *hw = mvm->hw; struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); struct iwl_lq_sta_rs_fw *lq_sta = &mvmsta->lq_sta.rs_fw; - u32 cmd_id = iwl_cmd_id(TLC_MNG_CONFIG_CMD, DATA_PATH_GROUP, 0); + u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, TLC_MNG_CONFIG_CMD); struct ieee80211_supported_band *sband = hw->wiphy->bands[band]; u16 max_amsdu_len = rs_fw_get_max_amsdu_len(sta); struct iwl_tlc_config_cmd_v4 cfg_cmd = { @@ -449,8 +452,22 @@ void rs_fw_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta, */ sta->max_amsdu_len = max_amsdu_len; - cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, DATA_PATH_GROUP, - TLC_MNG_CONFIG_CMD, 0); + cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, + WIDE_ID(DATA_PATH_GROUP, + TLC_MNG_CONFIG_CMD), + 0); + IWL_DEBUG_RATE(mvm, "TLC CONFIG CMD, sta_id=%d, max_ch_width=%d, mode=%d\n", + cfg_cmd.sta_id, cfg_cmd.max_ch_width, cfg_cmd.mode); + IWL_DEBUG_RATE(mvm, "TLC CONFIG CMD, chains=0x%X, ch_wid_supp=%d, flags=0x%X\n", + cfg_cmd.chains, cfg_cmd.sgi_ch_width_supp, cfg_cmd.flags); + IWL_DEBUG_RATE(mvm, "TLC CONFIG CMD, mpdu_len=%d, no_ht_rate=0x%X, tx_op=%d\n", + cfg_cmd.max_mpdu_len, cfg_cmd.non_ht_rates, cfg_cmd.max_tx_op); + IWL_DEBUG_RATE(mvm, "TLC CONFIG CMD, ht_rate[0][0]=0x%X, ht_rate[1][0]=0x%X\n", + cfg_cmd.ht_rates[0][0], cfg_cmd.ht_rates[1][0]); + IWL_DEBUG_RATE(mvm, "TLC CONFIG CMD, ht_rate[0][1]=0x%X, ht_rate[1][1]=0x%X\n", + cfg_cmd.ht_rates[0][1], cfg_cmd.ht_rates[1][1]); + IWL_DEBUG_RATE(mvm, "TLC CONFIG CMD, ht_rate[0][2]=0x%X, ht_rate[1][2]=0x%X\n", + cfg_cmd.ht_rates[0][2], cfg_cmd.ht_rates[1][2]); if (cmd_ver == 4) { ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, CMD_ASYNC, sizeof(cfg_cmd), &cfg_cmd); @@ -474,8 +491,9 @@ void rs_fw_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta, u16 cmd_size = sizeof(cfg_cmd_v3); /* In old versions of the API the struct is 4 bytes smaller */ - if (iwl_fw_lookup_cmd_ver(mvm->fw, DATA_PATH_GROUP, - TLC_MNG_CONFIG_CMD, 0) < 3) + if (iwl_fw_lookup_cmd_ver(mvm->fw, + WIDE_ID(DATA_PATH_GROUP, + TLC_MNG_CONFIG_CMD), 0) < 3) cmd_size -= 4; ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, CMD_ASYNC, cmd_size, diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/rs.c b/drivers/net/wireless/intel/iwlwifi/mvm/rs.c index f4d02f9fe16d..62114616317c 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/rs.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/rs.c @@ -454,8 +454,6 @@ static const u16 expected_tpt_mimo2_160MHz[4][IWL_RATE_COUNT] = { {0, 0, 0, 0, 971, 0, 1925, 2861, 3779, 5574, 7304, 8147, 8976, 10592, 11640}, }; -#define MCS_INDEX_PER_STREAM (8) - static const char *rs_pretty_lq_type(enum iwl_table_type type) { static const char * const lq_types[] = { diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/rx.c b/drivers/net/wireless/intel/iwlwifi/mvm/rx.c index 64446a11ef98..78198da7e55b 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/rx.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/rx.c @@ -83,8 +83,8 @@ static void iwl_mvm_pass_packet_to_mac80211(struct iwl_mvm *mvm, fraglen = len - hdrlen; if (fraglen) { - int offset = (void *)hdr + hdrlen - - rxb_addr(rxb) + rxb_offset(rxb); + int offset = (u8 *)hdr + hdrlen - + (u8 *)rxb_addr(rxb) + rxb_offset(rxb); skb_add_rx_frag(skb, 0, rxb_steal_page(rxb), offset, fraglen, rxb->truesize); @@ -640,7 +640,7 @@ static void iwl_mvm_stat_iterator_all_macs(void *_data, u8 *mac, struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); u16 vif_id = mvmvif->id; - if (WARN_ONCE(vif_id > MAC_INDEX_AUX, "invalid vif id: %d", vif_id)) + if (WARN_ONCE(vif_id >= MAC_INDEX_AUX, "invalid vif id: %d", vif_id)) return; if (vif->type != NL80211_IFTYPE_STATION) diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c b/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c index 295629c5c035..2c43a9989783 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c @@ -209,13 +209,16 @@ static int iwl_mvm_create_skb(struct iwl_mvm *mvm, struct sk_buff *skb, shdr->type != htons(ETH_P_PAE) && shdr->type != htons(ETH_P_TDLS)))) skb->ip_summed = CHECKSUM_NONE; + else + /* mac80211 assumes full CSUM including SNAP header */ + skb_postpush_rcsum(skb, shdr, sizeof(*shdr)); } fraglen = len - headlen; if (fraglen) { - int offset = (void *)hdr + headlen + pad_len - - rxb_addr(rxb) + rxb_offset(rxb); + int offset = (u8 *)hdr + headlen + pad_len - + (u8 *)rxb_addr(rxb) + rxb_offset(rxb); skb_add_rx_frag(skb, 0, rxb_steal_page(rxb), offset, fraglen, rxb->truesize); diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/scan.c b/drivers/net/wireless/intel/iwlwifi/mvm/scan.c index 5f92a09db374..a4077053e374 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/scan.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/scan.c @@ -20,7 +20,6 @@ #define IWL_SCAN_DWELL_FRAGMENTED 44 #define IWL_SCAN_DWELL_EXTENDED 90 #define IWL_SCAN_NUM_OF_FRAGS 3 -#define IWL_SCAN_LAST_2_4_CHN 14 /* adaptive dwell max budget time [TU] for full scan */ #define IWL_SCAN_ADWELL_MAX_BUDGET_FULL_SCAN 300 @@ -98,6 +97,7 @@ struct iwl_mvm_scan_params { u32 n_6ghz_params; bool scan_6ghz; bool enable_6ghz_passive; + bool respect_p2p_go, respect_p2p_go_hb; }; static inline void *iwl_mvm_get_scan_req_umac_data(struct iwl_mvm *mvm) @@ -169,17 +169,6 @@ iwl_mvm_scan_rate_n_flags(struct iwl_mvm *mvm, enum nl80211_band band, return cpu_to_le32(IWL_RATE_6M_PLCP | tx_ant); } -static void iwl_mvm_scan_condition_iterator(void *data, u8 *mac, - struct ieee80211_vif *vif) -{ - struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); - int *global_cnt = data; - - if (vif->type != NL80211_IFTYPE_P2P_DEVICE && mvmvif->phy_ctxt && - mvmvif->phy_ctxt->id < NUM_PHY_CTX) - *global_cnt += 1; -} - static enum iwl_mvm_traffic_load iwl_mvm_get_traffic_load(struct iwl_mvm *mvm) { return mvm->tcm.result.global_load; @@ -191,26 +180,31 @@ iwl_mvm_get_traffic_load_band(struct iwl_mvm *mvm, enum nl80211_band band) return mvm->tcm.result.band_load[band]; } -struct iwl_is_dcm_with_go_iterator_data { +struct iwl_mvm_scan_iter_data { + u32 global_cnt; struct ieee80211_vif *current_vif; bool is_dcm_with_p2p_go; }; -static void iwl_mvm_is_dcm_with_go_iterator(void *_data, u8 *mac, - struct ieee80211_vif *vif) +static void iwl_mvm_scan_iterator(void *_data, u8 *mac, + struct ieee80211_vif *vif) { - struct iwl_is_dcm_with_go_iterator_data *data = _data; - struct iwl_mvm_vif *other_mvmvif = iwl_mvm_vif_from_mac80211(vif); - struct iwl_mvm_vif *curr_mvmvif = - iwl_mvm_vif_from_mac80211(data->current_vif); + struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); + struct iwl_mvm_scan_iter_data *data = _data; + struct iwl_mvm_vif *curr_mvmvif; - /* exclude the given vif */ - if (vif == data->current_vif) + if (vif->type != NL80211_IFTYPE_P2P_DEVICE && mvmvif->phy_ctxt && + mvmvif->phy_ctxt->id < NUM_PHY_CTX) + data->global_cnt += 1; + + if (!data->current_vif || vif == data->current_vif) return; + curr_mvmvif = iwl_mvm_vif_from_mac80211(data->current_vif); + if (vif->type == NL80211_IFTYPE_AP && vif->p2p && - other_mvmvif->phy_ctxt && curr_mvmvif->phy_ctxt && - other_mvmvif->phy_ctxt->id != curr_mvmvif->phy_ctxt->id) + mvmvif->phy_ctxt && curr_mvmvif->phy_ctxt && + mvmvif->phy_ctxt->id != curr_mvmvif->phy_ctxt->id) data->is_dcm_with_p2p_go = true; } @@ -220,13 +214,18 @@ iwl_mvm_scan_type _iwl_mvm_get_scan_type(struct iwl_mvm *mvm, enum iwl_mvm_traffic_load load, bool low_latency) { - int global_cnt = 0; + struct iwl_mvm_scan_iter_data data = { + .current_vif = vif, + .is_dcm_with_p2p_go = false, + .global_cnt = 0, + }; ieee80211_iterate_active_interfaces_atomic(mvm->hw, - IEEE80211_IFACE_ITER_NORMAL, - iwl_mvm_scan_condition_iterator, - &global_cnt); - if (!global_cnt) + IEEE80211_IFACE_ITER_NORMAL, + iwl_mvm_scan_iterator, + &data); + + if (!data.global_cnt) return IWL_SCAN_TYPE_UNASSOC; if (fw_has_api(&mvm->fw->ucode_capa, @@ -235,23 +234,14 @@ iwl_mvm_scan_type _iwl_mvm_get_scan_type(struct iwl_mvm *mvm, (!vif || vif->type != NL80211_IFTYPE_P2P_DEVICE)) return IWL_SCAN_TYPE_FRAGMENTED; - /* in case of DCM with GO where BSS DTIM interval < 220msec + /* + * in case of DCM with GO where BSS DTIM interval < 220msec * set all scan requests as fast-balance scan - * */ + */ if (vif && vif->type == NL80211_IFTYPE_STATION && - vif->bss_conf.dtim_period < 220) { - struct iwl_is_dcm_with_go_iterator_data data = { - .current_vif = vif, - .is_dcm_with_p2p_go = false, - }; - - ieee80211_iterate_active_interfaces_atomic(mvm->hw, - IEEE80211_IFACE_ITER_NORMAL, - iwl_mvm_is_dcm_with_go_iterator, - &data); - if (data.is_dcm_with_p2p_go) - return IWL_SCAN_TYPE_FAST_BALANCE; - } + vif->bss_conf.dtim_period < 220 && + data.is_dcm_with_p2p_go) + return IWL_SCAN_TYPE_FAST_BALANCE; } if (load >= IWL_MVM_TRAFFIC_MEDIUM || low_latency) @@ -651,9 +641,7 @@ static void iwl_mvm_scan_fill_tx_cmd(struct iwl_mvm *mvm, NL80211_BAND_2GHZ, no_cck); - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - ADD_STA, - 0) < 12) { + if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { tx_cmd[0].sta_id = mvm->aux_sta.sta_id; tx_cmd[1].sta_id = mvm->aux_sta.sta_id; @@ -1090,8 +1078,7 @@ static void iwl_mvm_fill_scan_config_v1(struct iwl_mvm *mvm, void *config, memcpy(&cfg->mac_addr, &mvm->addresses[0].addr, ETH_ALEN); /* This function should not be called when using ADD_STA ver >=12 */ - WARN_ON_ONCE(iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - ADD_STA, 0) >= 12); + WARN_ON_ONCE(iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) >= 12); cfg->bcast_sta_id = mvm->aux_sta.sta_id; cfg->channel_flags = channel_flags; @@ -1142,8 +1129,7 @@ static void iwl_mvm_fill_scan_config_v2(struct iwl_mvm *mvm, void *config, memcpy(&cfg->mac_addr, &mvm->addresses[0].addr, ETH_ALEN); /* This function should not be called when using ADD_STA ver >=12 */ - WARN_ON_ONCE(iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - ADD_STA, 0) >= 12); + WARN_ON_ONCE(iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) >= 12); cfg->bcast_sta_id = mvm->aux_sta.sta_id; cfg->channel_flags = channel_flags; @@ -1156,7 +1142,7 @@ static int iwl_mvm_legacy_config_scan(struct iwl_mvm *mvm) void *cfg; int ret, cmd_size; struct iwl_host_cmd cmd = { - .id = iwl_cmd_id(SCAN_CFG_CMD, IWL_ALWAYS_LONG_GROUP, 0), + .id = WIDE_ID(IWL_ALWAYS_LONG_GROUP, SCAN_CFG_CMD), }; enum iwl_mvm_scan_type type; enum iwl_mvm_scan_type hb_type = IWL_SCAN_TYPE_NOT_SET; @@ -1247,7 +1233,7 @@ int iwl_mvm_config_scan(struct iwl_mvm *mvm) { struct iwl_scan_config cfg; struct iwl_host_cmd cmd = { - .id = iwl_cmd_id(SCAN_CFG_CMD, IWL_ALWAYS_LONG_GROUP, 0), + .id = WIDE_ID(IWL_ALWAYS_LONG_GROUP, SCAN_CFG_CMD), .len[0] = sizeof(cfg), .data[0] = &cfg, .dataflags[0] = IWL_HCMD_DFL_NOCOPY, @@ -1258,11 +1244,9 @@ int iwl_mvm_config_scan(struct iwl_mvm *mvm) memset(&cfg, 0, sizeof(cfg)); - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - ADD_STA, 0) < 12) { + if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) < 12) { cfg.bcast_sta_id = mvm->aux_sta.sta_id; - } else if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - SCAN_CFG_CMD, 0) < 5) { + } else if (iwl_fw_lookup_cmd_ver(mvm->fw, SCAN_CFG_CMD, 0) < 5) { /* * Fw doesn't use this sta anymore. Deprecated on SCAN_CFG_CMD * version 5. @@ -1662,7 +1646,7 @@ iwl_mvm_umac_scan_cfg_channels_v6(struct iwl_mvm *mvm, } } -static int +static void iwl_mvm_umac_scan_fill_6g_chan_list(struct iwl_mvm *mvm, struct iwl_mvm_scan_params *params, struct iwl_scan_probe_params_v4 *pp) @@ -1731,31 +1715,40 @@ iwl_mvm_umac_scan_fill_6g_chan_list(struct iwl_mvm *mvm, pp->short_ssid_num = idex_s; pp->bssid_num = idex_b; - return 0; } /* TODO: this function can be merged with iwl_mvm_scan_umac_fill_ch_p_v6 */ -static void -iwl_mvm_umac_scan_cfg_channels_v6_6g(struct iwl_mvm_scan_params *params, +static u32 +iwl_mvm_umac_scan_cfg_channels_v6_6g(struct iwl_mvm *mvm, + struct iwl_mvm_scan_params *params, u32 n_channels, struct iwl_scan_probe_params_v4 *pp, struct iwl_scan_channel_params_v6 *cp, enum nl80211_iftype vif_type) { - struct iwl_scan_channel_cfg_umac *channel_cfg = cp->channel_config; int i; struct cfg80211_scan_6ghz_params *scan_6ghz_params = params->scan_6ghz_params; + u32 ch_cnt; - for (i = 0; i < params->n_channels; i++) { + for (i = 0, ch_cnt = 0; i < params->n_channels; i++) { struct iwl_scan_channel_cfg_umac *cfg = - &cp->channel_config[i]; + &cp->channel_config[ch_cnt]; u32 s_ssid_bitmap = 0, bssid_bitmap = 0, flags = 0; u8 j, k, s_max = 0, b_max = 0, n_used_bssid_entries; bool force_passive, found = false, allow_passive = true, unsolicited_probe_on_chan = false, psc_no_listen = false; + /* + * Avoid performing passive scan on non PSC channels unless the + * scan is specifically a passive scan, i.e., no SSIDs + * configured in the scan command. + */ + if (!cfg80211_channel_is_psc(params->channels[i]) && + !params->n_6ghz_params && params->n_ssids) + continue; + cfg->v1.channel_num = params->channels[i]->hw_value; cfg->v2.band = 2; cfg->v2.iter_count = 1; @@ -1875,8 +1868,16 @@ iwl_mvm_umac_scan_cfg_channels_v6_6g(struct iwl_mvm_scan_params *params, else flags |= bssid_bitmap | (s_ssid_bitmap << 16); - channel_cfg[i].flags |= cpu_to_le32(flags); + cfg->flags |= cpu_to_le32(flags); + ch_cnt++; } + + if (params->n_channels > ch_cnt) + IWL_DEBUG_SCAN(mvm, + "6GHz: reducing number channels: (%u->%u)\n", + params->n_channels, ch_cnt); + + return ch_cnt; } static u8 iwl_mvm_scan_umac_chan_flags_v2(struct iwl_mvm *mvm, @@ -1893,9 +1894,25 @@ static u8 iwl_mvm_scan_umac_chan_flags_v2(struct iwl_mvm *mvm, IWL_SCAN_CHANNEL_FLAG_CACHE_ADD; /* set fragmented ebs for fragmented scan on HB channels */ - if (iwl_mvm_is_scan_fragmented(params->hb_type)) + if ((!iwl_mvm_is_cdb_supported(mvm) && + iwl_mvm_is_scan_fragmented(params->type)) || + (iwl_mvm_is_cdb_supported(mvm) && + iwl_mvm_is_scan_fragmented(params->hb_type))) flags |= IWL_SCAN_CHANNEL_FLAG_EBS_FRAG; + /* + * force EBS in case the scan is a fragmented and there is a need to take P2P + * GO operation into consideration during scan operation. + */ + if ((!iwl_mvm_is_cdb_supported(mvm) && + iwl_mvm_is_scan_fragmented(params->type) && params->respect_p2p_go) || + (iwl_mvm_is_cdb_supported(mvm) && + iwl_mvm_is_scan_fragmented(params->hb_type) && + params->respect_p2p_go_hb)) { + IWL_DEBUG_SCAN(mvm, "Respect P2P GO. Force EBS\n"); + flags |= IWL_SCAN_CHANNEL_FLAG_FORCE_EBS; + } + return flags; } @@ -2046,6 +2063,26 @@ static u16 iwl_mvm_scan_umac_flags_v2(struct iwl_mvm *mvm, return flags; } +static u8 iwl_mvm_scan_umac_flags2(struct iwl_mvm *mvm, + struct iwl_mvm_scan_params *params, + struct ieee80211_vif *vif, int type) +{ + u8 flags = 0; + + if (iwl_mvm_is_cdb_supported(mvm)) { + if (params->respect_p2p_go) + flags |= IWL_UMAC_SCAN_GEN_PARAMS_FLAGS2_RESPECT_P2P_GO_LB; + if (params->respect_p2p_go_hb) + flags |= IWL_UMAC_SCAN_GEN_PARAMS_FLAGS2_RESPECT_P2P_GO_HB; + } else { + if (params->respect_p2p_go) + flags = IWL_UMAC_SCAN_GEN_PARAMS_FLAGS2_RESPECT_P2P_GO_LB | + IWL_UMAC_SCAN_GEN_PARAMS_FLAGS2_RESPECT_P2P_GO_HB; + } + + return flags; +} + static u16 iwl_mvm_scan_umac_flags(struct iwl_mvm *mvm, struct iwl_mvm_scan_params *params, struct ieee80211_vif *vif) @@ -2164,7 +2201,7 @@ static int iwl_mvm_scan_umac(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct iwl_scan_req_umac *cmd = mvm->scan_cmd; struct iwl_scan_umac_chan_param *chan_param; void *cmd_data = iwl_mvm_get_scan_req_umac_data(mvm); - void *sec_part = cmd_data + sizeof(struct iwl_scan_channel_cfg_umac) * + void *sec_part = (u8 *)cmd_data + sizeof(struct iwl_scan_channel_cfg_umac) * mvm->fw->ucode_capa.n_scan_channels; struct iwl_scan_req_umac_tail_v2 *tail_v2 = (struct iwl_scan_req_umac_tail_v2 *)sec_part; @@ -2248,13 +2285,17 @@ iwl_mvm_scan_umac_fill_general_p_v11(struct iwl_mvm *mvm, struct iwl_mvm_scan_params *params, struct ieee80211_vif *vif, struct iwl_scan_general_params_v11 *gp, - u16 gen_flags) + u16 gen_flags, u8 gen_flags2) { struct iwl_mvm_vif *scan_vif = iwl_mvm_vif_from_mac80211(vif); iwl_mvm_scan_umac_dwell_v11(mvm, gp, params); + IWL_DEBUG_SCAN(mvm, "Gerenal: flags=0x%x, flags2=0x%x\n", + gen_flags, gen_flags2); + gp->flags = cpu_to_le16(gen_flags); + gp->flags2 = gen_flags2; if (gen_flags & IWL_UMAC_SCAN_GEN_FLAGS_V2_FRAGMENTED_LMAC1) gp->num_of_fragments[SCAN_LB_LMAC_IDX] = IWL_SCAN_NUM_OF_FRAGS; @@ -2358,7 +2399,7 @@ static int iwl_mvm_scan_umac_v12(struct iwl_mvm *mvm, struct ieee80211_vif *vif, gen_flags = iwl_mvm_scan_umac_flags_v2(mvm, params, vif, type); iwl_mvm_scan_umac_fill_general_p_v11(mvm, params, vif, &scan_p->general_params, - gen_flags); + gen_flags, 0); ret = iwl_mvm_fill_scan_sched_params(params, scan_p->periodic_params.schedule, @@ -2384,6 +2425,7 @@ static int iwl_mvm_scan_umac_v14_and_above(struct iwl_mvm *mvm, struct iwl_scan_probe_params_v4 *pb = &scan_p->probe_params; int ret; u16 gen_flags; + u8 gen_flags2; u32 bitmap_ssid = 0; mvm->scan_uid_status[uid] = type; @@ -2392,9 +2434,15 @@ static int iwl_mvm_scan_umac_v14_and_above(struct iwl_mvm *mvm, cmd->uid = cpu_to_le32(uid); gen_flags = iwl_mvm_scan_umac_flags_v2(mvm, params, vif, type); + + if (version >= 15) + gen_flags2 = iwl_mvm_scan_umac_flags2(mvm, params, vif, type); + else + gen_flags2 = 0; + iwl_mvm_scan_umac_fill_general_p_v11(mvm, params, vif, &scan_p->general_params, - gen_flags); + gen_flags, gen_flags2); ret = iwl_mvm_fill_scan_sched_params(params, scan_p->periodic_params.schedule, @@ -2417,14 +2465,16 @@ static int iwl_mvm_scan_umac_v14_and_above(struct iwl_mvm *mvm, cp->n_aps_override[0] = IWL_SCAN_ADWELL_N_APS_GO_FRIENDLY; cp->n_aps_override[1] = IWL_SCAN_ADWELL_N_APS_SOCIAL_CHS; - ret = iwl_mvm_umac_scan_fill_6g_chan_list(mvm, params, pb); - if (ret) - return ret; + iwl_mvm_umac_scan_fill_6g_chan_list(mvm, params, pb); + + cp->count = iwl_mvm_umac_scan_cfg_channels_v6_6g(mvm, params, + params->n_channels, + pb, cp, vif->type); + if (!cp->count) { + mvm->scan_uid_status[uid] = 0; + return -EINVAL; + } - iwl_mvm_umac_scan_cfg_channels_v6_6g(params, - params->n_channels, - pb, cp, vif->type); - cp->count = params->n_channels; if (!params->n_ssids || (params->n_ssids == 1 && !params->ssids[0].ssid_len)) cp->flags |= IWL_SCAN_CHANNEL_FLAG_6G_PSC_NO_FILTER; @@ -2588,10 +2638,9 @@ static int iwl_mvm_build_scan_cmd(struct iwl_mvm *mvm, if (uid < 0) return uid; - hcmd->id = iwl_cmd_id(SCAN_REQ_UMAC, IWL_ALWAYS_LONG_GROUP, 0); + hcmd->id = WIDE_ID(IWL_ALWAYS_LONG_GROUP, SCAN_REQ_UMAC); - scan_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, - SCAN_REQ_UMAC, + scan_ver = iwl_fw_lookup_cmd_ver(mvm->fw, SCAN_REQ_UMAC, IWL_FW_CMD_VER_UNKNOWN); for (i = 0; i < ARRAY_SIZE(iwl_scan_umac_handlers); i++) { @@ -2611,6 +2660,85 @@ static int iwl_mvm_build_scan_cmd(struct iwl_mvm *mvm, return uid; } +struct iwl_mvm_scan_respect_p2p_go_iter_data { + struct ieee80211_vif *current_vif; + bool p2p_go; + enum nl80211_band band; +}; + +static void iwl_mvm_scan_respect_p2p_go_iter(void *_data, u8 *mac, + struct ieee80211_vif *vif) +{ + struct iwl_mvm_scan_respect_p2p_go_iter_data *data = _data; + struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); + + /* exclude the given vif */ + if (vif == data->current_vif) + return; + + if (vif->type == NL80211_IFTYPE_AP && vif->p2p && + mvmvif->phy_ctxt->id < NUM_PHY_CTX && + (data->band == NUM_NL80211_BANDS || + mvmvif->phy_ctxt->channel->band == data->band)) + data->p2p_go = true; +} + +static bool _iwl_mvm_get_respect_p2p_go(struct iwl_mvm *mvm, + struct ieee80211_vif *vif, + bool low_latency, + enum nl80211_band band) +{ + struct iwl_mvm_scan_respect_p2p_go_iter_data data = { + .current_vif = vif, + .p2p_go = false, + .band = band, + }; + + if (!low_latency) + return false; + + ieee80211_iterate_active_interfaces_atomic(mvm->hw, + IEEE80211_IFACE_ITER_NORMAL, + iwl_mvm_scan_respect_p2p_go_iter, + &data); + + return data.p2p_go; +} + +static bool iwl_mvm_get_respect_p2p_go_band(struct iwl_mvm *mvm, + struct ieee80211_vif *vif, + enum nl80211_band band) +{ + bool low_latency = iwl_mvm_low_latency_band(mvm, band); + + return _iwl_mvm_get_respect_p2p_go(mvm, vif, low_latency, band); +} + +static bool iwl_mvm_get_respect_p2p_go(struct iwl_mvm *mvm, + struct ieee80211_vif *vif) +{ + bool low_latency = iwl_mvm_low_latency(mvm); + + return _iwl_mvm_get_respect_p2p_go(mvm, vif, low_latency, + NUM_NL80211_BANDS); +} + +static void iwl_mvm_fill_respect_p2p_go(struct iwl_mvm *mvm, + struct iwl_mvm_scan_params *params, + struct ieee80211_vif *vif) +{ + if (iwl_mvm_is_cdb_supported(mvm)) { + params->respect_p2p_go = + iwl_mvm_get_respect_p2p_go_band(mvm, vif, + NL80211_BAND_2GHZ); + params->respect_p2p_go_hb = + iwl_mvm_get_respect_p2p_go_band(mvm, vif, + NL80211_BAND_5GHZ); + } else { + params->respect_p2p_go = iwl_mvm_get_respect_p2p_go(mvm, vif); + } +} + int iwl_mvm_reg_scan_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct cfg80211_scan_request *req, struct ieee80211_scan_ies *ies) @@ -2662,6 +2790,7 @@ int iwl_mvm_reg_scan_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif, params.scan_6ghz_params = req->scan_6ghz_params; params.scan_6ghz = req->scan_6ghz; iwl_mvm_fill_scan_type(mvm, ¶ms, vif); + iwl_mvm_fill_respect_p2p_go(mvm, ¶ms, vif); if (req->duration) params.iter_notif = true; @@ -2753,6 +2882,7 @@ int iwl_mvm_sched_scan_start(struct iwl_mvm *mvm, params.scan_plans = req->scan_plans; iwl_mvm_fill_scan_type(mvm, ¶ms, vif); + iwl_mvm_fill_respect_p2p_go(mvm, ¶ms, vif); /* In theory, LMAC scans can handle a 32-bit delay, but since * waiting for over 18 hours to start the scan is a bit silly @@ -2922,8 +3052,7 @@ static int iwl_mvm_umac_scan_abort(struct iwl_mvm *mvm, int type) IWL_DEBUG_SCAN(mvm, "Sending scan abort, uid %u\n", uid); ret = iwl_mvm_send_cmd_pdu(mvm, - iwl_cmd_id(SCAN_ABORT_UMAC, - IWL_ALWAYS_LONG_GROUP, 0), + WIDE_ID(IWL_ALWAYS_LONG_GROUP, SCAN_ABORT_UMAC), 0, sizeof(cmd), &cmd); if (!ret) mvm->scan_uid_status[uid] = type << IWL_MVM_SCAN_STOPPING_SHIFT; @@ -2978,8 +3107,7 @@ static int iwl_scan_req_umac_get_size(u8 scan_ver) int iwl_mvm_scan_size(struct iwl_mvm *mvm) { int base_size, tail_size; - u8 scan_ver = iwl_fw_lookup_cmd_ver(mvm->fw, IWL_ALWAYS_LONG_GROUP, - SCAN_REQ_UMAC, + u8 scan_ver = iwl_fw_lookup_cmd_ver(mvm->fw, SCAN_REQ_UMAC, IWL_FW_CMD_VER_UNKNOWN); base_size = iwl_scan_req_umac_get_size(scan_ver); diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/sta.c b/drivers/net/wireless/intel/iwlwifi/mvm/sta.c index feab0bfcd7a2..c7f9d3870f21 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/sta.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/sta.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2012-2015, 2018-2021 Intel Corporation + * Copyright (C) 2012-2015, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -87,6 +87,7 @@ int iwl_mvm_sta_send_to_fw(struct iwl_mvm *mvm, struct ieee80211_sta *sta, } switch (sta->bandwidth) { + case IEEE80211_STA_RX_BW_320: case IEEE80211_STA_RX_BW_160: add_sta_cmd.station_flags |= cpu_to_le32(STA_FLG_FAT_EN_160MHZ); fallthrough; @@ -316,7 +317,7 @@ static int iwl_mvm_invalidate_sta_queue(struct iwl_mvm *mvm, int queue, } static int iwl_mvm_disable_txq(struct iwl_mvm *mvm, struct ieee80211_sta *sta, - u16 *queueptr, u8 tid, u8 flags) + u16 *queueptr, u8 tid) { int queue = *queueptr; struct iwl_scd_txq_cfg_cmd cmd = { @@ -325,11 +326,28 @@ static int iwl_mvm_disable_txq(struct iwl_mvm *mvm, struct ieee80211_sta *sta, }; int ret; + lockdep_assert_held(&mvm->mutex); + if (iwl_mvm_has_new_tx_api(mvm)) { + if (mvm->sta_remove_requires_queue_remove) { + u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, + SCD_QUEUE_CONFIG_CMD); + struct iwl_scd_queue_cfg_cmd remove_cmd = { + .operation = cpu_to_le32(IWL_SCD_QUEUE_REMOVE), + .u.remove.queue = cpu_to_le32(queue), + }; + + ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, + sizeof(remove_cmd), + &remove_cmd); + } else { + ret = 0; + } + iwl_trans_txq_free(mvm->trans, queue); *queueptr = IWL_MVM_INVALID_QUEUE; - return 0; + return ret; } if (WARN_ON(mvm->queue_info[queue].tid_bitmap == 0)) @@ -373,7 +391,7 @@ static int iwl_mvm_disable_txq(struct iwl_mvm *mvm, struct ieee80211_sta *sta, mvm->queue_info[queue].reserved = false; iwl_trans_txq_disable(mvm->trans, queue, false); - ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags, + ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(struct iwl_scd_txq_cfg_cmd), &cmd); if (ret) @@ -512,7 +530,7 @@ static int iwl_mvm_free_inactive_queue(struct iwl_mvm *mvm, int queue, iwl_mvm_invalidate_sta_queue(mvm, queue, disable_agg_tids, false); - ret = iwl_mvm_disable_txq(mvm, old_sta, &queue_tmp, tid, 0); + ret = iwl_mvm_disable_txq(mvm, old_sta, &queue_tmp, tid); if (ret) { IWL_ERR(mvm, "Failed to free inactive queue %d (ret=%d)\n", @@ -596,6 +614,39 @@ static int iwl_mvm_get_shared_queue(struct iwl_mvm *mvm, return queue; } +/* Re-configure the SCD for a queue that has already been configured */ +static int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, + int sta_id, int tid, int frame_limit, u16 ssn) +{ + struct iwl_scd_txq_cfg_cmd cmd = { + .scd_queue = queue, + .action = SCD_CFG_ENABLE_QUEUE, + .window = frame_limit, + .sta_id = sta_id, + .ssn = cpu_to_le16(ssn), + .tx_fifo = fifo, + .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE || + queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE), + .tid = tid, + }; + int ret; + + if (WARN_ON(iwl_mvm_has_new_tx_api(mvm))) + return -EINVAL; + + if (WARN(mvm->queue_info[queue].tid_bitmap == 0, + "Trying to reconfig unallocated queue %d\n", queue)) + return -ENXIO; + + IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue); + + ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd); + WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n", + queue, fifo, ret); + + return ret; +} + /* * If a given queue has a higher AC than the TID stream that is being compared * to, the queue needs to be redirected to the lower AC. This function does that @@ -716,21 +767,40 @@ static int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, static int iwl_mvm_tvqm_enable_txq(struct iwl_mvm *mvm, u8 sta_id, u8 tid, unsigned int timeout) { - int queue, size = max_t(u32, IWL_DEFAULT_QUEUE_SIZE, - mvm->trans->cfg->min_256_ba_txq_size); + int queue, size; if (tid == IWL_MAX_TID_COUNT) { tid = IWL_MGMT_TID; size = max_t(u32, IWL_MGMT_QUEUE_SIZE, mvm->trans->cfg->min_txq_size); + } else { + struct ieee80211_sta *sta; + + rcu_read_lock(); + sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]); + + /* this queue isn't used for traffic (cab_queue) */ + if (IS_ERR_OR_NULL(sta)) { + size = IWL_MGMT_QUEUE_SIZE; + } else if (sta->he_cap.has_he) { + /* support for 256 ba size */ + size = IWL_DEFAULT_QUEUE_SIZE_HE; + } else { + size = IWL_DEFAULT_QUEUE_SIZE; + } + + rcu_read_unlock(); } - do { - __le16 enable = cpu_to_le16(TX_QUEUE_CFG_ENABLE_QUEUE); + /* take the min with bc tbl entries allowed */ + size = min_t(u32, size, mvm->trans->txqs.bc_tbl_size / sizeof(u16)); - queue = iwl_trans_txq_alloc(mvm->trans, enable, - sta_id, tid, SCD_QUEUE_CFG, - size, timeout); + /* size needs to be power of 2 values for calculating read/write pointers */ + size = rounddown_pow_of_two(size); + + do { + queue = iwl_trans_txq_alloc(mvm->trans, 0, BIT(sta_id), + tid, size, timeout); if (queue < 0) IWL_DEBUG_TX_QUEUES(mvm, @@ -1019,12 +1089,12 @@ static bool iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm, * Remove the ones that did. */ for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) { - u16 tid_bitmap; + u16 q_tid_bitmap; mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE; mvm->queue_info[queue].tid_bitmap &= ~BIT(tid); - tid_bitmap = mvm->queue_info[queue].tid_bitmap; + q_tid_bitmap = mvm->queue_info[queue].tid_bitmap; /* * We need to take into account a situation in which a TXQ was @@ -1037,7 +1107,7 @@ static bool iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm, * Mark this queue in the right bitmap, we'll send the command * to the firmware later. */ - if (!(tid_bitmap & BIT(mvm->queue_info[queue].txq_tid))) + if (!(q_tid_bitmap & BIT(mvm->queue_info[queue].txq_tid))) set_bit(queue, changetid_queues); IWL_DEBUG_TX_QUEUES(mvm, @@ -1337,7 +1407,7 @@ static int iwl_mvm_sta_alloc_queue(struct iwl_mvm *mvm, out_err: queue_tmp = queue; - iwl_mvm_disable_txq(mvm, sta, &queue_tmp, tid, 0); + iwl_mvm_disable_txq(mvm, sta, &queue_tmp, tid); return ret; } @@ -1516,8 +1586,7 @@ static int iwl_mvm_add_int_sta_common(struct iwl_mvm *mvm, memset(&cmd, 0, sizeof(cmd)); cmd.sta_id = sta->sta_id; - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, ADD_STA, - 0) >= 12 && + if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) >= 12 && sta->type == IWL_STA_AUX_ACTIVITY) cmd.mac_id_n_color = cpu_to_le32(mac_id); else @@ -1784,8 +1853,7 @@ static void iwl_mvm_disable_sta_queues(struct iwl_mvm *mvm, if (mvm_sta->tid_data[i].txq_id == IWL_MVM_INVALID_QUEUE) continue; - iwl_mvm_disable_txq(mvm, sta, &mvm_sta->tid_data[i].txq_id, i, - 0); + iwl_mvm_disable_txq(mvm, sta, &mvm_sta->tid_data[i].txq_id, i); mvm_sta->tid_data[i].txq_id = IWL_MVM_INVALID_QUEUE; } @@ -1993,7 +2061,7 @@ static int iwl_mvm_add_int_sta_with_queue(struct iwl_mvm *mvm, int macidx, if (ret) { if (!iwl_mvm_has_new_tx_api(mvm)) iwl_mvm_disable_txq(mvm, NULL, queue, - IWL_MAX_TID_COUNT, 0); + IWL_MAX_TID_COUNT); return ret; } @@ -2065,7 +2133,7 @@ int iwl_mvm_rm_snif_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) if (WARN_ON_ONCE(mvm->snif_sta.sta_id == IWL_MVM_INVALID_STA)) return -EINVAL; - iwl_mvm_disable_txq(mvm, NULL, &mvm->snif_queue, IWL_MAX_TID_COUNT, 0); + iwl_mvm_disable_txq(mvm, NULL, &mvm->snif_queue, IWL_MAX_TID_COUNT); ret = iwl_mvm_rm_sta_common(mvm, mvm->snif_sta.sta_id); if (ret) IWL_WARN(mvm, "Failed sending remove station\n"); @@ -2082,7 +2150,7 @@ int iwl_mvm_rm_aux_sta(struct iwl_mvm *mvm) if (WARN_ON_ONCE(mvm->aux_sta.sta_id == IWL_MVM_INVALID_STA)) return -EINVAL; - iwl_mvm_disable_txq(mvm, NULL, &mvm->aux_queue, IWL_MAX_TID_COUNT, 0); + iwl_mvm_disable_txq(mvm, NULL, &mvm->aux_queue, IWL_MAX_TID_COUNT); ret = iwl_mvm_rm_sta_common(mvm, mvm->aux_sta.sta_id); if (ret) IWL_WARN(mvm, "Failed sending remove station\n"); @@ -2199,7 +2267,7 @@ static void iwl_mvm_free_bcast_sta_queues(struct iwl_mvm *mvm, } queue = *queueptr; - iwl_mvm_disable_txq(mvm, NULL, queueptr, IWL_MAX_TID_COUNT, 0); + iwl_mvm_disable_txq(mvm, NULL, queueptr, IWL_MAX_TID_COUNT); if (iwl_mvm_has_new_tx_api(mvm)) return; @@ -2434,7 +2502,7 @@ int iwl_mvm_rm_mcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) iwl_mvm_flush_sta(mvm, &mvmvif->mcast_sta, true); - iwl_mvm_disable_txq(mvm, NULL, &mvmvif->cab_queue, 0, 0); + iwl_mvm_disable_txq(mvm, NULL, &mvmvif->cab_queue, 0); ret = iwl_mvm_rm_sta_common(mvm, mvmvif->mcast_sta.sta_id); if (ret) @@ -2443,8 +2511,6 @@ int iwl_mvm_rm_mcast_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif) return ret; } -#define IWL_MAX_RX_BA_SESSIONS 16 - static void iwl_mvm_sync_rxq_del_ba(struct iwl_mvm *mvm, u8 baid) { struct iwl_mvm_delba_data notif = { @@ -2526,18 +2592,126 @@ static void iwl_mvm_init_reorder_buffer(struct iwl_mvm *mvm, } } +static int iwl_mvm_fw_baid_op_sta(struct iwl_mvm *mvm, + struct iwl_mvm_sta *mvm_sta, + bool start, int tid, u16 ssn, + u16 buf_size) +{ + struct iwl_mvm_add_sta_cmd cmd = { + .mac_id_n_color = cpu_to_le32(mvm_sta->mac_id_n_color), + .sta_id = mvm_sta->sta_id, + .add_modify = STA_MODE_MODIFY, + }; + u32 status; + int ret; + + if (start) { + cmd.add_immediate_ba_tid = tid; + cmd.add_immediate_ba_ssn = cpu_to_le16(ssn); + cmd.rx_ba_window = cpu_to_le16(buf_size); + cmd.modify_mask = STA_MODIFY_ADD_BA_TID; + } else { + cmd.remove_immediate_ba_tid = tid; + cmd.modify_mask = STA_MODIFY_REMOVE_BA_TID; + } + + status = ADD_STA_SUCCESS; + ret = iwl_mvm_send_cmd_pdu_status(mvm, ADD_STA, + iwl_mvm_add_sta_cmd_size(mvm), + &cmd, &status); + if (ret) + return ret; + + switch (status & IWL_ADD_STA_STATUS_MASK) { + case ADD_STA_SUCCESS: + IWL_DEBUG_HT(mvm, "RX BA Session %sed in fw\n", + start ? "start" : "stopp"); + if (WARN_ON(start && iwl_mvm_has_new_rx_api(mvm) && + !(status & IWL_ADD_STA_BAID_VALID_MASK))) + return -EINVAL; + return u32_get_bits(status, IWL_ADD_STA_BAID_MASK); + case ADD_STA_IMMEDIATE_BA_FAILURE: + IWL_WARN(mvm, "RX BA Session refused by fw\n"); + return -ENOSPC; + default: + IWL_ERR(mvm, "RX BA Session failed %sing, status 0x%x\n", + start ? "start" : "stopp", status); + return -EIO; + } +} + +static int iwl_mvm_fw_baid_op_cmd(struct iwl_mvm *mvm, + struct iwl_mvm_sta *mvm_sta, + bool start, int tid, u16 ssn, + u16 buf_size, int baid) +{ + struct iwl_rx_baid_cfg_cmd cmd = { + .action = start ? cpu_to_le32(IWL_RX_BAID_ACTION_ADD) : + cpu_to_le32(IWL_RX_BAID_ACTION_REMOVE), + }; + u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, RX_BAID_ALLOCATION_CONFIG_CMD); + int ret; + + BUILD_BUG_ON(sizeof(struct iwl_rx_baid_cfg_resp) != sizeof(baid)); + + if (start) { + cmd.alloc.sta_id_mask = cpu_to_le32(BIT(mvm_sta->sta_id)); + cmd.alloc.tid = tid; + cmd.alloc.ssn = cpu_to_le16(ssn); + cmd.alloc.win_size = cpu_to_le16(buf_size); + baid = -EIO; + } else if (iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 1) == 1) { + cmd.remove_v1.baid = cpu_to_le32(baid); + BUILD_BUG_ON(sizeof(cmd.remove_v1) > sizeof(cmd.remove)); + } else { + cmd.remove.sta_id_mask = cpu_to_le32(BIT(mvm_sta->sta_id)); + cmd.remove.tid = cpu_to_le32(tid); + } + + ret = iwl_mvm_send_cmd_pdu_status(mvm, cmd_id, sizeof(cmd), + &cmd, &baid); + if (ret) + return ret; + + if (!start) { + /* ignore firmware baid on remove */ + baid = 0; + } + + IWL_DEBUG_HT(mvm, "RX BA Session %sed in fw\n", + start ? "start" : "stopp"); + + if (baid < 0 || baid >= ARRAY_SIZE(mvm->baid_map)) + return -EINVAL; + + return baid; +} + +static int iwl_mvm_fw_baid_op(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvm_sta, + bool start, int tid, u16 ssn, u16 buf_size, + int baid) +{ + if (fw_has_capa(&mvm->fw->ucode_capa, + IWL_UCODE_TLV_CAPA_BAID_ML_SUPPORT)) + return iwl_mvm_fw_baid_op_cmd(mvm, mvm_sta, start, + tid, ssn, buf_size, baid); + + return iwl_mvm_fw_baid_op_sta(mvm, mvm_sta, start, + tid, ssn, buf_size); +} + int iwl_mvm_sta_rx_agg(struct iwl_mvm *mvm, struct ieee80211_sta *sta, int tid, u16 ssn, bool start, u16 buf_size, u16 timeout) { struct iwl_mvm_sta *mvm_sta = iwl_mvm_sta_from_mac80211(sta); - struct iwl_mvm_add_sta_cmd cmd = {}; struct iwl_mvm_baid_data *baid_data = NULL; - int ret; - u32 status; + int ret, baid; + u32 max_ba_id_sessions = iwl_mvm_has_new_tx_api(mvm) ? IWL_MAX_BAID : + IWL_MAX_BAID_OLD; lockdep_assert_held(&mvm->mutex); - if (start && mvm->rx_ba_sessions >= IWL_MAX_RX_BA_SESSIONS) { + if (start && mvm->rx_ba_sessions >= max_ba_id_sessions) { IWL_WARN(mvm, "Not enough RX BA SESSIONS\n"); return -ENOSPC; } @@ -2583,59 +2757,29 @@ int iwl_mvm_sta_rx_agg(struct iwl_mvm *mvm, struct ieee80211_sta *sta, reorder_buf_size / sizeof(baid_data->entries[0]); } - cmd.mac_id_n_color = cpu_to_le32(mvm_sta->mac_id_n_color); - cmd.sta_id = mvm_sta->sta_id; - cmd.add_modify = STA_MODE_MODIFY; - if (start) { - cmd.add_immediate_ba_tid = (u8) tid; - cmd.add_immediate_ba_ssn = cpu_to_le16(ssn); - cmd.rx_ba_window = cpu_to_le16(buf_size); + if (iwl_mvm_has_new_rx_api(mvm) && !start) { + baid = mvm_sta->tid_to_baid[tid]; } else { - cmd.remove_immediate_ba_tid = (u8) tid; + /* we don't really need it in this case */ + baid = -1; } - cmd.modify_mask = start ? STA_MODIFY_ADD_BA_TID : - STA_MODIFY_REMOVE_BA_TID; - status = ADD_STA_SUCCESS; - ret = iwl_mvm_send_cmd_pdu_status(mvm, ADD_STA, - iwl_mvm_add_sta_cmd_size(mvm), - &cmd, &status); - if (ret) - goto out_free; + /* Don't send command to remove (start=0) BAID during restart */ + if (start || !test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) + baid = iwl_mvm_fw_baid_op(mvm, mvm_sta, start, tid, ssn, buf_size, + baid); - switch (status & IWL_ADD_STA_STATUS_MASK) { - case ADD_STA_SUCCESS: - IWL_DEBUG_HT(mvm, "RX BA Session %sed in fw\n", - start ? "start" : "stopp"); - break; - case ADD_STA_IMMEDIATE_BA_FAILURE: - IWL_WARN(mvm, "RX BA Session refused by fw\n"); - ret = -ENOSPC; - break; - default: - ret = -EIO; - IWL_ERR(mvm, "RX BA Session failed %sing, status 0x%x\n", - start ? "start" : "stopp", status); - break; - } - - if (ret) + if (baid < 0) { + ret = baid; goto out_free; + } if (start) { - u8 baid; - mvm->rx_ba_sessions++; if (!iwl_mvm_has_new_rx_api(mvm)) return 0; - if (WARN_ON(!(status & IWL_ADD_STA_BAID_VALID_MASK))) { - ret = -EINVAL; - goto out_free; - } - baid = (u8)((status & IWL_ADD_STA_BAID_MASK) >> - IWL_ADD_STA_BAID_SHIFT); baid_data->baid = baid; baid_data->timeout = timeout; baid_data->last_rx = jiffies; @@ -2663,7 +2807,7 @@ int iwl_mvm_sta_rx_agg(struct iwl_mvm *mvm, struct ieee80211_sta *sta, WARN_ON(rcu_access_pointer(mvm->baid_map[baid])); rcu_assign_pointer(mvm->baid_map[baid], baid_data); } else { - u8 baid = mvm_sta->tid_to_baid[tid]; + baid = mvm_sta->tid_to_baid[tid]; if (mvm->rx_ba_sessions > 0) /* check that restart flow didn't zero the counter */ @@ -3238,8 +3382,7 @@ static int iwl_mvm_send_sta_key(struct iwl_mvm *mvm, int i, size; bool new_api = fw_has_api(&mvm->fw->ucode_capa, IWL_UCODE_TLV_API_TKIP_MIC_KEYS); - int api_ver = iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - ADD_STA_KEY, + int api_ver = iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA_KEY, new_api ? 2 : 1); if (sta_id == IWL_MVM_INVALID_STA) @@ -3939,7 +4082,7 @@ void iwl_mvm_csa_client_absent(struct iwl_mvm *mvm, struct ieee80211_vif *vif) mvmsta = iwl_mvm_sta_from_staid_rcu(mvm, mvmvif->ap_sta_id); - if (!WARN_ON(!mvmsta)) + if (mvmsta) iwl_mvm_sta_modify_disable_tx(mvm, mvmsta, true); rcu_read_unlock(); @@ -3998,3 +4141,21 @@ out: iwl_mvm_dealloc_int_sta(mvm, sta); return ret; } + +void iwl_mvm_cancel_channel_switch(struct iwl_mvm *mvm, + struct ieee80211_vif *vif, + u32 mac_id) +{ + struct iwl_cancel_channel_switch_cmd cancel_channel_switch_cmd = { + .mac_id = cpu_to_le32(mac_id), + }; + int ret; + + ret = iwl_mvm_send_cmd_pdu(mvm, + WIDE_ID(MAC_CONF_GROUP, CANCEL_CHANNEL_SWITCH_CMD), + CMD_ASYNC, + sizeof(cancel_channel_switch_cmd), + &cancel_channel_switch_cmd); + if (ret) + IWL_ERR(mvm, "Failed to cancel the channel switch\n"); +} diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/sta.h b/drivers/net/wireless/intel/iwlwifi/mvm/sta.h index e34b82b2a288..f1a4fc3e4038 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/sta.h +++ b/drivers/net/wireless/intel/iwlwifi/mvm/sta.h @@ -548,4 +548,7 @@ void iwl_mvm_add_new_dqa_stream_wk(struct work_struct *wk); int iwl_mvm_add_pasn_sta(struct iwl_mvm *mvm, struct ieee80211_vif *vif, struct iwl_mvm_int_sta *sta, u8 *addr, u32 cipher, u8 *key, u32 key_len); +void iwl_mvm_cancel_channel_switch(struct iwl_mvm *mvm, + struct ieee80211_vif *vif, + u32 mac_id); #endif /* __sta_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c b/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c index ab06dcda1462..6edf2b79db43 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/time-event.c @@ -97,8 +97,7 @@ void iwl_mvm_roc_done_wk(struct work_struct *wk) /* In newer version of this command an aux station is added only * in cases of dedicated tx queue and need to be removed in end * of use */ - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, - ADD_STA, 0) >= 12) + if (iwl_fw_lookup_cmd_ver(mvm->fw, ADD_STA, 0) >= 12) iwl_mvm_rm_aux_sta(mvm); } @@ -658,8 +657,8 @@ static void iwl_mvm_cancel_session_protection(struct iwl_mvm *mvm, }; int ret; - ret = iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(SESSION_PROTECTION_CMD, - MAC_CONF_GROUP, 0), + ret = iwl_mvm_send_cmd_pdu(mvm, + WIDE_ID(MAC_CONF_GROUP, SESSION_PROTECTION_CMD), 0, sizeof(cmd), &cmd); if (ret) IWL_ERR(mvm, @@ -923,8 +922,8 @@ iwl_mvm_start_p2p_roc_session_protection(struct iwl_mvm *mvm, } cmd.conf_id = cpu_to_le32(mvmvif->time_event_data.id); - return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(SESSION_PROTECTION_CMD, - MAC_CONF_GROUP, 0), + return iwl_mvm_send_cmd_pdu(mvm, + WIDE_ID(MAC_CONF_GROUP, SESSION_PROTECTION_CMD), 0, sizeof(cmd), &cmd); } @@ -1162,8 +1161,7 @@ void iwl_mvm_schedule_session_protection(struct iwl_mvm *mvm, { struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif); struct iwl_mvm_time_event_data *te_data = &mvmvif->time_event_data; - const u16 notif[] = { iwl_cmd_id(SESSION_PROTECTION_NOTIF, - MAC_CONF_GROUP, 0) }; + const u16 notif[] = { WIDE_ID(MAC_CONF_GROUP, SESSION_PROTECTION_NOTIF) }; struct iwl_notification_wait wait_notif; struct iwl_mvm_session_prot_cmd cmd = { .id_and_color = @@ -1201,8 +1199,7 @@ void iwl_mvm_schedule_session_protection(struct iwl_mvm *mvm, if (!wait_for_notif) { if (iwl_mvm_send_cmd_pdu(mvm, - iwl_cmd_id(SESSION_PROTECTION_CMD, - MAC_CONF_GROUP, 0), + WIDE_ID(MAC_CONF_GROUP, SESSION_PROTECTION_CMD), 0, sizeof(cmd), &cmd)) { IWL_ERR(mvm, "Couldn't send the SESSION_PROTECTION_CMD\n"); @@ -1219,8 +1216,7 @@ void iwl_mvm_schedule_session_protection(struct iwl_mvm *mvm, iwl_mvm_session_prot_notif, NULL); if (iwl_mvm_send_cmd_pdu(mvm, - iwl_cmd_id(SESSION_PROTECTION_CMD, - MAC_CONF_GROUP, 0), + WIDE_ID(MAC_CONF_GROUP, SESSION_PROTECTION_CMD), 0, sizeof(cmd), &cmd)) { IWL_ERR(mvm, "Couldn't send the SESSION_PROTECTION_CMD\n"); diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/tt.c b/drivers/net/wireless/intel/iwlwifi/mvm/tt.c index 398390c59344..69cf3a372759 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/tt.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/tt.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2012-2014, 2019-2020 Intel Corporation + * Copyright (C) 2012-2014, 2019-2021 Intel Corporation * Copyright (C) 2013-2014 Intel Mobile Communications GmbH * Copyright (C) 2015-2016 Intel Deutschland GmbH */ @@ -160,6 +160,11 @@ void iwl_mvm_ct_kill_notif(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb) notif = (struct ct_kill_notif *)pkt->data; IWL_DEBUG_TEMP(mvm, "CT Kill notification temperature = %d\n", notif->temperature); + if (iwl_fw_lookup_notif_ver(mvm->fw, PHY_OPS_GROUP, + CT_KILL_NOTIFICATION, 0) > 1) + IWL_DEBUG_TEMP(mvm, + "CT kill notification DTS bitmap = 0x%x, Scheme = %d\n", + notif->dts, notif->scheme); iwl_mvm_enter_ctkill(mvm); } @@ -240,8 +245,8 @@ int iwl_mvm_get_temp(struct iwl_mvm *mvm, s32 *temp) * a response. For older versions we send the command and wait for a * notification (no command TLV for previous versions). */ - cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, PHY_OPS_GROUP, - CMD_DTS_MEASUREMENT_TRIGGER_WIDE, + cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, + WIDE_ID(PHY_OPS_GROUP, CMD_DTS_MEASUREMENT_TRIGGER_WIDE), IWL_FW_CMD_VER_UNKNOWN); if (cmd_ver == 1) return iwl_mvm_send_temp_cmd(mvm, true, temp); diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/tx.c b/drivers/net/wireless/intel/iwlwifi/mvm/tx.c index 9213f8518f10..7763037b93ed 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/tx.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/tx.c @@ -318,15 +318,14 @@ static u32 iwl_mvm_get_tx_rate(struct iwl_mvm *mvm, /* info->control is only relevant for non HW rate control */ if (!ieee80211_hw_check(mvm->hw, HAS_RATE_CONTROL)) { - struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta); - /* HT rate doesn't make sense for a non data frame */ WARN_ONCE(info->control.rates[0].flags & IEEE80211_TX_RC_MCS && !ieee80211_is_data(fc), "Got a HT rate (flags:0x%x/mcs:%d/fc:0x%x/state:%d) for a non data frame\n", info->control.rates[0].flags, info->control.rates[0].idx, - le16_to_cpu(fc), sta ? mvmsta->sta_state : -1); + le16_to_cpu(fc), + sta ? iwl_mvm_sta_from_mac80211(sta)->sta_state : -1); rate_idx = info->control.rates[0].idx; } @@ -351,7 +350,7 @@ static u32 iwl_mvm_get_tx_rate(struct iwl_mvm *mvm, is_cck = (rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE); /* Set CCK or OFDM flag */ - if (iwl_fw_lookup_cmd_ver(mvm->fw, LONG_GROUP, TX_CMD, 0) > 8) { + if (iwl_fw_lookup_cmd_ver(mvm->fw, TX_CMD, 0) > 8) { if (!is_cck) rate_flags |= RATE_MCS_LEGACY_OFDM_MSK; else @@ -654,7 +653,8 @@ static void iwl_mvm_probe_resp_set_noa(struct iwl_mvm *mvm, struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; int base_len = (u8 *)mgmt->u.probe_resp.variable - (u8 *)mgmt; struct iwl_probe_resp_data *resp_data; - u8 *ie, *pos; + const u8 *ie; + u8 *pos; u8 match[] = { (WLAN_OUI_WFA >> 16) & 0xff, (WLAN_OUI_WFA >> 8) & 0xff, @@ -671,10 +671,10 @@ static void iwl_mvm_probe_resp_set_noa(struct iwl_mvm *mvm, if (!resp_data->notif.noa_active) goto out; - ie = (u8 *)cfg80211_find_ie_match(WLAN_EID_VENDOR_SPECIFIC, - mgmt->u.probe_resp.variable, - skb->len - base_len, - match, 4, 2); + ie = cfg80211_find_ie_match(WLAN_EID_VENDOR_SPECIFIC, + mgmt->u.probe_resp.variable, + skb->len - base_len, + match, 4, 2); if (!ie) { IWL_DEBUG_TX(mvm, "probe resp doesn't have P2P IE\n"); goto out; @@ -1602,8 +1602,6 @@ static void iwl_mvm_rx_tx_cmd_single(struct iwl_mvm *mvm, seq_ctl = le16_to_cpu(hdr->seq_ctrl); if (unlikely(!seq_ctl)) { - struct ieee80211_hdr *hdr = (void *)skb->data; - /* * If it is an NDP, we can't update next_reclaim since * its sequence control is 0. Note that for that same diff --git a/drivers/net/wireless/intel/iwlwifi/mvm/utils.c b/drivers/net/wireless/intel/iwlwifi/mvm/utils.c index 1f3e90e5dbd4..bc947733d982 100644 --- a/drivers/net/wireless/intel/iwlwifi/mvm/utils.c +++ b/drivers/net/wireless/intel/iwlwifi/mvm/utils.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2012-2014, 2018-2021 Intel Corporation + * Copyright (C) 2012-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2014 Intel Mobile Communications GmbH * Copyright (C) 2015-2017 Intel Deutschland GmbH */ @@ -169,8 +169,7 @@ int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags, u8 iwl_mvm_mac80211_idx_to_hwrate(const struct iwl_fw *fw, int rate_idx) { - if (iwl_fw_lookup_cmd_ver(fw, LONG_GROUP, - TX_CMD, 0) > 8) + if (iwl_fw_lookup_cmd_ver(fw, TX_CMD, 0) > 8) /* In the new rate legacy rates are indexed: * 0 - 3 for CCK and 0 - 7 for OFDM. */ @@ -241,38 +240,6 @@ u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx) return last_idx; } -int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id, - int tid, int frame_limit, u16 ssn) -{ - struct iwl_scd_txq_cfg_cmd cmd = { - .scd_queue = queue, - .action = SCD_CFG_ENABLE_QUEUE, - .window = frame_limit, - .sta_id = sta_id, - .ssn = cpu_to_le16(ssn), - .tx_fifo = fifo, - .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE || - queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE), - .tid = tid, - }; - int ret; - - if (WARN_ON(iwl_mvm_has_new_tx_api(mvm))) - return -EINVAL; - - if (WARN(mvm->queue_info[queue].tid_bitmap == 0, - "Trying to reconfig unallocated queue %d\n", queue)) - return -ENXIO; - - IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue); - - ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd); - WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n", - queue, fifo, ret); - - return ret; -} - /** * iwl_mvm_send_lq_cmd() - Send link quality command * @mvm: Driver data. @@ -480,8 +447,7 @@ void iwl_mvm_send_low_latency_cmd(struct iwl_mvm *mvm, cmd.low_latency_tx = 1; } - if (iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(LOW_LATENCY_CMD, - MAC_CONF_GROUP, 0), + if (iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(MAC_CONF_GROUP, LOW_LATENCY_CMD), 0, sizeof(cmd), &cmd)) IWL_ERR(mvm, "Failed to send low latency command\n"); } diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c b/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c index 85a6da70ca78..75fd386b048e 100644 --- a/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c +++ b/drivers/net/wireless/intel/iwlwifi/pcie/ctxt-info-gen3.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2018-2021 Intel Corporation + * Copyright (C) 2018-2022 Intel Corporation */ #include "iwl-trans.h" #include "iwl-fh.h" @@ -125,6 +125,9 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, control_flags |= IWL_PRPH_SCRATCH_MTR_MODE; control_flags |= IWL_PRPH_MTR_FORMAT_256B & IWL_PRPH_SCRATCH_MTR_FORMAT; + if (trans->trans_cfg->imr_enabled) + control_flags |= IWL_PRPH_SCRATCH_IMR_DEBUG_EN; + /* initialize RX default queue */ prph_sc_ctrl->rbd_cfg.free_rbd_addr = cpu_to_le64(trans_pcie->rxq->bd_dma); diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c index 5178e852c5d3..b16d4ae182d1 100644 --- a/drivers/net/wireless/intel/iwlwifi/pcie/drv.c +++ b/drivers/net/wireless/intel/iwlwifi/pcie/drv.c @@ -491,18 +491,21 @@ static const struct pci_device_id iwl_hw_card_ids[] = { /* So devices */ {IWL_PCI_DEVICE(0x2725, PCI_ANY_ID, iwl_so_trans_cfg)}, {IWL_PCI_DEVICE(0x2726, PCI_ANY_ID, iwl_snj_trans_cfg)}, - {IWL_PCI_DEVICE(0x7A70, PCI_ANY_ID, iwl_so_long_latency_trans_cfg)}, + {IWL_PCI_DEVICE(0x7A70, PCI_ANY_ID, iwl_so_long_latency_imr_trans_cfg)}, {IWL_PCI_DEVICE(0x7AF0, PCI_ANY_ID, iwl_so_trans_cfg)}, {IWL_PCI_DEVICE(0x51F0, PCI_ANY_ID, iwl_so_long_latency_trans_cfg)}, + {IWL_PCI_DEVICE(0x51F1, PCI_ANY_ID, iwl_so_long_latency_imr_trans_cfg)}, {IWL_PCI_DEVICE(0x54F0, PCI_ANY_ID, iwl_so_long_latency_trans_cfg)}, + {IWL_PCI_DEVICE(0x7F70, PCI_ANY_ID, iwl_so_trans_cfg)}, /* Ma devices */ {IWL_PCI_DEVICE(0x2729, PCI_ANY_ID, iwl_ma_trans_cfg)}, {IWL_PCI_DEVICE(0x7E40, PCI_ANY_ID, iwl_ma_trans_cfg)}, - {IWL_PCI_DEVICE(0x7F70, PCI_ANY_ID, iwl_ma_trans_cfg)}, /* Bz devices */ {IWL_PCI_DEVICE(0x2727, PCI_ANY_ID, iwl_bz_trans_cfg)}, + {IWL_PCI_DEVICE(0xA840, PCI_ANY_ID, iwl_bz_trans_cfg)}, + {IWL_PCI_DEVICE(0x7740, PCI_ANY_ID, iwl_bz_trans_cfg)}, #endif /* CONFIG_IWLMVM */ {0} @@ -668,8 +671,8 @@ static const struct iwl_dev_info iwl_dev_info_table[] = { IWL_DEV_INFO(0x2726, 0x1652, iwl_cfg_snj_hr_b0, iwl_ax201_killer_1650i_name), IWL_DEV_INFO(0x2726, 0x1691, iwlax411_2ax_cfg_sosnj_gf4_a0, iwl_ax411_killer_1690s_name), IWL_DEV_INFO(0x2726, 0x1692, iwlax411_2ax_cfg_sosnj_gf4_a0, iwl_ax411_killer_1690i_name), - IWL_DEV_INFO(0x7F70, 0x1691, iwlax411_2ax_cfg_sosnj_gf4_a0, iwl_ax411_killer_1690s_name), - IWL_DEV_INFO(0x7F70, 0x1692, iwlax411_2ax_cfg_sosnj_gf4_a0, iwl_ax411_killer_1690i_name), + IWL_DEV_INFO(0x7F70, 0x1691, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690s_name), + IWL_DEV_INFO(0x7F70, 0x1692, iwlax411_2ax_cfg_so_gf4_a0, iwl_ax411_killer_1690i_name), /* SO with GF2 */ IWL_DEV_INFO(0x2726, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), @@ -682,6 +685,8 @@ static const struct iwl_dev_info iwl_dev_info_table[] = { IWL_DEV_INFO(0x7A70, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), IWL_DEV_INFO(0x7AF0, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), IWL_DEV_INFO(0x7AF0, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), + IWL_DEV_INFO(0x7F70, 0x1671, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675s_name), + IWL_DEV_INFO(0x7F70, 0x1672, iwlax211_2ax_cfg_so_gf_a0, iwl_ax211_killer_1675i_name), /* MA with GF2 */ IWL_DEV_INFO(0x7E40, 0x1671, iwl_cfg_ma_a0_gf_a0, iwl_ax211_killer_1675s_name), @@ -1301,7 +1306,30 @@ static const struct iwl_dev_info iwl_dev_info_table[] = { IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV, IWL_CFG_NO_160, IWL_CFG_CORES_BT, IWL_CFG_NO_CDB, IWL_CFG_ANY, - iwlax210_2ax_cfg_so_jf_b0, iwl9462_name) + iwlax210_2ax_cfg_so_jf_b0, iwl9462_name), + +/* MsP */ +/* For now we use the same FW as MR, but this will change in the future. */ + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SO, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_MS, IWL_CFG_ANY, + IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY, + iwl_cfg_so_a0_ms_a0, iwl_ax204_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SOF, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_MS, IWL_CFG_ANY, + IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY, + iwl_cfg_so_a0_ms_a0, iwl_ax204_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_MS, IWL_CFG_ANY, + IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY, + iwl_cfg_ma_a0_ms_a0, iwl_ax204_name), + _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY, + IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY, + IWL_CFG_RF_TYPE_MS, IWL_CFG_ANY, + IWL_CFG_160, IWL_CFG_ANY, IWL_CFG_NO_CDB, IWL_CFG_ANY, + iwl_cfg_snj_a0_ms_a0, iwl_ax204_name) #endif /* CONFIG_IWLMVM */ }; diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/internal.h b/drivers/net/wireless/intel/iwlwifi/pcie/internal.h index a43e56c7689f..f7e4f868363d 100644 --- a/drivers/net/wireless/intel/iwlwifi/pcie/internal.h +++ b/drivers/net/wireless/intel/iwlwifi/pcie/internal.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2003-2015, 2018-2021 Intel Corporation + * Copyright (C) 2003-2015, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -104,6 +104,18 @@ struct iwl_rx_completion_desc { } __packed; /** + * struct iwl_rx_completion_desc_bz - Bz completion descriptor + * @rbid: unique tag of the received buffer + * @flags: flags (0: fragmented, all others: reserved) + * @reserved: reserved + */ +struct iwl_rx_completion_desc_bz { + __le16 rbid; + u8 flags; + u8 reserved[1]; +} __packed; + +/** * struct iwl_rxq - Rx queue * @id: queue index * @bd: driver's pointer to buffer of receive buffer descriptors (rbd). @@ -133,11 +145,7 @@ struct iwl_rxq { int id; void *bd; dma_addr_t bd_dma; - union { - void *used_bd; - __le32 *bd_32; - struct iwl_rx_completion_desc *cd; - }; + void *used_bd; dma_addr_t used_bd_dma; u32 read; u32 write; @@ -262,6 +270,20 @@ enum iwl_pcie_fw_reset_state { }; /** + * enum wl_pcie_imr_status - imr dma transfer state + * @IMR_D2S_IDLE: default value of the dma transfer + * @IMR_D2S_REQUESTED: dma transfer requested + * @IMR_D2S_COMPLETED: dma transfer completed + * @IMR_D2S_ERROR: dma transfer error + */ +enum iwl_pcie_imr_status { + IMR_D2S_IDLE, + IMR_D2S_REQUESTED, + IMR_D2S_COMPLETED, + IMR_D2S_ERROR, +}; + +/** * struct iwl_trans_pcie - PCIe transport specific data * @rxq: all the RX queue data * @rx_pool: initial pool of iwl_rx_mem_buffer for all the queues @@ -319,6 +341,8 @@ enum iwl_pcie_fw_reset_state { * @alloc_page_lock: spinlock for the page allocator * @alloc_page: allocated page to still use parts of * @alloc_page_used: how much of the allocated page was already used (bytes) + * @imr_status: imr dma state machine + * @wait_queue_head_t: imr wait queue for dma completion * @rf_name: name/version of the CRF, if any */ struct iwl_trans_pcie { @@ -363,7 +387,7 @@ struct iwl_trans_pcie { /* PCI bus related data */ struct pci_dev *pci_dev; - void __iomem *hw_base; + u8 __iomem *hw_base; bool ucode_write_complete; bool sx_complete; @@ -414,7 +438,8 @@ struct iwl_trans_pcie { bool fw_reset_handshake; enum iwl_pcie_fw_reset_state fw_reset_state; wait_queue_head_t fw_reset_waitq; - + enum iwl_pcie_imr_status imr_status; + wait_queue_head_t imr_waitq; char rf_name[32]; }; @@ -809,4 +834,9 @@ int iwl_pcie_gen2_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd); +void iwl_trans_pcie_copy_imr_fh(struct iwl_trans *trans, + u32 dst_addr, u64 src_addr, u32 byte_cnt); +int iwl_trans_pcie_copy_imr(struct iwl_trans *trans, + u32 dst_addr, u64 src_addr, u32 byte_cnt); + #endif /* __iwl_trans_int_pcie_h__ */ diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/rx.c b/drivers/net/wireless/intel/iwlwifi/pcie/rx.c index 8247014278f3..68a4572cee53 100644 --- a/drivers/net/wireless/intel/iwlwifi/pcie/rx.c +++ b/drivers/net/wireless/intel/iwlwifi/pcie/rx.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2003-2014, 2018-2021 Intel Corporation + * Copyright (C) 2003-2014, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -190,11 +190,14 @@ static void iwl_pcie_rxq_inc_wr_ptr(struct iwl_trans *trans, } rxq->write_actual = round_down(rxq->write, 8); - if (trans->trans_cfg->mq_rx_supported) + if (!trans->trans_cfg->mq_rx_supported) + iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, rxq->write_actual); + else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) + iwl_write32(trans, HBUS_TARG_WRPTR, rxq->write_actual | + HBUS_TARG_WRPTR_RX_Q(rxq->id)); + else iwl_write32(trans, RFH_Q_FRBDCB_WIDX_TRG(rxq->id), rxq->write_actual); - else - iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, rxq->write_actual); } static void iwl_pcie_rxq_check_wrptr(struct iwl_trans *trans) @@ -652,23 +655,30 @@ void iwl_pcie_rx_allocator_work(struct work_struct *data) iwl_pcie_rx_allocator(trans_pcie->trans); } -static int iwl_pcie_free_bd_size(struct iwl_trans *trans, bool use_rx_td) +static int iwl_pcie_free_bd_size(struct iwl_trans *trans) { - struct iwl_rx_transfer_desc *rx_td; + if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) + return sizeof(struct iwl_rx_transfer_desc); - if (use_rx_td) - return sizeof(*rx_td); - else - return trans->trans_cfg->mq_rx_supported ? sizeof(__le64) : - sizeof(__le32); + return trans->trans_cfg->mq_rx_supported ? + sizeof(__le64) : sizeof(__le32); +} + +static int iwl_pcie_used_bd_size(struct iwl_trans *trans) +{ + if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) + return sizeof(struct iwl_rx_completion_desc_bz); + + if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) + return sizeof(struct iwl_rx_completion_desc); + + return sizeof(__le32); } static void iwl_pcie_free_rxq_dma(struct iwl_trans *trans, struct iwl_rxq *rxq) { - bool use_rx_td = (trans->trans_cfg->device_family >= - IWL_DEVICE_FAMILY_AX210); - int free_size = iwl_pcie_free_bd_size(trans, use_rx_td); + int free_size = iwl_pcie_free_bd_size(trans); if (rxq->bd) dma_free_coherent(trans->dev, @@ -682,8 +692,8 @@ static void iwl_pcie_free_rxq_dma(struct iwl_trans *trans, if (rxq->used_bd) dma_free_coherent(trans->dev, - (use_rx_td ? sizeof(*rxq->cd) : - sizeof(__le32)) * rxq->queue_size, + iwl_pcie_used_bd_size(trans) * + rxq->queue_size, rxq->used_bd, rxq->used_bd_dma); rxq->used_bd_dma = 0; rxq->used_bd = NULL; @@ -707,7 +717,7 @@ static int iwl_pcie_alloc_rxq_dma(struct iwl_trans *trans, else rxq->queue_size = RX_QUEUE_SIZE; - free_size = iwl_pcie_free_bd_size(trans, use_rx_td); + free_size = iwl_pcie_free_bd_size(trans); /* * Allocate the circular buffer of Read Buffer Descriptors @@ -720,14 +730,15 @@ static int iwl_pcie_alloc_rxq_dma(struct iwl_trans *trans, if (trans->trans_cfg->mq_rx_supported) { rxq->used_bd = dma_alloc_coherent(dev, - (use_rx_td ? sizeof(*rxq->cd) : sizeof(__le32)) * rxq->queue_size, + iwl_pcie_used_bd_size(trans) * + rxq->queue_size, &rxq->used_bd_dma, GFP_KERNEL); if (!rxq->used_bd) goto err; } - rxq->rb_stts = trans_pcie->base_rb_stts + rxq->id * rb_stts_size; + rxq->rb_stts = (u8 *)trans_pcie->base_rb_stts + rxq->id * rb_stts_size; rxq->rb_stts_dma = trans_pcie->base_rb_stts_dma + rxq->id * rb_stts_size; @@ -1307,9 +1318,7 @@ static void iwl_pcie_rx_handle_rb(struct iwl_trans *trans, "Q %d: cmd at offset %d: %s (%.2x.%2x, seq 0x%x)\n", rxq->id, offset, iwl_get_cmd_string(trans, - iwl_cmd_id(pkt->hdr.cmd, - pkt->hdr.group_id, - 0)), + WIDE_ID(pkt->hdr.group_id, pkt->hdr.cmd)), pkt->hdr.group_id, pkt->hdr.cmd, le16_to_cpu(pkt->hdr.sequence)); @@ -1319,7 +1328,7 @@ static void iwl_pcie_rx_handle_rb(struct iwl_trans *trans, offset += ALIGN(len, FH_RSCSR_FRAME_ALIGN); /* check that what the device tells us made sense */ - if (offset > max_len) + if (len < sizeof(*pkt) || offset > max_len) break; trace_iwlwifi_dev_rx(trans->dev, trans, pkt, len); @@ -1419,6 +1428,7 @@ static struct iwl_rx_mem_buffer *iwl_pcie_get_rxb(struct iwl_trans *trans, u16 vid; BUILD_BUG_ON(sizeof(struct iwl_rx_completion_desc) != 32); + BUILD_BUG_ON(sizeof(struct iwl_rx_completion_desc_bz) != 4); if (!trans->trans_cfg->mq_rx_supported) { rxb = rxq->queue[i]; @@ -1426,11 +1436,20 @@ static struct iwl_rx_mem_buffer *iwl_pcie_get_rxb(struct iwl_trans *trans, return rxb; } - if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) { - vid = le16_to_cpu(rxq->cd[i].rbid); - *join = rxq->cd[i].flags & IWL_RX_CD_FLAGS_FRAGMENTED; + if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) { + struct iwl_rx_completion_desc_bz *cd = rxq->used_bd; + + vid = le16_to_cpu(cd[i].rbid); + *join = cd[i].flags & IWL_RX_CD_FLAGS_FRAGMENTED; + } else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) { + struct iwl_rx_completion_desc *cd = rxq->used_bd; + + vid = le16_to_cpu(cd[i].rbid); + *join = cd[i].flags & IWL_RX_CD_FLAGS_FRAGMENTED; } else { - vid = le32_to_cpu(rxq->bd_32[i]) & 0x0FFF; /* 12-bit VID */ + __le32 *cd = rxq->used_bd; + + vid = le32_to_cpu(cd[i]) & 0x0FFF; /* 12-bit VID */ } if (!vid || vid > RX_POOL_SIZE(trans_pcie->num_rx_bufs)) @@ -1608,10 +1627,13 @@ irqreturn_t iwl_pcie_irq_rx_msix_handler(int irq, void *dev_id) if (WARN_ON(entry->entry >= trans->num_rx_queues)) return IRQ_NONE; - if (WARN_ONCE(!rxq, - "[%d] Got MSI-X interrupt before we have Rx queues", - entry->entry)) + if (!rxq) { + if (net_ratelimit()) + IWL_ERR(trans, + "[%d] Got MSI-X interrupt before we have Rx queues\n", + entry->entry); return IRQ_NONE; + } lock_map_acquire(&trans->sync_cmd_lockdep_map); IWL_DEBUG_ISR(trans, "[%d] Got interrupt\n", entry->entry); @@ -1954,7 +1976,7 @@ irqreturn_t iwl_pcie_irq_handler(int irq, void *dev_id) CSR_INT, CSR_INT_BIT_RX_PERIODIC); } /* Sending RX interrupt require many steps to be done in the - * the device: + * device: * 1- write interrupt to current index in ICT table. * 2- dma RX frame. * 3- update RX shared data to indicate last write index. @@ -1998,6 +2020,11 @@ irqreturn_t iwl_pcie_irq_handler(int irq, void *dev_id) /* Wake up uCode load routine, now that load is complete */ trans_pcie->ucode_write_complete = true; wake_up(&trans_pcie->ucode_write_waitq); + /* Wake up IMR write routine, now that write to SRAM is complete */ + if (trans_pcie->imr_status == IMR_D2S_REQUESTED) { + trans_pcie->imr_status = IMR_D2S_COMPLETED; + wake_up(&trans_pcie->ucode_write_waitq); + } } if (inta & ~handled) { @@ -2211,7 +2238,17 @@ irqreturn_t iwl_pcie_irq_msix_handler(int irq, void *dev_id) } /* This "Tx" DMA channel is used only for loading uCode */ - if (inta_fh & MSIX_FH_INT_CAUSES_D2S_CH0_NUM) { + if (inta_fh & MSIX_FH_INT_CAUSES_D2S_CH0_NUM && + trans_pcie->imr_status == IMR_D2S_REQUESTED) { + IWL_DEBUG_ISR(trans, "IMR Complete interrupt\n"); + isr_stats->tx++; + + /* Wake up IMR routine once write to SRAM is complete */ + if (trans_pcie->imr_status == IMR_D2S_REQUESTED) { + trans_pcie->imr_status = IMR_D2S_COMPLETED; + wake_up(&trans_pcie->ucode_write_waitq); + } + } else if (inta_fh & MSIX_FH_INT_CAUSES_D2S_CH0_NUM) { IWL_DEBUG_ISR(trans, "uCode load interrupt\n"); isr_stats->tx++; /* @@ -2220,6 +2257,12 @@ irqreturn_t iwl_pcie_irq_msix_handler(int irq, void *dev_id) */ trans_pcie->ucode_write_complete = true; wake_up(&trans_pcie->ucode_write_waitq); + + /* Wake up IMR routine once write to SRAM is complete */ + if (trans_pcie->imr_status == IMR_D2S_REQUESTED) { + trans_pcie->imr_status = IMR_D2S_COMPLETED; + wake_up(&trans_pcie->ucode_write_waitq); + } } if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) @@ -2234,7 +2277,10 @@ irqreturn_t iwl_pcie_irq_msix_handler(int irq, void *dev_id) inta_fh); isr_stats->sw++; /* during FW reset flow report errors from there */ - if (trans_pcie->fw_reset_state == FW_RESET_REQUESTED) { + if (trans_pcie->imr_status == IMR_D2S_REQUESTED) { + trans_pcie->imr_status = IMR_D2S_ERROR; + wake_up(&trans_pcie->imr_waitq); + } else if (trans_pcie->fw_reset_state == FW_RESET_REQUESTED) { trans_pcie->fw_reset_state = FW_RESET_ERROR; wake_up(&trans_pcie->fw_reset_waitq); } else { diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c index ef14584fc0a1..8be3c3c8c68b 100644 --- a/drivers/net/wireless/intel/iwlwifi/pcie/trans.c +++ b/drivers/net/wireless/intel/iwlwifi/pcie/trans.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2007-2015, 2018-2020 Intel Corporation + * Copyright (C) 2007-2015, 2018-2022 Intel Corporation * Copyright (C) 2013-2015 Intel Mobile Communications GmbH * Copyright (C) 2016-2017 Intel Deutschland GmbH */ @@ -745,7 +745,7 @@ static int iwl_pcie_load_section(struct iwl_trans *trans, u8 section_num, iwl_set_bits_prph(trans, LMPM_CHICK, LMPM_CHICK_EXTENDED_ADDR_SPACE); - memcpy(v_addr, (u8 *)section->data + offset, copy_size); + memcpy(v_addr, (const u8 *)section->data + offset, copy_size); ret = iwl_pcie_load_firmware_chunk(trans, dst_addr, p_addr, copy_size); @@ -1112,7 +1112,7 @@ static const struct iwl_causes_list causes_list_pre_bz[] = { }; static const struct iwl_causes_list causes_list_bz[] = { - {MSIX_HW_INT_CAUSES_REG_SW_ERR_BZ, CSR_MSIX_HW_INT_MASK_AD, 0x29}, + {MSIX_HW_INT_CAUSES_REG_SW_ERR_BZ, CSR_MSIX_HW_INT_MASK_AD, 0x15}, }; static void iwl_pcie_map_list(struct iwl_trans *trans, @@ -1948,6 +1948,7 @@ static void iwl_trans_pcie_configure(struct iwl_trans *trans, trans->txqs.cmd.wdg_timeout = trans_cfg->cmd_q_wdg_timeout; trans->txqs.page_offs = trans_cfg->cb_data_offs; trans->txqs.dev_cmd_offs = trans_cfg->cb_data_offs + sizeof(void *); + trans->txqs.queue_alloc_cmd_ver = trans_cfg->queue_alloc_cmd_ver; if (WARN_ON(trans_cfg->n_no_reclaim_cmds > MAX_NO_RECLAIM_CMDS)) trans_pcie->n_no_reclaim_cmds = 0; @@ -2863,7 +2864,7 @@ static ssize_t iwl_dbgfs_monitor_data_read(struct file *file, { struct iwl_trans *trans = file->private_data; struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); - void *cpu_addr = (void *)trans->dbg.fw_mon.block, *curr_buf; + u8 *cpu_addr = (void *)trans->dbg.fw_mon.block, *curr_buf; struct cont_rec *data = &trans_pcie->fw_mon_data; u32 write_ptr_addr, wrap_cnt_addr, write_ptr, wrap_cnt; ssize_t size, bytes_copied = 0; @@ -3468,7 +3469,8 @@ static void iwl_trans_pcie_sync_nmi(struct iwl_trans *trans) .d3_suspend = iwl_trans_pcie_d3_suspend, \ .d3_resume = iwl_trans_pcie_d3_resume, \ .interrupts = iwl_trans_pci_interrupts, \ - .sync_nmi = iwl_trans_pcie_sync_nmi \ + .sync_nmi = iwl_trans_pcie_sync_nmi, \ + .imr_dma_data = iwl_trans_pcie_copy_imr \ static const struct iwl_trans_ops trans_ops_pcie = { IWL_TRANS_COMMON_OPS, @@ -3553,6 +3555,7 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, mutex_init(&trans_pcie->mutex); init_waitqueue_head(&trans_pcie->ucode_write_waitq); init_waitqueue_head(&trans_pcie->fw_reset_waitq); + init_waitqueue_head(&trans_pcie->imr_waitq); trans_pcie->rba.alloc_wq = alloc_workqueue("rb_allocator", WQ_HIGHPRI | WQ_UNBOUND, 1); @@ -3681,3 +3684,41 @@ out_free_trans: iwl_trans_free(trans); return ERR_PTR(ret); } + +void iwl_trans_pcie_copy_imr_fh(struct iwl_trans *trans, + u32 dst_addr, u64 src_addr, u32 byte_cnt) +{ + iwl_write_prph(trans, IMR_UREG_CHICK, + iwl_read_prph(trans, IMR_UREG_CHICK) | + IMR_UREG_CHICK_HALT_UMAC_PERMANENTLY_MSK); + iwl_write_prph(trans, IMR_TFH_SRV_DMA_CHNL0_SRAM_ADDR, dst_addr); + iwl_write_prph(trans, IMR_TFH_SRV_DMA_CHNL0_DRAM_ADDR_LSB, + (u32)(src_addr & 0xFFFFFFFF)); + iwl_write_prph(trans, IMR_TFH_SRV_DMA_CHNL0_DRAM_ADDR_MSB, + iwl_get_dma_hi_addr(src_addr)); + iwl_write_prph(trans, IMR_TFH_SRV_DMA_CHNL0_BC, byte_cnt); + iwl_write_prph(trans, IMR_TFH_SRV_DMA_CHNL0_CTRL, + IMR_TFH_SRV_DMA_CHNL0_CTRL_D2S_IRQ_TARGET_POS | + IMR_TFH_SRV_DMA_CHNL0_CTRL_D2S_DMA_EN_POS | + IMR_TFH_SRV_DMA_CHNL0_CTRL_D2S_RS_MSK); +} + +int iwl_trans_pcie_copy_imr(struct iwl_trans *trans, + u32 dst_addr, u64 src_addr, u32 byte_cnt) +{ + struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); + int ret = -1; + + trans_pcie->imr_status = IMR_D2S_REQUESTED; + iwl_trans_pcie_copy_imr_fh(trans, dst_addr, src_addr, byte_cnt); + ret = wait_event_timeout(trans_pcie->imr_waitq, + trans_pcie->imr_status != + IMR_D2S_REQUESTED, 5 * HZ); + if (!ret || trans_pcie->imr_status == IMR_D2S_ERROR) { + IWL_ERR(trans, "Failed to copy IMR Memory chunk!\n"); + iwl_trans_pcie_dump_regs(trans); + return -ETIMEDOUT; + } + trans_pcie->imr_status = IMR_D2S_IDLE; + return 0; +} diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c b/drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c index 34bde8c87324..c72a84d8bb4f 100644 --- a/drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c +++ b/drivers/net/wireless/intel/iwlwifi/pcie/tx-gen2.c @@ -213,7 +213,7 @@ int iwl_pcie_gen2_enqueue_hcmd(struct iwl_trans *trans, /* map the remaining (adjusted) nocopy/dup fragments */ for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) { - const void *data = cmddata[i]; + void *data = (void *)(uintptr_t)cmddata[i]; if (!cmdlen[i]) continue; @@ -222,7 +222,7 @@ int iwl_pcie_gen2_enqueue_hcmd(struct iwl_trans *trans, continue; if (cmd->dataflags[i] & IWL_HCMD_DFL_DUP) data = dup_buf; - phys_addr = dma_map_single(trans->dev, (void *)data, + phys_addr = dma_map_single(trans->dev, data, cmdlen[i], DMA_TO_DEVICE); if (dma_mapping_error(trans->dev, phys_addr)) { idx = -ENOMEM; diff --git a/drivers/net/wireless/intel/iwlwifi/pcie/tx.c b/drivers/net/wireless/intel/iwlwifi/pcie/tx.c index 4f6c187eed69..3546c5269c3b 100644 --- a/drivers/net/wireless/intel/iwlwifi/pcie/tx.c +++ b/drivers/net/wireless/intel/iwlwifi/pcie/tx.c @@ -154,7 +154,7 @@ static int iwl_pcie_txq_build_tfd(struct iwl_trans *trans, struct iwl_txq *txq, void *tfd; u32 num_tbs; - tfd = txq->tfds + trans->txqs.tfd.size * txq->write_ptr; + tfd = (u8 *)txq->tfds + trans->txqs.tfd.size * txq->write_ptr; if (reset) memset(tfd, 0, trans->txqs.tfd.size); @@ -540,7 +540,7 @@ static int iwl_pcie_tx_alloc(struct iwl_trans *trans) trans->cfg->min_txq_size); else slots_num = max_t(u32, IWL_DEFAULT_QUEUE_SIZE, - trans->cfg->min_256_ba_txq_size); + trans->cfg->min_ba_txq_size); trans->txqs.txq[txq_id] = &trans_pcie->txq_memory[txq_id]; ret = iwl_txq_alloc(trans, trans->txqs.txq[txq_id], slots_num, cmd_queue); @@ -594,7 +594,7 @@ int iwl_pcie_tx_init(struct iwl_trans *trans) trans->cfg->min_txq_size); else slots_num = max_t(u32, IWL_DEFAULT_QUEUE_SIZE, - trans->cfg->min_256_ba_txq_size); + trans->cfg->min_ba_txq_size); ret = iwl_txq_init(trans, trans->txqs.txq[txq_id], slots_num, cmd_queue); if (ret) { @@ -877,7 +877,7 @@ void iwl_trans_pcie_txq_disable(struct iwl_trans *trans, int txq_id, if (configure_scd) { iwl_scd_txq_set_inactive(trans, txq_id); - iwl_trans_write_mem(trans, stts_addr, (void *)zero_val, + iwl_trans_write_mem(trans, stts_addr, (const void *)zero_val, ARRAY_SIZE(zero_val)); } @@ -1114,7 +1114,7 @@ int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans, /* map the remaining (adjusted) nocopy/dup fragments */ for (i = 0; i < IWL_MAX_CMD_TBS_PER_TFD; i++) { - const void *data = cmddata[i]; + void *data = (void *)(uintptr_t)cmddata[i]; if (!cmdlen[i]) continue; @@ -1123,7 +1123,7 @@ int iwl_pcie_enqueue_hcmd(struct iwl_trans *trans, continue; if (cmd->dataflags[i] & IWL_HCMD_DFL_DUP) data = dup_buf; - phys_addr = dma_map_single(trans->dev, (void *)data, + phys_addr = dma_map_single(trans->dev, data, cmdlen[i], DMA_TO_DEVICE); if (dma_mapping_error(trans->dev, phys_addr)) { iwl_txq_gen1_tfd_unmap(trans, out_meta, txq, @@ -1201,7 +1201,7 @@ void iwl_pcie_hcmd_complete(struct iwl_trans *trans, cmd = txq->entries[cmd_index].cmd; meta = &txq->entries[cmd_index].meta; group_id = cmd->hdr.group_id; - cmd_id = iwl_cmd_id(cmd->hdr.cmd, group_id, 0); + cmd_id = WIDE_ID(group_id, cmd->hdr.cmd); iwl_txq_gen1_tfd_unmap(trans, meta, txq, index); diff --git a/drivers/net/wireless/intel/iwlwifi/queue/tx.c b/drivers/net/wireless/intel/iwlwifi/queue/tx.c index 0730657d54bf..726185d6fab8 100644 --- a/drivers/net/wireless/intel/iwlwifi/queue/tx.c +++ b/drivers/net/wireless/intel/iwlwifi/queue/tx.c @@ -1,13 +1,15 @@ // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* - * Copyright (C) 2020-2021 Intel Corporation + * Copyright (C) 2020-2022 Intel Corporation */ #include <net/tso.h> #include <linux/tcp.h> #include "iwl-debug.h" #include "iwl-io.h" +#include "fw/api/commands.h" #include "fw/api/tx.h" +#include "fw/api/datapath.h" #include "queue/tx.h" #include "iwl-fh.h" #include "iwl-scd.h" @@ -41,13 +43,13 @@ static void iwl_pcie_gen2_update_byte_tbl(struct iwl_trans *trans, num_fetch_chunks = DIV_ROUND_UP(filled_tfd_size, 64) - 1; if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) { - struct iwl_gen3_bc_tbl *scd_bc_tbl_gen3 = txq->bc_tbl.addr; + struct iwl_gen3_bc_tbl_entry *scd_bc_tbl_gen3 = txq->bc_tbl.addr; /* Starting from AX210, the HW expects bytes */ WARN_ON(trans->txqs.bc_table_dword); WARN_ON(len > 0x3FFF); bc_ent = cpu_to_le16(len | (num_fetch_chunks << 14)); - scd_bc_tbl_gen3->tfd_offset[idx] = bc_ent; + scd_bc_tbl_gen3[idx].tfd_offset = bc_ent; } else { struct iwlagn_scd_bc_tbl *scd_bc_tbl = txq->bc_tbl.addr; @@ -189,7 +191,7 @@ static struct page *get_workaround_page(struct iwl_trans *trans, return NULL; /* set the chaining pointer to the previous page if there */ - *(void **)(page_address(ret) + PAGE_SIZE - sizeof(void *)) = *page_ptr; + *(void **)((u8 *)page_address(ret) + PAGE_SIZE - sizeof(void *)) = *page_ptr; *page_ptr = ret; return ret; @@ -314,7 +316,7 @@ alloc: return NULL; p->pos = page_address(p->page); /* set the chaining pointer to NULL */ - *(void **)(page_address(p->page) + PAGE_SIZE - sizeof(void *)) = NULL; + *(void **)((u8 *)page_address(p->page) + PAGE_SIZE - sizeof(void *)) = NULL; out: *page_ptr = p->page; get_page(p->page); @@ -963,7 +965,7 @@ void iwl_txq_free_tso_page(struct iwl_trans *trans, struct sk_buff *skb) while (next) { struct page *tmp = next; - next = *(void **)(page_address(next) + PAGE_SIZE - + next = *(void **)((u8 *)page_address(next) + PAGE_SIZE - sizeof(void *)); __free_page(tmp); } @@ -1083,9 +1085,8 @@ error: return -ENOMEM; } -static int iwl_txq_dyn_alloc_dma(struct iwl_trans *trans, - struct iwl_txq **intxq, int size, - unsigned int timeout) +static struct iwl_txq * +iwl_txq_dyn_alloc_dma(struct iwl_trans *trans, int size, unsigned int timeout) { size_t bc_tbl_size, bc_tbl_entries; struct iwl_txq *txq; @@ -1097,18 +1098,18 @@ static int iwl_txq_dyn_alloc_dma(struct iwl_trans *trans, bc_tbl_entries = bc_tbl_size / sizeof(u16); if (WARN_ON(size > bc_tbl_entries)) - return -EINVAL; + return ERR_PTR(-EINVAL); txq = kzalloc(sizeof(*txq), GFP_KERNEL); if (!txq) - return -ENOMEM; + return ERR_PTR(-ENOMEM); txq->bc_tbl.addr = dma_pool_alloc(trans->txqs.bc_pool, GFP_KERNEL, &txq->bc_tbl.dma); if (!txq->bc_tbl.addr) { IWL_ERR(trans, "Scheduler BC Table allocation failed\n"); kfree(txq); - return -ENOMEM; + return ERR_PTR(-ENOMEM); } ret = iwl_txq_alloc(trans, txq, size, false); @@ -1124,12 +1125,11 @@ static int iwl_txq_dyn_alloc_dma(struct iwl_trans *trans, txq->wd_timeout = msecs_to_jiffies(timeout); - *intxq = txq; - return 0; + return txq; error: iwl_txq_gen2_free_memory(trans, txq); - return ret; + return ERR_PTR(ret); } static int iwl_txq_alloc_response(struct iwl_trans *trans, struct iwl_txq *txq, @@ -1186,30 +1186,61 @@ error_free_resp: return ret; } -int iwl_txq_dyn_alloc(struct iwl_trans *trans, __le16 flags, u8 sta_id, u8 tid, - int cmd_id, int size, unsigned int timeout) +int iwl_txq_dyn_alloc(struct iwl_trans *trans, u32 flags, u32 sta_mask, + u8 tid, int size, unsigned int timeout) { - struct iwl_txq *txq = NULL; - struct iwl_tx_queue_cfg_cmd cmd = { - .flags = flags, - .sta_id = sta_id, - .tid = tid, - }; + struct iwl_txq *txq; + union { + struct iwl_tx_queue_cfg_cmd old; + struct iwl_scd_queue_cfg_cmd new; + } cmd; struct iwl_host_cmd hcmd = { - .id = cmd_id, - .len = { sizeof(cmd) }, - .data = { &cmd, }, .flags = CMD_WANT_SKB, }; int ret; - ret = iwl_txq_dyn_alloc_dma(trans, &txq, size, timeout); - if (ret) - return ret; + if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_BZ && + trans->hw_rev_step == SILICON_A_STEP) + size = 4096; + + txq = iwl_txq_dyn_alloc_dma(trans, size, timeout); + if (IS_ERR(txq)) + return PTR_ERR(txq); - cmd.tfdq_addr = cpu_to_le64(txq->dma_addr); - cmd.byte_cnt_addr = cpu_to_le64(txq->bc_tbl.dma); - cmd.cb_size = cpu_to_le32(TFD_QUEUE_CB_SIZE(size)); + if (trans->txqs.queue_alloc_cmd_ver == 0) { + memset(&cmd.old, 0, sizeof(cmd.old)); + cmd.old.tfdq_addr = cpu_to_le64(txq->dma_addr); + cmd.old.byte_cnt_addr = cpu_to_le64(txq->bc_tbl.dma); + cmd.old.cb_size = cpu_to_le32(TFD_QUEUE_CB_SIZE(size)); + cmd.old.flags = cpu_to_le16(flags | TX_QUEUE_CFG_ENABLE_QUEUE); + cmd.old.tid = tid; + + if (hweight32(sta_mask) != 1) { + ret = -EINVAL; + goto error; + } + cmd.old.sta_id = ffs(sta_mask) - 1; + + hcmd.id = SCD_QUEUE_CFG; + hcmd.len[0] = sizeof(cmd.old); + hcmd.data[0] = &cmd.old; + } else if (trans->txqs.queue_alloc_cmd_ver == 3) { + memset(&cmd.new, 0, sizeof(cmd.new)); + cmd.new.operation = cpu_to_le32(IWL_SCD_QUEUE_ADD); + cmd.new.u.add.tfdq_dram_addr = cpu_to_le64(txq->dma_addr); + cmd.new.u.add.bc_dram_addr = cpu_to_le64(txq->bc_tbl.dma); + cmd.new.u.add.cb_size = cpu_to_le32(TFD_QUEUE_CB_SIZE(size)); + cmd.new.u.add.flags = cpu_to_le32(flags); + cmd.new.u.add.sta_mask = cpu_to_le32(sta_mask); + cmd.new.u.add.tid = tid; + + hcmd.id = WIDE_ID(DATA_PATH_GROUP, SCD_QUEUE_CONFIG_CMD); + hcmd.len[0] = sizeof(cmd.new); + hcmd.data[0] = &cmd.new; + } else { + ret = -EOPNOTSUPP; + goto error; + } ret = iwl_trans_send_cmd(trans, &hcmd); if (ret) @@ -1307,10 +1338,10 @@ static inline dma_addr_t iwl_txq_gen1_tfd_tb_get_addr(struct iwl_trans *trans, dma_addr_t hi_len; if (trans->trans_cfg->use_tfh) { - struct iwl_tfh_tfd *tfd = _tfd; - struct iwl_tfh_tb *tb = &tfd->tbs[idx]; + struct iwl_tfh_tfd *tfh_tfd = _tfd; + struct iwl_tfh_tb *tfh_tb = &tfh_tfd->tbs[idx]; - return (dma_addr_t)(le64_to_cpu(tb->addr)); + return (dma_addr_t)(le64_to_cpu(tfh_tb->addr)); } tfd = _tfd; diff --git a/drivers/net/wireless/intel/iwlwifi/queue/tx.h b/drivers/net/wireless/intel/iwlwifi/queue/tx.h index 20efc62acf13..eca53bfd326d 100644 --- a/drivers/net/wireless/intel/iwlwifi/queue/tx.h +++ b/drivers/net/wireless/intel/iwlwifi/queue/tx.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ /* - * Copyright (C) 2020-2021 Intel Corporation + * Copyright (C) 2020-2022 Intel Corporation */ #ifndef __iwl_trans_queue_tx_h__ #define __iwl_trans_queue_tx_h__ @@ -41,7 +41,7 @@ static inline void *iwl_txq_get_tfd(struct iwl_trans *trans, if (trans->trans_cfg->use_tfh) idx = iwl_txq_get_cmd_index(txq, idx); - return txq->tfds + trans->txqs.tfd.size * idx; + return (u8 *)txq->tfds + trans->txqs.tfd.size * idx; } int iwl_txq_alloc(struct iwl_trans *trans, struct iwl_txq *txq, int slots_num, @@ -112,10 +112,9 @@ void iwl_txq_gen2_tfd_unmap(struct iwl_trans *trans, struct iwl_cmd_meta *meta, struct iwl_tfh_tfd *tfd); -int iwl_txq_dyn_alloc(struct iwl_trans *trans, - __le16 flags, u8 sta_id, u8 tid, - int cmd_id, int size, - unsigned int timeout); +int iwl_txq_dyn_alloc(struct iwl_trans *trans, u32 flags, + u32 sta_mask, u8 tid, + int size, unsigned int timeout); int iwl_txq_gen2_tx(struct iwl_trans *trans, struct sk_buff *skb, struct iwl_device_tx_cmd *dev_cmd, int txq_id); @@ -137,9 +136,9 @@ static inline u8 iwl_txq_gen1_tfd_get_num_tbs(struct iwl_trans *trans, struct iwl_tfd *tfd; if (trans->trans_cfg->use_tfh) { - struct iwl_tfh_tfd *tfd = _tfd; + struct iwl_tfh_tfd *tfh_tfd = _tfd; - return le16_to_cpu(tfd->num_tbs) & 0x1f; + return le16_to_cpu(tfh_tfd->num_tbs) & 0x1f; } tfd = (struct iwl_tfd *)_tfd; @@ -153,10 +152,10 @@ static inline u16 iwl_txq_gen1_tfd_tb_get_len(struct iwl_trans *trans, struct iwl_tfd_tb *tb; if (trans->trans_cfg->use_tfh) { - struct iwl_tfh_tfd *tfd = _tfd; - struct iwl_tfh_tb *tb = &tfd->tbs[idx]; + struct iwl_tfh_tfd *tfh_tfd = _tfd; + struct iwl_tfh_tb *tfh_tb = &tfh_tfd->tbs[idx]; - return le16_to_cpu(tb->tb_len); + return le16_to_cpu(tfh_tb->tb_len); } tfd = (struct iwl_tfd *)_tfd; diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c index fc5725f6daee..28bfa7b7b73c 100644 --- a/drivers/net/wireless/mac80211_hwsim.c +++ b/drivers/net/wireless/mac80211_hwsim.c @@ -4,7 +4,7 @@ * Copyright (c) 2008, Jouni Malinen <j@w1.fi> * Copyright (c) 2011, Javier Lopez <jlopex@gmail.com> * Copyright (c) 2016 - 2017 Intel Deutschland GmbH - * Copyright (C) 2018 - 2020 Intel Corporation + * Copyright (C) 2018 - 2022 Intel Corporation */ /* @@ -173,9 +173,23 @@ static const struct ieee80211_regdomain hwsim_world_regdom_custom_02 = { } }; +static const struct ieee80211_regdomain hwsim_world_regdom_custom_03 = { + .n_reg_rules = 6, + .alpha2 = "99", + .reg_rules = { + REG_RULE(2412 - 10, 2462 + 10, 40, 0, 20, 0), + REG_RULE(2484 - 10, 2484 + 10, 40, 0, 20, 0), + REG_RULE(5150 - 10, 5240 + 10, 40, 0, 30, 0), + REG_RULE(5745 - 10, 5825 + 10, 40, 0, 30, 0), + REG_RULE(5855 - 10, 5925 + 10, 40, 0, 33, 0), + REG_RULE(5955 - 10, 7125 + 10, 320, 0, 33, 0), + } +}; + static const struct ieee80211_regdomain *hwsim_world_regdom_custom[] = { &hwsim_world_regdom_custom_01, &hwsim_world_regdom_custom_02, + &hwsim_world_regdom_custom_03, }; struct hwsim_vif_priv { @@ -475,16 +489,16 @@ static const struct ieee80211_sta_s1g_cap hwsim_s1g_cap = { 0 }, }; -static void hwsim_init_s1g_channels(struct ieee80211_channel *channels) +static void hwsim_init_s1g_channels(struct ieee80211_channel *chans) { int ch, freq; for (ch = 0; ch < NUM_S1G_CHANS_US; ch++) { freq = 902000 + (ch + 1) * 500; - channels[ch].band = NL80211_BAND_S1GHZ; - channels[ch].center_freq = KHZ_TO_MHZ(freq); - channels[ch].freq_offset = freq % 1000; - channels[ch].hw_value = ch + 1; + chans[ch].band = NL80211_BAND_S1GHZ; + chans[ch].center_freq = KHZ_TO_MHZ(freq); + chans[ch].freq_offset = freq % 1000; + chans[ch].hw_value = ch + 1; } } @@ -503,6 +517,8 @@ static const struct ieee80211_rate hwsim_rates[] = { { .bitrate = 540 } }; +#define DEFAULT_RX_RSSI -50 + static const u32 hwsim_ciphers[] = { WLAN_CIPHER_SUITE_WEP40, WLAN_CIPHER_SUITE_WEP104, @@ -652,6 +668,7 @@ struct mac80211_hwsim_data { ARRAY_SIZE(hwsim_channels_6ghz)]; struct ieee80211_channel *channel; + enum nl80211_chan_width bw; u64 beacon_int /* beacon interval in us */; unsigned int rx_filter; bool started, idle, scanning; @@ -690,6 +707,9 @@ struct mac80211_hwsim_data { u64 rx_bytes; u64 tx_dropped; u64 tx_failed; + + /* RSSI in rx status of the receiver */ + int rx_rssi; }; static const struct rhashtable_params hwsim_rht_params = { @@ -803,6 +823,40 @@ extern int hwsim_tx_virtio(struct mac80211_hwsim_data *data, #define hwsim_virtio_enabled false #endif +static int hwsim_get_chanwidth(enum nl80211_chan_width bw) +{ + switch (bw) { + case NL80211_CHAN_WIDTH_20_NOHT: + case NL80211_CHAN_WIDTH_20: + return 20; + case NL80211_CHAN_WIDTH_40: + return 40; + case NL80211_CHAN_WIDTH_80: + return 80; + case NL80211_CHAN_WIDTH_80P80: + case NL80211_CHAN_WIDTH_160: + return 160; + case NL80211_CHAN_WIDTH_320: + return 320; + case NL80211_CHAN_WIDTH_5: + return 5; + case NL80211_CHAN_WIDTH_10: + return 10; + case NL80211_CHAN_WIDTH_1: + return 1; + case NL80211_CHAN_WIDTH_2: + return 2; + case NL80211_CHAN_WIDTH_4: + return 4; + case NL80211_CHAN_WIDTH_8: + return 8; + case NL80211_CHAN_WIDTH_16: + return 16; + } + + return INT_MAX; +} + static void mac80211_hwsim_tx_frame(struct ieee80211_hw *hw, struct sk_buff *skb, struct ieee80211_channel *chan); @@ -964,6 +1018,29 @@ DEFINE_DEBUGFS_ATTRIBUTE(hwsim_fops_group, hwsim_fops_group_read, hwsim_fops_group_write, "%llx\n"); +static int hwsim_fops_rx_rssi_read(void *dat, u64 *val) +{ + struct mac80211_hwsim_data *data = dat; + *val = data->rx_rssi; + return 0; +} + +static int hwsim_fops_rx_rssi_write(void *dat, u64 val) +{ + struct mac80211_hwsim_data *data = dat; + int rssi = (int)val; + + if (rssi >= 0 || rssi < -100) + return -EINVAL; + + data->rx_rssi = rssi; + return 0; +} + +DEFINE_DEBUGFS_ATTRIBUTE(hwsim_fops_rx_rssi, + hwsim_fops_rx_rssi_read, hwsim_fops_rx_rssi_write, + "%lld\n"); + static netdev_tx_t hwsim_mon_xmit(struct sk_buff *skb, struct net_device *dev) { @@ -1482,8 +1559,8 @@ static bool mac80211_hwsim_tx_frame_no_nl(struct ieee80211_hw *hw, rx_status.bw = RATE_INFO_BW_20; if (info->control.rates[0].flags & IEEE80211_TX_RC_SHORT_GI) rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI; - /* TODO: simulate real signal strength (and optional packet loss) */ - rx_status.signal = -50; + /* TODO: simulate optional packet loss */ + rx_status.signal = data->rx_rssi; if (info->control.vif) rx_status.signal += info->control.vif->bss_conf.txpower; @@ -1595,7 +1672,8 @@ static void mac80211_hwsim_tx(struct ieee80211_hw *hw, struct ieee80211_chanctx_conf *chanctx_conf; struct ieee80211_channel *channel; bool ack; - u32 _portid; + enum nl80211_chan_width confbw = NL80211_CHAN_WIDTH_20_NOHT; + u32 _portid, i; if (WARN_ON(skb->len < 10)) { /* Should not happen; just a sanity check for addr1 use */ @@ -1605,14 +1683,17 @@ static void mac80211_hwsim_tx(struct ieee80211_hw *hw, if (!data->use_chanctx) { channel = data->channel; + confbw = data->bw; } else if (txi->hw_queue == 4) { channel = data->tmp_chan; } else { chanctx_conf = rcu_dereference(txi->control.vif->chanctx_conf); - if (chanctx_conf) + if (chanctx_conf) { channel = chanctx_conf->def.chan; - else + confbw = chanctx_conf->def.width; + } else { channel = NULL; + } } if (WARN(!channel, "TX w/o channel - queue = %d\n", txi->hw_queue)) { @@ -1636,6 +1717,25 @@ static void mac80211_hwsim_tx(struct ieee80211_hw *hw, txi->control.rates, ARRAY_SIZE(txi->control.rates)); + for (i = 0; i < ARRAY_SIZE(txi->control.rates); i++) { + u16 rflags = txi->control.rates[i].flags; + /* initialize to data->bw for 5/10 MHz handling */ + enum nl80211_chan_width bw = data->bw; + + if (txi->control.rates[i].idx == -1) + break; + + if (rflags & IEEE80211_TX_RC_40_MHZ_WIDTH) + bw = NL80211_CHAN_WIDTH_40; + else if (rflags & IEEE80211_TX_RC_80_MHZ_WIDTH) + bw = NL80211_CHAN_WIDTH_80; + else if (rflags & IEEE80211_TX_RC_160_MHZ_WIDTH) + bw = NL80211_CHAN_WIDTH_160; + + if (WARN_ON(hwsim_get_chanwidth(bw) > hwsim_get_chanwidth(confbw))) + return; + } + if (skb->len >= 24 + 8 && ieee80211_is_probe_resp(hdr->frame_control)) { /* fake header transmission time */ @@ -1935,6 +2035,7 @@ static int mac80211_hwsim_config(struct ieee80211_hw *hw, u32 changed) } data->channel = conf->chandef.chan; + data->bw = conf->chandef.width; for (idx = 0; idx < ARRAY_SIZE(data->survey_data); idx++) { if (data->survey_data[idx].channel && @@ -1946,6 +2047,7 @@ static int mac80211_hwsim_config(struct ieee80211_hw *hw, u32 changed) } } else { data->channel = conf->chandef.chan; + data->bw = conf->chandef.width; } mutex_unlock(&data->mutex); @@ -2077,12 +2179,49 @@ static void mac80211_hwsim_bss_info_changed(struct ieee80211_hw *hw, wiphy_dbg(hw->wiphy, " TX Power: %d dBm\n", info->txpower); } +static void +mac80211_hwsim_sta_rc_update(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta, + u32 changed) +{ + struct mac80211_hwsim_data *data = hw->priv; + u32 bw = U32_MAX; + enum nl80211_chan_width confbw = NL80211_CHAN_WIDTH_20_NOHT; + + switch (sta->bandwidth) { +#define C(_bw) case IEEE80211_STA_RX_BW_##_bw: bw = _bw; break + C(20); + C(40); + C(80); + C(160); + C(320); +#undef C + } + + if (!data->use_chanctx) { + confbw = data->bw; + } else { + struct ieee80211_chanctx_conf *chanctx_conf = + rcu_dereference(vif->chanctx_conf); + + if (!WARN_ON(!chanctx_conf)) + confbw = chanctx_conf->def.width; + } + + WARN(bw > hwsim_get_chanwidth(confbw), + "intf %pM: bad STA %pM bandwidth %d MHz (%d) > channel config %d MHz (%d)\n", + vif->addr, sta->addr, bw, sta->bandwidth, + hwsim_get_chanwidth(data->bw), data->bw); +} + static int mac80211_hwsim_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { hwsim_check_magic(vif); hwsim_set_sta_magic(sta); + mac80211_hwsim_sta_rc_update(hw, vif, sta, 0); return 0; } @@ -2658,6 +2797,7 @@ static int mac80211_hwsim_tx_last_beacon(struct ieee80211_hw *hw) .sta_add = mac80211_hwsim_sta_add, \ .sta_remove = mac80211_hwsim_sta_remove, \ .sta_notify = mac80211_hwsim_sta_notify, \ + .sta_rc_update = mac80211_hwsim_sta_rc_update, \ .set_tim = mac80211_hwsim_set_tim, \ .conf_tx = mac80211_hwsim_conf_tx, \ .get_survey = mac80211_hwsim_get_survey, \ @@ -2809,7 +2949,7 @@ out_err: nlmsg_free(mcast_skb); } -static const struct ieee80211_sband_iftype_data he_capa_2ghz[] = { +static const struct ieee80211_sband_iftype_data sband_capa_2ghz[] = { { .types_mask = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP), @@ -2855,6 +2995,66 @@ static const struct ieee80211_sband_iftype_data he_capa_2ghz[] = { .tx_mcs_80p80 = cpu_to_le16(0xffff), }, }, + .eht_cap = { + .has_eht = true, + .eht_cap_elem = { + .mac_cap_info[0] = + IEEE80211_EHT_MAC_CAP0_NSEP_PRIO_ACCESS | + IEEE80211_EHT_MAC_CAP0_OM_CONTROL | + IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1, + .phy_cap_info[0] = + IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | + IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI | + IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO | + IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER | + IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE, + .phy_cap_info[3] = + IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK | + IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK | + IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK | + IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK | + IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK | + IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK | + IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK, + .phy_cap_info[4] = + IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO | + IEEE80211_EHT_PHY_CAP4_PSR_SR_SUPP | + IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP | + IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI | + IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK, + .phy_cap_info[5] = + IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK | + IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP | + IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP | + IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT | + IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK | + IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK, + .phy_cap_info[6] = + IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK | + IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK, + .phy_cap_info[7] = + IEEE80211_EHT_PHY_CAP7_20MHZ_STA_RX_NDP_WIDER_BW, + }, + + /* For all MCS and bandwidth, set 8 NSS for both Tx and + * Rx + */ + .eht_mcs_nss_supp = { + /* + * Since B0, B1, B2 and B3 are not set in + * the supported channel width set field in the + * HE PHY capabilities information field the + * device is a 20MHz only device on 2.4GHz band. + */ + .only_20mhz = { + .rx_tx_mcs7_max_nss = 0x88, + .rx_tx_mcs9_max_nss = 0x88, + .rx_tx_mcs11_max_nss = 0x88, + .rx_tx_mcs13_max_nss = 0x88, + }, + }, + /* PPE threshold information is not supported */ + }, }, #ifdef CONFIG_MAC80211_MESH { @@ -2897,7 +3097,7 @@ static const struct ieee80211_sband_iftype_data he_capa_2ghz[] = { #endif }; -static const struct ieee80211_sband_iftype_data he_capa_5ghz[] = { +static const struct ieee80211_sband_iftype_data sband_capa_5ghz[] = { { /* TODO: should we support other types, e.g., P2P?*/ .types_mask = BIT(NL80211_IFTYPE_STATION) | @@ -2948,6 +3148,81 @@ static const struct ieee80211_sband_iftype_data he_capa_5ghz[] = { .tx_mcs_80p80 = cpu_to_le16(0xfffa), }, }, + .eht_cap = { + .has_eht = true, + .eht_cap_elem = { + .mac_cap_info[0] = + IEEE80211_EHT_MAC_CAP0_NSEP_PRIO_ACCESS | + IEEE80211_EHT_MAC_CAP0_OM_CONTROL | + IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1, + .phy_cap_info[0] = + IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | + IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI | + IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO | + IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER | + IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE | + IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK, + .phy_cap_info[1] = + IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK | + IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK, + .phy_cap_info[2] = + IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_80MHZ_MASK | + IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_160MHZ_MASK, + .phy_cap_info[3] = + IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK | + IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK | + IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK | + IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK | + IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK | + IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK | + IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK, + .phy_cap_info[4] = + IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO | + IEEE80211_EHT_PHY_CAP4_PSR_SR_SUPP | + IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP | + IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI | + IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK, + .phy_cap_info[5] = + IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK | + IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP | + IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP | + IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT | + IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK | + IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK, + .phy_cap_info[6] = + IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK | + IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK, + .phy_cap_info[7] = + IEEE80211_EHT_PHY_CAP7_20MHZ_STA_RX_NDP_WIDER_BW | + IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_80MHZ | + IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_160MHZ | + IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_80MHZ | + IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_160MHZ, + }, + + /* For all MCS and bandwidth, set 8 NSS for both Tx and + * Rx + */ + .eht_mcs_nss_supp = { + /* + * As B1 and B2 are set in the supported + * channel width set field in the HE PHY + * capabilities information field include all + * the following MCS/NSS. + */ + .bw._80 = { + .rx_tx_mcs9_max_nss = 0x88, + .rx_tx_mcs11_max_nss = 0x88, + .rx_tx_mcs13_max_nss = 0x88, + }, + .bw._160 = { + .rx_tx_mcs9_max_nss = 0x88, + .rx_tx_mcs11_max_nss = 0x88, + .rx_tx_mcs13_max_nss = 0x88, + }, + }, + /* PPE threshold information is not supported */ + }, }, #ifdef CONFIG_MAC80211_MESH { @@ -2995,7 +3270,7 @@ static const struct ieee80211_sband_iftype_data he_capa_5ghz[] = { #endif }; -static const struct ieee80211_sband_iftype_data he_capa_6ghz[] = { +static const struct ieee80211_sband_iftype_data sband_capa_6ghz[] = { { /* TODO: should we support other types, e.g., P2P?*/ .types_mask = BIT(NL80211_IFTYPE_STATION) | @@ -3055,6 +3330,93 @@ static const struct ieee80211_sband_iftype_data he_capa_6ghz[] = { .tx_mcs_80p80 = cpu_to_le16(0xfffa), }, }, + .eht_cap = { + .has_eht = true, + .eht_cap_elem = { + .mac_cap_info[0] = + IEEE80211_EHT_MAC_CAP0_NSEP_PRIO_ACCESS | + IEEE80211_EHT_MAC_CAP0_OM_CONTROL | + IEEE80211_EHT_MAC_CAP0_TRIG_TXOP_SHARING_MODE1, + .phy_cap_info[0] = + IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ | + IEEE80211_EHT_PHY_CAP0_242_TONE_RU_GT20MHZ | + IEEE80211_EHT_PHY_CAP0_NDP_4_EHT_LFT_32_GI | + IEEE80211_EHT_PHY_CAP0_PARTIAL_BW_UL_MU_MIMO | + IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMER | + IEEE80211_EHT_PHY_CAP0_SU_BEAMFORMEE | + IEEE80211_EHT_PHY_CAP0_BEAMFORMEE_SS_80MHZ_MASK, + .phy_cap_info[1] = + IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_80MHZ_MASK | + IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_160MHZ_MASK | + IEEE80211_EHT_PHY_CAP1_BEAMFORMEE_SS_320MHZ_MASK, + .phy_cap_info[2] = + IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_80MHZ_MASK | + IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_160MHZ_MASK | + IEEE80211_EHT_PHY_CAP2_SOUNDING_DIM_320MHZ_MASK, + .phy_cap_info[3] = + IEEE80211_EHT_PHY_CAP3_NG_16_SU_FEEDBACK | + IEEE80211_EHT_PHY_CAP3_NG_16_MU_FEEDBACK | + IEEE80211_EHT_PHY_CAP3_CODEBOOK_4_2_SU_FDBK | + IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK | + IEEE80211_EHT_PHY_CAP3_TRIG_SU_BF_FDBK | + IEEE80211_EHT_PHY_CAP3_TRIG_MU_BF_PART_BW_FDBK | + IEEE80211_EHT_PHY_CAP3_TRIG_CQI_FDBK, + .phy_cap_info[4] = + IEEE80211_EHT_PHY_CAP4_PART_BW_DL_MU_MIMO | + IEEE80211_EHT_PHY_CAP4_PSR_SR_SUPP | + IEEE80211_EHT_PHY_CAP4_POWER_BOOST_FACT_SUPP | + IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI | + IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK, + .phy_cap_info[5] = + IEEE80211_EHT_PHY_CAP5_NON_TRIG_CQI_FEEDBACK | + IEEE80211_EHT_PHY_CAP5_TX_LESS_242_TONE_RU_SUPP | + IEEE80211_EHT_PHY_CAP5_RX_LESS_242_TONE_RU_SUPP | + IEEE80211_EHT_PHY_CAP5_PPE_THRESHOLD_PRESENT | + IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK | + IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK, + .phy_cap_info[6] = + IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK | + IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK | + IEEE80211_EHT_PHY_CAP6_EHT_DUP_6GHZ_SUPP, + .phy_cap_info[7] = + IEEE80211_EHT_PHY_CAP7_20MHZ_STA_RX_NDP_WIDER_BW | + IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_80MHZ | + IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_160MHZ | + IEEE80211_EHT_PHY_CAP7_NON_OFDMA_UL_MU_MIMO_320MHZ | + IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_80MHZ | + IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_160MHZ | + IEEE80211_EHT_PHY_CAP7_MU_BEAMFORMER_320MHZ, + }, + + /* For all MCS and bandwidth, set 8 NSS for both Tx and + * Rx + */ + .eht_mcs_nss_supp = { + /* + * As B1 and B2 are set in the supported + * channel width set field in the HE PHY + * capabilities information field and 320MHz in + * 6GHz is supported include all the following + * MCS/NSS. + */ + .bw._80 = { + .rx_tx_mcs9_max_nss = 0x88, + .rx_tx_mcs11_max_nss = 0x88, + .rx_tx_mcs13_max_nss = 0x88, + }, + .bw._160 = { + .rx_tx_mcs9_max_nss = 0x88, + .rx_tx_mcs11_max_nss = 0x88, + .rx_tx_mcs13_max_nss = 0x88, + }, + .bw._320 = { + .rx_tx_mcs9_max_nss = 0x88, + .rx_tx_mcs11_max_nss = 0x88, + .rx_tx_mcs13_max_nss = 0x88, + }, + }, + /* PPE threshold information is not supported */ + }, }, #ifdef CONFIG_MAC80211_MESH { @@ -3111,22 +3473,22 @@ static const struct ieee80211_sband_iftype_data he_capa_6ghz[] = { #endif }; -static void mac80211_hwsim_he_capab(struct ieee80211_supported_band *sband) +static void mac80211_hwsim_sband_capab(struct ieee80211_supported_band *sband) { u16 n_iftype_data; if (sband->band == NL80211_BAND_2GHZ) { - n_iftype_data = ARRAY_SIZE(he_capa_2ghz); + n_iftype_data = ARRAY_SIZE(sband_capa_2ghz); sband->iftype_data = - (struct ieee80211_sband_iftype_data *)he_capa_2ghz; + (struct ieee80211_sband_iftype_data *)sband_capa_2ghz; } else if (sband->band == NL80211_BAND_5GHZ) { - n_iftype_data = ARRAY_SIZE(he_capa_5ghz); + n_iftype_data = ARRAY_SIZE(sband_capa_5ghz); sband->iftype_data = - (struct ieee80211_sband_iftype_data *)he_capa_5ghz; + (struct ieee80211_sband_iftype_data *)sband_capa_5ghz; } else if (sband->band == NL80211_BAND_6GHZ) { - n_iftype_data = ARRAY_SIZE(he_capa_6ghz); + n_iftype_data = ARRAY_SIZE(sband_capa_6ghz); sband->iftype_data = - (struct ieee80211_sband_iftype_data *)he_capa_6ghz; + (struct ieee80211_sband_iftype_data *)sband_capa_6ghz; } else { return; } @@ -3318,6 +3680,8 @@ static int mac80211_hwsim_new_radio(struct genl_info *info, hw->wiphy->n_cipher_suites = param->n_ciphers; } + data->rx_rssi = DEFAULT_RX_RSSI; + INIT_DELAYED_WORK(&data->roc_start, hw_roc_start); INIT_DELAYED_WORK(&data->roc_done, hw_roc_done); INIT_DELAYED_WORK(&data->hw_scan, hw_scan_work); @@ -3449,7 +3813,7 @@ static int mac80211_hwsim_new_radio(struct genl_info *info, sband->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; } - mac80211_hwsim_he_capab(sband); + mac80211_hwsim_sband_capab(sband); hw->wiphy->bands[band] = sband; } @@ -3509,6 +3873,8 @@ static int mac80211_hwsim_new_radio(struct genl_info *info, debugfs_create_file("ps", 0666, data->debugfs, data, &hwsim_fops_ps); debugfs_create_file("group", 0666, data->debugfs, data, &hwsim_fops_group); + debugfs_create_file("rx_rssi", 0666, data->debugfs, data, + &hwsim_fops_rx_rssi); if (!data->use_chanctx) debugfs_create_file("dfs_simulate_radar", 0222, data->debugfs, diff --git a/drivers/net/wireless/marvell/libertas/rx.c b/drivers/net/wireless/marvell/libertas/rx.c index 9f24b0760e1f..c34d30f7cbe0 100644 --- a/drivers/net/wireless/marvell/libertas/rx.c +++ b/drivers/net/wireless/marvell/libertas/rx.c @@ -147,7 +147,7 @@ int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *skb) dev->stats.rx_packets++; skb->protocol = eth_type_trans(skb, dev); - netif_rx_any_context(skb); + netif_rx(skb); ret = 0; done: @@ -262,7 +262,7 @@ static int process_rxed_802_11_packet(struct lbs_private *priv, dev->stats.rx_packets++; skb->protocol = eth_type_trans(skb, priv->dev); - netif_rx_any_context(skb); + netif_rx(skb); ret = 0; diff --git a/drivers/net/wireless/marvell/mwifiex/uap_cmd.c b/drivers/net/wireless/marvell/mwifiex/uap_cmd.c index 18e89777b784..630e1679c3f9 100644 --- a/drivers/net/wireless/marvell/mwifiex/uap_cmd.c +++ b/drivers/net/wireless/marvell/mwifiex/uap_cmd.c @@ -389,7 +389,7 @@ mwifiex_set_wmm_params(struct mwifiex_private *priv, { const u8 *vendor_ie; const u8 *wmm_ie; - u8 wmm_oui[] = {0x00, 0x50, 0xf2, 0x02}; + static const u8 wmm_oui[] = {0x00, 0x50, 0xf2, 0x02}; vendor_ie = cfg80211_find_vendor_ie(WLAN_OUI_MICROSOFT, WLAN_OUI_TYPE_MICROSOFT_WMM, diff --git a/drivers/net/wireless/marvell/mwifiex/uap_txrx.c b/drivers/net/wireless/marvell/mwifiex/uap_txrx.c index 245ff644f81e..4e49ed21c5ce 100644 --- a/drivers/net/wireless/marvell/mwifiex/uap_txrx.c +++ b/drivers/net/wireless/marvell/mwifiex/uap_txrx.c @@ -350,7 +350,7 @@ int mwifiex_uap_recv_packet(struct mwifiex_private *priv, skb->truesize += (skb->len - MWIFIEX_RX_DATA_BUF_SIZE); /* Forward multicast/broadcast packet to upper layer*/ - netif_rx_any_context(skb); + netif_rx(skb); return 0; } diff --git a/drivers/net/wireless/marvell/mwifiex/util.c b/drivers/net/wireless/marvell/mwifiex/util.c index d583fa600a29..d5edb1e89f5b 100644 --- a/drivers/net/wireless/marvell/mwifiex/util.c +++ b/drivers/net/wireless/marvell/mwifiex/util.c @@ -488,7 +488,7 @@ int mwifiex_recv_packet(struct mwifiex_private *priv, struct sk_buff *skb) (skb->truesize > MWIFIEX_RX_DATA_BUF_SIZE)) skb->truesize += (skb->len - MWIFIEX_RX_DATA_BUF_SIZE); - netif_rx_any_context(skb); + netif_rx(skb); return 0; } diff --git a/drivers/net/wireless/mediatek/mt76/dma.c b/drivers/net/wireless/mediatek/mt76/dma.c index 3a9af8931c35..02daeefb0761 100644 --- a/drivers/net/wireless/mediatek/mt76/dma.c +++ b/drivers/net/wireless/mediatek/mt76/dma.c @@ -93,7 +93,7 @@ mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q) { int i; - if (!q) + if (!q || !q->ndesc) return; /* clear descriptors */ @@ -233,7 +233,7 @@ mt76_dma_tx_cleanup(struct mt76_dev *dev, struct mt76_queue *q, bool flush) struct mt76_queue_entry entry; int last; - if (!q) + if (!q || !q->ndesc) return; spin_lock_bh(&q->cleanup_lock); @@ -448,6 +448,9 @@ mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q) int len = SKB_WITH_OVERHEAD(q->buf_size); int offset = q->buf_offset; + if (!q->ndesc) + return 0; + spin_lock_bh(&q->lock); while (q->queued < q->ndesc - 1) { @@ -465,6 +468,7 @@ mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q) qbuf.addr = addr + offset; qbuf.len = len - offset; + qbuf.skip_unmap = false; mt76_dma_add_buf(dev, q, &qbuf, 1, 0, buf, NULL); frames++; } @@ -484,6 +488,9 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q) void *buf; bool more; + if (!q->ndesc) + return; + spin_lock_bh(&q->lock); do { buf = mt76_dma_dequeue(dev, q, true, NULL, NULL, &more); @@ -508,6 +515,9 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid) struct mt76_queue *q = &dev->q_rx[qid]; int i; + if (!q->ndesc) + return; + for (i = 0; i < q->ndesc; i++) q->desc[i].ctrl = cpu_to_le32(MT_DMA_CTL_DMA_DONE); diff --git a/drivers/net/wireless/mediatek/mt76/mac80211.c b/drivers/net/wireless/mediatek/mt76/mac80211.c index 8bb1c7ab5b50..5b53d008eb66 100644 --- a/drivers/net/wireless/mediatek/mt76/mac80211.c +++ b/drivers/net/wireless/mediatek/mt76/mac80211.c @@ -180,7 +180,7 @@ static const struct cfg80211_sar_freq_ranges mt76_sar_freq_ranges[] = { { .start_freq = 5725, .end_freq = 5950, }, }; -const struct cfg80211_sar_capa mt76_sar_capa = { +static const struct cfg80211_sar_capa mt76_sar_capa = { .type = NL80211_SAR_TYPE_POWER, .num_freq_ranges = ARRAY_SIZE(mt76_sar_freq_ranges), .freq_ranges = &mt76_sar_freq_ranges[0], @@ -823,6 +823,10 @@ void mt76_set_channel(struct mt76_phy *phy) wait_event_timeout(dev->tx_wait, !mt76_has_tx_pending(phy), timeout); mt76_update_survey(phy); + if (phy->chandef.chan->center_freq != chandef->chan->center_freq || + phy->chandef.width != chandef->width) + phy->dfs_state = MT_DFS_STATE_UNKNOWN; + phy->chandef = *chandef; phy->chan_state = mt76_channel_state(phy, chandef->chan); @@ -928,6 +932,36 @@ void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid, } EXPORT_SYMBOL(mt76_wcid_key_setup); +static int +mt76_rx_signal(struct mt76_rx_status *status) +{ + s8 *chain_signal = status->chain_signal; + int signal = -128; + u8 chains; + + for (chains = status->chains; chains; chains >>= 1, chain_signal++) { + int cur, diff; + + cur = *chain_signal; + if (!(chains & BIT(0)) || + cur > 0) + continue; + + if (cur > signal) + swap(cur, signal); + + diff = signal - cur; + if (diff == 0) + signal += 3; + else if (diff <= 2) + signal += 2; + else if (diff <= 6) + signal += 1; + } + + return signal; +} + static void mt76_rx_convert(struct mt76_dev *dev, struct sk_buff *skb, struct ieee80211_hw **hw, @@ -956,6 +990,9 @@ mt76_rx_convert(struct mt76_dev *dev, struct sk_buff *skb, status->ampdu_reference = mstat.ampdu_ref; status->device_timestamp = mstat.timestamp; status->mactime = mstat.timestamp; + status->signal = mt76_rx_signal(&mstat); + if (status->signal <= -128) + status->flag |= RX_FLAG_NO_SIGNAL_VAL; if (ieee80211_is_beacon(hdr->frame_control) || ieee80211_is_probe_resp(hdr->frame_control)) @@ -1604,3 +1641,27 @@ void mt76_ethtool_worker(struct mt76_ethtool_worker_info *wi, wi->worker_stat_count = ei - wi->initial_stat_idx; } EXPORT_SYMBOL_GPL(mt76_ethtool_worker); + +enum mt76_dfs_state mt76_phy_dfs_state(struct mt76_phy *phy) +{ + struct ieee80211_hw *hw = phy->hw; + struct mt76_dev *dev = phy->dev; + + if (dev->region == NL80211_DFS_UNSET || + test_bit(MT76_SCANNING, &phy->state)) + return MT_DFS_STATE_DISABLED; + + if (!hw->conf.radar_enabled) { + if ((hw->conf.flags & IEEE80211_CONF_MONITOR) && + (phy->chandef.chan->flags & IEEE80211_CHAN_RADAR)) + return MT_DFS_STATE_ACTIVE; + + return MT_DFS_STATE_DISABLED; + } + + if (!cfg80211_reg_can_beacon(hw->wiphy, &phy->chandef, NL80211_IFTYPE_AP)) + return MT_DFS_STATE_CAC; + + return MT_DFS_STATE_ACTIVE; +} +EXPORT_SYMBOL_GPL(mt76_phy_dfs_state); diff --git a/drivers/net/wireless/mediatek/mt76/mt76.h b/drivers/net/wireless/mediatek/mt76/mt76.h index 404c3d1a70d6..882fb5d2517f 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76.h +++ b/drivers/net/wireless/mediatek/mt76/mt76.h @@ -19,7 +19,7 @@ #define MT_MCU_RING_SIZE 32 #define MT_RX_BUF_SIZE 2048 -#define MT_SKB_HEAD_LEN 128 +#define MT_SKB_HEAD_LEN 256 #define MT_MAX_NON_AQL_PKT 16 #define MT_TXQ_FREE_THR 32 @@ -85,6 +85,7 @@ enum mt76_rxq_id { MT_RXQ_MCU_WA, MT_RXQ_EXT, MT_RXQ_EXT_WA, + MT_RXQ_MAIN_WA, __MT_RXQ_MAX }; @@ -104,6 +105,13 @@ enum mt76_cipher_type { MT_CIPHER_GCMP_256, }; +enum mt76_dfs_state { + MT_DFS_STATE_UNKNOWN, + MT_DFS_STATE_DISABLED, + MT_DFS_STATE_CAC, + MT_DFS_STATE_ACTIVE, +}; + struct mt76_queue_buf { dma_addr_t addr; u16 len; @@ -224,7 +232,7 @@ enum mt76_wcid_flags { MT_WCID_FLAG_HDR_TRANS, }; -#define MT76_N_WCIDS 288 +#define MT76_N_WCIDS 544 /* stored in ieee80211_tx_info::hw_queue */ #define MT_TX_HW_QUEUE_EXT_PHY BIT(3) @@ -496,7 +504,7 @@ struct mt76_usb { } mcu; }; -#define MT76S_XMIT_BUF_SZ (16 * PAGE_SIZE) +#define MT76S_XMIT_BUF_SZ 0x3fe00 #define MT76S_NUM_TX_ENTRIES 256 #define MT76S_NUM_RX_ENTRIES 512 struct mt76_sdio { @@ -506,7 +514,8 @@ struct mt76_sdio { struct work_struct stat_work; - u8 *xmit_buf[IEEE80211_NUM_ACS + 2]; + u8 *xmit_buf; + u32 xmit_buf_sz; struct sdio_func *func; void *intr_data; @@ -621,6 +630,7 @@ struct mt76_vif { u8 band_idx; u8 wmm_idx; u8 scan_seq_num; + u8 cipher; }; struct mt76_phy { @@ -636,6 +646,7 @@ struct mt76_phy { struct ieee80211_channel *main_chan; struct mt76_channel_state *chan_state; + enum mt76_dfs_state dfs_state; ktime_t survey_time; struct mt76_hw_cap cap; @@ -897,8 +908,8 @@ static inline u16 mt76_rev(struct mt76_dev *dev) #define mt76_queue_reset(dev, ...) (dev)->mt76.queue_ops->reset_q(&((dev)->mt76), __VA_ARGS__) #define mt76_for_each_q_rx(dev, i) \ - for (i = 0; i < ARRAY_SIZE((dev)->q_rx) && \ - (dev)->q_rx[i].ndesc; i++) + for (i = 0; i < ARRAY_SIZE((dev)->q_rx); i++) \ + if ((dev)->q_rx[i].ndesc) struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size, const struct ieee80211_ops *ops, @@ -1181,6 +1192,7 @@ void mt76_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, const u8 *mac); void mt76_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif); +enum mt76_dfs_state mt76_phy_dfs_state(struct mt76_phy *phy); int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, void *data, int len); int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *skb, @@ -1262,13 +1274,21 @@ mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len, void mt76_ethtool_worker(struct mt76_ethtool_worker_info *wi, struct mt76_sta_stats *stats); int mt76_skb_adjust_pad(struct sk_buff *skb, int pad); +int __mt76u_vendor_request(struct mt76_dev *dev, u8 req, u8 req_type, + u16 val, u16 offset, void *buf, size_t len); int mt76u_vendor_request(struct mt76_dev *dev, u8 req, u8 req_type, u16 val, u16 offset, void *buf, size_t len); void mt76u_single_wr(struct mt76_dev *dev, const u8 req, const u16 offset, const u32 val); -int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf, - bool ext); +void mt76u_read_copy(struct mt76_dev *dev, u32 offset, + void *data, int len); +u32 ___mt76u_rr(struct mt76_dev *dev, u8 req, u8 req_type, u32 addr); +void ___mt76u_wr(struct mt76_dev *dev, u8 req, u8 req_type, + u32 addr, u32 val); +int __mt76u_init(struct mt76_dev *dev, struct usb_interface *intf, + struct mt76_bus_ops *ops); +int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf); int mt76u_alloc_mcu_queue(struct mt76_dev *dev); int mt76u_alloc_queues(struct mt76_dev *dev); void mt76u_stop_tx(struct mt76_dev *dev); diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/dma.c b/drivers/net/wireless/mediatek/mt76/mt7603/dma.c index 415ea17b9be6..37b092e3ea51 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/dma.c @@ -76,7 +76,7 @@ void mt7603_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, __le32 *end = (__le32 *)&skb->data[skb->len]; enum rx_pkt_type type; - type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); + type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); if (q == MT_RXQ_MCU) { if (type == PKT_TYPE_RX_EVENT) diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/mac.c b/drivers/net/wireless/mediatek/mt76/mt7603/mac.c index a272d64808c3..17713c821d80 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/mac.c @@ -643,11 +643,6 @@ mt7603_mac_fill_rx(struct mt7603_dev *dev, struct sk_buff *skb) status->chain_signal[1] = FIELD_GET(MT_RXV4_IB_RSSI1, rxdg3) + dev->rssi_offset[1]; - status->signal = status->chain_signal[0]; - if (status->chains & BIT(1)) - status->signal = max(status->signal, - status->chain_signal[1]); - if (FIELD_GET(MT_RXV1_FRAME_MODE, rxdg0) == 1) status->bw = RATE_INFO_BW_40; @@ -1135,7 +1130,7 @@ mt7603_fill_txs(struct mt7603_dev *dev, struct mt7603_sta *sta, } rate_set_tsf = READ_ONCE(sta->rate_set_tsf); - rs_idx = !((u32)(FIELD_GET(MT_TXS1_F0_TIMESTAMP, le32_to_cpu(txs_data[1])) - + rs_idx = !((u32)(le32_get_bits(txs_data[1], MT_TXS1_F0_TIMESTAMP) - rate_set_tsf) < 1000000); rs_idx ^= rate_set_tsf & BIT(0); rs = &sta->rateset[rs_idx]; @@ -1249,14 +1244,11 @@ void mt7603_mac_add_txs(struct mt7603_dev *dev, void *data) struct mt7603_sta *msta = NULL; struct mt76_wcid *wcid; __le32 *txs_data = data; - u32 txs; u8 wcidx; u8 pid; - txs = le32_to_cpu(txs_data[4]); - pid = FIELD_GET(MT_TXS4_PID, txs); - txs = le32_to_cpu(txs_data[3]); - wcidx = FIELD_GET(MT_TXS3_WCID, txs); + pid = le32_get_bits(txs_data[4], MT_TXS4_PID); + wcidx = le32_get_bits(txs_data[3], MT_TXS3_WCID); if (pid == MT_PACKET_ID_NO_ACK) return; diff --git a/drivers/net/wireless/mediatek/mt76/mt7603/main.c b/drivers/net/wireless/mediatek/mt76/mt7603/main.c index 2b546bc05d82..83c5eec5b163 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7603/main.c +++ b/drivers/net/wireless/mediatek/mt76/mt7603/main.c @@ -641,6 +641,9 @@ mt7603_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates); int i; + if (!sta_rates) + return; + spin_lock_bh(&dev->mt76.lock); for (i = 0; i < ARRAY_SIZE(msta->rates); i++) { msta->rates[i].idx = sta_rates->rate[i].idx; diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c b/drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c index b53528014fbc..c26b45a09923 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c @@ -105,10 +105,10 @@ mt7615_pm_set(void *data, u64 val) if (!mt7615_firmware_offload(dev) || mt76_is_usb(&dev->mt76)) return -EOPNOTSUPP; - if (val == pm->enable) - return 0; + mutex_lock(&dev->mt76.mutex); - mt7615_mutex_acquire(dev); + if (val == pm->enable) + goto out; if (dev->phy.n_beacon_vif) { ret = -EBUSY; @@ -119,9 +119,16 @@ mt7615_pm_set(void *data, u64 val) pm->stats.last_wake_event = jiffies; pm->stats.last_doze_event = jiffies; } + /* make sure the chip is awake here and ps_work is scheduled + * just at end of the this routine. + */ + pm->enable = false; + mt76_connac_pm_wake(&dev->mphy, pm); + pm->enable = val; + mt76_connac_power_save_sched(&dev->mphy, pm); out: - mt7615_mutex_release(dev); + mutex_unlock(&dev->mt76.mutex); return ret; } @@ -436,11 +443,16 @@ mt7615_ext_mac_addr_read(struct file *file, char __user *userbuf, size_t count, loff_t *ppos) { struct mt7615_dev *dev = file->private_data; - char buf[32 * ((ETH_ALEN * 3) + 4) + 1]; + u32 len = 32 * ((ETH_ALEN * 3) + 4) + 1; u8 addr[ETH_ALEN]; + char *buf; int ofs = 0; int i; + buf = kzalloc(len, GFP_KERNEL); + if (!buf) + return -ENOMEM; + for (i = 0; i < 32; i++) { if (!(dev->muar_mask & BIT(i))) continue; @@ -451,10 +463,13 @@ mt7615_ext_mac_addr_read(struct file *file, char __user *userbuf, put_unaligned_le32(mt76_rr(dev, MT_WF_RMAC_MAR0), addr); put_unaligned_le16((mt76_rr(dev, MT_WF_RMAC_MAR1) & MT_WF_RMAC_MAR1_ADDR), addr + 4); - ofs += snprintf(buf + ofs, sizeof(buf) - ofs, "%d=%pM\n", i, addr); + ofs += snprintf(buf + ofs, len - ofs, "%d=%pM\n", i, addr); } - return simple_read_from_buffer(userbuf, count, ppos, buf, ofs); + ofs = simple_read_from_buffer(userbuf, count, ppos, buf, ofs); + + kfree(buf); + return ofs; } static ssize_t diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/init.c b/drivers/net/wireless/mediatek/mt76/mt7615/init.c index a753c7476d31..a06dcbb8c673 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/init.c @@ -552,7 +552,6 @@ void mt7615_init_device(struct mt7615_dev *dev) dev->pm.stats.last_wake_event = jiffies; dev->pm.stats.last_doze_event = jiffies; mt7615_cap_dbdc_disable(dev); - dev->phy.dfs_state = -1; #ifdef CONFIG_NL80211_TESTMODE dev->mt76.test_ops = &mt7615_testmode_ops; diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mac.c b/drivers/net/wireless/mediatek/mt76/mt7615/mac.c index ec25e5a95d44..bd687f7de628 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mac.c @@ -253,15 +253,15 @@ static void mt7615_mac_fill_tm_rx(struct mt7615_phy *phy, __le32 *rxv) static int mt7615_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) { struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; + struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap); struct mt7615_sta *msta = (struct mt7615_sta *)status->wcid; + __le32 *rxd = (__le32 *)skb->data; struct ieee80211_sta *sta; struct ieee80211_vif *vif; struct ieee80211_hdr hdr; - struct ethhdr eth_hdr; - __le32 *rxd = (__le32 *)skb->data; - __le32 qos_ctrl, ht_ctrl; + u16 frame_control; - if (FIELD_GET(MT_RXD1_NORMAL_ADDR_TYPE, le32_to_cpu(rxd[1])) != + if (le32_get_bits(rxd[1], MT_RXD1_NORMAL_ADDR_TYPE) != MT_RXD1_NORMAL_U2M) return -EINVAL; @@ -275,47 +275,53 @@ static int mt7615_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv); /* store the info from RXD and ethhdr to avoid being overridden */ - memcpy(ð_hdr, skb->data + hdr_gap, sizeof(eth_hdr)); - hdr.frame_control = FIELD_GET(MT_RXD4_FRAME_CONTROL, rxd[4]); - hdr.seq_ctrl = FIELD_GET(MT_RXD6_SEQ_CTRL, rxd[6]); - qos_ctrl = FIELD_GET(MT_RXD6_QOS_CTL, rxd[6]); - ht_ctrl = FIELD_GET(MT_RXD7_HT_CONTROL, rxd[7]); - + frame_control = le32_get_bits(rxd[4], MT_RXD4_FRAME_CONTROL); + hdr.frame_control = cpu_to_le16(frame_control); + hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[6], MT_RXD6_SEQ_CTRL)); hdr.duration_id = 0; + ether_addr_copy(hdr.addr1, vif->addr); ether_addr_copy(hdr.addr2, sta->addr); - switch (le16_to_cpu(hdr.frame_control) & - (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) { + switch (frame_control & (IEEE80211_FCTL_TODS | + IEEE80211_FCTL_FROMDS)) { case 0: ether_addr_copy(hdr.addr3, vif->bss_conf.bssid); break; case IEEE80211_FCTL_FROMDS: - ether_addr_copy(hdr.addr3, eth_hdr.h_source); + ether_addr_copy(hdr.addr3, eth_hdr->h_source); break; case IEEE80211_FCTL_TODS: - ether_addr_copy(hdr.addr3, eth_hdr.h_dest); + ether_addr_copy(hdr.addr3, eth_hdr->h_dest); break; case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS: - ether_addr_copy(hdr.addr3, eth_hdr.h_dest); - ether_addr_copy(hdr.addr4, eth_hdr.h_source); + ether_addr_copy(hdr.addr3, eth_hdr->h_dest); + ether_addr_copy(hdr.addr4, eth_hdr->h_source); break; default: break; } skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2); - if (eth_hdr.h_proto == htons(ETH_P_AARP) || - eth_hdr.h_proto == htons(ETH_P_IPX)) + if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) || + eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX)) ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header); - else if (eth_hdr.h_proto >= htons(ETH_P_802_3_MIN)) + else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN) ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header); else skb_pull(skb, 2); if (ieee80211_has_order(hdr.frame_control)) - memcpy(skb_push(skb, 2), &ht_ctrl, 2); - if (ieee80211_is_data_qos(hdr.frame_control)) - memcpy(skb_push(skb, 2), &qos_ctrl, 2); + memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[7], + IEEE80211_HT_CTL_LEN); + + if (ieee80211_is_data_qos(hdr.frame_control)) { + __le16 qos_ctrl; + + qos_ctrl = cpu_to_le16(le32_get_bits(rxd[6], MT_RXD6_QOS_CTL)); + memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl, + IEEE80211_QOS_CTL_LEN); + } + if (ieee80211_has_a4(hdr.frame_control)) memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); else @@ -570,15 +576,6 @@ static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb) status->chain_signal[1] = to_rssi(MT_RXV4_RCPI1, rxdg3); status->chain_signal[2] = to_rssi(MT_RXV4_RCPI2, rxdg3); status->chain_signal[3] = to_rssi(MT_RXV4_RCPI3, rxdg3); - status->signal = status->chain_signal[0]; - - for (i = 1; i < hweight8(mphy->antenna_mask); i++) { - if (!(status->chains & BIT(i))) - continue; - - status->signal = max(status->signal, - status->chain_signal[i]); - } mt7615_mac_fill_tm_rx(mphy->priv, rxd); @@ -1430,7 +1427,7 @@ static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta, } rate_set_tsf = READ_ONCE(sta->rate_set_tsf); - rs_idx = !((u32)(FIELD_GET(MT_TXS4_F0_TIMESTAMP, le32_to_cpu(txs_data[4])) - + rs_idx = !((u32)(le32_get_bits(txs_data[4], MT_TXS4_F0_TIMESTAMP) - rate_set_tsf) < 1000000); rs_idx ^= rate_set_tsf & BIT(0); rs = &sta->rateset[rs_idx]; @@ -1561,14 +1558,11 @@ static void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data) struct mt76_wcid *wcid; struct mt76_phy *mphy = &dev->mt76.phy; __le32 *txs_data = data; - u32 txs; u8 wcidx; u8 pid; - txs = le32_to_cpu(txs_data[0]); - pid = FIELD_GET(MT_TXS0_PID, txs); - txs = le32_to_cpu(txs_data[2]); - wcidx = FIELD_GET(MT_TXS2_WCID, txs); + pid = le32_get_bits(txs_data[0], MT_TXS0_PID); + wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); if (pid == MT_PACKET_ID_NO_ACK) return; @@ -1642,9 +1636,10 @@ mt7615_mac_tx_free_token(struct mt7615_dev *dev, u16 token) mt7615_txwi_free(dev, txwi); } -static void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb) +static void mt7615_mac_tx_free(struct mt7615_dev *dev, void *data, int len) { - struct mt7615_tx_free *free = (struct mt7615_tx_free *)skb->data; + struct mt7615_tx_free *free = (struct mt7615_tx_free *)data; + void *end = data + len; u8 i, count; mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); @@ -1655,21 +1650,25 @@ static void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb) mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[i], false); } - count = FIELD_GET(MT_TX_FREE_MSDU_ID_CNT, le16_to_cpu(free->ctrl)); + count = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_ID_CNT); if (is_mt7615(&dev->mt76)) { __le16 *token = &free->token[0]; + if (WARN_ON_ONCE((void *)&token[count] > end)) + return; + for (i = 0; i < count; i++) mt7615_mac_tx_free_token(dev, le16_to_cpu(token[i])); } else { __le32 *token = (__le32 *)&free->token[0]; + if (WARN_ON_ONCE((void *)&token[count] > end)) + return; + for (i = 0; i < count; i++) mt7615_mac_tx_free_token(dev, le32_to_cpu(token[i])); } - dev_kfree_skb(skb); - rcu_read_lock(); mt7615_mac_sta_poll(dev); rcu_read_unlock(); @@ -1677,6 +1676,29 @@ static void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb) mt76_worker_schedule(&dev->mt76.tx_worker); } +bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len) +{ + struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); + __le32 *rxd = (__le32 *)data; + __le32 *end = (__le32 *)&rxd[len / 4]; + enum rx_pkt_type type; + + type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); + + switch (type) { + case PKT_TYPE_TXRX_NOTIFY: + mt7615_mac_tx_free(dev, data, len); + return false; + case PKT_TYPE_TXS: + for (rxd++; rxd + 7 <= end; rxd += 7) + mt7615_mac_add_txs(dev, rxd); + return false; + default: + return true; + } +} +EXPORT_SYMBOL_GPL(mt7615_rx_check); + void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, struct sk_buff *skb) { @@ -1686,8 +1708,8 @@ void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, enum rx_pkt_type type; u16 flag; - type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); - flag = FIELD_GET(MT_RXD0_PKT_FLAG, le32_to_cpu(rxd[0])); + type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); + flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG); if (type == PKT_TYPE_RX_EVENT && flag == 0x1) type = PKT_TYPE_NORMAL_MCU; @@ -1698,7 +1720,8 @@ void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, dev_kfree_skb(skb); break; case PKT_TYPE_TXRX_NOTIFY: - mt7615_mac_tx_free(dev, skb); + mt7615_mac_tx_free(dev, skb->data, skb->len); + dev_kfree_skb(skb); break; case PKT_TYPE_RX_EVENT: mt7615_mcu_rx_event(dev, skb); @@ -1835,7 +1858,7 @@ mt7615_mac_adjust_sensitivity(struct mt7615_phy *phy, struct mt7615_dev *dev = phy->dev; int false_cca = ofdm ? phy->false_cca_ofdm : phy->false_cca_cck; bool ext_phy = phy != &dev->phy; - u16 def_th = ofdm ? -98 : -110; + s16 def_th = ofdm ? -98 : -110; bool update = false; s8 *sensitivity; int signal; @@ -2068,6 +2091,7 @@ void mt7615_pm_wake_work(struct work_struct *work) int i; if (mt76_is_sdio(mdev)) { + mt76_connac_pm_dequeue_skbs(mphy, &dev->pm); mt76_worker_schedule(&mdev->sdio.txrx_worker); } else { mt76_for_each_q_rx(mdev, i) @@ -2103,6 +2127,14 @@ void mt7615_pm_power_save_work(struct work_struct *work) test_bit(MT76_HW_SCHED_SCANNING, &dev->mphy.state)) goto out; + if (mutex_is_locked(&dev->mt76.mutex)) + /* if mt76 mutex is held we should not put the device + * to sleep since we are currently accessing device + * register map. We need to wait for the next power_save + * trigger. + */ + goto out; + if (time_is_after_jiffies(dev->pm.last_activity + delta)) { delta = dev->pm.last_activity + delta - jiffies; goto out; @@ -2160,21 +2192,24 @@ static void mt7615_dfs_stop_radar_detector(struct mt7615_phy *phy) struct mt7615_dev *dev = phy->dev; if (phy->rdd_state & BIT(0)) - mt7615_mcu_rdd_cmd(dev, RDD_STOP, 0, MT_RX_SEL0, 0); + mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, 0, + MT_RX_SEL0, 0); if (phy->rdd_state & BIT(1)) - mt7615_mcu_rdd_cmd(dev, RDD_STOP, 1, MT_RX_SEL0, 0); + mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, 1, + MT_RX_SEL0, 0); } static int mt7615_dfs_start_rdd(struct mt7615_dev *dev, int chain) { int err; - err = mt7615_mcu_rdd_cmd(dev, RDD_START, chain, MT_RX_SEL0, 0); + err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, chain, + MT_RX_SEL0, 0); if (err < 0) return err; - return mt7615_mcu_rdd_cmd(dev, RDD_DET_MODE, chain, - MT_RX_SEL0, 1); + return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_DET_MODE, chain, + MT_RX_SEL0, 1); } static int mt7615_dfs_start_radar_detector(struct mt7615_phy *phy) @@ -2185,7 +2220,8 @@ static int mt7615_dfs_start_radar_detector(struct mt7615_phy *phy) int err; /* start CAC */ - err = mt7615_mcu_rdd_cmd(dev, RDD_CAC_START, ext_phy, MT_RX_SEL0, 0); + err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_CAC_START, ext_phy, + MT_RX_SEL0, 0); if (err < 0) return err; @@ -2246,50 +2282,60 @@ mt7615_dfs_init_radar_specs(struct mt7615_phy *phy) int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy) { - struct cfg80211_chan_def *chandef = &phy->mt76->chandef; struct mt7615_dev *dev = phy->dev; bool ext_phy = phy != &dev->phy; + enum mt76_dfs_state dfs_state, prev_state; int err; if (is_mt7663(&dev->mt76)) return 0; - if (dev->mt76.region == NL80211_DFS_UNSET) { - phy->dfs_state = -1; - if (phy->rdd_state) - goto stop; + prev_state = phy->mt76->dfs_state; + dfs_state = mt76_phy_dfs_state(phy->mt76); + if (prev_state == dfs_state) return 0; - } - if (test_bit(MT76_SCANNING, &phy->mt76->state)) - return 0; + if (prev_state == MT_DFS_STATE_UNKNOWN) + mt7615_dfs_stop_radar_detector(phy); - if (phy->dfs_state == chandef->chan->dfs_state) - return 0; - - err = mt7615_dfs_init_radar_specs(phy); - if (err < 0) { - phy->dfs_state = -1; + if (dfs_state == MT_DFS_STATE_DISABLED) goto stop; - } - phy->dfs_state = chandef->chan->dfs_state; + if (prev_state <= MT_DFS_STATE_DISABLED) { + err = mt7615_dfs_init_radar_specs(phy); + if (err < 0) + return err; + + err = mt7615_dfs_start_radar_detector(phy); + if (err < 0) + return err; + + phy->mt76->dfs_state = MT_DFS_STATE_CAC; + } - if (chandef->chan->flags & IEEE80211_CHAN_RADAR) { - if (chandef->chan->dfs_state != NL80211_DFS_AVAILABLE) - return mt7615_dfs_start_radar_detector(phy); + if (dfs_state == MT_DFS_STATE_CAC) + return 0; - return mt7615_mcu_rdd_cmd(dev, RDD_CAC_END, ext_phy, - MT_RX_SEL0, 0); + err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_CAC_END, + ext_phy, MT_RX_SEL0, 0); + if (err < 0) { + phy->mt76->dfs_state = MT_DFS_STATE_UNKNOWN; + return err; } + phy->mt76->dfs_state = MT_DFS_STATE_ACTIVE; + return 0; + stop: - err = mt7615_mcu_rdd_cmd(dev, RDD_NORMAL_START, ext_phy, MT_RX_SEL0, 0); + err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_NORMAL_START, ext_phy, + MT_RX_SEL0, 0); if (err < 0) return err; mt7615_dfs_stop_radar_detector(phy); + phy->mt76->dfs_state = MT_DFS_STATE_DISABLED; + return 0; } diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/main.c b/drivers/net/wireless/mediatek/mt76/mt7615/main.c index 82d625a16a62..d79cbdbd5a05 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/main.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/main.c @@ -291,7 +291,8 @@ static void mt7615_init_dfs_state(struct mt7615_phy *phy) if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) return; - if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR)) + if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR) && + !(mphy->chandef.chan->flags & IEEE80211_CHAN_RADAR)) return; if (mphy->chandef.chan->center_freq == chandef->chan->center_freq && @@ -365,6 +366,7 @@ static int mt7615_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, struct ieee80211_key_conf *key) { struct mt7615_dev *dev = mt7615_hw_dev(hw); + struct mt7615_phy *phy = mt7615_hw_phy(hw); struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; struct mt7615_sta *msta = sta ? (struct mt7615_sta *)sta->drv_priv : &mvif->sta; @@ -403,6 +405,11 @@ static int mt7615_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, mt7615_mutex_acquire(dev); + if (cmd == SET_KEY && !sta && !mvif->mt76.cipher) { + mvif->mt76.cipher = mt76_connac_mcu_get_cipher(key->cipher); + mt7615_mcu_add_bss_info(phy, vif, NULL, true); + } + if (cmd == SET_KEY) *wcid_keyidx = idx; else if (idx == *wcid_keyidx) @@ -424,6 +431,29 @@ out: return err; } +static int mt7615_set_sar_specs(struct ieee80211_hw *hw, + const struct cfg80211_sar_specs *sar) +{ + struct mt7615_phy *phy = mt7615_hw_phy(hw); + int err; + + if (!cfg80211_chandef_valid(&phy->mt76->chandef)) + return -EINVAL; + + err = mt76_init_sar_power(hw, sar); + if (err) + return err; + + if (mt7615_firmware_offload(phy->dev)) + return mt76_connac_mcu_set_rate_txpower(phy->mt76); + + ieee80211_stop_queues(hw); + err = mt7615_set_channel(phy); + ieee80211_wake_queues(hw); + + return err; +} + static int mt7615_config(struct ieee80211_hw *hw, u32 changed) { struct mt7615_dev *dev = mt7615_hw_dev(hw); @@ -683,6 +713,9 @@ static void mt7615_sta_rate_tbl_update(struct ieee80211_hw *hw, struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates); int i; + if (!sta_rates) + return; + spin_lock_bh(&dev->mt76.lock); for (i = 0; i < ARRAY_SIZE(msta->rates); i++) { msta->rates[i].idx = sta_rates->rate[i].idx; @@ -1323,6 +1356,7 @@ const struct ieee80211_ops mt7615_ops = { .set_wakeup = mt7615_set_wakeup, .set_rekey_data = mt7615_set_rekey_data, #endif /* CONFIG_PM */ + .set_sar_specs = mt7615_set_sar_specs, }; EXPORT_SYMBOL_GPL(mt7615_ops); diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c index 759dcf0e6783..97e2a85cb728 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mcu.c @@ -71,19 +71,6 @@ struct mt7663_fw_buf { #define IMG_CRC_LEN 4 -#define FW_FEATURE_SET_ENCRYPT BIT(0) -#define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) - -#define DL_MODE_ENCRYPT BIT(0) -#define DL_MODE_KEY_IDX GENMASK(2, 1) -#define DL_MODE_RESET_SEC_IV BIT(3) -#define DL_MODE_WORKING_PDA_CR4 BIT(4) -#define DL_MODE_VALID_RAM_ENTRY BIT(5) -#define DL_MODE_NEED_RSP BIT(31) - -#define FW_START_OVERRIDE BIT(0) -#define FW_START_WORKING_PDA_CR4 BIT(2) - void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb, int cmd, int *wait_seq) { @@ -756,145 +743,7 @@ out: static int mt7615_mcu_ctrl_pm_state(struct mt7615_dev *dev, int band, int state) { -#define ENTER_PM_STATE 1 -#define EXIT_PM_STATE 2 - struct { - u8 pm_number; - u8 pm_state; - u8 bssid[ETH_ALEN]; - u8 dtim_period; - u8 wlan_idx; - __le16 bcn_interval; - __le32 aid; - __le32 rx_filter; - u8 band_idx; - u8 rsv[3]; - __le32 feature; - u8 omac_idx; - u8 wmm_idx; - u8 bcn_loss_cnt; - u8 bcn_sp_duration; - } __packed req = { - .pm_number = 5, - .pm_state = state ? ENTER_PM_STATE : EXIT_PM_STATE, - .band_idx = band, - }; - - return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(PM_STATE_CTRL), - &req, sizeof(req), true); -} - -static int -mt7615_mcu_bss_basic_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, - struct ieee80211_sta *sta, struct mt7615_phy *phy, - bool enable) -{ - struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; - u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA; - struct bss_info_basic *bss; - u8 wlan_idx = mvif->sta.wcid.idx; - struct tlv *tlv; - - tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss)); - - switch (vif->type) { - case NL80211_IFTYPE_MESH_POINT: - case NL80211_IFTYPE_AP: - case NL80211_IFTYPE_MONITOR: - break; - case NL80211_IFTYPE_STATION: - /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ - if (enable && sta) { - struct mt7615_sta *msta; - - msta = (struct mt7615_sta *)sta->drv_priv; - wlan_idx = msta->wcid.idx; - } - break; - case NL80211_IFTYPE_ADHOC: - type = NETWORK_IBSS; - break; - default: - WARN_ON(1); - break; - } - - bss = (struct bss_info_basic *)tlv; - bss->network_type = cpu_to_le32(type); - bss->bmc_wcid_lo = wlan_idx; - bss->wmm_idx = mvif->mt76.wmm_idx; - bss->active = enable; - - if (vif->type != NL80211_IFTYPE_MONITOR) { - memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); - bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); - bss->dtim_period = vif->bss_conf.dtim_period; - } else { - memcpy(bss->bssid, phy->mt76->macaddr, ETH_ALEN); - } - - return 0; -} - -static void -mt7615_mcu_bss_omac_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) -{ - struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; - u8 omac_idx = mvif->mt76.omac_idx; - struct bss_info_omac *omac; - struct tlv *tlv; - u32 type = 0; - - tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac)); - - switch (vif->type) { - case NL80211_IFTYPE_MONITOR: - case NL80211_IFTYPE_MESH_POINT: - case NL80211_IFTYPE_AP: - if (vif->p2p) - type = CONNECTION_P2P_GO; - else - type = CONNECTION_INFRA_AP; - break; - case NL80211_IFTYPE_STATION: - if (vif->p2p) - type = CONNECTION_P2P_GC; - else - type = CONNECTION_INFRA_STA; - break; - case NL80211_IFTYPE_ADHOC: - type = CONNECTION_IBSS_ADHOC; - break; - default: - WARN_ON(1); - break; - } - - omac = (struct bss_info_omac *)tlv; - omac->conn_type = cpu_to_le32(type); - omac->omac_idx = mvif->mt76.omac_idx; - omac->band_idx = mvif->mt76.band_idx; - omac->hw_bss_idx = omac_idx > EXT_BSSID_START ? HW_BSSID_0 : omac_idx; -} - -/* SIFS 20us + 512 byte beacon tranmitted by 1Mbps (3906us) */ -#define BCN_TX_ESTIMATE_TIME (4096 + 20) -static void -mt7615_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt7615_vif *mvif) -{ - struct bss_info_ext_bss *ext; - int ext_bss_idx, tsf_offset; - struct tlv *tlv; - - ext_bss_idx = mvif->mt76.omac_idx - EXT_BSSID_START; - if (ext_bss_idx < 0) - return; - - tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext)); - - ext = (struct bss_info_ext_bss *)tlv; - tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; - ext->mbss_tsf_offset = cpu_to_le32(tsf_offset); + return mt76_connac_mcu_set_pm(&dev->mt76, band, state); } static int @@ -913,13 +762,14 @@ mt7615_mcu_add_bss(struct mt7615_phy *phy, struct ieee80211_vif *vif, return PTR_ERR(skb); if (enable) - mt7615_mcu_bss_omac_tlv(skb, vif); + mt76_connac_mcu_bss_omac_tlv(skb, vif); - mt7615_mcu_bss_basic_tlv(skb, vif, sta, phy, enable); + mt76_connac_mcu_bss_basic_tlv(skb, vif, sta, phy->mt76, + mvif->sta.wcid.idx, enable); if (enable && mvif->mt76.omac_idx >= EXT_BSSID_START && mvif->mt76.omac_idx < REPEATER_BSSID_START) - mt7615_mcu_bss_ext_tlv(skb, mvif); + mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76); return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_EXT_CMD(BSS_INFO_UPDATE), true); @@ -1030,7 +880,7 @@ mt7615_mcu_wtbl_sta_add(struct mt7615_phy *phy, struct ieee80211_vif *vif, NULL, wtbl_hdr); if (sta) mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, wskb, sta, - NULL, wtbl_hdr); + NULL, wtbl_hdr, true, true); mt76_connac_mcu_wtbl_hdr_trans_tlv(wskb, vif, &msta->wcid, NULL, wtbl_hdr); } @@ -1057,19 +907,7 @@ mt7615_mcu_wtbl_update_hdr_trans(struct mt7615_dev *dev, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { - struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv; - struct wtbl_req_hdr *wtbl_hdr; - struct sk_buff *skb = NULL; - - wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid, - WTBL_SET, NULL, &skb); - if (IS_ERR(wtbl_hdr)) - return PTR_ERR(wtbl_hdr); - - mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, &msta->wcid, NULL, - wtbl_hdr); - return mt76_mcu_skb_send_msg(&dev->mt76, skb, - MCU_EXT_CMD(WTBL_UPDATE), true); + return mt76_connac_mcu_wtbl_update_hdr_trans(&dev->mt76, vif, sta); } static const struct mt7615_mcu_ops wtbl_update_ops = { @@ -1303,7 +1141,8 @@ mt7615_mcu_uni_tx_ba(struct mt7615_dev *dev, struct mt7615_sta *sta = (struct mt7615_sta *)params->sta->drv_priv; return mt76_connac_mcu_sta_ba(&dev->mt76, &sta->vif->mt76, params, - enable, true); + MCU_UNI_CMD(STA_REC_UPDATE), enable, + true); } static int @@ -1451,20 +1290,6 @@ release_fw: return ret; } -static u32 mt7615_mcu_gen_dl_mode(u8 feature_set, bool is_cr4) -{ - u32 ret = 0; - - ret |= (feature_set & FW_FEATURE_SET_ENCRYPT) ? - (DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV) : 0; - ret |= FIELD_PREP(DL_MODE_KEY_IDX, - FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); - ret |= DL_MODE_NEED_RSP; - ret |= is_cr4 ? DL_MODE_WORKING_PDA_CR4 : 0; - - return ret; -} - static int mt7615_mcu_send_ram_firmware(struct mt7615_dev *dev, const struct mt7615_fw_trailer *hdr, @@ -1475,7 +1300,8 @@ mt7615_mcu_send_ram_firmware(struct mt7615_dev *dev, u32 len, addr, mode; for (i = 0; i < n_region; i++) { - mode = mt7615_mcu_gen_dl_mode(hdr[i].feature_set, is_cr4); + mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, + hdr[i].feature_set, is_cr4); len = le32_to_cpu(hdr[i].len) + IMG_CRC_LEN; addr = le32_to_cpu(hdr[i].addr); @@ -1723,7 +1549,8 @@ static int mt7663_load_n9(struct mt7615_dev *dev, const char *name) dev_info(dev->mt76.dev, "Parsing tailer Region: %d\n", i); buf = (const struct mt7663_fw_buf *)(base_addr - shift); - mode = mt7615_mcu_gen_dl_mode(buf->feature_set, false); + mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, + buf->feature_set, false); addr = le32_to_cpu(buf->img_dest_addr); len = le32_to_cpu(buf->img_size); @@ -2064,27 +1891,6 @@ int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev) &req, sizeof(req), true); } -int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev, - enum mt7615_rdd_cmd cmd, u8 index, - u8 rx_sel, u8 val) -{ - struct { - u8 ctrl; - u8 rdd_idx; - u8 rdd_rx_sel; - u8 val; - u8 rsv[4]; - } req = { - .ctrl = cmd, - .rdd_idx = index, - .rdd_rx_sel = rx_sel, - .val = val, - }; - - return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_CTRL), - &req, sizeof(req), true); -} - int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val) { struct { @@ -2214,7 +2020,7 @@ static void mt7615_mcu_set_txpower_sku(struct mt7615_phy *phy, u8 *sku) struct mt76_power_limits limits; s8 *limits_array = (s8 *)&limits; int n_chains = hweight8(mphy->antenna_mask); - int tx_power; + int tx_power = hw->conf.power_level * 2; int i; static const u8 sku_mapping[] = { #define SKU_FIELD(_type, _field) \ @@ -2271,9 +2077,8 @@ static void mt7615_mcu_set_txpower_sku(struct mt7615_phy *phy, u8 *sku) #undef SKU_FIELD }; - tx_power = hw->conf.power_level * 2 - - mt76_tx_power_nss_delta(n_chains); - + tx_power = mt76_get_sar_power(mphy, mphy->chandef.chan, tx_power); + tx_power -= mt76_tx_power_nss_delta(n_chains); tx_power = mt76_get_rate_power_limits(mphy, mphy->chandef.chan, &limits, tx_power); mphy->txpower_cur = tx_power; @@ -2346,10 +2151,13 @@ int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd) .center_chan2 = ieee80211_frequency_to_channel(freq2), }; - if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) + if (cmd == MCU_EXT_CMD(SET_RX_PATH) || + dev->mt76.hw->conf.flags & IEEE80211_CONF_MONITOR) + req.switch_reason = CH_SWITCH_NORMAL; + else if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; - else if ((chandef->chan->flags & IEEE80211_CHAN_RADAR) && - chandef->chan->dfs_state != NL80211_DFS_AVAILABLE) + else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, + NL80211_IFTYPE_AP)) req.switch_reason = CH_SWITCH_DFS; else req.switch_reason = CH_SWITCH_NORMAL; diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c b/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c index 33f72f3657d0..ce45c3bfc443 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mmio.c @@ -194,6 +194,7 @@ int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, .token_size = MT7615_TOKEN_SIZE, .tx_prepare_skb = mt7615_tx_prepare_skb, .tx_complete_skb = mt7615_tx_complete_skb, + .rx_check = mt7615_rx_check, .rx_skb = mt7615_queue_rx_skb, .rx_poll_complete = mt7615_rx_poll_complete, .sta_ps = mt7615_sta_ps, diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h b/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h index 6ff6d5800918..2e91f6a27d0f 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h +++ b/drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h @@ -403,30 +403,9 @@ int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd); int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue, const struct ieee80211_tx_queue_params *params); void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb); -int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev, - enum mt7615_rdd_cmd cmd, u8 index, - u8 rx_sel, u8 val); int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev); int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl); -static inline bool is_mt7622(struct mt76_dev *dev) -{ - if (!IS_ENABLED(CONFIG_MT7622_WMAC)) - return false; - - return mt76_chip(dev) == 0x7622; -} - -static inline bool is_mt7615(struct mt76_dev *dev) -{ - return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611; -} - -static inline bool is_mt7611(struct mt76_dev *dev) -{ - return mt76_chip(dev) == 0x7611; -} - static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask) { mt76_set_irq_mask(&dev->mt76, 0, 0, mask); @@ -530,6 +509,7 @@ int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, void mt7615_tx_worker(struct mt76_worker *w); void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e); void mt7615_tx_token_put(struct mt7615_dev *dev); +bool mt7615_rx_check(struct mt76_dev *mdev, void *data, int len); void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, struct sk_buff *skb); void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps); @@ -579,6 +559,7 @@ void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e); int mt7663_usb_sdio_register_device(struct mt7615_dev *dev); int mt7663u_mcu_init(struct mt7615_dev *dev); +int mt7663u_mcu_power_on(struct mt7615_dev *dev); /* sdio */ int mt7663s_mcu_init(struct mt7615_dev *dev); diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c b/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c index 31c4a76b7f91..49ab3a1f3b9b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/sdio.c @@ -56,7 +56,10 @@ static int mt7663s_parse_intr(struct mt76_dev *dev, struct mt76s_intr *intr) struct mt7663s_intr *irq_data = sdio->intr_data; int i, err; + sdio_claim_host(sdio->func); err = sdio_readsb(sdio->func, irq_data, MCR_WHISR, sizeof(*irq_data)); + sdio_release_host(sdio->func); + if (err) return err; @@ -98,7 +101,7 @@ static int mt7663s_probe(struct sdio_func *func, struct ieee80211_ops *ops; struct mt7615_dev *dev; struct mt76_dev *mdev; - int i, ret; + int ret; ops = devm_kmemdup(&func->dev, &mt7615_ops, sizeof(mt7615_ops), GFP_KERNEL); @@ -137,16 +140,6 @@ static int mt7663s_probe(struct sdio_func *func, goto error; } - for (i = 0; i < ARRAY_SIZE(mdev->sdio.xmit_buf); i++) { - mdev->sdio.xmit_buf[i] = devm_kmalloc(mdev->dev, - MT76S_XMIT_BUF_SZ, - GFP_KERNEL); - if (!mdev->sdio.xmit_buf[i]) { - ret = -ENOMEM; - goto error; - } - } - ret = mt76s_alloc_rx_queue(mdev, MT_RXQ_MAIN); if (ret) goto error; diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/usb.c b/drivers/net/wireless/mediatek/mt76/mt7615/usb.c index 0396ad532ba6..967641aebf5f 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/usb.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/usb.c @@ -17,9 +17,68 @@ static const struct usb_device_id mt7615_device_table[] = { { USB_DEVICE_AND_INTERFACE_INFO(0x0e8d, 0x7663, 0xff, 0xff, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(0x043e, 0x310c, 0xff, 0xff, 0xff) }, { }, }; +static u32 mt7663u_rr(struct mt76_dev *dev, u32 addr) +{ + u32 ret; + + mutex_lock(&dev->usb.usb_ctrl_mtx); + ret = ___mt76u_rr(dev, MT_VEND_READ_EXT, + USB_DIR_IN | USB_TYPE_VENDOR, addr); + mutex_unlock(&dev->usb.usb_ctrl_mtx); + + return ret; +} + +static void mt7663u_wr(struct mt76_dev *dev, u32 addr, u32 val) +{ + mutex_lock(&dev->usb.usb_ctrl_mtx); + ___mt76u_wr(dev, MT_VEND_WRITE_EXT, + USB_DIR_OUT | USB_TYPE_VENDOR, addr, val); + mutex_unlock(&dev->usb.usb_ctrl_mtx); +} + +static u32 mt7663u_rmw(struct mt76_dev *dev, u32 addr, + u32 mask, u32 val) +{ + mutex_lock(&dev->usb.usb_ctrl_mtx); + val |= ___mt76u_rr(dev, MT_VEND_READ_EXT, + USB_DIR_IN | USB_TYPE_VENDOR, addr) & ~mask; + ___mt76u_wr(dev, MT_VEND_WRITE_EXT, + USB_DIR_OUT | USB_TYPE_VENDOR, addr, val); + mutex_unlock(&dev->usb.usb_ctrl_mtx); + + return val; +} + +static void mt7663u_copy(struct mt76_dev *dev, u32 offset, + const void *data, int len) +{ + struct mt76_usb *usb = &dev->usb; + int ret, i = 0, batch_len; + const u8 *val = data; + + len = round_up(len, 4); + + mutex_lock(&usb->usb_ctrl_mtx); + while (i < len) { + batch_len = min_t(int, usb->data_len, len - i); + memcpy(usb->data, val + i, batch_len); + ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT, + USB_DIR_OUT | USB_TYPE_VENDOR, + (offset + i) >> 16, offset + i, + usb->data, batch_len); + if (ret < 0) + break; + + i += batch_len; + } + mutex_unlock(&usb->usb_ctrl_mtx); +} + static void mt7663u_stop(struct ieee80211_hw *hw) { struct mt7615_phy *phy = mt7615_hw_phy(hw); @@ -65,6 +124,14 @@ static int mt7663u_probe(struct usb_interface *usb_intf, .sta_remove = mt7615_mac_sta_remove, .update_survey = mt7615_update_channel, }; + static struct mt76_bus_ops bus_ops = { + .rr = mt7663u_rr, + .wr = mt7663u_wr, + .rmw = mt7663u_rmw, + .read_copy = mt76u_read_copy, + .write_copy = mt7663u_copy, + .type = MT76_BUS_USB, + }; struct usb_device *udev = interface_to_usbdev(usb_intf); struct ieee80211_ops *ops; struct mt7615_dev *dev; @@ -91,7 +158,7 @@ static int mt7663u_probe(struct usb_interface *usb_intf, INIT_WORK(&dev->mcu_work, mt7663u_init_work); dev->reg_map = mt7663_usb_sdio_reg_map; dev->ops = ops; - ret = mt76u_init(mdev, usb_intf, true); + ret = __mt76u_init(mdev, usb_intf, &bus_ops); if (ret < 0) goto error; @@ -99,27 +166,15 @@ static int mt7663u_probe(struct usb_interface *usb_intf, (mt76_rr(dev, MT_HW_REV) & 0xff); dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev); - if (mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON, - FW_STATE_PWR_ON << 1, 500)) { - dev_dbg(dev->mt76.dev, "Usb device already powered on\n"); - set_bit(MT76_STATE_POWER_OFF, &dev->mphy.state); - goto alloc_queues; - } - - ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON, - USB_DIR_OUT | USB_TYPE_VENDOR, - 0x0, 0x1, NULL, 0); - if (ret) - goto error; - if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON, FW_STATE_PWR_ON << 1, 500)) { - dev_err(dev->mt76.dev, "Timeout for power on\n"); - ret = -EIO; - goto error; + ret = mt7663u_mcu_power_on(dev); + if (ret) + goto error; + } else { + set_bit(MT76_STATE_POWER_OFF, &dev->mphy.state); } -alloc_queues: ret = mt76u_alloc_mcu_queue(&dev->mt76); if (ret) goto error; diff --git a/drivers/net/wireless/mediatek/mt76/mt7615/usb_mcu.c b/drivers/net/wireless/mediatek/mt76/mt7615/usb_mcu.c index 0ebb4c3c336a..98bf2f6ae936 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7615/usb_mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7615/usb_mcu.c @@ -42,6 +42,26 @@ out: return ret; } +int mt7663u_mcu_power_on(struct mt7615_dev *dev) +{ + int ret; + + ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON, + USB_DIR_OUT | USB_TYPE_VENDOR, + 0x0, 0x1, NULL, 0); + if (ret) + return ret; + + if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, + MT_TOP_MISC2_FW_PWR_ON, + FW_STATE_PWR_ON << 1, 500)) { + dev_err(dev->mt76.dev, "Timeout for power on\n"); + ret = -EIO; + } + + return 0; +} + int mt7663u_mcu_init(struct mt7615_dev *dev) { static const struct mt76_mcu_ops mt7663u_mcu_ops = { @@ -57,23 +77,17 @@ int mt7663u_mcu_init(struct mt7615_dev *dev) mt76_set(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN); if (test_and_clear_bit(MT76_STATE_POWER_OFF, &dev->mphy.state)) { - mt7615_mcu_restart(&dev->mt76); + ret = mt7615_mcu_restart(&dev->mt76); + if (ret) + return ret; + if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON, 0, 500)) return -EIO; - ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON, - USB_DIR_OUT | USB_TYPE_VENDOR, - 0x0, 0x1, NULL, 0); + ret = mt7663u_mcu_power_on(dev); if (ret) return ret; - - if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, - MT_TOP_MISC2_FW_PWR_ON, - FW_STATE_PWR_ON << 1, 500)) { - dev_err(dev->mt76.dev, "Timeout for power on\n"); - return -EIO; - } } ret = __mt7663_load_firmware(dev); diff --git a/drivers/net/wireless/mediatek/mt76/mt76_connac.h b/drivers/net/wireless/mediatek/mt76/mt76_connac.h index e7f01c2978a2..400ba514460e 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76_connac.h +++ b/drivers/net/wireless/mediatek/mt76/mt76_connac.h @@ -45,9 +45,11 @@ enum { }; struct mt76_connac_pm { - bool enable; - bool ds_enable; - bool suspended; + bool enable:1; + bool enable_user:1; + bool ds_enable:1; + bool ds_enable_user:1; + bool suspended:1; spinlock_t txq_lock; struct { @@ -83,6 +85,11 @@ struct mt76_connac_coredump { unsigned long last_activity; }; +struct mt76_connac_sta_key_conf { + s8 keyidx; + u8 key[16]; +}; + extern const struct wiphy_wowlan_support mt76_connac_wowlan_support; static inline bool is_mt7922(struct mt76_dev *dev) @@ -100,6 +107,69 @@ static inline bool is_mt7663(struct mt76_dev *dev) return mt76_chip(dev) == 0x7663; } +static inline bool is_mt7915(struct mt76_dev *dev) +{ + return mt76_chip(dev) == 0x7915; +} + +static inline bool is_mt7916(struct mt76_dev *dev) +{ + return mt76_chip(dev) == 0x7906; +} + +static inline bool is_mt7986(struct mt76_dev *dev) +{ + return mt76_chip(dev) == 0x7986; +} + +static inline bool is_mt7622(struct mt76_dev *dev) +{ + if (!IS_ENABLED(CONFIG_MT7622_WMAC)) + return false; + + return mt76_chip(dev) == 0x7622; +} + +static inline bool is_mt7615(struct mt76_dev *dev) +{ + return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611; +} + +static inline bool is_mt7611(struct mt76_dev *dev) +{ + return mt76_chip(dev) == 0x7611; +} + +static inline bool is_connac_v1(struct mt76_dev *dev) +{ + return is_mt7615(dev) || is_mt7663(dev) || is_mt7622(dev); +} + +static inline u8 mt76_connac_chan_bw(struct cfg80211_chan_def *chandef) +{ + static const u8 width_to_bw[] = { + [NL80211_CHAN_WIDTH_40] = CMD_CBW_40MHZ, + [NL80211_CHAN_WIDTH_80] = CMD_CBW_80MHZ, + [NL80211_CHAN_WIDTH_80P80] = CMD_CBW_8080MHZ, + [NL80211_CHAN_WIDTH_160] = CMD_CBW_160MHZ, + [NL80211_CHAN_WIDTH_5] = CMD_CBW_5MHZ, + [NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ, + [NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ, + [NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ, + }; + + if (chandef->width >= ARRAY_SIZE(width_to_bw)) + return 0; + + return width_to_bw[chandef->width]; +} + +static inline u8 mt76_connac_lmac_mapping(u8 ac) +{ + /* LMAC uses the reverse order of mac80211 AC indexes */ + return 3 - ac; +} + int mt76_connac_pm_wake(struct mt76_phy *phy, struct mt76_connac_pm *pm); void mt76_connac_power_save_sched(struct mt76_phy *phy, struct mt76_connac_pm *pm); diff --git a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c index f79e3d5084f3..7cb17bf40e35 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c @@ -62,8 +62,8 @@ int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, }; int cmd; - if (is_mt7921(dev) && - (req.addr == cpu_to_le32(MCU_PATCH_ADDRESS) || addr == 0x900000)) + if ((!is_connac_v1(dev) && addr == MCU_PATCH_ADDRESS) || + (is_mt7921(dev) && addr == 0x900000)) cmd = MCU_CMD(PATCH_START_REQ); else cmd = MCU_CMD(TARGET_ADDRESS_LEN_REQ); @@ -266,8 +266,8 @@ mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len, EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_nested_tlv); struct sk_buff * -mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, - struct mt76_wcid *wcid) +__mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, + struct mt76_wcid *wcid, int len) { struct sta_req_hdr hdr = { .bss_idx = mvif->idx, @@ -278,7 +278,7 @@ mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo, &hdr.wlan_idx_hi); - skb = mt76_mcu_msg_alloc(dev, NULL, MT76_CONNAC_STA_UPDATE_MAX_SIZE); + skb = mt76_mcu_msg_alloc(dev, NULL, len); if (!skb) return ERR_PTR(-ENOMEM); @@ -286,7 +286,7 @@ mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, return skb; } -EXPORT_SYMBOL_GPL(mt76_connac_mcu_alloc_sta_req); +EXPORT_SYMBOL_GPL(__mt76_connac_mcu_alloc_sta_req); struct wtbl_req_hdr * mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, @@ -310,12 +310,54 @@ mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, } if (sta_hdr) - sta_hdr->len = cpu_to_le16(sizeof(hdr)); + le16_add_cpu(&sta_hdr->len, sizeof(hdr)); return skb_put_data(nskb, &hdr, sizeof(hdr)); } EXPORT_SYMBOL_GPL(mt76_connac_mcu_alloc_wtbl_req); +void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, + struct ieee80211_vif *vif) +{ + struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; + u8 omac_idx = mvif->omac_idx; + struct bss_info_omac *omac; + struct tlv *tlv; + u32 type = 0; + + switch (vif->type) { + case NL80211_IFTYPE_MONITOR: + case NL80211_IFTYPE_MESH_POINT: + case NL80211_IFTYPE_AP: + if (vif->p2p) + type = CONNECTION_P2P_GO; + else + type = CONNECTION_INFRA_AP; + break; + case NL80211_IFTYPE_STATION: + if (vif->p2p) + type = CONNECTION_P2P_GC; + else + type = CONNECTION_INFRA_STA; + break; + case NL80211_IFTYPE_ADHOC: + type = CONNECTION_IBSS_ADHOC; + break; + default: + WARN_ON(1); + break; + } + + tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac)); + + omac = (struct bss_info_omac *)tlv; + omac->conn_type = cpu_to_le32(type); + omac->omac_idx = mvif->omac_idx; + omac->band_idx = mvif->band_idx; + omac->hw_bss_idx = omac_idx > EXT_BSSID_START ? HW_BSSID_0 : omac_idx; +} +EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_omac_tlv); + void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, struct ieee80211_sta *sta, @@ -376,9 +418,8 @@ void mt76_connac_mcu_sta_basic_tlv(struct sk_buff *skb, } EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_basic_tlv); -static void -mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, - struct ieee80211_sta *sta) +void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, + struct ieee80211_sta *sta) { struct sta_rec_uapsd *uapsd; struct tlv *tlv; @@ -407,6 +448,7 @@ mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, } uapsd->max_sp = sta->max_sp; } +EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_uapsd); void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, @@ -420,13 +462,17 @@ void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, sizeof(*htr), wtbl_tlv, sta_wtbl); htr = (struct wtbl_hdr_trans *)tlv; - htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); + htr->no_rx_trans = true; if (vif->type == NL80211_IFTYPE_STATION) htr->to_ds = true; else htr->from_ds = true; + if (!wcid) + return; + + htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { htr->to_ds = true; htr->from_ds = true; @@ -461,6 +507,25 @@ int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, } EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_update_hdr_trans); +int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta) +{ + struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; + struct wtbl_req_hdr *wtbl_hdr; + struct sk_buff *skb = NULL; + + wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, NULL, + &skb); + if (IS_ERR(wtbl_hdr)) + return PTR_ERR(wtbl_hdr); + + mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, NULL, wtbl_hdr); + + return mt76_mcu_skb_send_msg(dev, skb, MCU_EXT_CMD(WTBL_UPDATE), true); +} +EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_update_hdr_trans); + void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, struct sk_buff *skb, struct ieee80211_vif *vif, @@ -488,8 +553,7 @@ void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, generic->muar_idx = mvif->omac_idx; generic->qos = sta->wme; } else { - if (is_mt7921(dev) && - vif->type == NL80211_IFTYPE_STATION) + if (!is_connac_v1(dev) && vif->type == NL80211_IFTYPE_STATION) memcpy(generic->peer_addr, vif->bss_conf.bssid, ETH_ALEN); else @@ -506,7 +570,7 @@ void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, rx->rca2 = 1; rx->rv = 1; - if (is_mt7921(dev)) + if (!is_connac_v1(dev)) return; tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SPE, sizeof(*spe), @@ -819,9 +883,9 @@ void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, } EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_tlv); -static void -mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, - void *sta_wtbl, void *wtbl_tlv) +void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, + struct ieee80211_sta *sta, + void *sta_wtbl, void *wtbl_tlv) { struct wtbl_smps *smps; struct tlv *tlv; @@ -829,30 +893,39 @@ mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps), wtbl_tlv, sta_wtbl); smps = (struct wtbl_smps *)tlv; - - if (sta->smps_mode == IEEE80211_SMPS_DYNAMIC) - smps->smps = true; + smps->smps = (sta->smps_mode == IEEE80211_SMPS_DYNAMIC); } +EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_smps_tlv); void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, struct ieee80211_sta *sta, void *sta_wtbl, - void *wtbl_tlv) + void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc) { struct wtbl_ht *ht = NULL; struct tlv *tlv; u32 flags = 0; - if (sta->ht_cap.ht_supported) { + if (sta->ht_cap.ht_supported || sta->he_6ghz_capa.capa) { tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht), wtbl_tlv, sta_wtbl); ht = (struct wtbl_ht *)tlv; - ht->ldpc = !!(sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING); - ht->af = sta->ht_cap.ampdu_factor; - ht->mm = sta->ht_cap.ampdu_density; + ht->ldpc = ht_ldpc && + !!(sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING); + + if (sta->ht_cap.ht_supported) { + ht->af = sta->ht_cap.ampdu_factor; + ht->mm = sta->ht_cap.ampdu_density; + } else { + ht->af = le16_get_bits(sta->he_6ghz_capa.capa, + IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); + ht->mm = le16_get_bits(sta->he_6ghz_capa.capa, + IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); + } + ht->ht = true; } - if (sta->vht_cap.vht_supported) { + if (sta->vht_cap.vht_supported || sta->he_6ghz_capa.capa) { struct wtbl_vht *vht; u8 af; @@ -860,7 +933,8 @@ void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, sizeof(*vht), wtbl_tlv, sta_wtbl); vht = (struct wtbl_vht *)tlv; - vht->ldpc = !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC); + vht->ldpc = vht_ldpc && + !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC); vht->vht = true; af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, @@ -871,7 +945,7 @@ void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_tlv); - if (!is_mt7921(dev) && sta->ht_cap.ht_supported) { + if (is_connac_v1(dev) && sta->ht_cap.ht_supported) { /* sgi */ u32 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 | MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160; @@ -939,7 +1013,8 @@ int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, sta_wtbl, wtbl_hdr); if (info->sta) mt76_connac_mcu_wtbl_ht_tlv(dev, skb, info->sta, - sta_wtbl, wtbl_hdr); + sta_wtbl, wtbl_hdr, + true, true); } return mt76_mcu_skb_send_msg(dev, skb, info->cmd, true); @@ -973,13 +1048,13 @@ void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, ba->rst_ba_sb = 1; } - if (is_mt7921(dev)) { + if (!is_connac_v1(dev)) { ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0; return; } if (enable && tx) { - u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; + static const u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; int i; for (i = 7; i > 0; i--) { @@ -1106,7 +1181,7 @@ EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba_tlv); int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, struct ieee80211_ampdu_params *params, - bool enable, bool tx) + int cmd, bool enable, bool tx) { struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; struct wtbl_req_hdr *wtbl_hdr; @@ -1129,8 +1204,7 @@ int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, mt76_connac_mcu_wtbl_ba_tlv(dev, skb, params, enable, tx, sta_wtbl, wtbl_hdr); - ret = mt76_mcu_skb_send_msg(dev, skb, - MCU_UNI_CMD(STA_REC_UPDATE), true); + ret = mt76_mcu_skb_send_msg(dev, skb, cmd, true); if (ret) return ret; @@ -1140,15 +1214,12 @@ int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, mt76_connac_mcu_sta_ba_tlv(skb, params, enable, tx); - return mt76_mcu_skb_send_msg(dev, skb, - MCU_UNI_CMD(STA_REC_UPDATE), true); + return mt76_mcu_skb_send_msg(dev, skb, cmd, true); } EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba); -static u8 -mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, - enum nl80211_band band, - struct ieee80211_sta *sta) +u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, + enum nl80211_band band, struct ieee80211_sta *sta) { struct mt76_dev *dev = phy->dev; const struct ieee80211_sta_he_cap *he_cap; @@ -1156,7 +1227,7 @@ mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, struct ieee80211_sta_ht_cap *ht_cap; u8 mode = 0; - if (!is_mt7921(dev)) + if (is_connac_v1(dev)) return 0x38; if (sta) { @@ -1180,7 +1251,7 @@ mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, if (he_cap && he_cap->has_he) mode |= PHY_MODE_AX_24G; - } else if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) { + } else if (band == NL80211_BAND_5GHZ) { mode |= PHY_MODE_A; if (ht_cap->ht_supported) @@ -1189,14 +1260,18 @@ mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, if (vht_cap->vht_supported) mode |= PHY_MODE_AC; - if (he_cap && he_cap->has_he && band == NL80211_BAND_5GHZ) + if (he_cap && he_cap->has_he) mode |= PHY_MODE_AX_5G; + } else if (band == NL80211_BAND_6GHZ) { + mode |= PHY_MODE_A | PHY_MODE_AN | + PHY_MODE_AC | PHY_MODE_AX_5G; } return mode; } +EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode); -static const struct ieee80211_sta_he_cap * +const struct ieee80211_sta_he_cap * mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) { enum nl80211_band band = phy->chandef.chan->band; @@ -1206,6 +1281,7 @@ mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) return ieee80211_get_he_iftype_cap(sband, vif->type); } +EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap); #define DEFAULT_HE_PE_DURATION 4 #define DEFAULT_HE_DURATION_RTS_THRES 1023 @@ -1438,7 +1514,6 @@ int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, int ext_channels_num = max_t(int, sreq->n_channels - 32, 0); struct ieee80211_channel **scan_list = sreq->channels; struct mt76_dev *mdev = phy->dev; - bool ext_phy = phy == mdev->phy2; struct mt76_connac_mcu_scan_channel *chan; struct mt76_connac_hw_scan_req *req; struct sk_buff *skb; @@ -1452,7 +1527,7 @@ int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, req = (struct mt76_connac_hw_scan_req *)skb_put(skb, sizeof(*req)); - req->seq_num = mvif->scan_seq_num | ext_phy << 7; + req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7; req->bss_idx = mvif->idx; req->scan_type = sreq->n_ssids ? 1 : 0; req->probe_req_num = sreq->n_ssids ? 2 : 0; @@ -1560,7 +1635,6 @@ int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, struct mt76_connac_mcu_scan_channel *chan; struct mt76_connac_sched_scan_req *req; struct mt76_dev *mdev = phy->dev; - bool ext_phy = phy == mdev->phy2; struct cfg80211_match_set *match; struct cfg80211_ssid *ssid; struct sk_buff *skb; @@ -1574,7 +1648,7 @@ int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, req = (struct mt76_connac_sched_scan_req *)skb_put(skb, sizeof(*req)); req->version = 1; - req->seq_num = mvif->scan_seq_num | ext_phy << 7; + req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7; if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) { u8 *addr = is_mt7663(phy->dev) ? req->mt7663.random_mac @@ -2482,5 +2556,257 @@ void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val) } EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_wr); +static int +mt76_connac_mcu_sta_key_tlv(struct mt76_connac_sta_key_conf *sta_key_conf, + struct sk_buff *skb, + struct ieee80211_key_conf *key, + enum set_key_cmd cmd) +{ + struct sta_rec_sec *sec; + u32 len = sizeof(*sec); + struct tlv *tlv; + + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); + sec = (struct sta_rec_sec *)tlv; + sec->add = cmd; + + if (cmd == SET_KEY) { + struct sec_key *sec_key; + u8 cipher; + + cipher = mt76_connac_mcu_get_cipher(key->cipher); + if (cipher == MCU_CIPHER_NONE) + return -EOPNOTSUPP; + + sec_key = &sec->key[0]; + sec_key->cipher_len = sizeof(*sec_key); + + if (cipher == MCU_CIPHER_BIP_CMAC_128) { + sec_key->cipher_id = MCU_CIPHER_AES_CCMP; + sec_key->key_id = sta_key_conf->keyidx; + sec_key->key_len = 16; + memcpy(sec_key->key, sta_key_conf->key, 16); + + sec_key = &sec->key[1]; + sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; + sec_key->cipher_len = sizeof(*sec_key); + sec_key->key_len = 16; + memcpy(sec_key->key, key->key, 16); + sec->n_cipher = 2; + } else { + sec_key->cipher_id = cipher; + sec_key->key_id = key->keyidx; + sec_key->key_len = key->keylen; + memcpy(sec_key->key, key->key, key->keylen); + + if (cipher == MCU_CIPHER_TKIP) { + /* Rx/Tx MIC keys are swapped */ + memcpy(sec_key->key + 16, key->key + 24, 8); + memcpy(sec_key->key + 24, key->key + 16, 8); + } + + /* store key_conf for BIP batch update */ + if (cipher == MCU_CIPHER_AES_CCMP) { + memcpy(sta_key_conf->key, key->key, key->keylen); + sta_key_conf->keyidx = key->keyidx; + } + + len -= sizeof(*sec_key); + sec->n_cipher = 1; + } + } else { + len -= sizeof(sec->key); + sec->n_cipher = 0; + } + sec->len = cpu_to_le16(len); + + return 0; +} + +int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, + struct mt76_connac_sta_key_conf *sta_key_conf, + struct ieee80211_key_conf *key, int mcu_cmd, + struct mt76_wcid *wcid, enum set_key_cmd cmd) +{ + struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; + struct sk_buff *skb; + int ret; + + skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); + if (IS_ERR(skb)) + return PTR_ERR(skb); + + ret = mt76_connac_mcu_sta_key_tlv(sta_key_conf, skb, key, cmd); + if (ret) + return ret; + + return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); +} +EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_key); + +/* SIFS 20us + 512 byte beacon tranmitted by 1Mbps (3906us) */ +#define BCN_TX_ESTIMATE_TIME (4096 + 20) +void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif) +{ + struct bss_info_ext_bss *ext; + int ext_bss_idx, tsf_offset; + struct tlv *tlv; + + ext_bss_idx = mvif->omac_idx - EXT_BSSID_START; + if (ext_bss_idx < 0) + return; + + tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext)); + + ext = (struct bss_info_ext_bss *)tlv; + tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; + ext->mbss_tsf_offset = cpu_to_le32(tsf_offset); +} +EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_ext_tlv); + +int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta, + struct mt76_phy *phy, u16 wlan_idx, + bool enable) +{ + struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; + u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA; + struct bss_info_basic *bss; + struct tlv *tlv; + + tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss)); + bss = (struct bss_info_basic *)tlv; + + switch (vif->type) { + case NL80211_IFTYPE_MESH_POINT: + case NL80211_IFTYPE_MONITOR: + break; + case NL80211_IFTYPE_AP: + if (ieee80211_hw_check(phy->hw, SUPPORTS_MULTI_BSSID)) { + u8 bssid_id = vif->bss_conf.bssid_indicator; + struct wiphy *wiphy = phy->hw->wiphy; + + if (bssid_id > ilog2(wiphy->mbssid_max_interfaces)) + return -EINVAL; + + bss->non_tx_bssid = vif->bss_conf.bssid_index; + bss->max_bssid = bssid_id; + } + break; + case NL80211_IFTYPE_STATION: + if (enable) { + rcu_read_lock(); + if (!sta) + sta = ieee80211_find_sta(vif, + vif->bss_conf.bssid); + /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ + if (sta) { + struct mt76_wcid *wcid; + + wcid = (struct mt76_wcid *)sta->drv_priv; + wlan_idx = wcid->idx; + } + rcu_read_unlock(); + } + break; + case NL80211_IFTYPE_ADHOC: + type = NETWORK_IBSS; + break; + default: + WARN_ON(1); + break; + } + + bss->network_type = cpu_to_le32(type); + bss->bmc_wcid_lo = to_wcid_lo(wlan_idx); + bss->bmc_wcid_hi = to_wcid_hi(wlan_idx); + bss->wmm_idx = mvif->wmm_idx; + bss->active = enable; + bss->cipher = mvif->cipher; + + if (vif->type != NL80211_IFTYPE_MONITOR) { + struct cfg80211_chan_def *chandef = &phy->chandef; + + memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); + bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); + bss->dtim_period = vif->bss_conf.dtim_period; + bss->phy_mode = mt76_connac_get_phy_mode(phy, vif, + chandef->chan->band, NULL); + } else { + memcpy(bss->bssid, phy->macaddr, ETH_ALEN); + } + + return 0; +} +EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_basic_tlv); + +#define ENTER_PM_STATE 1 +#define EXIT_PM_STATE 2 +int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter) +{ + struct { + u8 pm_number; + u8 pm_state; + u8 bssid[ETH_ALEN]; + u8 dtim_period; + u8 wlan_idx_lo; + __le16 bcn_interval; + __le32 aid; + __le32 rx_filter; + u8 band_idx; + u8 wlan_idx_hi; + u8 rsv[2]; + __le32 feature; + u8 omac_idx; + u8 wmm_idx; + u8 bcn_loss_cnt; + u8 bcn_sp_duration; + } __packed req = { + .pm_number = 5, + .pm_state = enter ? ENTER_PM_STATE : EXIT_PM_STATE, + .band_idx = band, + }; + + return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PM_STATE_CTRL), &req, + sizeof(req), true); +} +EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_pm); + +int mt76_connac_mcu_restart(struct mt76_dev *dev) +{ + struct { + u8 power_mode; + u8 rsv[3]; + } req = { + .power_mode = 1, + }; + + return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req, + sizeof(req), false); +} +EXPORT_SYMBOL_GPL(mt76_connac_mcu_restart); + +int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, + u8 rx_sel, u8 val) +{ + struct { + u8 ctrl; + u8 rdd_idx; + u8 rdd_rx_sel; + u8 val; + u8 rsv[4]; + } __packed req = { + .ctrl = cmd, + .rdd_idx = index, + .rdd_rx_sel = rx_sel, + .val = val, + }; + + return mt76_mcu_send_msg(dev, MCU_EXT_CMD(SET_RDD_CTRL), &req, + sizeof(req), true); +} +EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd); + MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h index 5baf8370b7bd..c3c93338d56a 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.h @@ -6,6 +6,26 @@ #include "mt76_connac.h" +#define FW_FEATURE_SET_ENCRYPT BIT(0) +#define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) +#define FW_FEATURE_ENCRY_MODE BIT(4) +#define FW_FEATURE_OVERRIDE_ADDR BIT(5) + +#define DL_MODE_ENCRYPT BIT(0) +#define DL_MODE_KEY_IDX GENMASK(2, 1) +#define DL_MODE_RESET_SEC_IV BIT(3) +#define DL_MODE_WORKING_PDA_CR4 BIT(4) +#define DL_MODE_VALID_RAM_ENTRY BIT(5) +#define DL_CONFIG_ENCRY_MODE_SEL BIT(6) +#define DL_MODE_NEED_RSP BIT(31) + +#define FW_START_OVERRIDE BIT(0) +#define FW_START_WORKING_PDA_CR4 BIT(2) + +#define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) +#define PATCH_SEC_TYPE_MASK GENMASK(15, 0) +#define PATCH_SEC_TYPE_INFO 0x2 + struct tlv { __le16 tag; __le16 len; @@ -570,6 +590,7 @@ struct wtbl_raw { sizeof(struct sta_rec_muru) + \ sizeof(struct sta_rec_bfee) + \ sizeof(struct sta_rec_ra) + \ + sizeof(struct sta_rec_sec) + \ sizeof(struct sta_rec_ra_fixed) + \ sizeof(struct sta_rec_he_6g_capa) + \ sizeof(struct tlv) + \ @@ -956,6 +977,7 @@ enum { MCU_EXT_CMD_SCS_CTRL = 0x82, MCU_EXT_CMD_TWT_AGRT_UPDATE = 0x94, MCU_EXT_CMD_FW_DBG_CTRL = 0x95, + MCU_EXT_CMD_OFFCH_SCAN_CTRL = 0x9a, MCU_EXT_CMD_SET_RDD_TH = 0x9d, MCU_EXT_CMD_MURU_CTRL = 0x9f, MCU_EXT_CMD_SET_SPR = 0xa8, @@ -971,6 +993,7 @@ enum { MCU_UNI_CMD_SUSPEND = 0x05, MCU_UNI_CMD_OFFLOAD = 0x06, MCU_UNI_CMD_HIF_CTRL = 0x07, + MCU_UNI_CMD_SNIFFER = 0x24, }; enum { @@ -996,7 +1019,8 @@ enum { MCU_CE_CMD_SET_BSS_CONNECTED = 0x16, MCU_CE_CMD_SET_BSS_ABORT = 0x17, MCU_CE_CMD_CANCEL_HW_SCAN = 0x1b, - MCU_CE_CMD_SET_ROC = 0x1d, + MCU_CE_CMD_SET_ROC = 0x1c, + MCU_CE_CMD_SET_EDCA_PARMS = 0x1d, MCU_CE_CMD_SET_P2P_OPPPS = 0x33, MCU_CE_CMD_SET_RATE_TX_POWER = 0x5d, MCU_CE_CMD_SCHED_SCAN_ENABLE = 0x61, @@ -1427,6 +1451,51 @@ struct mt76_connac_config { u8 data[320]; } __packed; +static inline enum mcu_cipher_type +mt76_connac_mcu_get_cipher(int cipher) +{ + switch (cipher) { + case WLAN_CIPHER_SUITE_WEP40: + return MCU_CIPHER_WEP40; + case WLAN_CIPHER_SUITE_WEP104: + return MCU_CIPHER_WEP104; + case WLAN_CIPHER_SUITE_TKIP: + return MCU_CIPHER_TKIP; + case WLAN_CIPHER_SUITE_AES_CMAC: + return MCU_CIPHER_BIP_CMAC_128; + case WLAN_CIPHER_SUITE_CCMP: + return MCU_CIPHER_AES_CCMP; + case WLAN_CIPHER_SUITE_CCMP_256: + return MCU_CIPHER_CCMP_256; + case WLAN_CIPHER_SUITE_GCMP: + return MCU_CIPHER_GCMP; + case WLAN_CIPHER_SUITE_GCMP_256: + return MCU_CIPHER_GCMP_256; + case WLAN_CIPHER_SUITE_SMS4: + return MCU_CIPHER_WAPI; + default: + return MCU_CIPHER_NONE; + } +} + +static inline u32 +mt76_connac_mcu_gen_dl_mode(struct mt76_dev *dev, u8 feature_set, bool is_wa) +{ + u32 ret = 0; + + ret |= feature_set & FW_FEATURE_SET_ENCRYPT ? + DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV : 0; + if (is_mt7921(dev)) + ret |= feature_set & FW_FEATURE_ENCRY_MODE ? + DL_CONFIG_ENCRY_MODE_SEL : 0; + ret |= FIELD_PREP(DL_MODE_KEY_IDX, + FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); + ret |= DL_MODE_NEED_RSP; + ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; + + return ret; +} + #define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) #define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) @@ -1436,7 +1505,7 @@ mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, { *wlan_idx_hi = 0; - if (is_mt7921(dev)) { + if (!is_connac_v1(dev)) { *wlan_idx_lo = wcid ? to_wcid_lo(wcid->idx) : 0; *wlan_idx_hi = wcid ? to_wcid_hi(wcid->idx) : 0; } else { @@ -1445,8 +1514,16 @@ mt76_connac_mcu_get_wlan_idx(struct mt76_dev *dev, struct mt76_wcid *wcid, } struct sk_buff * +__mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, + struct mt76_wcid *wcid, int len); +static inline struct sk_buff * mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif *mvif, - struct mt76_wcid *wcid); + struct mt76_wcid *wcid) +{ + return __mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid, + MT76_CONNAC_STA_UPDATE_MAX_SIZE); +} + struct wtbl_req_hdr * mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, int cmd, void *sta_wtbl, struct sk_buff **skb); @@ -1476,13 +1553,16 @@ void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, struct ieee80211_vif *vif, struct mt76_wcid *wcid, int cmd); +int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta); void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, struct ieee80211_sta *sta, struct ieee80211_vif *vif, u8 rcpi, u8 state); void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, struct ieee80211_sta *sta, void *sta_wtbl, - void *wtbl_tlv); + void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc); void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, struct ieee80211_ampdu_params *params, bool enable, bool tx, void *sta_wtbl, @@ -1496,7 +1576,7 @@ int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, bool enable); int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif *mvif, struct ieee80211_ampdu_params *params, - bool enable, bool tx); + int cmd, bool enable, bool tx); int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, struct ieee80211_vif *vif, struct mt76_wcid *wcid, @@ -1546,4 +1626,32 @@ int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, struct ieee80211_vif *vif); u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset); void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); + +const struct ieee80211_sta_he_cap * +mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); +u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, + enum nl80211_band band, struct ieee80211_sta *sta); + +int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, + struct mt76_connac_sta_key_conf *sta_key_conf, + struct ieee80211_key_conf *key, int mcu_cmd, + struct mt76_wcid *wcid, enum set_key_cmd cmd); + +void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif *mvif); +void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, + struct ieee80211_vif *vif); +int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, + struct ieee80211_vif *vif, + struct ieee80211_sta *sta, + struct mt76_phy *phy, u16 wlan_idx, + bool enable); +void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, + struct ieee80211_sta *sta); +void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, + struct ieee80211_sta *sta, + void *sta_wtbl, void *wtbl_tlv); +int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter); +int mt76_connac_mcu_restart(struct mt76_dev *dev); +int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, + u8 rx_sel, u8 val); #endif /* __MT76_CONNAC_MCU_H */ diff --git a/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c b/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c index 436daf6d6d86..0422c332354a 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x0/usb.c @@ -245,7 +245,7 @@ static int mt76x0u_probe(struct usb_interface *usb_intf, usb_set_intfdata(usb_intf, dev); mt76x02u_init_mcu(mdev); - ret = mt76u_init(mdev, usb_intf, false); + ret = mt76u_init(mdev, usb_intf); if (ret) goto err; diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02.h b/drivers/net/wireless/mediatek/mt76/mt76x02.h index 44d1a92d9a90..f76fd22ee035 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02.h +++ b/drivers/net/wireless/mediatek/mt76/mt76x02.h @@ -103,7 +103,8 @@ struct mt76x02_dev { u8 tbtt_count; u32 tx_hang_reset; - u8 tx_hang_check; + u8 tx_hang_check[4]; + u8 beacon_hang_check; u8 mcu_timeout; struct mt76x02_calibration cal; diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c b/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c index a601350531cd..024a5c0a5a57 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_dfs.c @@ -823,10 +823,7 @@ EXPORT_SYMBOL_GPL(mt76x02_phy_dfs_adjust_agc); void mt76x02_dfs_init_params(struct mt76x02_dev *dev) { - struct cfg80211_chan_def *chandef = &dev->mphy.chandef; - - if ((chandef->chan->flags & IEEE80211_CHAN_RADAR) && - dev->mt76.region != NL80211_DFS_UNSET) { + if (mt76_phy_dfs_state(&dev->mphy) > MT_DFS_STATE_DISABLED) { mt76x02_dfs_init_sw_detector(dev); mt76x02_dfs_set_bbp_params(dev); /* enable debug mode */ diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c b/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c index a404fd7ea968..2afad8c76ca6 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_mac.c @@ -860,9 +860,7 @@ int mt76x02_mac_process_rx(struct mt76x02_dev *dev, struct sk_buff *skb, status->chain_signal[1] = mt76x02_mac_get_rssi(dev, rxwi->rssi[1], 1); - signal = max_t(s8, signal, status->chain_signal[1]); } - status->signal = signal; status->freq = dev->mphy.chandef.chan->center_freq; status->band = dev->mphy.chandef.chan->band; @@ -1040,12 +1038,26 @@ EXPORT_SYMBOL_GPL(mt76x02_update_channel); static void mt76x02_check_mac_err(struct mt76x02_dev *dev) { - u32 val = mt76_rr(dev, 0x10f4); + if (dev->mt76.beacon_mask) { + if (mt76_rr(dev, MT_TX_STA_0) & MT_TX_STA_0_BEACONS) { + dev->beacon_hang_check = 0; + return; + } - if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5)))) - return; + if (++dev->beacon_hang_check < 10) + return; + + dev->beacon_hang_check = 0; + } else { + u32 val = mt76_rr(dev, 0x10f4); + if (!(val & BIT(29)) || !(val & (BIT(7) | BIT(5)))) + return; + } + + dev_err(dev->mt76.dev, "MAC error detected\n"); - dev_err(dev->mt76.dev, "mac specific condition occurred\n"); + mt76_wr(dev, MT_MAC_SYS_CTRL, 0); + mt76x02_wait_for_txrx_idle(&dev->mt76); mt76_set(dev, MT_MAC_SYS_CTRL, MT_MAC_SYS_CTRL_RESET_CSR); udelay(10); @@ -1178,8 +1190,7 @@ void mt76x02_mac_work(struct work_struct *work) dev->mt76.aggr_stats[idx++] += val >> 16; } - if (!dev->mt76.beacon_mask) - mt76x02_check_mac_err(dev); + mt76x02_check_mac_err(dev); if (dev->ed_monitor) mt76x02_edcca_check(dev); diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c b/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c index ec0de691129a..8bcd8afa0d3a 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c @@ -348,18 +348,20 @@ static bool mt76x02_tx_hang(struct mt76x02_dev *dev) for (i = 0; i < 4; i++) { q = dev->mphy.q_tx[i]; - if (!q->queued) - continue; - prev_dma_idx = dev->mt76.tx_dma_idx[i]; dma_idx = readl(&q->regs->dma_idx); dev->mt76.tx_dma_idx[i] = dma_idx; - if (prev_dma_idx == dma_idx) - break; + if (!q->queued || prev_dma_idx != dma_idx) { + dev->tx_hang_check[i] = 0; + continue; + } + + if (++dev->tx_hang_check[i] >= MT_TX_HANG_TH) + return true; } - return i < 4; + return false; } static void mt76x02_key_sync(struct ieee80211_hw *hw, struct ieee80211_vif *vif, @@ -530,23 +532,13 @@ static void mt76x02_check_tx_hang(struct mt76x02_dev *dev) if (test_bit(MT76_RESTART, &dev->mphy.state)) return; - if (mt76x02_tx_hang(dev)) { - if (++dev->tx_hang_check >= MT_TX_HANG_TH) - goto restart; - } else { - dev->tx_hang_check = 0; - } - - if (dev->mcu_timeout) - goto restart; - - return; + if (!mt76x02_tx_hang(dev) && !dev->mcu_timeout) + return; -restart: mt76x02_watchdog_reset(dev); dev->tx_hang_reset++; - dev->tx_hang_check = 0; + memset(dev->tx_hang_check, 0, sizeof(dev->tx_hang_check)); memset(dev->mt76.tx_dma_idx, 0xff, sizeof(dev->mt76.tx_dma_idx)); } diff --git a/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h b/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h index fa7872ac22bf..fe0c5e3298bc 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt76x02_regs.h @@ -571,6 +571,8 @@ #define MT_RX_STAT_2_OVERFLOW_ERRORS GENMASK(31, 16) #define MT_TX_STA_0 0x170c +#define MT_TX_STA_0_BEACONS GENMASK(31, 16) + #define MT_TX_STA_1 0x1710 #define MT_TX_STA_2 0x1714 diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c b/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c index 2575369e44e2..55068f3252ef 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x2/usb.c @@ -57,7 +57,7 @@ static int mt76x2u_probe(struct usb_interface *intf, usb_set_intfdata(intf, dev); mt76x02u_init_mcu(mdev); - err = mt76u_init(mdev, intf, false); + err = mt76u_init(mdev, intf); if (err < 0) goto err; diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/Kconfig b/drivers/net/wireless/mediatek/mt76/mt7915/Kconfig index d98225da694c..f21282cea845 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/Kconfig +++ b/drivers/net/wireless/mediatek/mt76/mt7915/Kconfig @@ -1,9 +1,10 @@ # SPDX-License-Identifier: ISC config MT7915E tristate "MediaTek MT7915E (PCIe) support" - select MT76_CORE + select MT76_CONNAC_LIB depends on MAC80211 depends on PCI + select RELAY help This adds support for MT7915-based wireless PCIe devices, which support concurrent dual-band operation at both 5GHz @@ -11,3 +12,13 @@ config MT7915E OFDMA, spatial reuse and dual carrier modulation. To compile this driver as a module, choose M here. + +config MT7986_WMAC + bool "MT7986 (SoC) WMAC support" + depends on MT7915E + depends on ARCH_MEDIATEK || COMPILE_TEST + select REGMAP + help + This adds support for the built-in WMAC on MT7986 SoC device + which has the same feature set as a MT7915, but enables 6E + support. diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/Makefile b/drivers/net/wireless/mediatek/mt76/mt7915/Makefile index 80e49244348e..b794ceb79c37 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/Makefile +++ b/drivers/net/wireless/mediatek/mt76/mt7915/Makefile @@ -6,3 +6,4 @@ mt7915e-y := pci.o init.o dma.o eeprom.o main.o mcu.o mac.o \ debugfs.o mmio.o mt7915e-$(CONFIG_NL80211_TESTMODE) += testmode.o +mt7915e-$(CONFIG_MT7986_WMAC) += soc.o
\ No newline at end of file diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c b/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c index e96d1c31dd36..4e1ecaec8f4f 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/debugfs.c @@ -1,9 +1,13 @@ // SPDX-License-Identifier: ISC /* Copyright (C) 2020 MediaTek Inc. */ +#include <linux/relay.h> #include "mt7915.h" #include "eeprom.h" #include "mcu.h" +#include "mac.h" + +#define FW_BIN_LOG_MAGIC 0x44e98caf /** global debugfs **/ @@ -75,7 +79,11 @@ mt7915_radar_trigger(void *data, u64 val) { struct mt7915_dev *dev = data; - return mt7915_mcu_rdd_cmd(dev, RDD_RADAR_EMULATE, 1, 0, 0); + if (val > MT_RX_SEL2) + return -EINVAL; + + return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_RADAR_EMULATE, + val, 0, 0); } DEFINE_DEBUGFS_ATTRIBUTE(fops_radar_trigger, NULL, @@ -301,6 +309,53 @@ exit: DEFINE_SHOW_ATTRIBUTE(mt7915_muru_stats); static int +mt7915_rdd_monitor(struct seq_file *s, void *data) +{ + struct mt7915_dev *dev = dev_get_drvdata(s->private); + struct cfg80211_chan_def *chandef = &dev->rdd2_chandef; + const char *bw; + int ret = 0; + + mutex_lock(&dev->mt76.mutex); + + if (!cfg80211_chandef_valid(chandef)) { + ret = -EINVAL; + goto out; + } + + if (!dev->rdd2_phy) { + seq_puts(s, "not running\n"); + goto out; + } + + switch (chandef->width) { + case NL80211_CHAN_WIDTH_40: + bw = "40"; + break; + case NL80211_CHAN_WIDTH_80: + bw = "80"; + break; + case NL80211_CHAN_WIDTH_160: + bw = "160"; + break; + case NL80211_CHAN_WIDTH_80P80: + bw = "80P80"; + break; + default: + bw = "20"; + break; + } + + seq_printf(s, "channel %d (%d MHz) width %s MHz center1: %d MHz\n", + chandef->chan->hw_value, chandef->chan->center_freq, + bw, chandef->center_freq1); +out: + mutex_unlock(&dev->mt76.mutex); + + return ret; +} + +static int mt7915_fw_debug_wm_set(void *data, u64 val) { struct mt7915_dev *dev = data; @@ -311,16 +366,31 @@ mt7915_fw_debug_wm_set(void *data, u64 val) DEBUG_SPL, DEBUG_RPT_RX, } debug; + bool tx, rx, en; int ret; dev->fw_debug_wm = val ? MCU_FW_LOG_TO_HOST : 0; - ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, dev->fw_debug_wm); + if (dev->fw_debug_bin) + val = 16; + else + val = dev->fw_debug_wm; + + tx = dev->fw_debug_wm || (dev->fw_debug_bin & BIT(1)); + rx = dev->fw_debug_wm || (dev->fw_debug_bin & BIT(2)); + en = dev->fw_debug_wm || (dev->fw_debug_bin & BIT(0)); + + ret = mt7915_mcu_fw_log_2_host(dev, MCU_FW_LOG_WM, val); if (ret) return ret; for (debug = DEBUG_TXCMD; debug <= DEBUG_RPT_RX; debug++) { - ret = mt7915_mcu_fw_dbg_ctrl(dev, debug, !!dev->fw_debug_wm); + if (debug == DEBUG_RPT_RX) + val = en && rx; + else + val = en && tx; + + ret = mt7915_mcu_fw_dbg_ctrl(dev, debug, val); if (ret) return ret; } @@ -376,6 +446,65 @@ mt7915_fw_debug_wa_get(void *data, u64 *val) DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_wa, mt7915_fw_debug_wa_get, mt7915_fw_debug_wa_set, "%lld\n"); +static struct dentry * +create_buf_file_cb(const char *filename, struct dentry *parent, umode_t mode, + struct rchan_buf *buf, int *is_global) +{ + struct dentry *f; + + f = debugfs_create_file("fwlog_data", mode, parent, buf, + &relay_file_operations); + if (IS_ERR(f)) + return NULL; + + *is_global = 1; + + return f; +} + +static int +remove_buf_file_cb(struct dentry *f) +{ + debugfs_remove(f); + + return 0; +} + +static int +mt7915_fw_debug_bin_set(void *data, u64 val) +{ + static struct rchan_callbacks relay_cb = { + .create_buf_file = create_buf_file_cb, + .remove_buf_file = remove_buf_file_cb, + }; + struct mt7915_dev *dev = data; + + if (!dev->relay_fwlog) + dev->relay_fwlog = relay_open("fwlog_data", dev->debugfs_dir, + 1500, 512, &relay_cb, NULL); + if (!dev->relay_fwlog) + return -ENOMEM; + + dev->fw_debug_bin = val; + + relay_reset(dev->relay_fwlog); + + return mt7915_fw_debug_wm_set(dev, dev->fw_debug_wm); +} + +static int +mt7915_fw_debug_bin_get(void *data, u64 *val) +{ + struct mt7915_dev *dev = data; + + *val = dev->fw_debug_bin; + + return 0; +} + +DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug_bin, mt7915_fw_debug_bin_get, + mt7915_fw_debug_bin_set, "%lld\n"); + static int mt7915_fw_util_wm_show(struct seq_file *file, void *data) { @@ -419,12 +548,12 @@ mt7915_ampdu_stat_read_phy(struct mt7915_phy *phy, /* Tx ampdu stat */ for (i = 0; i < ARRAY_SIZE(range); i++) - range[i] = mt76_rr(dev, MT_MIB_ARNG(ext_phy, i)); + range[i] = mt76_rr(dev, MT_MIB_ARNG(phy->band_idx, i)); for (i = 0; i < ARRAY_SIZE(bound); i++) bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i % 4) + 1; - seq_printf(file, "\nPhy %d\n", ext_phy); + seq_printf(file, "\nPhy %d, Phy band %d\n", ext_phy, phy->band_idx); seq_printf(file, "Length: %8d | ", bound[0]); for (i = 0; i < ARRAY_SIZE(bound) - 1; i++) @@ -432,7 +561,7 @@ mt7915_ampdu_stat_read_phy(struct mt7915_phy *phy, bound[i] + 1, bound[i + 1]); seq_puts(file, "\nCount: "); - n = ext_phy ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; + n = phy->band_idx ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; for (i = 0; i < ARRAY_SIZE(bound); i++) seq_printf(file, "%8d | ", dev->mt76.aggr_stats[i + n]); seq_puts(file, "\n"); @@ -521,14 +650,14 @@ mt7915_tx_stats_show(struct seq_file *file, void *data) DEFINE_SHOW_ATTRIBUTE(mt7915_tx_stats); static void -mt7915_hw_queue_read(struct seq_file *s, u32 base, u32 size, +mt7915_hw_queue_read(struct seq_file *s, u32 size, const struct hw_queue_map *map) { struct mt7915_phy *phy = s->private; struct mt7915_dev *dev = phy->dev; u32 i, val; - val = mt76_rr(dev, base + MT_FL_Q_EMPTY); + val = mt76_rr(dev, MT_FL_Q_EMPTY); for (i = 0; i < size; i++) { u32 ctrl, head, tail, queued; @@ -536,13 +665,13 @@ mt7915_hw_queue_read(struct seq_file *s, u32 base, u32 size, continue; ctrl = BIT(31) | (map[i].pid << 10) | (map[i].qid << 24); - mt76_wr(dev, base + MT_FL_Q0_CTRL, ctrl); + mt76_wr(dev, MT_FL_Q0_CTRL, ctrl); - head = mt76_get_field(dev, base + MT_FL_Q2_CTRL, + head = mt76_get_field(dev, MT_FL_Q2_CTRL, GENMASK(11, 0)); - tail = mt76_get_field(dev, base + MT_FL_Q2_CTRL, + tail = mt76_get_field(dev, MT_FL_Q2_CTRL, GENMASK(27, 16)); - queued = mt76_get_field(dev, base + MT_FL_Q3_CTRL, + queued = mt76_get_field(dev, MT_FL_Q3_CTRL, GENMASK(11, 0)); seq_printf(s, "\t%s: ", map[i].name); @@ -570,8 +699,8 @@ mt7915_sta_hw_queue_read(void *data, struct ieee80211_sta *sta) if (val & BIT(offs)) continue; - mt76_wr(dev, MT_PLE_BASE + MT_FL_Q0_CTRL, ctrl | msta->wcid.idx); - qlen = mt76_get_field(dev, MT_PLE_BASE + MT_FL_Q3_CTRL, + mt76_wr(dev, MT_FL_Q0_CTRL, ctrl | msta->wcid.idx); + qlen = mt76_get_field(dev, MT_FL_Q3_CTRL, GENMASK(11, 0)); seq_printf(s, "\tSTA %pM wcid %d: AC%d%d queued:%d\n", sta->addr, msta->wcid.idx, @@ -633,7 +762,7 @@ mt7915_hw_queues_show(struct seq_file *file, void *data) val, head, tail); seq_puts(file, "PLE non-empty queue info:\n"); - mt7915_hw_queue_read(file, MT_PLE_BASE, ARRAY_SIZE(ple_queue_map), + mt7915_hw_queue_read(file, ARRAY_SIZE(ple_queue_map), &ple_queue_map[0]); /* iterate per-sta ple queue */ @@ -641,7 +770,7 @@ mt7915_hw_queues_show(struct seq_file *file, void *data) mt7915_sta_hw_queue_read, file); /* pse queue */ seq_puts(file, "PSE non-empty queue info:\n"); - mt7915_hw_queue_read(file, MT_PSE_BASE, ARRAY_SIZE(pse_queue_map), + mt7915_hw_queue_read(file, ARRAY_SIZE(pse_queue_map), &pse_queue_map[0]); return 0; @@ -757,6 +886,7 @@ int mt7915_init_debugfs(struct mt7915_phy *phy) debugfs_create_file("tx_stats", 0400, dir, phy, &mt7915_tx_stats_fops); debugfs_create_file("fw_debug_wm", 0600, dir, dev, &fops_fw_debug_wm); debugfs_create_file("fw_debug_wa", 0600, dir, dev, &fops_fw_debug_wa); + debugfs_create_file("fw_debug_bin", 0600, dir, dev, &fops_fw_debug_bin); debugfs_create_file("fw_util_wm", 0400, dir, dev, &mt7915_fw_util_wm_fops); debugfs_create_file("fw_util_wa", 0400, dir, dev, @@ -768,16 +898,77 @@ int mt7915_init_debugfs(struct mt7915_phy *phy) debugfs_create_devm_seqfile(dev->mt76.dev, "twt_stats", dir, mt7915_twt_stats); debugfs_create_file("ser_trigger", 0200, dir, dev, &fops_ser_trigger); - if (!dev->dbdc_support || ext_phy) { + if (!dev->dbdc_support || phy->band_idx) { debugfs_create_u32("dfs_hw_pattern", 0400, dir, &dev->hw_pattern); debugfs_create_file("radar_trigger", 0200, dir, dev, &fops_radar_trigger); + debugfs_create_devm_seqfile(dev->mt76.dev, "rdd_monitor", dir, + mt7915_rdd_monitor); } + if (!ext_phy) + dev->debugfs_dir = dir; + return 0; } +static void +mt7915_debugfs_write_fwlog(struct mt7915_dev *dev, const void *hdr, int hdrlen, + const void *data, int len) +{ + static DEFINE_SPINLOCK(lock); + unsigned long flags; + void *dest; + + spin_lock_irqsave(&lock, flags); + dest = relay_reserve(dev->relay_fwlog, hdrlen + len + 4); + if (dest) { + *(u32 *)dest = hdrlen + len; + dest += 4; + + if (hdrlen) { + memcpy(dest, hdr, hdrlen); + dest += hdrlen; + } + + memcpy(dest, data, len); + relay_flush(dev->relay_fwlog); + } + spin_unlock_irqrestore(&lock, flags); +} + +void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len) +{ + struct { + __le32 magic; + __le32 timestamp; + __le16 msg_type; + __le16 len; + } hdr = { + .magic = cpu_to_le32(FW_BIN_LOG_MAGIC), + .msg_type = cpu_to_le16(PKT_TYPE_RX_FW_MONITOR), + }; + + if (!dev->relay_fwlog) + return; + + hdr.timestamp = cpu_to_le32(mt76_rr(dev, MT_LPON_FRCR(0))); + hdr.len = *(__le16 *)data; + mt7915_debugfs_write_fwlog(dev, &hdr, sizeof(hdr), data, len); +} + +bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len) +{ + if (get_unaligned_le32(data) != FW_BIN_LOG_MAGIC) + return false; + + if (dev->relay_fwlog) + mt7915_debugfs_write_fwlog(dev, NULL, 0, data, len); + + return true; +} + #ifdef CONFIG_MAC80211_DEBUGFS /** per-station debugfs **/ diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/dma.c b/drivers/net/wireless/mediatek/mt76/mt7915/dma.c index 9182568f95c7..49b4d8ade16b 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/dma.c @@ -5,11 +5,11 @@ #include "../dma.h" #include "mac.h" -int mt7915_init_tx_queues(struct mt7915_phy *phy, int idx, int n_desc) +int mt7915_init_tx_queues(struct mt7915_phy *phy, int idx, int n_desc, int ring_base) { int i, err; - err = mt76_init_tx_queue(phy->mt76, 0, idx, n_desc, MT_TX_RING_BASE); + err = mt76_init_tx_queue(phy->mt76, 0, idx, n_desc, ring_base); if (err < 0) return err; @@ -40,140 +40,392 @@ static int mt7915_poll_tx(struct napi_struct *napi, int budget) return 0; } +static void mt7915_dma_config(struct mt7915_dev *dev) +{ +#define Q_CONFIG(q, wfdma, int, id) do { \ + if (wfdma) \ + dev->wfdma_mask |= (1 << (q)); \ + dev->q_int_mask[(q)] = int; \ + dev->q_id[(q)] = id; \ + } while (0) + +#define MCUQ_CONFIG(q, wfdma, int, id) Q_CONFIG(q, (wfdma), (int), (id)) +#define RXQ_CONFIG(q, wfdma, int, id) Q_CONFIG(__RXQ(q), (wfdma), (int), (id)) +#define TXQ_CONFIG(q, wfdma, int, id) Q_CONFIG(__TXQ(q), (wfdma), (int), (id)) + + if (is_mt7915(&dev->mt76)) { + RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0, MT7915_RXQ_BAND0); + RXQ_CONFIG(MT_RXQ_MCU, WFDMA1, MT_INT_RX_DONE_WM, MT7915_RXQ_MCU_WM); + RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA1, MT_INT_RX_DONE_WA, MT7915_RXQ_MCU_WA); + RXQ_CONFIG(MT_RXQ_EXT, WFDMA0, MT_INT_RX_DONE_BAND1, MT7915_RXQ_BAND1); + RXQ_CONFIG(MT_RXQ_EXT_WA, WFDMA1, MT_INT_RX_DONE_WA_EXT, MT7915_RXQ_MCU_WA_EXT); + RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA1, MT_INT_RX_DONE_WA_MAIN, MT7915_RXQ_MCU_WA); + TXQ_CONFIG(0, WFDMA1, MT_INT_TX_DONE_BAND0, MT7915_TXQ_BAND0); + TXQ_CONFIG(1, WFDMA1, MT_INT_TX_DONE_BAND1, MT7915_TXQ_BAND1); + MCUQ_CONFIG(MT_MCUQ_WM, WFDMA1, MT_INT_TX_DONE_MCU_WM, MT7915_TXQ_MCU_WM); + MCUQ_CONFIG(MT_MCUQ_WA, WFDMA1, MT_INT_TX_DONE_MCU_WA, MT7915_TXQ_MCU_WA); + MCUQ_CONFIG(MT_MCUQ_FWDL, WFDMA1, MT_INT_TX_DONE_FWDL, MT7915_TXQ_FWDL); + } else { + RXQ_CONFIG(MT_RXQ_MAIN, WFDMA0, MT_INT_RX_DONE_BAND0_MT7916, MT7916_RXQ_BAND0); + RXQ_CONFIG(MT_RXQ_MCU, WFDMA0, MT_INT_RX_DONE_WM, MT7916_RXQ_MCU_WM); + RXQ_CONFIG(MT_RXQ_MCU_WA, WFDMA0, MT_INT_RX_DONE_WA, MT7916_RXQ_MCU_WA); + RXQ_CONFIG(MT_RXQ_EXT, WFDMA0, MT_INT_RX_DONE_BAND1_MT7916, MT7916_RXQ_BAND1); + RXQ_CONFIG(MT_RXQ_EXT_WA, WFDMA0, MT_INT_RX_DONE_WA_EXT_MT7916, MT7916_RXQ_MCU_WA_EXT); + RXQ_CONFIG(MT_RXQ_MAIN_WA, WFDMA0, MT_INT_RX_DONE_WA_MAIN_MT7916, MT7916_RXQ_MCU_WA_MAIN); + TXQ_CONFIG(0, WFDMA0, MT_INT_TX_DONE_BAND0, MT7915_TXQ_BAND0); + TXQ_CONFIG(1, WFDMA0, MT_INT_TX_DONE_BAND1, MT7915_TXQ_BAND1); + MCUQ_CONFIG(MT_MCUQ_WM, WFDMA0, MT_INT_TX_DONE_MCU_WM, MT7915_TXQ_MCU_WM); + MCUQ_CONFIG(MT_MCUQ_WA, WFDMA0, MT_INT_TX_DONE_MCU_WA_MT7916, MT7915_TXQ_MCU_WA); + MCUQ_CONFIG(MT_MCUQ_FWDL, WFDMA0, MT_INT_TX_DONE_FWDL, MT7915_TXQ_FWDL); + } +} + static void __mt7915_dma_prefetch(struct mt7915_dev *dev, u32 ofs) { -#define PREFETCH(base, depth) ((base) << 16 | (depth)) - - mt76_wr(dev, MT_WFDMA0_RX_RING0_EXT_CTRL + ofs, PREFETCH(0x0, 0x4)); - mt76_wr(dev, MT_WFDMA0_RX_RING1_EXT_CTRL + ofs, PREFETCH(0x40, 0x4)); - mt76_wr(dev, MT_WFDMA0_RX_RING2_EXT_CTRL + ofs, PREFETCH(0x80, 0x0)); - - mt76_wr(dev, MT_WFDMA1_TX_RING0_EXT_CTRL + ofs, PREFETCH(0x80, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING1_EXT_CTRL + ofs, PREFETCH(0xc0, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING2_EXT_CTRL + ofs, PREFETCH(0x100, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING3_EXT_CTRL + ofs, PREFETCH(0x140, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING4_EXT_CTRL + ofs, PREFETCH(0x180, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING5_EXT_CTRL + ofs, PREFETCH(0x1c0, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING6_EXT_CTRL + ofs, PREFETCH(0x200, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING7_EXT_CTRL + ofs, PREFETCH(0x240, 0x4)); - - mt76_wr(dev, MT_WFDMA1_TX_RING16_EXT_CTRL + ofs, PREFETCH(0x280, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING17_EXT_CTRL + ofs, PREFETCH(0x2c0, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING18_EXT_CTRL + ofs, PREFETCH(0x300, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING19_EXT_CTRL + ofs, PREFETCH(0x340, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING20_EXT_CTRL + ofs, PREFETCH(0x380, 0x4)); - mt76_wr(dev, MT_WFDMA1_TX_RING21_EXT_CTRL + ofs, PREFETCH(0x3c0, 0x0)); - - mt76_wr(dev, MT_WFDMA1_RX_RING0_EXT_CTRL + ofs, PREFETCH(0x3c0, 0x4)); - mt76_wr(dev, MT_WFDMA1_RX_RING1_EXT_CTRL + ofs, PREFETCH(0x400, 0x4)); - mt76_wr(dev, MT_WFDMA1_RX_RING2_EXT_CTRL + ofs, PREFETCH(0x440, 0x4)); - mt76_wr(dev, MT_WFDMA1_RX_RING3_EXT_CTRL + ofs, PREFETCH(0x480, 0x0)); +#define PREFETCH(_base, _depth) ((_base) << 16 | (_depth)) + u32 base = 0; + + /* prefetch SRAM wrapping boundary for tx/rx ring. */ + mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_FWDL) + ofs, PREFETCH(0x0, 0x4)); + mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WM) + ofs, PREFETCH(0x40, 0x4)); + mt76_wr(dev, MT_TXQ_EXT_CTRL(0) + ofs, PREFETCH(0x80, 0x4)); + mt76_wr(dev, MT_TXQ_EXT_CTRL(1) + ofs, PREFETCH(0xc0, 0x4)); + mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs, PREFETCH(0x100, 0x4)); + + mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_MCU) + ofs, PREFETCH(0x140, 0x4)); + mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_MCU_WA) + ofs, PREFETCH(0x180, 0x4)); + if (!is_mt7915(&dev->mt76)) { + mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_MAIN_WA) + ofs, PREFETCH(0x1c0, 0x4)); + base = 0x40; + } + mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_EXT_WA) + ofs, PREFETCH(0x1c0 + base, 0x4)); + mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_MAIN) + ofs, PREFETCH(0x200 + base, 0x4)); + mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_EXT) + ofs, PREFETCH(0x240 + base, 0x4)); + + /* for mt7915, the ring which is next the last + * used ring must be initialized. + */ + if (is_mt7915(&dev->mt76)) { + ofs += 0x4; + mt76_wr(dev, MT_MCUQ_EXT_CTRL(MT_MCUQ_WA) + ofs, PREFETCH(0x140, 0x0)); + mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_EXT_WA) + ofs, PREFETCH(0x200 + base, 0x0)); + mt76_wr(dev, MT_RXQ_EXT_CTRL(MT_RXQ_EXT) + ofs, PREFETCH(0x280 + base, 0x0)); + } } void mt7915_dma_prefetch(struct mt7915_dev *dev) { __mt7915_dma_prefetch(dev, 0); if (dev->hif2) - __mt7915_dma_prefetch(dev, MT_WFDMA1_PCIE1_BASE - MT_WFDMA1_BASE); + __mt7915_dma_prefetch(dev, MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0)); } -int mt7915_dma_init(struct mt7915_dev *dev) +static void mt7915_dma_disable(struct mt7915_dev *dev, bool rst) { + struct mt76_dev *mdev = &dev->mt76; u32 hif1_ofs = 0; - int ret; - - mt76_dma_attach(&dev->mt76); if (dev->hif2) - hif1_ofs = MT_WFDMA1_PCIE1_BASE - MT_WFDMA1_BASE; + hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); + + /* reset */ + if (rst) { + mt76_clear(dev, MT_WFDMA0_RST, + MT_WFDMA0_RST_DMASHDL_ALL_RST | + MT_WFDMA0_RST_LOGIC_RST); + + mt76_set(dev, MT_WFDMA0_RST, + MT_WFDMA0_RST_DMASHDL_ALL_RST | + MT_WFDMA0_RST_LOGIC_RST); + + if (is_mt7915(mdev)) { + mt76_clear(dev, MT_WFDMA1_RST, + MT_WFDMA1_RST_DMASHDL_ALL_RST | + MT_WFDMA1_RST_LOGIC_RST); + + mt76_set(dev, MT_WFDMA1_RST, + MT_WFDMA1_RST_DMASHDL_ALL_RST | + MT_WFDMA1_RST_LOGIC_RST); + } + + if (dev->hif2) { + mt76_clear(dev, MT_WFDMA0_RST + hif1_ofs, + MT_WFDMA0_RST_DMASHDL_ALL_RST | + MT_WFDMA0_RST_LOGIC_RST); + + mt76_set(dev, MT_WFDMA0_RST + hif1_ofs, + MT_WFDMA0_RST_DMASHDL_ALL_RST | + MT_WFDMA0_RST_LOGIC_RST); + + if (is_mt7915(mdev)) { + mt76_clear(dev, MT_WFDMA1_RST + hif1_ofs, + MT_WFDMA1_RST_DMASHDL_ALL_RST | + MT_WFDMA1_RST_LOGIC_RST); + + mt76_set(dev, MT_WFDMA1_RST + hif1_ofs, + MT_WFDMA1_RST_DMASHDL_ALL_RST | + MT_WFDMA1_RST_LOGIC_RST); + } + } + } + + /* disable */ + mt76_clear(dev, MT_WFDMA0_GLO_CFG, + MT_WFDMA0_GLO_CFG_TX_DMA_EN | + MT_WFDMA0_GLO_CFG_RX_DMA_EN | + MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); + + if (is_mt7915(mdev)) + mt76_clear(dev, MT_WFDMA1_GLO_CFG, + MT_WFDMA1_GLO_CFG_TX_DMA_EN | + MT_WFDMA1_GLO_CFG_RX_DMA_EN | + MT_WFDMA1_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA1_GLO_CFG_OMIT_RX_INFO | + MT_WFDMA1_GLO_CFG_OMIT_RX_INFO_PFET2); + + if (dev->hif2) { + mt76_clear(dev, MT_WFDMA0_GLO_CFG + hif1_ofs, + MT_WFDMA0_GLO_CFG_TX_DMA_EN | + MT_WFDMA0_GLO_CFG_RX_DMA_EN | + MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); + + if (is_mt7915(mdev)) + mt76_clear(dev, MT_WFDMA1_GLO_CFG + hif1_ofs, + MT_WFDMA1_GLO_CFG_TX_DMA_EN | + MT_WFDMA1_GLO_CFG_RX_DMA_EN | + MT_WFDMA1_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA1_GLO_CFG_OMIT_RX_INFO | + MT_WFDMA1_GLO_CFG_OMIT_RX_INFO_PFET2); + } +} - /* configure global setting */ - mt76_set(dev, MT_WFDMA1_GLO_CFG, - MT_WFDMA1_GLO_CFG_OMIT_TX_INFO | - MT_WFDMA1_GLO_CFG_OMIT_RX_INFO); +static int mt7915_dma_enable(struct mt7915_dev *dev) +{ + struct mt76_dev *mdev = &dev->mt76; + u32 hif1_ofs = 0; + u32 irq_mask; + + if (dev->hif2) + hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); /* reset dma idx */ mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0); - mt76_wr(dev, MT_WFDMA1_RST_DTX_PTR, ~0); + if (is_mt7915(mdev)) + mt76_wr(dev, MT_WFDMA1_RST_DTX_PTR, ~0); + if (dev->hif2) { + mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR + hif1_ofs, ~0); + if (is_mt7915(mdev)) + mt76_wr(dev, MT_WFDMA1_RST_DTX_PTR + hif1_ofs, ~0); + } - /* configure delay interrupt */ + /* configure delay interrupt off */ mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0, 0); - mt76_wr(dev, MT_WFDMA1_PRI_DLY_INT_CFG0, 0); + if (is_mt7915(mdev)) { + mt76_wr(dev, MT_WFDMA1_PRI_DLY_INT_CFG0, 0); + } else { + mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG1, 0); + mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG2, 0); + } if (dev->hif2) { - mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs, + mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0 + hif1_ofs, 0); + if (is_mt7915(mdev)) { + mt76_wr(dev, MT_WFDMA1_PRI_DLY_INT_CFG0 + + hif1_ofs, 0); + } else { + mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG1 + + hif1_ofs, 0); + mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG2 + + hif1_ofs, 0); + } + } + + /* configure perfetch settings */ + mt7915_dma_prefetch(dev); + + /* hif wait WFDMA idle */ + mt76_set(dev, MT_WFDMA0_BUSY_ENA, + MT_WFDMA0_BUSY_ENA_TX_FIFO0 | + MT_WFDMA0_BUSY_ENA_TX_FIFO1 | + MT_WFDMA0_BUSY_ENA_RX_FIFO); + + if (is_mt7915(mdev)) + mt76_set(dev, MT_WFDMA1_BUSY_ENA, + MT_WFDMA1_BUSY_ENA_TX_FIFO0 | + MT_WFDMA1_BUSY_ENA_TX_FIFO1 | + MT_WFDMA1_BUSY_ENA_RX_FIFO); + + if (dev->hif2) { + mt76_set(dev, MT_WFDMA0_BUSY_ENA + hif1_ofs, + MT_WFDMA0_PCIE1_BUSY_ENA_TX_FIFO0 | + MT_WFDMA0_PCIE1_BUSY_ENA_TX_FIFO1 | + MT_WFDMA0_PCIE1_BUSY_ENA_RX_FIFO); + + if (is_mt7915(mdev)) + mt76_set(dev, MT_WFDMA1_BUSY_ENA + hif1_ofs, + MT_WFDMA1_PCIE1_BUSY_ENA_TX_FIFO0 | + MT_WFDMA1_PCIE1_BUSY_ENA_TX_FIFO1 | + MT_WFDMA1_PCIE1_BUSY_ENA_RX_FIFO); + } + + mt76_poll(dev, MT_WFDMA_EXT_CSR_HIF_MISC, + MT_WFDMA_EXT_CSR_HIF_MISC_BUSY, 0, 1000); + + /* set WFDMA Tx/Rx */ + mt76_set(dev, MT_WFDMA0_GLO_CFG, + MT_WFDMA0_GLO_CFG_TX_DMA_EN | + MT_WFDMA0_GLO_CFG_RX_DMA_EN | + MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); + + if (is_mt7915(mdev)) + mt76_set(dev, MT_WFDMA1_GLO_CFG, + MT_WFDMA1_GLO_CFG_TX_DMA_EN | + MT_WFDMA1_GLO_CFG_RX_DMA_EN | MT_WFDMA1_GLO_CFG_OMIT_TX_INFO | MT_WFDMA1_GLO_CFG_OMIT_RX_INFO); - mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR + hif1_ofs, ~0); - mt76_wr(dev, MT_WFDMA1_RST_DTX_PTR + hif1_ofs, ~0); + if (dev->hif2) { + mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs, + MT_WFDMA0_GLO_CFG_TX_DMA_EN | + MT_WFDMA0_GLO_CFG_RX_DMA_EN | + MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2); + + if (is_mt7915(mdev)) + mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs, + MT_WFDMA1_GLO_CFG_TX_DMA_EN | + MT_WFDMA1_GLO_CFG_RX_DMA_EN | + MT_WFDMA1_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA1_GLO_CFG_OMIT_RX_INFO); - mt76_wr(dev, MT_WFDMA0_PRI_DLY_INT_CFG0 + hif1_ofs, 0); - mt76_wr(dev, MT_WFDMA1_PRI_DLY_INT_CFG0 + hif1_ofs, 0); + mt76_set(dev, MT_WFDMA_HOST_CONFIG, + MT_WFDMA_HOST_CONFIG_PDMA_BAND); } - /* configure perfetch settings */ - mt7915_dma_prefetch(dev); + /* enable interrupts for TX/RX rings */ + irq_mask = MT_INT_RX_DONE_MCU | + MT_INT_TX_DONE_MCU | + MT_INT_MCU_CMD; + + if (!dev->phy.band_idx) + irq_mask |= MT_INT_BAND0_RX_DONE; + + if (dev->dbdc_support || dev->phy.band_idx) + irq_mask |= MT_INT_BAND1_RX_DONE; + + mt7915_irq_enable(dev, irq_mask); + + return 0; +} + +int mt7915_dma_init(struct mt7915_dev *dev) +{ + struct mt76_dev *mdev = &dev->mt76; + u32 hif1_ofs = 0; + int ret; + + mt7915_dma_config(dev); + + mt76_dma_attach(&dev->mt76); + + if (dev->hif2) + hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); + + mt7915_dma_disable(dev, true); /* init tx queue */ - ret = mt7915_init_tx_queues(&dev->phy, MT7915_TXQ_BAND0, - MT7915_TX_RING_SIZE); + ret = mt7915_init_tx_queues(&dev->phy, + MT_TXQ_ID(dev->phy.band_idx), + MT7915_TX_RING_SIZE, + MT_TXQ_RING_BASE(0)); if (ret) return ret; /* command to WM */ - ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7915_TXQ_MCU_WM, - MT7915_TX_MCU_RING_SIZE, MT_TX_RING_BASE); + ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, + MT_MCUQ_ID(MT_MCUQ_WM), + MT7915_TX_MCU_RING_SIZE, + MT_MCUQ_RING_BASE(MT_MCUQ_WM)); if (ret) return ret; /* command to WA */ - ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WA, MT7915_TXQ_MCU_WA, - MT7915_TX_MCU_RING_SIZE, MT_TX_RING_BASE); + ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WA, + MT_MCUQ_ID(MT_MCUQ_WA), + MT7915_TX_MCU_RING_SIZE, + MT_MCUQ_RING_BASE(MT_MCUQ_WA)); if (ret) return ret; /* firmware download */ - ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, MT7915_TXQ_FWDL, - MT7915_TX_FWDL_RING_SIZE, MT_TX_RING_BASE); + ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, + MT_MCUQ_ID(MT_MCUQ_FWDL), + MT7915_TX_FWDL_RING_SIZE, + MT_MCUQ_RING_BASE(MT_MCUQ_FWDL)); if (ret) return ret; /* event from WM */ ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU], - MT7915_RXQ_MCU_WM, MT7915_RX_MCU_RING_SIZE, - MT_RX_BUF_SIZE, MT_RX_EVENT_RING_BASE); + MT_RXQ_ID(MT_RXQ_MCU), + MT7915_RX_MCU_RING_SIZE, + MT_RX_BUF_SIZE, + MT_RXQ_RING_BASE(MT_RXQ_MCU)); if (ret) return ret; /* event from WA */ ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU_WA], - MT7915_RXQ_MCU_WA, MT7915_RX_MCU_RING_SIZE, - MT_RX_BUF_SIZE, MT_RX_EVENT_RING_BASE); + MT_RXQ_ID(MT_RXQ_MCU_WA), + MT7915_RX_MCU_RING_SIZE, + MT_RX_BUF_SIZE, + MT_RXQ_RING_BASE(MT_RXQ_MCU_WA)); if (ret) return ret; - /* rx data queue */ - ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN], - MT7915_RXQ_BAND0, MT7915_RX_RING_SIZE, - MT_RX_BUF_SIZE, MT_RX_DATA_RING_BASE); - if (ret) - return ret; + /* rx data queue for band0 */ + if (!dev->phy.band_idx) { + ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN], + MT_RXQ_ID(MT_RXQ_MAIN), + MT7915_RX_RING_SIZE, + MT_RX_BUF_SIZE, + MT_RXQ_RING_BASE(MT_RXQ_MAIN)); + if (ret) + return ret; + } - if (dev->dbdc_support) { + /* tx free notify event from WA for band0 */ + if (!is_mt7915(mdev)) { + ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN_WA], + MT_RXQ_ID(MT_RXQ_MAIN_WA), + MT7915_RX_MCU_RING_SIZE, + MT_RX_BUF_SIZE, + MT_RXQ_RING_BASE(MT_RXQ_MAIN_WA)); + if (ret) + return ret; + } + + if (dev->dbdc_support || dev->phy.band_idx) { + /* rx data queue for band1 */ ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_EXT], - MT7915_RXQ_BAND1, MT7915_RX_RING_SIZE, + MT_RXQ_ID(MT_RXQ_EXT), + MT7915_RX_RING_SIZE, MT_RX_BUF_SIZE, - MT_RX_DATA_RING_BASE + hif1_ofs); + MT_RXQ_RING_BASE(MT_RXQ_EXT) + hif1_ofs); if (ret) return ret; - /* event from WA */ + /* tx free notify event from WA for band1 */ ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_EXT_WA], - MT7915_RXQ_MCU_WA_EXT, + MT_RXQ_ID(MT_RXQ_EXT_WA), MT7915_RX_MCU_RING_SIZE, MT_RX_BUF_SIZE, - MT_RX_EVENT_RING_BASE + hif1_ofs); + MT_RXQ_RING_BASE(MT_RXQ_EXT_WA) + hif1_ofs); if (ret) return ret; } @@ -186,80 +438,14 @@ int mt7915_dma_init(struct mt7915_dev *dev) mt7915_poll_tx, NAPI_POLL_WEIGHT); napi_enable(&dev->mt76.tx_napi); - /* hif wait WFDMA idle */ - mt76_set(dev, MT_WFDMA0_BUSY_ENA, - MT_WFDMA0_BUSY_ENA_TX_FIFO0 | - MT_WFDMA0_BUSY_ENA_TX_FIFO1 | - MT_WFDMA0_BUSY_ENA_RX_FIFO); - - mt76_set(dev, MT_WFDMA1_BUSY_ENA, - MT_WFDMA1_BUSY_ENA_TX_FIFO0 | - MT_WFDMA1_BUSY_ENA_TX_FIFO1 | - MT_WFDMA1_BUSY_ENA_RX_FIFO); - - mt76_set(dev, MT_WFDMA0_PCIE1_BUSY_ENA, - MT_WFDMA0_PCIE1_BUSY_ENA_TX_FIFO0 | - MT_WFDMA0_PCIE1_BUSY_ENA_TX_FIFO1 | - MT_WFDMA0_PCIE1_BUSY_ENA_RX_FIFO); - - mt76_set(dev, MT_WFDMA1_PCIE1_BUSY_ENA, - MT_WFDMA1_PCIE1_BUSY_ENA_TX_FIFO0 | - MT_WFDMA1_PCIE1_BUSY_ENA_TX_FIFO1 | - MT_WFDMA1_PCIE1_BUSY_ENA_RX_FIFO); - - mt76_poll(dev, MT_WFDMA_EXT_CSR_HIF_MISC, - MT_WFDMA_EXT_CSR_HIF_MISC_BUSY, 0, 1000); - - /* set WFDMA Tx/Rx */ - mt76_set(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); - mt76_set(dev, MT_WFDMA1_GLO_CFG, - MT_WFDMA1_GLO_CFG_TX_DMA_EN | MT_WFDMA1_GLO_CFG_RX_DMA_EN); - - if (dev->hif2) { - mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs, - (MT_WFDMA0_GLO_CFG_TX_DMA_EN | - MT_WFDMA0_GLO_CFG_RX_DMA_EN)); - mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs, - (MT_WFDMA1_GLO_CFG_TX_DMA_EN | - MT_WFDMA1_GLO_CFG_RX_DMA_EN)); - mt76_set(dev, MT_WFDMA_HOST_CONFIG, - MT_WFDMA_HOST_CONFIG_PDMA_BAND); - } - - /* enable interrupts for TX/RX rings */ - mt7915_irq_enable(dev, MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_MCU | - MT_INT_MCU_CMD); + mt7915_dma_enable(dev); return 0; } void mt7915_dma_cleanup(struct mt7915_dev *dev) { - /* disable */ - mt76_clear(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_EN | - MT_WFDMA0_GLO_CFG_RX_DMA_EN); - mt76_clear(dev, MT_WFDMA1_GLO_CFG, - MT_WFDMA1_GLO_CFG_TX_DMA_EN | - MT_WFDMA1_GLO_CFG_RX_DMA_EN); - - /* reset */ - mt76_clear(dev, MT_WFDMA1_RST, - MT_WFDMA1_RST_DMASHDL_ALL_RST | - MT_WFDMA1_RST_LOGIC_RST); - - mt76_set(dev, MT_WFDMA1_RST, - MT_WFDMA1_RST_DMASHDL_ALL_RST | - MT_WFDMA1_RST_LOGIC_RST); - - mt76_clear(dev, MT_WFDMA0_RST, - MT_WFDMA0_RST_DMASHDL_ALL_RST | - MT_WFDMA0_RST_LOGIC_RST); - - mt76_set(dev, MT_WFDMA0_RST, - MT_WFDMA0_RST_DMASHDL_ALL_RST | - MT_WFDMA0_RST_LOGIC_RST); + mt7915_dma_disable(dev, true); mt76_dma_cleanup(&dev->mt76); } diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c index edd74d0de157..5b133bcdab17 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.c @@ -10,6 +10,7 @@ static int mt7915_eeprom_load_precal(struct mt7915_dev *dev) struct mt76_dev *mdev = &dev->mt76; u8 *eeprom = mdev->eeprom.data; u32 val = eeprom[MT_EE_DO_PRE_CAL]; + u32 offs; if (!dev->flash_mode) return 0; @@ -22,7 +23,9 @@ static int mt7915_eeprom_load_precal(struct mt7915_dev *dev) if (!dev->cal) return -ENOMEM; - return mt76_get_of_eeprom(mdev, dev->cal, MT_EE_PRECAL, val); + offs = is_mt7915(&dev->mt76) ? MT_EE_PRECAL : MT_EE_PRECAL_V2; + + return mt76_get_of_eeprom(mdev, dev->cal, offs, val); } static int mt7915_check_eeprom(struct mt7915_dev *dev) @@ -32,24 +35,49 @@ static int mt7915_check_eeprom(struct mt7915_dev *dev) switch (val) { case 0x7915: + case 0x7916: + case 0x7986: return 0; default: return -EINVAL; } } +static char *mt7915_eeprom_name(struct mt7915_dev *dev) +{ + switch (mt76_chip(&dev->mt76)) { + case 0x7915: + return dev->dbdc_support ? + MT7915_EEPROM_DEFAULT_DBDC : MT7915_EEPROM_DEFAULT; + case 0x7986: + switch (mt7915_check_adie(dev, true)) { + case MT7976_ONE_ADIE_DBDC: + return MT7986_EEPROM_MT7976_DEFAULT_DBDC; + case MT7975_ONE_ADIE: + return MT7986_EEPROM_MT7975_DEFAULT; + case MT7976_ONE_ADIE: + return MT7986_EEPROM_MT7976_DEFAULT; + case MT7975_DUAL_ADIE: + return MT7986_EEPROM_MT7975_DUAL_DEFAULT; + case MT7976_DUAL_ADIE: + return MT7986_EEPROM_MT7976_DUAL_DEFAULT; + default: + break; + } + return NULL; + default: + return MT7916_EEPROM_DEFAULT; + } +} + static int mt7915_eeprom_load_default(struct mt7915_dev *dev) { - char *default_bin = MT7915_EEPROM_DEFAULT; u8 *eeprom = dev->mt76.eeprom.data; const struct firmware *fw = NULL; int ret; - if (dev->dbdc_support) - default_bin = MT7915_EEPROM_DEFAULT_DBDC; - - ret = request_firmware(&fw, default_bin, dev->mt76.dev); + ret = request_firmware(&fw, mt7915_eeprom_name(dev), dev->mt76.dev); if (ret) return ret; @@ -59,7 +87,7 @@ mt7915_eeprom_load_default(struct mt7915_dev *dev) goto out; } - memcpy(eeprom, fw->data, MT7915_EEPROM_SIZE); + memcpy(eeprom, fw->data, mt7915_eeprom_size(dev)); dev->flash_mode = true; out: @@ -71,8 +99,9 @@ out: static int mt7915_eeprom_load(struct mt7915_dev *dev) { int ret; + u16 eeprom_size = mt7915_eeprom_size(dev); - ret = mt76_eeprom_init(&dev->mt76, MT7915_EEPROM_SIZE); + ret = mt76_eeprom_init(&dev->mt76, eeprom_size); if (ret < 0) return ret; @@ -88,7 +117,7 @@ static int mt7915_eeprom_load(struct mt7915_dev *dev) return -EINVAL; /* read eeprom data from efuse */ - block_num = DIV_ROUND_UP(MT7915_EEPROM_SIZE, + block_num = DIV_ROUND_UP(eeprom_size, MT7915_EEPROM_BLOCK_SIZE); for (i = 0; i < block_num; i++) mt7915_mcu_get_eeprom(dev, @@ -98,17 +127,32 @@ static int mt7915_eeprom_load(struct mt7915_dev *dev) return mt7915_check_eeprom(dev); } -void mt7915_eeprom_parse_band_config(struct mt7915_phy *phy) +static void mt7915_eeprom_parse_band_config(struct mt7915_phy *phy) { struct mt7915_dev *dev = phy->dev; - bool ext_phy = phy != &dev->phy; u8 *eeprom = dev->mt76.eeprom.data; u32 val; - val = eeprom[MT_EE_WIFI_CONF + ext_phy]; + val = eeprom[MT_EE_WIFI_CONF + phy->band_idx]; val = FIELD_GET(MT_EE_WIFI_CONF0_BAND_SEL, val); - if (val == MT_EE_BAND_SEL_DEFAULT && dev->dbdc_support) - val = ext_phy ? MT_EE_BAND_SEL_5GHZ : MT_EE_BAND_SEL_2GHZ; + + if (!is_mt7915(&dev->mt76)) { + switch (val) { + case MT_EE_V2_BAND_SEL_5GHZ: + phy->mt76->cap.has_5ghz = true; + return; + case MT_EE_V2_BAND_SEL_6GHZ: + phy->mt76->cap.has_6ghz = true; + return; + case MT_EE_V2_BAND_SEL_5GHZ_6GHZ: + phy->mt76->cap.has_5ghz = true; + phy->mt76->cap.has_6ghz = true; + return; + default: + phy->mt76->cap.has_2ghz = true; + return; + } + } switch (val) { case MT_EE_BAND_SEL_5GHZ: @@ -124,32 +168,65 @@ void mt7915_eeprom_parse_band_config(struct mt7915_phy *phy) } } -static void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev) +void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev, + struct mt7915_phy *phy) { - u8 nss, nss_band, *eeprom = dev->mt76.eeprom.data; + u8 nss, nss_band, nss_band_max, *eeprom = dev->mt76.eeprom.data; + struct mt76_phy *mphy = phy->mt76; + bool ext_phy = phy != &dev->phy; + + mt7915_eeprom_parse_band_config(phy); - mt7915_eeprom_parse_band_config(&dev->phy); + /* read tx/rx mask from eeprom */ + if (is_mt7915(&dev->mt76)) { + nss = FIELD_GET(MT_EE_WIFI_CONF0_TX_PATH, + eeprom[MT_EE_WIFI_CONF]); + } else { + nss = FIELD_GET(MT_EE_WIFI_CONF0_TX_PATH, + eeprom[MT_EE_WIFI_CONF + phy->band_idx]); + } - /* read tx mask from eeprom */ - nss = FIELD_GET(MT_EE_WIFI_CONF0_TX_PATH, eeprom[MT_EE_WIFI_CONF]); if (!nss || nss > 4) nss = 4; + /* read tx/rx stream */ nss_band = nss; if (dev->dbdc_support) { - nss_band = FIELD_GET(MT_EE_WIFI_CONF3_TX_PATH_B0, - eeprom[MT_EE_WIFI_CONF + 3]); - if (!nss_band || nss_band > 2) - nss_band = 2; + if (is_mt7915(&dev->mt76)) { + nss_band = FIELD_GET(MT_EE_WIFI_CONF3_TX_PATH_B0, + eeprom[MT_EE_WIFI_CONF + 3]); + if (phy->band_idx) + nss_band = FIELD_GET(MT_EE_WIFI_CONF3_TX_PATH_B1, + eeprom[MT_EE_WIFI_CONF + 3]); + } else { + nss_band = FIELD_GET(MT_EE_WIFI_CONF_STREAM_NUM, + eeprom[MT_EE_WIFI_CONF + 2 + phy->band_idx]); + } + + nss_band_max = is_mt7986(&dev->mt76) ? + MT_EE_NSS_MAX_DBDC_MA7986 : MT_EE_NSS_MAX_DBDC_MA7915; + } else { + nss_band_max = is_mt7986(&dev->mt76) ? + MT_EE_NSS_MAX_MA7986 : MT_EE_NSS_MAX_MA7915; + } - if (nss_band >= nss) - nss = 4; + if (!nss_band || nss_band > nss_band_max) + nss_band = nss_band_max; + + if (nss_band > nss) { + dev_warn(dev->mt76.dev, + "nss mismatch, nss(%d) nss_band(%d) band(%d) ext_phy(%d)\n", + nss, nss_band, phy->band_idx, ext_phy); + nss = nss_band; } - dev->chainmask = BIT(nss) - 1; - dev->mphy.antenna_mask = BIT(nss_band) - 1; - dev->mphy.chainmask = dev->mphy.antenna_mask; + mphy->chainmask = BIT(nss) - 1; + if (ext_phy) + mphy->chainmask <<= dev->chainshift; + mphy->antenna_mask = BIT(nss_band) - 1; + dev->chainmask |= mphy->chainmask; + dev->chainshift = hweight8(dev->mphy.chainmask); } int mt7915_eeprom_init(struct mt7915_dev *dev) @@ -171,7 +248,7 @@ int mt7915_eeprom_init(struct mt7915_dev *dev) if (ret) return ret; - mt7915_eeprom_parse_hw_cap(dev); + mt7915_eeprom_parse_hw_cap(dev, &dev->phy); memcpy(dev->mphy.macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, ETH_ALEN); @@ -186,27 +263,43 @@ int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, { u8 *eeprom = dev->mt76.eeprom.data; int index, target_power; - bool tssi_on; + bool tssi_on, is_7976; if (chain_idx > 3) return -EINVAL; tssi_on = mt7915_tssi_enabled(dev, chan->band); + is_7976 = mt7915_check_adie(dev, false) || is_mt7916(&dev->mt76); if (chan->band == NL80211_BAND_2GHZ) { - index = MT_EE_TX0_POWER_2G + chain_idx * 3; - target_power = eeprom[index]; - - if (!tssi_on) - target_power += eeprom[index + 1]; + if (is_7976) { + index = MT_EE_TX0_POWER_2G_V2 + chain_idx; + target_power = eeprom[index]; + } else { + index = MT_EE_TX0_POWER_2G + chain_idx * 3; + target_power = eeprom[index]; + + if (!tssi_on) + target_power += eeprom[index + 1]; + } + } else if (chan->band == NL80211_BAND_5GHZ) { + int group = mt7915_get_channel_group_5g(chan->hw_value, is_7976); + + if (is_7976) { + index = MT_EE_TX0_POWER_5G_V2 + chain_idx * 5; + target_power = eeprom[index + group]; + } else { + index = MT_EE_TX0_POWER_5G + chain_idx * 12; + target_power = eeprom[index + group]; + + if (!tssi_on) + target_power += eeprom[index + 8]; + } } else { - int group = mt7915_get_channel_group(chan->hw_value); - - index = MT_EE_TX0_POWER_5G + chain_idx * 12; - target_power = eeprom[index + group]; + int group = mt7915_get_channel_group_6g(chan->hw_value); - if (!tssi_on) - target_power += eeprom[index + 8]; + index = MT_EE_TX0_POWER_6G_V2 + chain_idx * 8; + target_power = is_7976 ? eeprom[index + group] : 0; } return target_power; @@ -215,15 +308,20 @@ int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band) { u8 *eeprom = dev->mt76.eeprom.data; - u32 val; + u32 val, offs; s8 delta; + bool is_7976 = mt7915_check_adie(dev, false) || is_mt7916(&dev->mt76); if (band == NL80211_BAND_2GHZ) - val = eeprom[MT_EE_RATE_DELTA_2G]; + offs = is_7976 ? MT_EE_RATE_DELTA_2G_V2 : MT_EE_RATE_DELTA_2G; + else if (band == NL80211_BAND_5GHZ) + offs = is_7976 ? MT_EE_RATE_DELTA_5G_V2 : MT_EE_RATE_DELTA_5G; else - val = eeprom[MT_EE_RATE_DELTA_5G]; + offs = is_7976 ? MT_EE_RATE_DELTA_6G_V2 : 0; + + val = eeprom[offs]; - if (!(val & MT_EE_RATE_DELTA_EN)) + if (!offs || !(val & MT_EE_RATE_DELTA_EN)) return 0; delta = FIELD_GET(MT_EE_RATE_DELTA_MASK, val); diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h index a43389a41800..7578ac6d0be6 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/eeprom.h @@ -23,11 +23,19 @@ enum mt7915_eeprom_field { MT_EE_RATE_DELTA_5G = 0x29d, MT_EE_TX0_POWER_2G = 0x2fc, MT_EE_TX0_POWER_5G = 0x34b, + MT_EE_RATE_DELTA_2G_V2 = 0x7d3, + MT_EE_RATE_DELTA_5G_V2 = 0x81e, + MT_EE_RATE_DELTA_6G_V2 = 0x884, /* 6g fields only appear in eeprom v2 */ + MT_EE_TX0_POWER_2G_V2 = 0x441, + MT_EE_TX0_POWER_5G_V2 = 0x445, + MT_EE_TX0_POWER_6G_V2 = 0x465, MT_EE_ADIE_FT_VERSION = 0x9a0, __MT_EE_MAX = 0xe00, + __MT_EE_MAX_V2 = 0x1000, /* 0xe10 ~ 0x5780 used to save group cal data */ - MT_EE_PRECAL = 0xe10 + MT_EE_PRECAL = 0xe10, + MT_EE_PRECAL_V2 = 0x1010 }; #define MT_EE_WIFI_CAL_GROUP BIT(0) @@ -39,6 +47,7 @@ enum mt7915_eeprom_field { #define MT_EE_WIFI_CONF0_TX_PATH GENMASK(2, 0) #define MT_EE_WIFI_CONF0_BAND_SEL GENMASK(7, 6) #define MT_EE_WIFI_CONF1_BAND_SEL GENMASK(7, 6) +#define MT_EE_WIFI_CONF_STREAM_NUM GENMASK(7, 5) #define MT_EE_WIFI_CONF3_TX_PATH_B0 GENMASK(1, 0) #define MT_EE_WIFI_CONF3_TX_PATH_B1 GENMASK(5, 4) #define MT_EE_WIFI_CONF7_TSSI0_2G BIT(0) @@ -49,6 +58,19 @@ enum mt7915_eeprom_field { #define MT_EE_RATE_DELTA_SIGN BIT(6) #define MT_EE_RATE_DELTA_EN BIT(7) +#define MT_EE_NSS_MAX_MA7915 4 +#define MT_EE_NSS_MAX_DBDC_MA7915 2 +#define MT_EE_NSS_MAX_MA7986 4 +#define MT_EE_NSS_MAX_DBDC_MA7986 4 + +enum mt7915_adie_sku { + MT7976_ONE_ADIE_DBDC = 0x7, + MT7975_ONE_ADIE = 0x8, + MT7976_ONE_ADIE = 0xa, + MT7975_DUAL_ADIE = 0xd, + MT7976_DUAL_ADIE = 0xf, +}; + enum mt7915_eeprom_band { MT_EE_BAND_SEL_DEFAULT, MT_EE_BAND_SEL_5GHZ, @@ -56,6 +78,13 @@ enum mt7915_eeprom_band { MT_EE_BAND_SEL_DUAL, }; +enum { + MT_EE_V2_BAND_SEL_2GHZ, + MT_EE_V2_BAND_SEL_5GHZ, + MT_EE_V2_BAND_SEL_6GHZ, + MT_EE_V2_BAND_SEL_5GHZ_6GHZ, +}; + enum mt7915_sku_rate_group { SKU_CCK, SKU_OFDM, @@ -76,8 +105,20 @@ enum mt7915_sku_rate_group { }; static inline int -mt7915_get_channel_group(int channel) +mt7915_get_channel_group_5g(int channel, bool is_7976) { + if (is_7976) { + if (channel <= 64) + return 0; + if (channel <= 96) + return 1; + if (channel <= 128) + return 2; + if (channel <= 144) + return 3; + return 4; + } + if (channel >= 184 && channel <= 196) return 0; if (channel <= 48) @@ -95,6 +136,15 @@ mt7915_get_channel_group(int channel) return 7; } +static inline int +mt7915_get_channel_group_6g(int channel) +{ + if (channel <= 29) + return 0; + + return DIV_ROUND_UP(channel - 29, 32); +} + static inline bool mt7915_tssi_enabled(struct mt7915_dev *dev, enum nl80211_band band) { diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/init.c b/drivers/net/wireless/mediatek/mt76/mt7915/init.c index d054cdecd5f7..6d29366c5139 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/init.c @@ -50,15 +50,22 @@ static ssize_t mt7915_thermal_temp_show(struct device *dev, int i = to_sensor_dev_attr(attr)->index; int temperature; - if (i) - return sprintf(buf, "%u\n", phy->throttle_temp[i - 1] * 1000); - - temperature = mt7915_mcu_get_temperature(phy); - if (temperature < 0) - return temperature; - - /* display in millidegree celcius */ - return sprintf(buf, "%u\n", temperature * 1000); + switch (i) { + case 0: + temperature = mt7915_mcu_get_temperature(phy); + if (temperature < 0) + return temperature; + /* display in millidegree celcius */ + return sprintf(buf, "%u\n", temperature * 1000); + case 1: + case 2: + return sprintf(buf, "%u\n", + phy->throttle_temp[i - 1] * 1000); + case 3: + return sprintf(buf, "%hhu\n", phy->throttle_state); + default: + return -EINVAL; + } } static ssize_t mt7915_thermal_temp_store(struct device *dev, @@ -84,11 +91,13 @@ static ssize_t mt7915_thermal_temp_store(struct device *dev, static SENSOR_DEVICE_ATTR_RO(temp1_input, mt7915_thermal_temp, 0); static SENSOR_DEVICE_ATTR_RW(temp1_crit, mt7915_thermal_temp, 1); static SENSOR_DEVICE_ATTR_RW(temp1_max, mt7915_thermal_temp, 2); +static SENSOR_DEVICE_ATTR_RO(throttle1, mt7915_thermal_temp, 3); static struct attribute *mt7915_hwmon_attrs[] = { &sensor_dev_attr_temp1_input.dev_attr.attr, &sensor_dev_attr_temp1_crit.dev_attr.attr, &sensor_dev_attr_temp1_max.dev_attr.attr, + &sensor_dev_attr_throttle1.dev_attr.attr, NULL, }; ATTRIBUTE_GROUPS(mt7915_hwmon); @@ -97,7 +106,7 @@ static int mt7915_thermal_get_max_throttle_state(struct thermal_cooling_device *cdev, unsigned long *state) { - *state = MT7915_THERMAL_THROTTLE_MAX; + *state = MT7915_CDEV_THROTTLE_MAX; return 0; } @@ -108,7 +117,7 @@ mt7915_thermal_get_cur_throttle_state(struct thermal_cooling_device *cdev, { struct mt7915_phy *phy = cdev->devdata; - *state = phy->throttle_state; + *state = phy->cdev_state; return 0; } @@ -118,22 +127,27 @@ mt7915_thermal_set_cur_throttle_state(struct thermal_cooling_device *cdev, unsigned long state) { struct mt7915_phy *phy = cdev->devdata; + u8 throttling = MT7915_THERMAL_THROTTLE_MAX - state; int ret; - if (state > MT7915_THERMAL_THROTTLE_MAX) + if (state > MT7915_CDEV_THROTTLE_MAX) return -EINVAL; if (phy->throttle_temp[0] > phy->throttle_temp[1]) return 0; - if (state == phy->throttle_state) + if (state == phy->cdev_state) return 0; - ret = mt7915_mcu_set_thermal_throttling(phy, state); + /* + * cooling_device convention: 0 = no cooling, more = more cooling + * mcu convention: 1 = max cooling, more = less cooling + */ + ret = mt7915_mcu_set_thermal_throttling(phy, throttling); if (ret) return ret; - phy->throttle_state = state; + phy->cdev_state = state; return 0; } @@ -186,7 +200,8 @@ static int mt7915_thermal_init(struct mt7915_phy *phy) phy->throttle_temp[0] = 110; phy->throttle_temp[1] = 120; - return 0; + return mt7915_mcu_set_thermal_throttling(phy, + MT7915_THERMAL_THROTTLE_MAX); } static void mt7915_led_set_config(struct led_classdev *led_cdev, @@ -288,17 +303,18 @@ mt7915_regd_notifier(struct wiphy *wiphy, struct mt7915_dev *dev = mt7915_hw_dev(hw); struct mt76_phy *mphy = hw->priv; struct mt7915_phy *phy = mphy->priv; - struct cfg80211_chan_def *chandef = &mphy->chandef; memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2)); dev->mt76.region = request->dfs_region; + if (dev->mt76.region == NL80211_DFS_UNSET) + mt7915_mcu_rdd_background_enable(phy, NULL); + mt7915_init_txpower(dev, &mphy->sband_2g.sband); mt7915_init_txpower(dev, &mphy->sband_5g.sband); + mt7915_init_txpower(dev, &mphy->sband_6g.sband); - if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR)) - return; - + mphy->dfs_state = MT_DFS_STATE_UNKNOWN; mt7915_dfs_init_radar_detector(phy); } @@ -306,11 +322,13 @@ static void mt7915_init_wiphy(struct ieee80211_hw *hw) { struct mt7915_phy *phy = mt7915_hw_phy(hw); + struct mt76_dev *mdev = &phy->dev->mt76; struct wiphy *wiphy = hw->wiphy; + struct mt7915_dev *dev = phy->dev; hw->queues = 4; - hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; - hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF; + hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; + hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE; hw->netdev_features = NETIF_F_RXCSUM; hw->radiotap_timestamp.units_pos = @@ -325,6 +343,7 @@ mt7915_init_wiphy(struct ieee80211_hw *hw) wiphy->n_iface_combinations = ARRAY_SIZE(if_comb); wiphy->reg_notifier = mt7915_regd_notifier; wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH; + wiphy->mbssid_max_interfaces = 16; wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BSS_COLOR); wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_VHT_IBSS); @@ -333,9 +352,16 @@ mt7915_init_wiphy(struct ieee80211_hw *hw) wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT); wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE); + if (!mdev->dev->of_node || + !of_property_read_bool(mdev->dev->of_node, + "mediatek,disable-radar-background")) + wiphy_ext_feature_set(wiphy, + NL80211_EXT_FEATURE_RADAR_BACKGROUND); + ieee80211_hw_set(hw, HAS_RATE_CONTROL); ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD); ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD); + ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID); ieee80211_hw_set(hw, WANT_MONITOR_VIF); hw->max_tx_fragments = 4; @@ -349,14 +375,34 @@ mt7915_init_wiphy(struct ieee80211_hw *hw) phy->mt76->sband_5g.sband.ht_cap.cap |= IEEE80211_HT_CAP_LDPC_CODING | IEEE80211_HT_CAP_MAX_AMSDU; - phy->mt76->sband_5g.sband.vht_cap.cap |= - IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 | - IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; + + if (is_mt7915(&dev->mt76)) { + phy->mt76->sband_5g.sband.vht_cap.cap |= + IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991 | + IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; + + if (!dev->dbdc_support) + phy->mt76->sband_5g.sband.vht_cap.cap |= + IEEE80211_VHT_CAP_SHORT_GI_160 | + IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ; + } else { + phy->mt76->sband_5g.sband.vht_cap.cap |= + IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 | + IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK; + + /* mt7916 dbdc with 2g 2x2 bw40 and 5g 2x2 bw160c */ + phy->mt76->sband_5g.sband.vht_cap.cap |= + IEEE80211_VHT_CAP_SHORT_GI_160 | + IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ; + } } mt76_set_stream_caps(phy->mt76, true); mt7915_set_stream_vht_txbf_caps(phy); mt7915_set_stream_he_caps(phy); + + wiphy->available_antennas_rx = phy->mt76->antenna_mask; + wiphy->available_antennas_tx = phy->mt76->antenna_mask; } static void @@ -387,19 +433,27 @@ mt7915_mac_init_band(struct mt7915_dev *dev, u8 band) mt76_rmw(dev, MT_MDP_BNRCFR1(band), mask, set); mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 0x680); - /* disable rx rate report by default due to hw issues */ + + /* mt7915: disable rx rate report by default due to hw issues */ mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN); } static void mt7915_mac_init(struct mt7915_dev *dev) { int i; + u32 rx_len = is_mt7915(&dev->mt76) ? 0x400 : 0x680; + + /* config pse qid6 wfdma port selection */ + if (!is_mt7915(&dev->mt76) && dev->hif2) + mt76_rmw(dev, MT_WF_PP_TOP_RXQ_WFDMA_CF_5, 0, + MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK); + + mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, rx_len); - mt76_rmw_field(dev, MT_MDP_DCR1, MT_MDP_DCR1_MAX_RX_LEN, 0x400); /* enable hardware de-agg */ mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_DAMSDU_EN); - for (i = 0; i < MT7915_WTBL_SIZE; i++) + for (i = 0; i < mt7915_wtbl_size(dev); i++) mt7915_mac_wtbl_update(dev, i, MT_WTBL_UPDATE_ADM_COUNT_CLEAR); for (i = 0; i < 2; i++) @@ -449,20 +503,32 @@ static int mt7915_register_ext_phy(struct mt7915_dev *dev) phy = mphy->priv; phy->dev = dev; phy->mt76 = mphy; - mphy->chainmask = dev->chainmask & ~dev->mphy.chainmask; - mphy->antenna_mask = BIT(hweight8(mphy->chainmask)) - 1; + + /* Bind main phy to band0 and ext_phy to band1 for dbdc case */ + phy->band_idx = 1; INIT_DELAYED_WORK(&mphy->mac_work, mt7915_mac_work); - mt7915_eeprom_parse_band_config(phy); - mt7915_init_wiphy(mphy->hw); + mt7915_eeprom_parse_hw_cap(dev, phy); memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR2, ETH_ALEN); + /* Make the secondary PHY MAC address local without overlapping with + * the usual MAC address allocation scheme on multiple virtual interfaces + */ + if (!is_valid_ether_addr(mphy->macaddr)) { + memcpy(mphy->macaddr, dev->mt76.eeprom.data + MT_EE_MAC_ADDR, + ETH_ALEN); + mphy->macaddr[0] |= 2; + mphy->macaddr[0] ^= BIT(7); + } mt76_eeprom_override(mphy); - ret = mt7915_init_tx_queues(phy, MT7915_TXQ_BAND1, - MT7915_TX_RING_SIZE); + /* init wiphy according to mphy and phy */ + mt7915_init_wiphy(mphy->hw); + ret = mt7915_init_tx_queues(phy, MT_TXQ_ID(phy->band_idx), + MT7915_TX_RING_SIZE, + MT_TXQ_RING_BASE(1)); if (ret) goto error; @@ -495,46 +561,88 @@ static void mt7915_init_work(struct work_struct *work) mt7915_mac_init(dev); mt7915_init_txpower(dev, &dev->mphy.sband_2g.sband); mt7915_init_txpower(dev, &dev->mphy.sband_5g.sband); + mt7915_init_txpower(dev, &dev->mphy.sband_6g.sband); mt7915_txbf_init(dev); } static void mt7915_wfsys_reset(struct mt7915_dev *dev) { - u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON; - #define MT_MCU_DUMMY_RANDOM GENMASK(15, 0) #define MT_MCU_DUMMY_DEFAULT GENMASK(31, 16) - mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM); + if (is_mt7915(&dev->mt76)) { + u32 val = MT_TOP_PWR_KEY | MT_TOP_PWR_SW_PWR_ON | MT_TOP_PWR_PWR_ON; - /* change to software control */ - val |= MT_TOP_PWR_SW_RST; - mt76_wr(dev, MT_TOP_PWR_CTRL, val); + mt76_wr(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_RANDOM); - /* reset wfsys */ - val &= ~MT_TOP_PWR_SW_RST; - mt76_wr(dev, MT_TOP_PWR_CTRL, val); + /* change to software control */ + val |= MT_TOP_PWR_SW_RST; + mt76_wr(dev, MT_TOP_PWR_CTRL, val); - /* release wfsys then mcu re-excutes romcode */ - val |= MT_TOP_PWR_SW_RST; - mt76_wr(dev, MT_TOP_PWR_CTRL, val); + /* reset wfsys */ + val &= ~MT_TOP_PWR_SW_RST; + mt76_wr(dev, MT_TOP_PWR_CTRL, val); - /* switch to hw control */ - val &= ~MT_TOP_PWR_SW_RST; - val |= MT_TOP_PWR_HW_CTRL; - mt76_wr(dev, MT_TOP_PWR_CTRL, val); + /* release wfsys then mcu re-executes romcode */ + val |= MT_TOP_PWR_SW_RST; + mt76_wr(dev, MT_TOP_PWR_CTRL, val); - /* check whether mcu resets to default */ - if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR, MT_MCU_DUMMY_DEFAULT, - MT_MCU_DUMMY_DEFAULT, 1000)) { - dev_err(dev->mt76.dev, "wifi subsystem reset failure\n"); - return; + /* switch to hw control */ + val &= ~MT_TOP_PWR_SW_RST; + val |= MT_TOP_PWR_HW_CTRL; + mt76_wr(dev, MT_TOP_PWR_CTRL, val); + + /* check whether mcu resets to default */ + if (!mt76_poll_msec(dev, MT_MCU_WFDMA0_DUMMY_CR, + MT_MCU_DUMMY_DEFAULT, MT_MCU_DUMMY_DEFAULT, + 1000)) { + dev_err(dev->mt76.dev, "wifi subsystem reset failure\n"); + return; + } + + /* wfsys reset won't clear host registers */ + mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE); + + msleep(100); + } else if (is_mt7986(&dev->mt76)) { + mt7986_wmac_disable(dev); + msleep(20); + + mt7986_wmac_enable(dev); + msleep(20); + } else { + mt76_set(dev, MT_WF_SUBSYS_RST, 0x1); + msleep(20); + + mt76_clear(dev, MT_WF_SUBSYS_RST, 0x1); + msleep(20); } +} - /* wfsys reset won't clear host registers */ - mt76_clear(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE); +static bool mt7915_band_config(struct mt7915_dev *dev) +{ + bool ret = true; + + dev->phy.band_idx = 0; + + if (is_mt7986(&dev->mt76)) { + u32 sku = mt7915_check_adie(dev, true); - msleep(100); + /* + * for mt7986, dbdc support is determined by the number + * of adie chips and the main phy is bound to band1 when + * dbdc is disabled. + */ + if (sku == MT7975_ONE_ADIE || sku == MT7976_ONE_ADIE) { + dev->phy.band_idx = 1; + ret = false; + } + } else { + ret = is_mt7915(&dev->mt76) ? + !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)) : true; + } + + return ret; } static int mt7915_init_hardware(struct mt7915_dev *dev) @@ -544,7 +652,8 @@ static int mt7915_init_hardware(struct mt7915_dev *dev) mt76_wr(dev, MT_INT_SOURCE_CSR, ~0); INIT_WORK(&dev->init_work, mt7915_init_work); - dev->dbdc_support = !!(mt76_rr(dev, MT_HW_BOUND) & BIT(5)); + + dev->dbdc_support = mt7915_band_config(dev); /* If MCU was already running, it is likely in a bad state */ if (mt76_get_field(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE) > @@ -557,12 +666,6 @@ static int mt7915_init_hardware(struct mt7915_dev *dev) set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); - /* - * force firmware operation mode into normal state, - * which should be set before firmware download stage. - */ - mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); - ret = mt7915_mcu_init(dev); if (ret) { /* Reset and try again */ @@ -577,7 +680,6 @@ static int mt7915_init_hardware(struct mt7915_dev *dev) if (ret < 0) return ret; - if (dev->flash_mode) { ret = mt7915_mcu_apply_group_cal(dev); if (ret) @@ -626,11 +728,18 @@ void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy) } static void -mt7915_set_stream_he_txbf_caps(struct ieee80211_sta_he_cap *he_cap, +mt7915_set_stream_he_txbf_caps(struct mt7915_dev *dev, + struct ieee80211_sta_he_cap *he_cap, int vif, int nss) { struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; - u8 c; + u8 c, nss_160; + + /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */ + if (is_mt7915(&dev->mt76) && !dev->dbdc_support) + nss_160 = nss / 2; + else + nss_160 = nss; #ifdef CONFIG_MAC80211_MESH if (vif == NL80211_IFTYPE_MESH_POINT) @@ -684,13 +793,21 @@ mt7915_set_stream_he_txbf_caps(struct ieee80211_sta_he_cap *he_cap, /* num_snd_dim * for mt7915, max supported nss is 2 for bw > 80MHz */ - c = (nss - 1) | - IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_2; + c = FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK, + nss - 1) | + FIELD_PREP(IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_ABOVE_80MHZ_MASK, + nss_160 - 1); elem->phy_cap_info[5] |= c; c = IEEE80211_HE_PHY_CAP6_TRIG_SU_BEAMFORMING_FB | IEEE80211_HE_PHY_CAP6_TRIG_MU_BEAMFORMING_PARTIAL_BW_FB; elem->phy_cap_info[6] |= c; + + if (!is_mt7915(&dev->mt76)) { + c = IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ | + IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ; + elem->phy_cap_info[7] |= c; + } } static void @@ -718,9 +835,17 @@ static int mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, struct ieee80211_sband_iftype_data *data) { + struct mt7915_dev *dev = phy->dev; int i, idx = 0, nss = hweight8(phy->mt76->chainmask); u16 mcs_map = 0; u16 mcs_map_160 = 0; + u8 nss_160; + + /* Can do 1/2 of NSS streams in 160Mhz mode for mt7915 */ + if (is_mt7915(&dev->mt76) && !dev->dbdc_support) + nss_160 = nss / 2; + else + nss_160 = nss; for (i = 0; i < 8; i++) { if (i < nss) @@ -728,8 +853,7 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, else mcs_map |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); - /* Can do 1/2 of NSS streams in 160Mhz mode. */ - if (i < nss / 2) + if (i < nss_160) mcs_map_160 |= (IEEE80211_HE_MCS_SUPPORT_0_11 << (i * 2)); else mcs_map_160 |= (IEEE80211_HE_MCS_NOT_SUPPORTED << (i * 2)); @@ -767,7 +891,7 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, if (band == NL80211_BAND_2GHZ) he_cap_elem->phy_cap_info[0] = IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; - else if (band == NL80211_BAND_5GHZ) + else he_cap_elem->phy_cap_info[0] = IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G | IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G | @@ -806,7 +930,7 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, if (band == NL80211_BAND_2GHZ) he_cap_elem->phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G; - else if (band == NL80211_BAND_5GHZ) + else he_cap_elem->phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G; @@ -845,7 +969,7 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, he_mcs->rx_mcs_80p80 = cpu_to_le16(mcs_map_160); he_mcs->tx_mcs_80p80 = cpu_to_le16(mcs_map_160); - mt7915_set_stream_he_txbf_caps(he_cap, i, nss); + mt7915_set_stream_he_txbf_caps(dev, he_cap, i, nss); memset(he_cap->ppe_thres, 0, sizeof(he_cap->ppe_thres)); if (he_cap_elem->phy_cap_info[6] & @@ -856,6 +980,21 @@ mt7915_init_he_caps(struct mt7915_phy *phy, enum nl80211_band band, u8_encode_bits(IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US, IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_MASK); } + + if (band == NL80211_BAND_6GHZ) { + u16 cap = IEEE80211_HE_6GHZ_CAP_TX_ANTPAT_CONS | + IEEE80211_HE_6GHZ_CAP_RX_ANTPAT_CONS; + + cap |= u16_encode_bits(IEEE80211_HT_MPDU_DENSITY_8, + IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) | + u16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K, + IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) | + u16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454, + IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); + + data[idx].he_6ghz_capa.capa = cpu_to_le16(cap); + } + idx++; } @@ -885,6 +1024,15 @@ void mt7915_set_stream_he_caps(struct mt7915_phy *phy) band->iftype_data = data; band->n_iftype_data = n; } + + if (phy->mt76->cap.has_6ghz) { + data = phy->iftype[NL80211_BAND_6GHZ]; + n = mt7915_init_he_caps(phy, NL80211_BAND_6GHZ, data); + + band = &phy->mt76->sband_6g.sband; + band->iftype_data = data; + band->n_iftype_data = n; + } } static void mt7915_unregister_ext_phy(struct mt7915_dev *dev) @@ -924,15 +1072,6 @@ int mt7915_register_device(struct mt7915_dev *dev) mt7915_init_wiphy(hw); - if (!dev->dbdc_support) - dev->mphy.sband_5g.sband.vht_cap.cap |= - IEEE80211_VHT_CAP_SHORT_GI_160 | - IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160_80PLUS80MHZ; - - dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask; - dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask; - dev->phy.dfs_state = -1; - #ifdef CONFIG_NL80211_TESTMODE dev->mt76.test_ops = &mt7915_testmode_ops; #endif @@ -971,5 +1110,8 @@ void mt7915_unregister_device(struct mt7915_dev *dev) mt7915_dma_cleanup(dev); tasklet_disable(&dev->irq_tasklet); + if (is_mt7986(&dev->mt76)) + mt7986_wmac_disable(dev); + mt76_free_device(&dev->mt76); } diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c index 48f115502282..e9e7efbf350d 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mac.c @@ -165,7 +165,7 @@ static void mt7915_mac_sta_poll(struct mt7915_dev *dev) sta = container_of((void *)msta, struct ieee80211_sta, drv_priv); for (i = 0; i < IEEE80211_NUM_ACS; i++) { - u8 q = mt7915_lmac_mapping(dev, i); + u8 q = mt76_connac_lmac_mapping(i); u32 tx_cur = tx_time[q]; u32 rx_cur = rx_time[q]; u8 tid = ac_to_tid[i]; @@ -226,8 +226,8 @@ mt7915_mac_decode_he_radiotap_ru(struct mt76_rx_status *status, u32 ru_h, ru_l; u8 ru, offs = 0; - ru_l = FIELD_GET(MT_PRXV_HE_RU_ALLOC_L, le32_to_cpu(rxv[0])); - ru_h = FIELD_GET(MT_PRXV_HE_RU_ALLOC_H, le32_to_cpu(rxv[1])); + ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L); + ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H); ru = (u8)(ru_l | ru_h << 4); status->bw = RATE_INFO_BW_HE_RU; @@ -349,14 +349,16 @@ mt7915_mac_decode_he_radiotap(struct sk_buff *skb, __le32 *rxv, u32 mode) case MT_PHY_TYPE_HE_SU: he->data1 |= HE_BITS(DATA1_FORMAT_SU) | HE_BITS(DATA1_UL_DL_KNOWN) | - HE_BITS(DATA1_BEAM_CHANGE_KNOWN); + HE_BITS(DATA1_BEAM_CHANGE_KNOWN) | + HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) | HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); break; case MT_PHY_TYPE_HE_EXT_SU: he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) | - HE_BITS(DATA1_UL_DL_KNOWN); + HE_BITS(DATA1_UL_DL_KNOWN) | + HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); break; @@ -376,7 +378,8 @@ mt7915_mac_decode_he_radiotap(struct sk_buff *skb, __le32 *rxv, u32 mode) HE_BITS(DATA1_SPTL_REUSE3_KNOWN) | HE_BITS(DATA1_SPTL_REUSE4_KNOWN); - he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) | + he->data4 |= HE_PREP(DATA4_TB_SPTL_REUSE1, SR_MASK, rxv[11]) | + HE_PREP(DATA4_TB_SPTL_REUSE2, SR1_MASK, rxv[11]) | HE_PREP(DATA4_TB_SPTL_REUSE3, SR2_MASK, rxv[11]) | HE_PREP(DATA4_TB_SPTL_REUSE4, SR3_MASK, rxv[11]); @@ -391,15 +394,15 @@ mt7915_mac_decode_he_radiotap(struct sk_buff *skb, __le32 *rxv, u32 mode) static int mt7915_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) { struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; + struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap); struct mt7915_sta *msta = (struct mt7915_sta *)status->wcid; + __le32 *rxd = (__le32 *)skb->data; struct ieee80211_sta *sta; struct ieee80211_vif *vif; struct ieee80211_hdr hdr; - struct ethhdr eth_hdr; - __le32 *rxd = (__le32 *)skb->data; - __le32 qos_ctrl, ht_ctrl; + u16 frame_control; - if (FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, le32_to_cpu(rxd[3])) != + if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) != MT_RXD3_NORMAL_U2M) return -EINVAL; @@ -413,47 +416,52 @@ static int mt7915_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv); /* store the info from RXD and ethhdr to avoid being overridden */ - memcpy(ð_hdr, skb->data + hdr_gap, sizeof(eth_hdr)); - hdr.frame_control = FIELD_GET(MT_RXD6_FRAME_CONTROL, rxd[6]); - hdr.seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, rxd[8]); - qos_ctrl = FIELD_GET(MT_RXD8_QOS_CTL, rxd[8]); - ht_ctrl = FIELD_GET(MT_RXD9_HT_CONTROL, rxd[9]); - + frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL); + hdr.frame_control = cpu_to_le16(frame_control); + hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL)); hdr.duration_id = 0; + ether_addr_copy(hdr.addr1, vif->addr); ether_addr_copy(hdr.addr2, sta->addr); - switch (le16_to_cpu(hdr.frame_control) & - (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) { + switch (frame_control & (IEEE80211_FCTL_TODS | + IEEE80211_FCTL_FROMDS)) { case 0: ether_addr_copy(hdr.addr3, vif->bss_conf.bssid); break; case IEEE80211_FCTL_FROMDS: - ether_addr_copy(hdr.addr3, eth_hdr.h_source); + ether_addr_copy(hdr.addr3, eth_hdr->h_source); break; case IEEE80211_FCTL_TODS: - ether_addr_copy(hdr.addr3, eth_hdr.h_dest); + ether_addr_copy(hdr.addr3, eth_hdr->h_dest); break; case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS: - ether_addr_copy(hdr.addr3, eth_hdr.h_dest); - ether_addr_copy(hdr.addr4, eth_hdr.h_source); + ether_addr_copy(hdr.addr3, eth_hdr->h_dest); + ether_addr_copy(hdr.addr4, eth_hdr->h_source); break; default: break; } skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2); - if (eth_hdr.h_proto == htons(ETH_P_AARP) || - eth_hdr.h_proto == htons(ETH_P_IPX)) + if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) || + eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX)) ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header); - else if (eth_hdr.h_proto >= htons(ETH_P_802_3_MIN)) + else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN) ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header); else skb_pull(skb, 2); if (ieee80211_has_order(hdr.frame_control)) - memcpy(skb_push(skb, 2), &ht_ctrl, 2); - if (ieee80211_is_data_qos(hdr.frame_control)) - memcpy(skb_push(skb, 2), &qos_ctrl, 2); + memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9], + IEEE80211_HT_CTL_LEN); + if (ieee80211_is_data_qos(hdr.frame_control)) { + __le16 qos_ctrl; + + qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL)); + memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl, + IEEE80211_QOS_CTL_LEN); + } + if (ieee80211_has_a4(hdr.frame_control)) memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); else @@ -463,6 +471,108 @@ static int mt7915_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) } static int +mt7915_mac_fill_rx_rate(struct mt7915_dev *dev, + struct mt76_rx_status *status, + struct ieee80211_supported_band *sband, + __le32 *rxv) +{ + u32 v0, v2; + u8 stbc, gi, bw, dcm, mode, nss; + int i, idx; + bool cck = false; + + v0 = le32_to_cpu(rxv[0]); + v2 = le32_to_cpu(rxv[2]); + + idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0); + nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1; + + if (!is_mt7915(&dev->mt76)) { + stbc = FIELD_GET(MT_PRXV_HT_STBC, v0); + gi = FIELD_GET(MT_PRXV_HT_SHORT_GI, v0); + mode = FIELD_GET(MT_PRXV_TX_MODE, v0); + dcm = FIELD_GET(MT_PRXV_DCM, v0); + bw = FIELD_GET(MT_PRXV_FRAME_MODE, v0); + } else { + stbc = FIELD_GET(MT_CRXV_HT_STBC, v2); + gi = FIELD_GET(MT_CRXV_HT_SHORT_GI, v2); + mode = FIELD_GET(MT_CRXV_TX_MODE, v2); + dcm = !!(idx & GENMASK(3, 0) & MT_PRXV_TX_DCM); + bw = FIELD_GET(MT_CRXV_FRAME_MODE, v2); + } + + switch (mode) { + case MT_PHY_TYPE_CCK: + cck = true; + fallthrough; + case MT_PHY_TYPE_OFDM: + i = mt76_get_rate(&dev->mt76, sband, i, cck); + break; + case MT_PHY_TYPE_HT_GF: + case MT_PHY_TYPE_HT: + status->encoding = RX_ENC_HT; + if (gi) + status->enc_flags |= RX_ENC_FLAG_SHORT_GI; + if (i > 31) + return -EINVAL; + break; + case MT_PHY_TYPE_VHT: + status->nss = nss; + status->encoding = RX_ENC_VHT; + if (gi) + status->enc_flags |= RX_ENC_FLAG_SHORT_GI; + if (i > 9) + return -EINVAL; + break; + case MT_PHY_TYPE_HE_MU: + case MT_PHY_TYPE_HE_SU: + case MT_PHY_TYPE_HE_EXT_SU: + case MT_PHY_TYPE_HE_TB: + status->nss = nss; + status->encoding = RX_ENC_HE; + i &= GENMASK(3, 0); + + if (gi <= NL80211_RATE_INFO_HE_GI_3_2) + status->he_gi = gi; + + status->he_dcm = dcm; + break; + default: + return -EINVAL; + } + status->rate_idx = i; + + switch (bw) { + case IEEE80211_STA_RX_BW_20: + break; + case IEEE80211_STA_RX_BW_40: + if (mode & MT_PHY_TYPE_HE_EXT_SU && + (idx & MT_PRXV_TX_ER_SU_106T)) { + status->bw = RATE_INFO_BW_HE_RU; + status->he_ru = + NL80211_RATE_INFO_HE_RU_ALLOC_106; + } else { + status->bw = RATE_INFO_BW_40; + } + break; + case IEEE80211_STA_RX_BW_80: + status->bw = RATE_INFO_BW_80; + break; + case IEEE80211_STA_RX_BW_160: + status->bw = RATE_INFO_BW_160; + break; + default: + return -EINVAL; + } + + status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc; + if (mode < MT_PHY_TYPE_HE_SU && gi) + status->enc_flags |= RX_ENC_FLAG_SHORT_GI; + + return 0; +} + +static int mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb) { struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; @@ -485,11 +595,11 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb) u16 seq_ctrl = 0; u8 qos_ctl = 0; __le16 fc = 0; - int i, idx; + int idx; memset(status, 0, sizeof(*status)); - if (rxd1 & MT_RXD1_NORMAL_BAND_IDX) { + if ((rxd1 & MT_RXD1_NORMAL_BAND_IDX) && !phy->band_idx) { mphy = dev->mt76.phy2; if (!mphy) return -EINVAL; @@ -530,6 +640,8 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb) status->band = mphy->chandef.chan->band; if (status->band == NL80211_BAND_5GHZ) sband = &mphy->sband_5g.sband; + else if (status->band == NL80211_BAND_6GHZ) + sband = &mphy->sband_6g.sband; else sband = &mphy->sband_2g.sband; @@ -626,7 +738,8 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb) /* RXD Group 3 - P-RXV */ if (rxd1 & MT_RXD1_NORMAL_GROUP_3) { - u32 v0, v1, v2; + u32 v0, v1; + int ret; rxv = rxd; rxd += 2; @@ -635,7 +748,6 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb) v0 = le32_to_cpu(rxv[0]); v1 = le32_to_cpu(rxv[1]); - v2 = le32_to_cpu(rxv[2]); if (v0 & MT_PRXV_HT_AD_CODE) status->enc_flags |= RX_ENC_FLAG_LDPC; @@ -645,94 +757,18 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb) status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v1); status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v1); status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v1); - status->signal = status->chain_signal[0]; - - for (i = 1; i < hweight8(mphy->antenna_mask); i++) { - if (!(status->chains & BIT(i))) - continue; - - status->signal = max(status->signal, - status->chain_signal[i]); - } /* RXD Group 5 - C-RXV */ if (rxd1 & MT_RXD1_NORMAL_GROUP_5) { - u8 stbc = FIELD_GET(MT_CRXV_HT_STBC, v2); - u8 gi = FIELD_GET(MT_CRXV_HT_SHORT_GI, v2); - bool cck = false; - rxd += 18; if ((u8 *)rxd - skb->data >= skb->len) return -EINVAL; + } - idx = i = FIELD_GET(MT_PRXV_TX_RATE, v0); - mode = FIELD_GET(MT_CRXV_TX_MODE, v2); - - switch (mode) { - case MT_PHY_TYPE_CCK: - cck = true; - fallthrough; - case MT_PHY_TYPE_OFDM: - i = mt76_get_rate(&dev->mt76, sband, i, cck); - break; - case MT_PHY_TYPE_HT_GF: - case MT_PHY_TYPE_HT: - status->encoding = RX_ENC_HT; - if (i > 31) - return -EINVAL; - break; - case MT_PHY_TYPE_VHT: - status->nss = - FIELD_GET(MT_PRXV_NSTS, v0) + 1; - status->encoding = RX_ENC_VHT; - if (i > 9) - return -EINVAL; - break; - case MT_PHY_TYPE_HE_MU: - case MT_PHY_TYPE_HE_SU: - case MT_PHY_TYPE_HE_EXT_SU: - case MT_PHY_TYPE_HE_TB: - status->nss = - FIELD_GET(MT_PRXV_NSTS, v0) + 1; - status->encoding = RX_ENC_HE; - i &= GENMASK(3, 0); - - if (gi <= NL80211_RATE_INFO_HE_GI_3_2) - status->he_gi = gi; - - status->he_dcm = !!(idx & MT_PRXV_TX_DCM); - break; - default: - return -EINVAL; - } - status->rate_idx = i; - - switch (FIELD_GET(MT_CRXV_FRAME_MODE, v2)) { - case IEEE80211_STA_RX_BW_20: - break; - case IEEE80211_STA_RX_BW_40: - if (mode & MT_PHY_TYPE_HE_EXT_SU && - (idx & MT_PRXV_TX_ER_SU_106T)) { - status->bw = RATE_INFO_BW_HE_RU; - status->he_ru = - NL80211_RATE_INFO_HE_RU_ALLOC_106; - } else { - status->bw = RATE_INFO_BW_40; - } - break; - case IEEE80211_STA_RX_BW_80: - status->bw = RATE_INFO_BW_80; - break; - case IEEE80211_STA_RX_BW_160: - status->bw = RATE_INFO_BW_160; - break; - default: - return -EINVAL; - } - - status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc; - if (mode < MT_PHY_TYPE_HE_SU && gi) - status->enc_flags |= RX_ENC_FLAG_SHORT_GI; + if (!is_mt7915(&dev->mt76) || (rxd1 & MT_RXD1_NORMAL_GROUP_5)) { + ret = mt7915_mac_fill_rx_rate(dev, status, sband, rxv); + if (ret < 0) + return ret; } } @@ -801,6 +837,10 @@ mt7915_mac_fill_rx(struct mt7915_dev *dev, struct sk_buff *skb) if (!status->wcid || !ieee80211_is_data_qos(fc)) return 0; + /* drop no data frame */ + if (fc & cpu_to_le16(IEEE80211_STYPE_NULLFUNC)) + return -EINVAL; + status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc); status->qos_ctl = qos_ctl; @@ -818,13 +858,13 @@ mt7915_mac_fill_rx_vector(struct mt7915_dev *dev, struct sk_buff *skb) __le32 *rxv_hdr = rxd + 2; __le32 *rxv = rxd + 4; u32 rcpi, ib_rssi, wb_rssi, v20, v21; - bool ext_phy; + u8 band_idx; s32 foe; u8 snr; int i; - ext_phy = FIELD_GET(MT_RXV_HDR_BAND_IDX, le32_to_cpu(rxv_hdr[1])); - if (ext_phy) + band_idx = le32_get_bits(rxv_hdr[1], MT_RXV_HDR_BAND_IDX); + if (band_idx && !phy->band_idx) phy = mt7915_ext_phy(dev); rcpi = le32_to_cpu(rxv[6]); @@ -1065,6 +1105,7 @@ mt7915_mac_write_txwi_80211(struct mt7915_dev *dev, __le32 *txwi, if (ieee80211_is_beacon(fc)) { txwi[3] &= ~cpu_to_le32(MT_TXD3_SW_POWER_MGMT); txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT); + txwi[7] |= cpu_to_le32(FIELD_PREP(MT_TXD7_SPE_IDX, 0x18)); } if (info->flags & IEEE80211_TX_CTL_INJECTED) { @@ -1080,6 +1121,7 @@ mt7915_mac_write_txwi_80211(struct mt7915_dev *dev, __le32 *txwi, val = MT_TXD3_SN_VALID | FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno)); txwi[3] |= cpu_to_le32(val); + txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU); } val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | @@ -1140,7 +1182,7 @@ void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi, struct ieee80211_vif *vif = info->control.vif; struct mt76_phy *mphy = &dev->mphy; bool ext_phy = info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY; - u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0; + u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0; bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; bool mcast = false; u16 tx_count = 15; @@ -1151,6 +1193,7 @@ void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi, omac_idx = mvif->mt76.omac_idx; wmm_idx = mvif->mt76.wmm_idx; + band_idx = mvif->mt76.band_idx; } if (ext_phy && dev->mt76.phy2) @@ -1165,7 +1208,7 @@ void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi, } else { p_fmt = MT_TX_TYPE_CT; q_idx = wmm_idx * MT7915_MAX_WMM_SETS + - mt7915_lmac_mapping(dev, skb_get_queue_mapping(skb)); + mt76_connac_lmac_mapping(skb_get_queue_mapping(skb)); } val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + MT_TXD_SIZE) | @@ -1177,7 +1220,7 @@ void mt7915_mac_write_txwi(struct mt7915_dev *dev, __le32 *txwi, FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) | FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx); - if (ext_phy && q_idx >= MT_LMAC_ALTX0 && q_idx <= MT_LMAC_BCN0) + if (ext_phy || band_idx) val |= MT_TXD1_TGID; txwi[1] = cpu_to_le32(val); @@ -1311,10 +1354,10 @@ mt7915_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi) u16 fc, tid; u32 val; - if (!sta || !sta->ht_cap.ht_supported) + if (!sta || !(sta->ht_cap.ht_supported || sta->he_cap.has_he)) return; - tid = FIELD_GET(MT_TXD1_TID, le32_to_cpu(txwi[1])); + tid = le32_get_bits(txwi[1], MT_TXD1_TID); if (tid >= 6) /* skip VO queue */ return; @@ -1362,7 +1405,7 @@ mt7915_txwi_free(struct mt7915_dev *dev, struct mt76_txwi_cache *t, if (likely(t->skb->protocol != cpu_to_be16(ETH_P_PAE))) mt7915_tx_check_aggr(sta, txwi); } else { - wcid_idx = FIELD_GET(MT_TXD1_WLAN_IDX, le32_to_cpu(txwi[1])); + wcid_idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); } __mt76_tx_complete_skb(mdev, wcid_idx, t->skb, free_list); @@ -1383,8 +1426,10 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len) LIST_HEAD(free_list); struct sk_buff *skb, *tmp; void *end = data + len; - u8 i, count; - bool wake = false; + bool v3, wake = false; + u16 total, count = 0; + u32 txd = le32_to_cpu(free->txd); + __le32 *cur_info; /* clean DMA queues and unmap buffers first */ mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); @@ -1394,17 +1439,14 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len) mt76_queue_tx_cleanup(dev, mphy_ext->q_tx[MT_TXQ_BE], false); } - /* - * TODO: MT_TX_FREE_LATENCY is msdu time from the TXD is queued into PLE, - * to the time ack is received or dropped by hw (air + hw queue time). - * Should avoid accessing WTBL to get Tx airtime, and use it instead. - */ - count = FIELD_GET(MT_TX_FREE_MSDU_CNT, le16_to_cpu(free->ctrl)); - if (WARN_ON_ONCE((void *)&free->info[count] > end)) + total = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_CNT); + v3 = (FIELD_GET(MT_TX_FREE_VER, txd) == 0x4); + if (WARN_ON_ONCE((void *)&free->info[total >> v3] > end)) return; - for (i = 0; i < count; i++) { - u32 msdu, info = le32_to_cpu(free->info[i]); + for (cur_info = &free->info[0]; count < total; cur_info++) { + u32 msdu, info = le32_to_cpu(*cur_info); + u8 i; /* * 1'b1: new wcid pair. @@ -1415,7 +1457,6 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len) struct mt76_wcid *wcid; u16 idx; - count++; idx = FIELD_GET(MT_TX_FREE_WLAN_ID, info); wcid = rcu_dereference(dev->mt76.wcid[idx]); sta = wcid_to_sta(wcid); @@ -1430,12 +1471,24 @@ mt7915_mac_tx_free(struct mt7915_dev *dev, void *data, int len) continue; } - msdu = FIELD_GET(MT_TX_FREE_MSDU_ID, info); - txwi = mt76_token_release(mdev, msdu, &wake); - if (!txwi) + if (v3 && (info & MT_TX_FREE_MPDU_HEADER)) continue; - mt7915_txwi_free(dev, txwi, sta, &free_list); + for (i = 0; i < 1 + v3; i++) { + if (v3) { + msdu = (info >> (15 * i)) & MT_TX_FREE_MSDU_ID_V3; + if (msdu == MT_TX_FREE_MSDU_ID_V3) + continue; + } else { + msdu = FIELD_GET(MT_TX_FREE_MSDU_ID, info); + } + count++; + txwi = mt76_token_release(mdev, msdu, &wake); + if (!txwi) + continue; + + mt7915_txwi_free(dev, txwi, sta, &free_list); + } } mt7915_mac_sta_poll(dev); @@ -1504,6 +1557,8 @@ mt7915_mac_add_txs_skb(struct mt7915_dev *dev, struct mt76_wcid *wcid, int pid, if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) sband = &mphy->sband_5g.sband; + else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) + sband = &mphy->sband_6g.sband; else sband = &mphy->sband_2g.sband; @@ -1512,7 +1567,6 @@ mt7915_mac_add_txs_skb(struct mt7915_dev *dev, struct mt76_wcid *wcid, int pid, break; case MT_PHY_TYPE_HT: case MT_PHY_TYPE_HT_GF: - rate.mcs += (rate.nss - 1) * 8; if (rate.mcs > 31) goto out; @@ -1578,23 +1632,18 @@ static void mt7915_mac_add_txs(struct mt7915_dev *dev, void *data) struct mt76_wcid *wcid; __le32 *txs_data = data; u16 wcidx; - u32 txs; u8 pid; - txs = le32_to_cpu(txs_data[0]); - if (FIELD_GET(MT_TXS0_TXS_FORMAT, txs) > 1) + if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1) return; - txs = le32_to_cpu(txs_data[2]); - wcidx = FIELD_GET(MT_TXS2_WCID, txs); - - txs = le32_to_cpu(txs_data[3]); - pid = FIELD_GET(MT_TXS3_PID, txs); + wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); + pid = le32_get_bits(txs_data[3], MT_TXS3_PID); if (pid < MT_PACKET_ID_FIRST) return; - if (wcidx >= MT7915_WTBL_SIZE) + if (wcidx >= mt7915_wtbl_size(dev)) return; rcu_read_lock(); @@ -1626,7 +1675,8 @@ bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len) __le32 *end = (__le32 *)&rxd[len / 4]; enum rx_pkt_type type; - type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); + type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); + switch (type) { case PKT_TYPE_TXRX_NOTIFY: mt7915_mac_tx_free(dev, data, len); @@ -1635,6 +1685,9 @@ bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len) for (rxd += 2; rxd + 8 <= end; rxd += 8) mt7915_mac_add_txs(dev, rxd); return false; + case PKT_TYPE_RX_FW_MONITOR: + mt7915_debugfs_rx_fw_monitor(dev, data, len); + return false; default: return true; } @@ -1648,7 +1701,7 @@ void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, __le32 *end = (__le32 *)&skb->data[skb->len]; enum rx_pkt_type type; - type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); + type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); switch (type) { case PKT_TYPE_TXRX_NOTIFY: @@ -1666,6 +1719,10 @@ void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, mt7915_mac_add_txs(dev, rxd); dev_kfree_skb(skb); break; + case PKT_TYPE_RX_FW_MONITOR: + mt7915_debugfs_rx_fw_monitor(dev, skb->data, skb->len); + dev_kfree_skb(skb); + break; case PKT_TYPE_NORMAL: if (!mt7915_mac_fill_rx(dev, skb)) { mt76_rx(&dev->mt76, q, skb); @@ -1702,8 +1759,7 @@ void mt7915_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e) void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy) { struct mt7915_dev *dev = phy->dev; - bool ext_phy = phy != &dev->phy; - u32 reg = MT_WF_PHY_RX_CTRL1(ext_phy); + u32 reg = MT_WF_PHY_RX_CTRL1(phy->band_idx); mt76_clear(dev, reg, MT_WF_PHY_RX_CTRL1_STSCNT_EN); mt76_set(dev, reg, BIT(11) | BIT(9)); @@ -1712,25 +1768,22 @@ void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy) void mt7915_mac_reset_counters(struct mt7915_phy *phy) { struct mt7915_dev *dev = phy->dev; - bool ext_phy = phy != &dev->phy; int i; for (i = 0; i < 4; i++) { - mt76_rr(dev, MT_TX_AGG_CNT(ext_phy, i)); - mt76_rr(dev, MT_TX_AGG_CNT2(ext_phy, i)); + mt76_rr(dev, MT_TX_AGG_CNT(phy->band_idx, i)); + mt76_rr(dev, MT_TX_AGG_CNT2(phy->band_idx, i)); } - if (ext_phy) { - dev->mt76.phy2->survey_time = ktime_get_boottime(); + i = 0; + phy->mt76->survey_time = ktime_get_boottime(); + if (phy->band_idx) i = ARRAY_SIZE(dev->mt76.aggr_stats) / 2; - } else { - dev->mt76.phy.survey_time = ktime_get_boottime(); - i = 0; - } + memset(&dev->mt76.aggr_stats[i], 0, sizeof(dev->mt76.aggr_stats) / 2); /* reset airtime counters */ - mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(ext_phy), + mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(phy->band_idx), MT_WF_RMAC_MIB_RXTIME_CLR); mt7915_mcu_get_chan_mib_info(phy, true); @@ -1740,29 +1793,23 @@ void mt7915_mac_set_timing(struct mt7915_phy *phy) { s16 coverage_class = phy->coverage_class; struct mt7915_dev *dev = phy->dev; - bool ext_phy = phy != &dev->phy; + struct mt7915_phy *ext_phy = mt7915_ext_phy(dev); u32 val, reg_offset; u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) | FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48); u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) | FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28); int offset; - bool is_5ghz = phy->mt76->chandef.chan->band == NL80211_BAND_5GHZ; + bool a_band = !(phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ); if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state)) return; - if (ext_phy) { + if (ext_phy) coverage_class = max_t(s16, dev->phy.coverage_class, - coverage_class); - } else { - struct mt7915_phy *phy_ext = mt7915_ext_phy(dev); + ext_phy->coverage_class); - if (phy_ext) - coverage_class = max_t(s16, phy_ext->coverage_class, - coverage_class); - } - mt76_set(dev, MT_ARB_SCR(ext_phy), + mt76_set(dev, MT_ARB_SCR(phy->band_idx), MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); udelay(1); @@ -1770,35 +1817,40 @@ void mt7915_mac_set_timing(struct mt7915_phy *phy) reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) | FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset); - mt76_wr(dev, MT_TMAC_CDTR(ext_phy), cck + reg_offset); - mt76_wr(dev, MT_TMAC_ODTR(ext_phy), ofdm + reg_offset); - mt76_wr(dev, MT_TMAC_ICR0(ext_phy), - FIELD_PREP(MT_IFS_EIFS_OFDM, is_5ghz ? 84 : 78) | + mt76_wr(dev, MT_TMAC_CDTR(phy->band_idx), cck + reg_offset); + mt76_wr(dev, MT_TMAC_ODTR(phy->band_idx), ofdm + reg_offset); + mt76_wr(dev, MT_TMAC_ICR0(phy->band_idx), + FIELD_PREP(MT_IFS_EIFS_OFDM, a_band ? 84 : 78) | FIELD_PREP(MT_IFS_RIFS, 2) | FIELD_PREP(MT_IFS_SIFS, 10) | FIELD_PREP(MT_IFS_SLOT, phy->slottime)); - mt76_wr(dev, MT_TMAC_ICR1(ext_phy), + mt76_wr(dev, MT_TMAC_ICR1(phy->band_idx), FIELD_PREP(MT_IFS_EIFS_CCK, 314)); - if (phy->slottime < 20 || is_5ghz) + if (phy->slottime < 20 || a_band) val = MT7915_CFEND_RATE_DEFAULT; else val = MT7915_CFEND_RATE_11B; - mt76_rmw_field(dev, MT_AGG_ACR0(ext_phy), MT_AGG_ACR_CFEND_RATE, val); - mt76_clear(dev, MT_ARB_SCR(ext_phy), + mt76_rmw_field(dev, MT_AGG_ACR0(phy->band_idx), MT_AGG_ACR_CFEND_RATE, val); + mt76_clear(dev, MT_ARB_SCR(phy->band_idx), MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE); } void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy) { - mt76_set(dev, MT_WF_PHY_RXTD12(ext_phy), + u32 reg; + + reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_RXTD12(ext_phy) : + MT_WF_PHY_RXTD12_MT7916(ext_phy); + mt76_set(dev, reg, MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY | MT_WF_PHY_RXTD12_IRPI_SW_CLR); - mt76_set(dev, MT_WF_PHY_RX_CTRL1(ext_phy), - FIELD_PREP(MT_WF_PHY_RX_CTRL1_IPI_EN, 0x5)); + reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_RX_CTRL1(ext_phy) : + MT_WF_PHY_RX_CTRL1_MT7916(ext_phy); + mt76_set(dev, reg, FIELD_PREP(MT_WF_PHY_RX_CTRL1_IPI_EN, 0x5)); } static u8 @@ -1810,7 +1862,9 @@ mt7915_phy_get_nf(struct mt7915_phy *phy, int idx) int nss, i; for (nss = 0; nss < hweight8(phy->mt76->chainmask); nss++) { - u32 reg = MT_WF_IRPI(nss + (idx << dev->dbdc_support)); + u32 reg = is_mt7915(&dev->mt76) ? + MT_WF_IRPI_NSS(0, nss + (idx << dev->dbdc_support)) : + MT_WF_IRPI_NSS_MT7916(idx, nss); for (i = 0; i < ARRAY_SIZE(nf_power); i++, reg += 4) { val = mt76_rr(dev, reg); @@ -1829,12 +1883,11 @@ void mt7915_update_channel(struct mt76_phy *mphy) { struct mt7915_phy *phy = (struct mt7915_phy *)mphy->priv; struct mt76_channel_state *state = mphy->chan_state; - bool ext_phy = phy != &phy->dev->phy; int nf; mt7915_mcu_get_chan_mib_info(phy, false); - nf = mt7915_phy_get_nf(phy, ext_phy); + nf = mt7915_phy_get_nf(phy, phy->band_idx); if (!phy->noise) phy->noise = nf << 4; else if (nf) @@ -1891,20 +1944,26 @@ static void mt7915_dma_reset(struct mt7915_dev *dev) { struct mt76_phy *mphy_ext = dev->mt76.phy2; - u32 hif1_ofs = MT_WFDMA1_PCIE1_BASE - MT_WFDMA1_BASE; + u32 hif1_ofs = MT_WFDMA0_PCIE1(0) - MT_WFDMA0(0); int i; mt76_clear(dev, MT_WFDMA0_GLO_CFG, - MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); - mt76_clear(dev, MT_WFDMA1_GLO_CFG, - MT_WFDMA1_GLO_CFG_TX_DMA_EN | MT_WFDMA1_GLO_CFG_RX_DMA_EN); + MT_WFDMA0_GLO_CFG_TX_DMA_EN | + MT_WFDMA0_GLO_CFG_RX_DMA_EN); + + if (is_mt7915(&dev->mt76)) + mt76_clear(dev, MT_WFDMA1_GLO_CFG, + MT_WFDMA1_GLO_CFG_TX_DMA_EN | + MT_WFDMA1_GLO_CFG_RX_DMA_EN); if (dev->hif2) { mt76_clear(dev, MT_WFDMA0_GLO_CFG + hif1_ofs, - (MT_WFDMA0_GLO_CFG_TX_DMA_EN | - MT_WFDMA0_GLO_CFG_RX_DMA_EN)); - mt76_clear(dev, MT_WFDMA1_GLO_CFG + hif1_ofs, - (MT_WFDMA1_GLO_CFG_TX_DMA_EN | - MT_WFDMA1_GLO_CFG_RX_DMA_EN)); + MT_WFDMA0_GLO_CFG_TX_DMA_EN | + MT_WFDMA0_GLO_CFG_RX_DMA_EN); + + if (is_mt7915(&dev->mt76)) + mt76_clear(dev, MT_WFDMA1_GLO_CFG + hif1_ofs, + MT_WFDMA1_GLO_CFG_TX_DMA_EN | + MT_WFDMA1_GLO_CFG_RX_DMA_EN); } usleep_range(1000, 2000); @@ -1928,19 +1987,23 @@ mt7915_dma_reset(struct mt7915_dev *dev) mt76_set(dev, MT_WFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN); - mt76_set(dev, MT_WFDMA1_GLO_CFG, - MT_WFDMA1_GLO_CFG_TX_DMA_EN | MT_WFDMA1_GLO_CFG_RX_DMA_EN | - MT_WFDMA1_GLO_CFG_OMIT_TX_INFO | - MT_WFDMA1_GLO_CFG_OMIT_RX_INFO); - if (dev->hif2) { - mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs, - (MT_WFDMA0_GLO_CFG_TX_DMA_EN | - MT_WFDMA0_GLO_CFG_RX_DMA_EN)); - mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs, - (MT_WFDMA1_GLO_CFG_TX_DMA_EN | + if (is_mt7915(&dev->mt76)) + mt76_set(dev, MT_WFDMA1_GLO_CFG, + MT_WFDMA1_GLO_CFG_TX_DMA_EN | MT_WFDMA1_GLO_CFG_RX_DMA_EN | MT_WFDMA1_GLO_CFG_OMIT_TX_INFO | - MT_WFDMA1_GLO_CFG_OMIT_RX_INFO)); + MT_WFDMA1_GLO_CFG_OMIT_RX_INFO); + if (dev->hif2) { + mt76_set(dev, MT_WFDMA0_GLO_CFG + hif1_ofs, + MT_WFDMA0_GLO_CFG_TX_DMA_EN | + MT_WFDMA0_GLO_CFG_RX_DMA_EN); + + if (is_mt7915(&dev->mt76)) + mt76_set(dev, MT_WFDMA1_GLO_CFG + hif1_ofs, + MT_WFDMA1_GLO_CFG_TX_DMA_EN | + MT_WFDMA1_GLO_CFG_RX_DMA_EN | + MT_WFDMA1_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA1_GLO_CFG_OMIT_RX_INFO); } } @@ -2050,106 +2113,96 @@ void mt7915_mac_update_stats(struct mt7915_phy *phy) { struct mt7915_dev *dev = phy->dev; struct mib_stats *mib = &phy->mib; - bool ext_phy = phy != &dev->phy; int i, aggr0, aggr1, cnt; + u32 val; - mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(ext_phy), - MT_MIB_SDR3_FCS_ERR_MASK); + cnt = mt76_rr(dev, MT_MIB_SDR3(phy->band_idx)); + mib->fcs_err_cnt += is_mt7915(&dev->mt76) ? FIELD_GET(MT_MIB_SDR3_FCS_ERR_MASK, cnt) : + FIELD_GET(MT_MIB_SDR3_FCS_ERR_MASK_MT7916, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR4(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR4(phy->band_idx)); mib->rx_fifo_full_cnt += FIELD_GET(MT_MIB_SDR4_RX_FIFO_FULL_MASK, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR5(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR5(phy->band_idx)); mib->rx_mpdu_cnt += cnt; - cnt = mt76_rr(dev, MT_MIB_SDR6(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR6(phy->band_idx)); mib->channel_idle_cnt += FIELD_GET(MT_MIB_SDR6_CHANNEL_IDL_CNT_MASK, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR7(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR7(phy->band_idx)); mib->rx_vector_mismatch_cnt += FIELD_GET(MT_MIB_SDR7_RX_VECTOR_MISMATCH_CNT_MASK, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR8(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR8(phy->band_idx)); mib->rx_delimiter_fail_cnt += FIELD_GET(MT_MIB_SDR8_RX_DELIMITER_FAIL_CNT_MASK, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR11(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR11(phy->band_idx)); mib->rx_len_mismatch_cnt += FIELD_GET(MT_MIB_SDR11_RX_LEN_MISMATCH_CNT_MASK, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR12(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR12(phy->band_idx)); mib->tx_ampdu_cnt += cnt; - cnt = mt76_rr(dev, MT_MIB_SDR13(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR13(phy->band_idx)); mib->tx_stop_q_empty_cnt += FIELD_GET(MT_MIB_SDR13_TX_STOP_Q_EMPTY_CNT_MASK, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR14(ext_phy)); - mib->tx_mpdu_attempts_cnt += FIELD_GET(MT_MIB_SDR14_TX_MPDU_ATTEMPTS_CNT_MASK, cnt); + cnt = mt76_rr(dev, MT_MIB_SDR14(phy->band_idx)); + mib->tx_mpdu_attempts_cnt += is_mt7915(&dev->mt76) ? + FIELD_GET(MT_MIB_SDR14_TX_MPDU_ATTEMPTS_CNT_MASK, cnt) : + FIELD_GET(MT_MIB_SDR14_TX_MPDU_ATTEMPTS_CNT_MASK_MT7916, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR15(ext_phy)); - mib->tx_mpdu_success_cnt += FIELD_GET(MT_MIB_SDR15_TX_MPDU_SUCCESS_CNT_MASK, cnt); + cnt = mt76_rr(dev, MT_MIB_SDR15(phy->band_idx)); + mib->tx_mpdu_success_cnt += is_mt7915(&dev->mt76) ? + FIELD_GET(MT_MIB_SDR15_TX_MPDU_SUCCESS_CNT_MASK, cnt) : + FIELD_GET(MT_MIB_SDR15_TX_MPDU_SUCCESS_CNT_MASK_MT7916, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR22(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR22(phy->band_idx)); mib->rx_ampdu_cnt += cnt; - cnt = mt76_rr(dev, MT_MIB_SDR23(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR23(phy->band_idx)); mib->rx_ampdu_bytes_cnt += cnt; - cnt = mt76_rr(dev, MT_MIB_SDR24(ext_phy)); - mib->rx_ampdu_valid_subframe_cnt += FIELD_GET(MT_MIB_SDR24_RX_AMPDU_SF_CNT_MASK, cnt); + cnt = mt76_rr(dev, MT_MIB_SDR24(phy->band_idx)); + mib->rx_ampdu_valid_subframe_cnt += is_mt7915(&dev->mt76) ? + FIELD_GET(MT_MIB_SDR24_RX_AMPDU_SF_CNT_MASK, cnt) : + FIELD_GET(MT_MIB_SDR24_RX_AMPDU_SF_CNT_MASK_MT7916, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR25(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR25(phy->band_idx)); mib->rx_ampdu_valid_subframe_bytes_cnt += cnt; - cnt = mt76_rr(dev, MT_MIB_SDR27(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR27(phy->band_idx)); mib->tx_rwp_fail_cnt += FIELD_GET(MT_MIB_SDR27_TX_RWP_FAIL_CNT_MASK, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR28(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR28(phy->band_idx)); mib->tx_rwp_need_cnt += FIELD_GET(MT_MIB_SDR28_TX_RWP_NEED_CNT_MASK, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR29(ext_phy)); - mib->rx_pfdrop_cnt += FIELD_GET(MT_MIB_SDR29_RX_PFDROP_CNT_MASK, cnt); + cnt = mt76_rr(dev, MT_MIB_SDR29(phy->band_idx)); + mib->rx_pfdrop_cnt += is_mt7915(&dev->mt76) ? + FIELD_GET(MT_MIB_SDR29_RX_PFDROP_CNT_MASK, cnt) : + FIELD_GET(MT_MIB_SDR29_RX_PFDROP_CNT_MASK_MT7916, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR30(ext_phy)); - mib->rx_vec_queue_overflow_drop_cnt += - FIELD_GET(MT_MIB_SDR30_RX_VEC_QUEUE_OVERFLOW_DROP_CNT_MASK, cnt); + cnt = mt76_rr(dev, MT_MIB_SDRVEC(phy->band_idx)); + mib->rx_vec_queue_overflow_drop_cnt += is_mt7915(&dev->mt76) ? + FIELD_GET(MT_MIB_SDR30_RX_VEC_QUEUE_OVERFLOW_DROP_CNT_MASK, cnt) : + FIELD_GET(MT_MIB_SDR30_RX_VEC_QUEUE_OVERFLOW_DROP_CNT_MASK_MT7916, cnt); - cnt = mt76_rr(dev, MT_MIB_SDR31(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDR31(phy->band_idx)); mib->rx_ba_cnt += cnt; - cnt = mt76_rr(dev, MT_MIB_SDR32(ext_phy)); - mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_EBF_CNT_MASK, cnt); - - cnt = mt76_rr(dev, MT_MIB_SDR33(ext_phy)); - mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR33_TX_PKT_IBF_CNT_MASK, cnt); - - cnt = mt76_rr(dev, MT_MIB_SDR34(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_SDRMUBF(phy->band_idx)); mib->tx_bf_cnt += FIELD_GET(MT_MIB_MU_BF_TX_CNT, cnt); - cnt = mt76_rr(dev, MT_MIB_DR8(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_DR8(phy->band_idx)); mib->tx_mu_mpdu_cnt += cnt; - cnt = mt76_rr(dev, MT_MIB_DR9(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_DR9(phy->band_idx)); mib->tx_mu_acked_mpdu_cnt += cnt; - cnt = mt76_rr(dev, MT_MIB_DR11(ext_phy)); + cnt = mt76_rr(dev, MT_MIB_DR11(phy->band_idx)); mib->tx_su_acked_mpdu_cnt += cnt; - cnt = mt76_rr(dev, MT_ETBF_TX_APP_CNT(ext_phy)); - mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, cnt); - mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, cnt); - - cnt = mt76_rr(dev, MT_ETBF_RX_FB_CNT(ext_phy)); - mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, cnt); - mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, cnt); - mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, cnt); - mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, cnt); - - cnt = mt76_rr(dev, MT_ETBF_RX_FB_CONT(ext_phy)); - mib->tx_bf_rx_fb_bw = FIELD_GET(MT_ETBF_RX_FB_BW, cnt); - mib->tx_bf_rx_fb_nc_cnt += FIELD_GET(MT_ETBF_RX_FB_NC, cnt); - mib->tx_bf_rx_fb_nr_cnt += FIELD_GET(MT_ETBF_RX_FB_NR, cnt); - - cnt = mt76_rr(dev, MT_ETBF_TX_NDP_BFRP(ext_phy)); - mib->tx_bf_fb_cpl_cnt += FIELD_GET(MT_ETBF_TX_FB_CPL, cnt); - mib->tx_bf_fb_trig_cnt += FIELD_GET(MT_ETBF_TX_FB_TRI, cnt); + cnt = mt76_rr(dev, MT_ETBF_PAR_RPT0(phy->band_idx)); + mib->tx_bf_rx_fb_bw = FIELD_GET(MT_ETBF_PAR_RPT0_FB_BW, cnt); + mib->tx_bf_rx_fb_nc_cnt += FIELD_GET(MT_ETBF_PAR_RPT0_FB_NC, cnt); + mib->tx_bf_rx_fb_nr_cnt += FIELD_GET(MT_ETBF_PAR_RPT0_FB_NR, cnt); for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { cnt = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i)); @@ -2157,27 +2210,97 @@ void mt7915_mac_update_stats(struct mt7915_phy *phy) mib->tx_amsdu_cnt += cnt; } - aggr0 = ext_phy ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; - for (i = 0, aggr1 = aggr0 + 4; i < 4; i++) { - u32 val; + aggr0 = phy->band_idx ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; + if (is_mt7915(&dev->mt76)) { + for (i = 0, aggr1 = aggr0 + 4; i < 4; i++) { + val = mt76_rr(dev, MT_MIB_MB_SDR1(phy->band_idx, (i << 4))); + mib->ba_miss_cnt += FIELD_GET(MT_MIB_BA_MISS_COUNT_MASK, val); + mib->ack_fail_cnt += + FIELD_GET(MT_MIB_ACK_FAIL_COUNT_MASK, val); + + val = mt76_rr(dev, MT_MIB_MB_SDR0(phy->band_idx, (i << 4))); + mib->rts_cnt += FIELD_GET(MT_MIB_RTS_COUNT_MASK, val); + mib->rts_retries_cnt += + FIELD_GET(MT_MIB_RTS_RETRIES_COUNT_MASK, val); - val = mt76_rr(dev, MT_MIB_MB_SDR1(ext_phy, i)); - mib->ba_miss_cnt += FIELD_GET(MT_MIB_BA_MISS_COUNT_MASK, val); - mib->ack_fail_cnt += - FIELD_GET(MT_MIB_ACK_FAIL_COUNT_MASK, val); + val = mt76_rr(dev, MT_TX_AGG_CNT(phy->band_idx, i)); + dev->mt76.aggr_stats[aggr0++] += val & 0xffff; + dev->mt76.aggr_stats[aggr0++] += val >> 16; - val = mt76_rr(dev, MT_MIB_MB_SDR0(ext_phy, i)); - mib->rts_cnt += FIELD_GET(MT_MIB_RTS_COUNT_MASK, val); - mib->rts_retries_cnt += - FIELD_GET(MT_MIB_RTS_RETRIES_COUNT_MASK, val); + val = mt76_rr(dev, MT_TX_AGG_CNT2(phy->band_idx, i)); + dev->mt76.aggr_stats[aggr1++] += val & 0xffff; + dev->mt76.aggr_stats[aggr1++] += val >> 16; + } + + cnt = mt76_rr(dev, MT_MIB_SDR32(phy->band_idx)); + mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_EBF_CNT, cnt); + + cnt = mt76_rr(dev, MT_MIB_SDR33(phy->band_idx)); + mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR33_TX_PKT_IBF_CNT, cnt); - val = mt76_rr(dev, MT_TX_AGG_CNT(ext_phy, i)); - dev->mt76.aggr_stats[aggr0++] += val & 0xffff; - dev->mt76.aggr_stats[aggr0++] += val >> 16; + cnt = mt76_rr(dev, MT_ETBF_TX_APP_CNT(phy->band_idx)); + mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, cnt); + mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, cnt); - val = mt76_rr(dev, MT_TX_AGG_CNT2(ext_phy, i)); - dev->mt76.aggr_stats[aggr1++] += val & 0xffff; - dev->mt76.aggr_stats[aggr1++] += val >> 16; + cnt = mt76_rr(dev, MT_ETBF_TX_NDP_BFRP(phy->band_idx)); + mib->tx_bf_fb_cpl_cnt += FIELD_GET(MT_ETBF_TX_FB_CPL, cnt); + mib->tx_bf_fb_trig_cnt += FIELD_GET(MT_ETBF_TX_FB_TRI, cnt); + + cnt = mt76_rr(dev, MT_ETBF_RX_FB_CNT(phy->band_idx)); + mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, cnt); + mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, cnt); + mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, cnt); + mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, cnt); + } else { + for (i = 0; i < 2; i++) { + /* rts count */ + val = mt76_rr(dev, MT_MIB_MB_SDR0(phy->band_idx, (i << 2))); + mib->rts_cnt += FIELD_GET(GENMASK(15, 0), val); + mib->rts_cnt += FIELD_GET(GENMASK(31, 16), val); + + /* rts retry count */ + val = mt76_rr(dev, MT_MIB_MB_SDR1(phy->band_idx, (i << 2))); + mib->rts_retries_cnt += FIELD_GET(GENMASK(15, 0), val); + mib->rts_retries_cnt += FIELD_GET(GENMASK(31, 16), val); + + /* ba miss count */ + val = mt76_rr(dev, MT_MIB_MB_SDR2(phy->band_idx, (i << 2))); + mib->ba_miss_cnt += FIELD_GET(GENMASK(15, 0), val); + mib->ba_miss_cnt += FIELD_GET(GENMASK(31, 16), val); + + /* ack fail count */ + val = mt76_rr(dev, MT_MIB_MB_BFTF(phy->band_idx, (i << 2))); + mib->ack_fail_cnt += FIELD_GET(GENMASK(15, 0), val); + mib->ack_fail_cnt += FIELD_GET(GENMASK(31, 16), val); + } + + for (i = 0; i < 8; i++) { + val = mt76_rr(dev, MT_TX_AGG_CNT(phy->band_idx, i)); + dev->mt76.aggr_stats[aggr0++] += FIELD_GET(GENMASK(15, 0), val); + dev->mt76.aggr_stats[aggr0++] += FIELD_GET(GENMASK(31, 16), val); + } + + cnt = mt76_rr(dev, MT_MIB_SDR32(phy->band_idx)); + mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_IBF_CNT, cnt); + mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_IBF_CNT, cnt); + mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_EBF_CNT, cnt); + mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_MIB_SDR32_TX_PKT_EBF_CNT, cnt); + + cnt = mt76_rr(dev, MT_MIB_BFCR7(phy->band_idx)); + mib->tx_bf_fb_cpl_cnt += FIELD_GET(MT_MIB_BFCR7_BFEE_TX_FB_CPL, cnt); + + cnt = mt76_rr(dev, MT_MIB_BFCR2(phy->band_idx)); + mib->tx_bf_fb_trig_cnt += FIELD_GET(MT_MIB_BFCR2_BFEE_TX_FB_TRIG, cnt); + + cnt = mt76_rr(dev, MT_MIB_BFCR0(phy->band_idx)); + mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_MIB_BFCR0_RX_FB_VHT, cnt); + mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_MIB_BFCR0_RX_FB_VHT, cnt); + mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_MIB_BFCR0_RX_FB_HT, cnt); + mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_MIB_BFCR0_RX_FB_HT, cnt); + + cnt = mt76_rr(dev, MT_MIB_BFCR1(phy->band_idx)); + mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_MIB_BFCR1_RX_FB_HE, cnt); + mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_MIB_BFCR1_RX_FB_HE, cnt); } } @@ -2248,39 +2371,59 @@ static void mt7915_dfs_stop_radar_detector(struct mt7915_phy *phy) struct mt7915_dev *dev = phy->dev; if (phy->rdd_state & BIT(0)) - mt7915_mcu_rdd_cmd(dev, RDD_STOP, 0, MT_RX_SEL0, 0); + mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, 0, + MT_RX_SEL0, 0); if (phy->rdd_state & BIT(1)) - mt7915_mcu_rdd_cmd(dev, RDD_STOP, 1, MT_RX_SEL0, 0); + mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, 1, + MT_RX_SEL0, 0); } static int mt7915_dfs_start_rdd(struct mt7915_dev *dev, int chain) { - int err; + int err, region; - err = mt7915_mcu_rdd_cmd(dev, RDD_START, chain, MT_RX_SEL0, 0); + switch (dev->mt76.region) { + case NL80211_DFS_ETSI: + region = 0; + break; + case NL80211_DFS_JP: + region = 2; + break; + case NL80211_DFS_FCC: + default: + region = 1; + break; + } + + err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, chain, + MT_RX_SEL0, region); if (err < 0) return err; - return mt7915_mcu_rdd_cmd(dev, RDD_DET_MODE, chain, MT_RX_SEL0, 1); + return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_DET_MODE, chain, + MT_RX_SEL0, 1); } static int mt7915_dfs_start_radar_detector(struct mt7915_phy *phy) { struct cfg80211_chan_def *chandef = &phy->mt76->chandef; struct mt7915_dev *dev = phy->dev; - bool ext_phy = phy != &dev->phy; int err; /* start CAC */ - err = mt7915_mcu_rdd_cmd(dev, RDD_CAC_START, ext_phy, MT_RX_SEL0, 0); + err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_CAC_START, phy->band_idx, + MT_RX_SEL0, 0); if (err < 0) return err; - err = mt7915_dfs_start_rdd(dev, ext_phy); + err = mt7915_dfs_start_rdd(dev, phy->band_idx); if (err < 0) return err; - phy->rdd_state |= BIT(ext_phy); + phy->rdd_state |= BIT(phy->band_idx); + + if (!is_mt7915(&dev->mt76)) + return 0; if (chandef->width == NL80211_CHAN_WIDTH_160 || chandef->width == NL80211_CHAN_WIDTH_80P80) { @@ -2330,48 +2473,56 @@ mt7915_dfs_init_radar_specs(struct mt7915_phy *phy) int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy) { - struct cfg80211_chan_def *chandef = &phy->mt76->chandef; struct mt7915_dev *dev = phy->dev; - bool ext_phy = phy != &dev->phy; + enum mt76_dfs_state dfs_state, prev_state; int err; - if (dev->mt76.region == NL80211_DFS_UNSET) { - phy->dfs_state = -1; - if (phy->rdd_state) - goto stop; + prev_state = phy->mt76->dfs_state; + dfs_state = mt76_phy_dfs_state(phy->mt76); + if (prev_state == dfs_state) return 0; - } - if (test_bit(MT76_SCANNING, &phy->mt76->state)) - return 0; - - if (phy->dfs_state == chandef->chan->dfs_state) - return 0; + if (prev_state == MT_DFS_STATE_UNKNOWN) + mt7915_dfs_stop_radar_detector(phy); - err = mt7915_dfs_init_radar_specs(phy); - if (err < 0) { - phy->dfs_state = -1; + if (dfs_state == MT_DFS_STATE_DISABLED) goto stop; - } - phy->dfs_state = chandef->chan->dfs_state; + if (prev_state <= MT_DFS_STATE_DISABLED) { + err = mt7915_dfs_init_radar_specs(phy); + if (err < 0) + return err; + + err = mt7915_dfs_start_radar_detector(phy); + if (err < 0) + return err; - if (chandef->chan->flags & IEEE80211_CHAN_RADAR) { - if (chandef->chan->dfs_state != NL80211_DFS_AVAILABLE) - return mt7915_dfs_start_radar_detector(phy); + phy->mt76->dfs_state = MT_DFS_STATE_CAC; + } + + if (dfs_state == MT_DFS_STATE_CAC) + return 0; - return mt7915_mcu_rdd_cmd(dev, RDD_CAC_END, ext_phy, - MT_RX_SEL0, 0); + err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_CAC_END, + phy->band_idx, MT_RX_SEL0, 0); + if (err < 0) { + phy->mt76->dfs_state = MT_DFS_STATE_UNKNOWN; + return err; } + phy->mt76->dfs_state = MT_DFS_STATE_ACTIVE; + return 0; + stop: - err = mt7915_mcu_rdd_cmd(dev, RDD_NORMAL_START, ext_phy, - MT_RX_SEL0, 0); + err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_NORMAL_START, + phy->band_idx, MT_RX_SEL0, 0); if (err < 0) return err; mt7915_dfs_stop_radar_detector(phy); + phy->mt76->dfs_state = MT_DFS_STATE_DISABLED; + return 0; } diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mac.h b/drivers/net/wireless/mediatek/mt76/mt7915/mac.h index 7a2c740d1464..5add1dd36dbe 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mac.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mac.h @@ -23,6 +23,7 @@ enum rx_pkt_type { PKT_TYPE_RETRIEVE, PKT_TYPE_TXRX_NOTIFY, PKT_TYPE_RX_EVENT, + PKT_TYPE_RX_FW_MONITOR = 0x0c, }; /* RXD DW1 */ @@ -125,6 +126,12 @@ enum rx_pkt_type { #define MT_PRXV_RCPI2 GENMASK(23, 16) #define MT_PRXV_RCPI1 GENMASK(15, 8) #define MT_PRXV_RCPI0 GENMASK(7, 0) +#define MT_PRXV_HT_SHORT_GI GENMASK(16, 15) +#define MT_PRXV_HT_STBC GENMASK(23, 22) +#define MT_PRXV_TX_MODE GENMASK(27, 24) +#define MT_PRXV_FRAME_MODE GENMASK(14, 12) +#define MT_PRXV_DCM BIT(17) +#define MT_PRXV_NUM_RX BIT(20, 18) /* C-RXV */ #define MT_CRXV_HT_STBC GENMASK(1, 0) @@ -298,18 +305,20 @@ struct mt7915_txp { struct mt7915_tx_free { __le16 rx_byte_cnt; __le16 ctrl; - u8 txd_cnt; - u8 rsv[3]; + __le32 txd; __le32 info[]; } __packed __aligned(4); +#define MT_TX_FREE_VER GENMASK(18, 16) #define MT_TX_FREE_MSDU_CNT GENMASK(9, 0) #define MT_TX_FREE_WLAN_ID GENMASK(23, 14) #define MT_TX_FREE_LATENCY GENMASK(12, 0) /* 0: success, others: dropped */ -#define MT_TX_FREE_STATUS GENMASK(14, 13) #define MT_TX_FREE_MSDU_ID GENMASK(30, 16) #define MT_TX_FREE_PAIR BIT(31) +#define MT_TX_FREE_MPDU_HEADER BIT(30) +#define MT_TX_FREE_MSDU_ID_V3 GENMASK(14, 0) + /* will support this field in further revision */ #define MT_TX_FREE_RATE GENMASK(13, 0) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/main.c b/drivers/net/wireless/mediatek/mt76/mt7915/main.c index 8ac6f59af174..c3f44d801e7f 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/main.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/main.c @@ -34,7 +34,7 @@ static int mt7915_start(struct ieee80211_hw *hw) running = mt7915_dev_running(dev); if (!running) { - ret = mt7915_mcu_set_pm(dev, 0, 0); + ret = mt76_connac_mcu_set_pm(&dev->mt76, 0, 0); if (ret) goto out; @@ -49,8 +49,8 @@ static int mt7915_start(struct ieee80211_hw *hw) mt7915_mac_enable_nf(dev, 0); } - if (phy != &dev->phy) { - ret = mt7915_mcu_set_pm(dev, 1, 0); + if (phy != &dev->phy || phy->band_idx) { + ret = mt76_connac_mcu_set_pm(&dev->mt76, 1, 0); if (ret) goto out; @@ -65,7 +65,8 @@ static int mt7915_start(struct ieee80211_hw *hw) mt7915_mac_enable_nf(dev, 1); } - ret = mt7915_mcu_set_rts_thresh(phy, 0x92b); + ret = mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, + phy != &dev->phy); if (ret) goto out; @@ -106,12 +107,12 @@ static void mt7915_stop(struct ieee80211_hw *hw) clear_bit(MT76_STATE_RUNNING, &phy->mt76->state); if (phy != &dev->phy) { - mt7915_mcu_set_pm(dev, 1, 1); + mt76_connac_mcu_set_pm(&dev->mt76, 1, 1); mt7915_mcu_set_mac(dev, 1, false, false); } if (!mt7915_dev_running(dev)) { - mt7915_mcu_set_pm(dev, 0, 1); + mt76_connac_mcu_set_pm(&dev->mt76, 0, 1); mt7915_mcu_set_mac(dev, 0, false, false); } @@ -216,7 +217,7 @@ static int mt7915_add_interface(struct ieee80211_hw *hw, } mvif->mt76.omac_idx = idx; mvif->phy = phy; - mvif->mt76.band_idx = ext_phy; + mvif->mt76.band_idx = phy->band_idx; mvif->mt76.wmm_idx = vif->type != NL80211_IFTYPE_AP; if (ext_phy) @@ -234,7 +235,7 @@ static int mt7915_add_interface(struct ieee80211_hw *hw, INIT_LIST_HEAD(&mvif->sta.rc_list); INIT_LIST_HEAD(&mvif->sta.poll_list); mvif->sta.wcid.idx = idx; - mvif->sta.wcid.ext_phy = mvif->mt76.band_idx; + mvif->sta.wcid.ext_phy = ext_phy; mvif->sta.wcid.hw_key_idx = -1; mvif->sta.wcid.tx_info |= MT_WCID_TX_INFO_SET; mt76_packet_id_init(&mvif->sta.wcid); @@ -256,6 +257,9 @@ static int mt7915_add_interface(struct ieee80211_hw *hw, mt7915_init_bitrate_mask(vif); memset(&mvif->cap, -1, sizeof(mvif->cap)); + mt7915_mcu_add_bss_info(phy, vif, true); + mt7915_mcu_add_sta(dev, vif, NULL, true); + out: mutex_unlock(&dev->mt76.mutex); @@ -298,25 +302,6 @@ static void mt7915_remove_interface(struct ieee80211_hw *hw, mt76_packet_id_flush(&dev->mt76, &msta->wcid); } -static void mt7915_init_dfs_state(struct mt7915_phy *phy) -{ - struct mt76_phy *mphy = phy->mt76; - struct ieee80211_hw *hw = mphy->hw; - struct cfg80211_chan_def *chandef = &hw->conf.chandef; - - if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) - return; - - if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR)) - return; - - if (mphy->chandef.chan->center_freq == chandef->chan->center_freq && - mphy->chandef.width == chandef->width) - return; - - phy->dfs_state = -1; -} - int mt7915_set_channel(struct mt7915_phy *phy) { struct mt7915_dev *dev = phy->dev; @@ -327,7 +312,6 @@ int mt7915_set_channel(struct mt7915_phy *phy) mutex_lock(&dev->mt76.mutex); set_bit(MT76_RESET, &phy->mt76->state); - mt7915_init_dfs_state(phy); mt76_set_channel(phy->mt76); if (dev->flash_mode) { @@ -366,6 +350,7 @@ static int mt7915_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, struct ieee80211_key_conf *key) { struct mt7915_dev *dev = mt7915_hw_dev(hw); + struct mt7915_phy *phy = mt7915_hw_phy(hw); struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; struct mt7915_sta *msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta; @@ -405,6 +390,11 @@ static int mt7915_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, mutex_lock(&dev->mt76.mutex); + if (cmd == SET_KEY && !sta && !mvif->mt76.cipher) { + mvif->mt76.cipher = mt76_connac_mcu_get_cipher(key->cipher); + mt7915_mcu_add_bss_info(phy, vif, true); + } + if (cmd == SET_KEY) *wcid_keyidx = idx; else if (idx == *wcid_keyidx) @@ -415,8 +405,9 @@ static int mt7915_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, mt76_wcid_key_setup(&dev->mt76, wcid, cmd == SET_KEY ? key : NULL); - err = mt7915_mcu_add_key(dev, vif, msta, key, cmd); - + err = mt76_connac_mcu_add_key(&dev->mt76, vif, &msta->bip, + key, MCU_EXT_CMD(STA_REC_UPDATE), + &msta->wcid, cmd); out: mutex_unlock(&dev->mt76.mutex); @@ -498,11 +489,10 @@ static int mt7915_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, const struct ieee80211_tx_queue_params *params) { - struct mt7915_dev *dev = mt7915_hw_dev(hw); struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; /* no need to update right away, we'll get BSS_CHANGED_QOS */ - queue = mt7915_lmac_mapping(dev, queue); + queue = mt76_connac_lmac_mapping(queue); mvif->queue_params[queue] = *params; return 0; @@ -664,6 +654,7 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; + bool ext_phy = mvif->phy != &dev->phy; int ret, idx; idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7915_WTBL_STA); @@ -675,7 +666,7 @@ int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif, msta->vif = mvif; msta->wcid.sta = 1; msta->wcid.idx = idx; - msta->wcid.ext_phy = mvif->mt76.band_idx; + msta->wcid.ext_phy = ext_phy; msta->wcid.tx_info |= MT_WCID_TX_INFO_SET; msta->jiffies = jiffies; @@ -746,7 +737,7 @@ static int mt7915_set_rts_threshold(struct ieee80211_hw *hw, u32 val) int ret; mutex_lock(&dev->mt76.mutex); - ret = mt7915_mcu_set_rts_thresh(phy, val); + ret = mt76_connac_mcu_set_rts_thresh(&dev->mt76, val, phy != &dev->phy); mutex_unlock(&dev->mt76.mutex); return ret; @@ -861,8 +852,12 @@ u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif) n = mvif->mt76.omac_idx > HW_BSSID_MAX ? HW_BSSID_0 : mvif->mt76.omac_idx; /* TSF software read */ - mt76_rmw(dev, MT_LPON_TCR(band, n), MT_LPON_TCR_SW_MODE, - MT_LPON_TCR_SW_READ); + if (is_mt7915(&dev->mt76)) + mt76_rmw(dev, MT_LPON_TCR(band, n), MT_LPON_TCR_SW_MODE, + MT_LPON_TCR_SW_READ); + else + mt76_rmw(dev, MT_LPON_TCR_MT7916(band, n), MT_LPON_TCR_SW_MODE, + MT_LPON_TCR_SW_READ); tsf.t32[0] = mt76_rr(dev, MT_LPON_UTTR0(band)); tsf.t32[1] = mt76_rr(dev, MT_LPON_UTTR1(band)); @@ -904,8 +899,12 @@ mt7915_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, mt76_wr(dev, MT_LPON_UTTR0(band), tsf.t32[0]); mt76_wr(dev, MT_LPON_UTTR1(band), tsf.t32[1]); /* TSF software overwrite */ - mt76_rmw(dev, MT_LPON_TCR(band, n), MT_LPON_TCR_SW_MODE, - MT_LPON_TCR_SW_WRITE); + if (is_mt7915(&dev->mt76)) + mt76_rmw(dev, MT_LPON_TCR(band, n), MT_LPON_TCR_SW_MODE, + MT_LPON_TCR_SW_WRITE); + else + mt76_rmw(dev, MT_LPON_TCR_MT7916(band, n), MT_LPON_TCR_SW_MODE, + MT_LPON_TCR_SW_WRITE); mutex_unlock(&dev->mt76.mutex); } @@ -931,8 +930,12 @@ mt7915_offset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, mt76_wr(dev, MT_LPON_UTTR0(band), tsf.t32[0]); mt76_wr(dev, MT_LPON_UTTR1(band), tsf.t32[1]); /* TSF software adjust*/ - mt76_rmw(dev, MT_LPON_TCR(band, n), MT_LPON_TCR_SW_MODE, - MT_LPON_TCR_SW_ADJUST); + if (is_mt7915(&dev->mt76)) + mt76_rmw(dev, MT_LPON_TCR(band, n), MT_LPON_TCR_SW_MODE, + MT_LPON_TCR_SW_ADJUST); + else + mt76_rmw(dev, MT_LPON_TCR_MT7916(band, n), MT_LPON_TCR_SW_MODE, + MT_LPON_TCR_SW_ADJUST); mutex_unlock(&dev->mt76.mutex); } @@ -967,12 +970,9 @@ mt7915_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant) phy->mt76->antenna_mask = tx_ant; - if (ext_phy) { - if (dev->chainmask == 0xf) - tx_ant <<= 2; - else - tx_ant <<= 1; - } + if (ext_phy) + tx_ant <<= dev->chainshift; + phy->mt76->chainmask = tx_ant; mt76_set_stream_caps(phy->mt76, true); @@ -994,7 +994,8 @@ static void mt7915_sta_statistics(struct ieee80211_hw *hw, struct rate_info *txrate = &msta->wcid.rate; struct rate_info rxrate = {}; - if (!mt7915_mcu_get_rx_rate(phy, vif, sta, &rxrate)) { + if (is_mt7915(&phy->dev->mt76) && + !mt7915_mcu_get_rx_rate(phy, vif, sta, &rxrate)) { sinfo->rxrate = rxrate; sinfo->filled |= BIT_ULL(NL80211_STA_INFO_RX_BITRATE); } @@ -1079,7 +1080,7 @@ static void mt7915_sta_set_4addr(struct ieee80211_hw *hw, else clear_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags); - mt7915_mcu_sta_update_hdr_trans(dev, vif, sta); + mt76_connac_mcu_wtbl_update_hdr_trans(&dev->mt76, vif, sta); } static void mt7915_sta_set_decap_offload(struct ieee80211_hw *hw, @@ -1095,7 +1096,7 @@ static void mt7915_sta_set_decap_offload(struct ieee80211_hw *hw, else clear_bit(MT_WCID_FLAG_HDR_TRANS, &msta->wcid.flags); - mt7915_mcu_sta_update_hdr_trans(dev, vif, sta); + mt76_connac_mcu_wtbl_update_hdr_trans(&dev->mt76, vif, sta); } static const char mt7915_gstrings_stats[][ETH_GSTRING_LEN] = { @@ -1238,7 +1239,6 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw, }; struct mib_stats *mib = &phy->mib; /* See mt7915_ampdu_stat_read_phy, etc */ - bool ext_phy = phy != &dev->phy; int i, n, ei = 0; mutex_lock(&dev->mt76.mutex); @@ -1255,7 +1255,7 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw, data[ei++] = mib->tx_pkt_ibf_cnt; /* Tx ampdu stat */ - n = ext_phy ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; + n = phy->band_idx ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0; for (i = 0; i < 15 /*ARRAY_SIZE(bound)*/; i++) data[ei++] = dev->mt76.aggr_stats[i + n]; @@ -1332,6 +1332,55 @@ mt7915_twt_teardown_request(struct ieee80211_hw *hw, mutex_unlock(&dev->mt76.mutex); } +static int +mt7915_set_radar_background(struct ieee80211_hw *hw, + struct cfg80211_chan_def *chandef) +{ + struct mt7915_phy *phy = mt7915_hw_phy(hw); + struct mt7915_dev *dev = phy->dev; + int ret = -EINVAL; + bool running; + + mutex_lock(&dev->mt76.mutex); + + if (dev->mt76.region == NL80211_DFS_UNSET) + goto out; + + if (dev->rdd2_phy && dev->rdd2_phy != phy) { + /* rdd2 is already locked */ + ret = -EBUSY; + goto out; + } + + /* rdd2 already configured on a radar channel */ + running = dev->rdd2_phy && + cfg80211_chandef_valid(&dev->rdd2_chandef) && + !!(dev->rdd2_chandef.chan->flags & IEEE80211_CHAN_RADAR); + + if (!chandef || running || + !(chandef->chan->flags & IEEE80211_CHAN_RADAR)) { + ret = mt7915_mcu_rdd_background_enable(phy, NULL); + if (ret) + goto out; + + if (!running) + goto update_phy; + } + + ret = mt7915_mcu_rdd_background_enable(phy, chandef); + if (ret) + goto out; + +update_phy: + dev->rdd2_phy = chandef ? phy : NULL; + if (chandef) + dev->rdd2_chandef = *chandef; +out: + mutex_unlock(&dev->mt76.mutex); + + return ret; +} + const struct ieee80211_ops mt7915_ops = { .tx = mt7915_tx, .start = mt7915_start, @@ -1378,4 +1427,5 @@ const struct ieee80211_ops mt7915_ops = { #ifdef CONFIG_MAC80211_DEBUGFS .sta_add_debugfs = mt7915_sta_add_debugfs, #endif + .set_radar_background = mt7915_set_radar_background, }; diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c index 0911b6f973b5..e7a6f80e7755 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.c @@ -64,136 +64,31 @@ struct mt7915_fw_region { u8 reserved1[15]; } __packed; -#define MCU_PATCH_ADDRESS 0x200000 - -#define FW_FEATURE_SET_ENCRYPT BIT(0) -#define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) -#define FW_FEATURE_OVERRIDE_ADDR BIT(5) - -#define DL_MODE_ENCRYPT BIT(0) -#define DL_MODE_KEY_IDX GENMASK(2, 1) -#define DL_MODE_RESET_SEC_IV BIT(3) -#define DL_MODE_WORKING_PDA_CR4 BIT(4) -#define DL_MODE_NEED_RSP BIT(31) - -#define FW_START_OVERRIDE BIT(0) -#define FW_START_WORKING_PDA_CR4 BIT(2) - -#define PATCH_SEC_TYPE_MASK GENMASK(15, 0) -#define PATCH_SEC_TYPE_INFO 0x2 +#define fw_name(_dev, name, ...) ({ \ + char *_fw; \ + switch (mt76_chip(&(_dev)->mt76)) { \ + case 0x7915: \ + _fw = MT7915_##name; \ + break; \ + case 0x7986: \ + _fw = MT7986_##name##__VA_ARGS__; \ + break; \ + default: \ + _fw = MT7916_##name; \ + break; \ + } \ + _fw; \ +}) + +#define fw_name_var(_dev, name) (mt7915_check_adie(dev, false) ? \ + fw_name(_dev, name) : \ + fw_name(_dev, name, _MT7975)) -#define to_wcid_lo(id) FIELD_GET(GENMASK(7, 0), (u16)id) -#define to_wcid_hi(id) FIELD_GET(GENMASK(9, 8), (u16)id) +#define MCU_PATCH_ADDRESS 0x200000 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) -static enum mcu_cipher_type -mt7915_mcu_get_cipher(int cipher) -{ - switch (cipher) { - case WLAN_CIPHER_SUITE_WEP40: - return MCU_CIPHER_WEP40; - case WLAN_CIPHER_SUITE_WEP104: - return MCU_CIPHER_WEP104; - case WLAN_CIPHER_SUITE_TKIP: - return MCU_CIPHER_TKIP; - case WLAN_CIPHER_SUITE_AES_CMAC: - return MCU_CIPHER_BIP_CMAC_128; - case WLAN_CIPHER_SUITE_CCMP: - return MCU_CIPHER_AES_CCMP; - case WLAN_CIPHER_SUITE_CCMP_256: - return MCU_CIPHER_CCMP_256; - case WLAN_CIPHER_SUITE_GCMP: - return MCU_CIPHER_GCMP; - case WLAN_CIPHER_SUITE_GCMP_256: - return MCU_CIPHER_GCMP_256; - case WLAN_CIPHER_SUITE_SMS4: - return MCU_CIPHER_WAPI; - default: - return MCU_CIPHER_NONE; - } -} - -static u8 mt7915_mcu_chan_bw(struct cfg80211_chan_def *chandef) -{ - static const u8 width_to_bw[] = { - [NL80211_CHAN_WIDTH_40] = CMD_CBW_40MHZ, - [NL80211_CHAN_WIDTH_80] = CMD_CBW_80MHZ, - [NL80211_CHAN_WIDTH_80P80] = CMD_CBW_8080MHZ, - [NL80211_CHAN_WIDTH_160] = CMD_CBW_160MHZ, - [NL80211_CHAN_WIDTH_5] = CMD_CBW_5MHZ, - [NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ, - [NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ, - [NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ, - }; - - if (chandef->width >= ARRAY_SIZE(width_to_bw)) - return 0; - - return width_to_bw[chandef->width]; -} - -static const struct ieee80211_sta_he_cap * -mt7915_get_he_phy_cap(struct mt7915_phy *phy, struct ieee80211_vif *vif) -{ - struct ieee80211_supported_band *sband; - enum nl80211_band band; - - band = phy->mt76->chandef.chan->band; - sband = phy->mt76->hw->wiphy->bands[band]; - - return ieee80211_get_he_iftype_cap(sband, vif->type); -} - -static u8 -mt7915_get_phy_mode(struct ieee80211_vif *vif, struct ieee80211_sta *sta) -{ - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - enum nl80211_band band = mvif->phy->mt76->chandef.chan->band; - struct ieee80211_sta_ht_cap *ht_cap; - struct ieee80211_sta_vht_cap *vht_cap; - const struct ieee80211_sta_he_cap *he_cap; - u8 mode = 0; - - if (sta) { - ht_cap = &sta->ht_cap; - vht_cap = &sta->vht_cap; - he_cap = &sta->he_cap; - } else { - struct ieee80211_supported_band *sband; - - sband = mvif->phy->mt76->hw->wiphy->bands[band]; - - ht_cap = &sband->ht_cap; - vht_cap = &sband->vht_cap; - he_cap = ieee80211_get_he_iftype_cap(sband, vif->type); - } - - if (band == NL80211_BAND_2GHZ) { - mode |= PHY_MODE_B | PHY_MODE_G; - - if (ht_cap->ht_supported) - mode |= PHY_MODE_GN; - - if (he_cap && he_cap->has_he) - mode |= PHY_MODE_AX_24G; - } else if (band == NL80211_BAND_5GHZ) { - mode |= PHY_MODE_A; - - if (ht_cap->ht_supported) - mode |= PHY_MODE_AN; - - if (vht_cap->vht_supported) - mode |= PHY_MODE_AC; - - if (he_cap && he_cap->has_he) - mode |= PHY_MODE_AX_5G; - } - - return mode; -} - static u8 mt7915_mcu_get_sta_nss(u16 mcs_map) { @@ -211,24 +106,13 @@ mt7915_mcu_get_sta_nss(u16 mcs_map) static void mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, - const u16 *mask) + u16 mcs_map) { struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; - struct cfg80211_chan_def *chandef = &msta->vif->phy->mt76->chandef; + struct mt7915_dev *dev = msta->vif->phy->dev; + enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band; + const u16 *mask = msta->vif->bitrate_mask.control[band].he_mcs; int nss, max_nss = sta->rx_nss > 3 ? 4 : sta->rx_nss; - u16 mcs_map; - - switch (chandef->width) { - case NL80211_CHAN_WIDTH_80P80: - mcs_map = le16_to_cpu(sta->he_cap.he_mcs_nss_supp.rx_mcs_80p80); - break; - case NL80211_CHAN_WIDTH_160: - mcs_map = le16_to_cpu(sta->he_cap.he_mcs_nss_supp.rx_mcs_160); - break; - default: - mcs_map = le16_to_cpu(sta->he_cap.he_mcs_nss_supp.rx_mcs_80); - break; - } for (nss = 0; nss < max_nss; nss++) { int mcs; @@ -266,8 +150,9 @@ mt7915_mcu_set_sta_he_mcs(struct ieee80211_sta *sta, __le16 *he_mcs, mcs_map &= ~(0x3 << (nss * 2)); mcs_map |= mcs << (nss * 2); - /* only support 2ss on 160MHz */ - if (nss > 1 && (sta->bandwidth == IEEE80211_STA_RX_BW_160)) + /* only support 2ss on 160MHz for mt7915 */ + if (is_mt7915(&dev->mt76) && nss > 1 && + sta->bandwidth == IEEE80211_STA_RX_BW_160) break; } @@ -278,6 +163,8 @@ static void mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, const u16 *mask) { + struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; + struct mt7915_dev *dev = msta->vif->phy->dev; u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map); int nss, max_nss = sta->rx_nss > 3 ? 4 : sta->rx_nss; u16 mcs; @@ -299,8 +186,9 @@ mt7915_mcu_set_sta_vht_mcs(struct ieee80211_sta *sta, __le16 *vht_mcs, vht_mcs[nss] = cpu_to_le16(mcs & mask[nss]); - /* only support 2ss on 160MHz */ - if (nss > 1 && (sta->bandwidth == IEEE80211_STA_RX_BW_160)) + /* only support 2ss on 160MHz for mt7915 */ + if (is_mt7915(&dev->mt76) && nss > 1 && + sta->bandwidth == IEEE80211_STA_RX_BW_160) break; } } @@ -446,7 +334,7 @@ mt7915_mcu_rx_csa_notify(struct mt7915_dev *dev, struct sk_buff *skb) c = (struct mt7915_mcu_csa_notify *)skb->data; - if (c->band_idx && dev->mt76.phy2) + if ((c->band_idx && !dev->phy.band_idx) && dev->mt76.phy2) mphy = dev->mt76.phy2; ieee80211_iterate_active_interfaces_atomic(mphy->hw, @@ -465,7 +353,7 @@ mt7915_mcu_rx_thermal_notify(struct mt7915_dev *dev, struct sk_buff *skb) if (t->ctrl.ctrl_id != THERMAL_PROTECT_ENABLE) return; - if (t->ctrl.band_idx && dev->mt76.phy2) + if ((t->ctrl.band_idx && !dev->phy.band_idx) && dev->mt76.phy2) mphy = dev->mt76.phy2; phy = (struct mt7915_phy *)mphy->priv; @@ -480,10 +368,15 @@ mt7915_mcu_rx_radar_detected(struct mt7915_dev *dev, struct sk_buff *skb) r = (struct mt7915_mcu_rdd_report *)skb->data; - if (r->band_idx && dev->mt76.phy2) + if ((r->band_idx && !dev->phy.band_idx) && dev->mt76.phy2) mphy = dev->mt76.phy2; - ieee80211_radar_detected(mphy->hw); + if (r->band_idx == MT_RX_SEL2) + cfg80211_background_radar_event(mphy->hw->wiphy, + &dev->rdd2_chandef, + GFP_ATOMIC); + else + ieee80211_radar_detected(mphy->hw); dev->hw_pattern++; } @@ -493,9 +386,13 @@ mt7915_mcu_rx_log_message(struct mt7915_dev *dev, struct sk_buff *skb) struct mt7915_mcu_rxd *rxd = (struct mt7915_mcu_rxd *)skb->data; const char *data = (char *)&rxd[1]; const char *type; + int len = skb->len - sizeof(*rxd); switch (rxd->s2d_index) { case 0: + if (mt7915_debugfs_rx_log(dev, data, len)) + return; + type = "WM"; break; case 2: @@ -506,8 +403,7 @@ mt7915_mcu_rx_log_message(struct mt7915_dev *dev, struct sk_buff *skb) break; } - wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, - (int)(skb->len - sizeof(*rxd)), data); + wiphy_info(mt76_hw(dev)->wiphy, "%s: %.*s", type, len, data); } static void @@ -520,6 +416,22 @@ mt7915_mcu_cca_finish(void *priv, u8 *mac, struct ieee80211_vif *vif) } static void +mt7915_mcu_rx_bcc_notify(struct mt7915_dev *dev, struct sk_buff *skb) +{ + struct mt76_phy *mphy = &dev->mt76.phy; + struct mt7915_mcu_bcc_notify *b; + + b = (struct mt7915_mcu_bcc_notify *)skb->data; + + if ((b->band_idx && !dev->phy.band_idx) && dev->mt76.phy2) + mphy = dev->mt76.phy2; + + ieee80211_iterate_active_interfaces_atomic(mphy->hw, + IEEE80211_IFACE_ITER_RESUME_ALL, + mt7915_mcu_cca_finish, mphy->hw); +} + +static void mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) { struct mt7915_mcu_rxd *rxd = (struct mt7915_mcu_rxd *)skb->data; @@ -538,9 +450,7 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) mt7915_mcu_rx_log_message(dev, skb); break; case MCU_EXT_EVENT_BCC_NOTIFY: - ieee80211_iterate_active_interfaces_atomic(dev->mt76.hw, - IEEE80211_IFACE_ITER_RESUME_ALL, - mt7915_mcu_cca_finish, dev); + mt7915_mcu_rx_bcc_notify(dev, skb); break; default: break; @@ -577,88 +487,6 @@ void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb) mt76_mcu_rx_event(&dev->mt76, skb); } -static struct sk_buff * -mt7915_mcu_alloc_sta_req(struct mt7915_dev *dev, struct mt7915_vif *mvif, - struct mt7915_sta *msta, int len) -{ - struct sta_req_hdr hdr = { - .bss_idx = mvif->mt76.idx, - .wlan_idx_lo = msta ? to_wcid_lo(msta->wcid.idx) : 0, - .wlan_idx_hi = msta ? to_wcid_hi(msta->wcid.idx) : 0, - .muar_idx = msta && msta->wcid.sta ? mvif->mt76.omac_idx : 0xe, - .is_tlv_append = 1, - }; - struct sk_buff *skb; - - skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, len); - if (!skb) - return ERR_PTR(-ENOMEM); - - skb_put_data(skb, &hdr, sizeof(hdr)); - - return skb; -} - -static struct wtbl_req_hdr * -mt7915_mcu_alloc_wtbl_req(struct mt7915_dev *dev, struct mt7915_sta *msta, - int cmd, void *sta_wtbl, struct sk_buff **skb) -{ - struct tlv *sta_hdr = sta_wtbl; - struct wtbl_req_hdr hdr = { - .wlan_idx_lo = to_wcid_lo(msta->wcid.idx), - .wlan_idx_hi = to_wcid_hi(msta->wcid.idx), - .operation = cmd, - }; - struct sk_buff *nskb = *skb; - - if (!nskb) { - nskb = mt76_mcu_msg_alloc(&dev->mt76, NULL, - MT76_CONNAC_WTBL_UPDATE_MAX_SIZE); - if (!nskb) - return ERR_PTR(-ENOMEM); - - *skb = nskb; - } - - if (sta_hdr) - le16_add_cpu(&sta_hdr->len, sizeof(hdr)); - - return skb_put_data(nskb, &hdr, sizeof(hdr)); -} - -static struct tlv * -mt7915_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len, - void *sta_ntlv, void *sta_wtbl) -{ - struct sta_ntlv_hdr *ntlv_hdr = sta_ntlv; - struct tlv *sta_hdr = sta_wtbl; - struct tlv *ptlv, tlv = { - .tag = cpu_to_le16(tag), - .len = cpu_to_le16(len), - }; - u16 ntlv; - - ptlv = skb_put(skb, len); - memcpy(ptlv, &tlv, sizeof(tlv)); - - ntlv = le16_to_cpu(ntlv_hdr->tlv_num); - ntlv_hdr->tlv_num = cpu_to_le16(ntlv + 1); - - if (sta_hdr) { - u16 size = le16_to_cpu(sta_hdr->len); - - sta_hdr->len = cpu_to_le16(size + len); - } - - return ptlv; -} - -static struct tlv * -mt7915_mcu_add_tlv(struct sk_buff *skb, int tag, int len) -{ - return mt7915_mcu_add_nested_tlv(skb, tag, len, skb->data, NULL); -} - static struct tlv * mt7915_mcu_add_nested_subtlv(struct sk_buff *skb, int sub_tag, int sub_len, __le16 *sub_ntlv, __le16 *len) @@ -678,105 +506,6 @@ mt7915_mcu_add_nested_subtlv(struct sk_buff *skb, int sub_tag, int sub_len, } /** bss info **/ -static int -mt7915_mcu_bss_basic_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, - struct mt7915_phy *phy, bool enable) -{ - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct bss_info_basic *bss; - u16 wlan_idx = mvif->sta.wcid.idx; - u32 type = NETWORK_INFRA; - struct tlv *tlv; - - tlv = mt7915_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss)); - - switch (vif->type) { - case NL80211_IFTYPE_MESH_POINT: - case NL80211_IFTYPE_AP: - case NL80211_IFTYPE_MONITOR: - break; - case NL80211_IFTYPE_STATION: - /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ - if (enable) { - struct ieee80211_sta *sta; - struct mt7915_sta *msta; - - rcu_read_lock(); - sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); - if (!sta) { - rcu_read_unlock(); - return -EINVAL; - } - - msta = (struct mt7915_sta *)sta->drv_priv; - wlan_idx = msta->wcid.idx; - rcu_read_unlock(); - } - break; - case NL80211_IFTYPE_ADHOC: - type = NETWORK_IBSS; - break; - default: - WARN_ON(1); - break; - } - - bss = (struct bss_info_basic *)tlv; - bss->network_type = cpu_to_le32(type); - bss->bmc_wcid_lo = to_wcid_lo(wlan_idx); - bss->bmc_wcid_hi = to_wcid_hi(wlan_idx); - bss->wmm_idx = mvif->mt76.wmm_idx; - bss->active = enable; - - if (vif->type != NL80211_IFTYPE_MONITOR) { - memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); - bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); - bss->dtim_period = vif->bss_conf.dtim_period; - bss->phy_mode = mt7915_get_phy_mode(vif, NULL); - } else { - memcpy(bss->bssid, phy->mt76->macaddr, ETH_ALEN); - } - - return 0; -} - -static void -mt7915_mcu_bss_omac_tlv(struct sk_buff *skb, struct ieee80211_vif *vif) -{ - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct bss_info_omac *omac; - struct tlv *tlv; - u32 type = 0; - u8 idx; - - tlv = mt7915_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac)); - - switch (vif->type) { - case NL80211_IFTYPE_MONITOR: - case NL80211_IFTYPE_MESH_POINT: - case NL80211_IFTYPE_AP: - type = CONNECTION_INFRA_AP; - break; - case NL80211_IFTYPE_STATION: - type = CONNECTION_INFRA_STA; - break; - case NL80211_IFTYPE_ADHOC: - type = CONNECTION_IBSS_ADHOC; - break; - default: - WARN_ON(1); - break; - } - - omac = (struct bss_info_omac *)tlv; - idx = mvif->mt76.omac_idx > EXT_BSSID_START ? HW_BSSID_0 - : mvif->mt76.omac_idx; - omac->conn_type = cpu_to_le32(type); - omac->omac_idx = mvif->mt76.omac_idx; - omac->band_idx = mvif->mt76.band_idx; - omac->hw_bss_idx = idx; -} - struct mt7915_he_obss_narrow_bw_ru_data { bool tolerated; }; @@ -829,12 +558,12 @@ mt7915_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, struct tlv *tlv; int freq1 = chandef->center_freq1; - tlv = mt7915_mcu_add_tlv(skb, BSS_INFO_RF_CH, sizeof(*ch)); + tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RF_CH, sizeof(*ch)); ch = (struct bss_info_rf_ch *)tlv; ch->pri_ch = chandef->chan->hw_value; ch->center_ch0 = ieee80211_frequency_to_channel(freq1); - ch->bw = mt7915_mcu_chan_bw(chandef); + ch->bw = mt76_connac_chan_bw(chandef); if (chandef->width == NL80211_CHAN_WIDTH_80P80) { int freq2 = chandef->center_freq2; @@ -843,12 +572,7 @@ mt7915_mcu_bss_rfch_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, } if (vif->bss_conf.he_support && vif->type == NL80211_IFTYPE_STATION) { - struct mt7915_dev *dev = phy->dev; - struct mt76_phy *mphy = &dev->mt76.phy; - bool ext_phy = phy != &dev->phy; - - if (ext_phy && dev->mt76.phy2) - mphy = dev->mt76.phy2; + struct mt76_phy *mphy = phy->mt76; ch->he_ru26_block = mt7915_check_he_obss_narrow_bw_ru(mphy->hw, vif); @@ -866,7 +590,7 @@ mt7915_mcu_bss_ra_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, struct bss_info_ra *ra; struct tlv *tlv; - tlv = mt7915_mcu_add_tlv(skb, BSS_INFO_RA, sizeof(*ra)); + tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_RA, sizeof(*ra)); ra = (struct bss_info_ra *)tlv; ra->op_mode = vif->type == NL80211_IFTYPE_AP; @@ -894,9 +618,9 @@ mt7915_mcu_bss_he_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, struct bss_info_he *he; struct tlv *tlv; - cap = mt7915_get_he_phy_cap(phy, vif); + cap = mt76_connac_get_he_phy_cap(phy->mt76, vif); - tlv = mt7915_mcu_add_tlv(skb, BSS_INFO_HE_BASIC, sizeof(*he)); + tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HE_BASIC, sizeof(*he)); he = (struct bss_info_he *)tlv; he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; @@ -920,7 +644,7 @@ mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff *skb) struct bss_info_hw_amsdu *amsdu; struct tlv *tlv; - tlv = mt7915_mcu_add_tlv(skb, BSS_INFO_HW_AMSDU, sizeof(*amsdu)); + tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_HW_AMSDU, sizeof(*amsdu)); amsdu = (struct bss_info_hw_amsdu *)tlv; amsdu->cmp_bitmap_0 = cpu_to_le32(TXD_CMP_MAP1); @@ -930,26 +654,6 @@ mt7915_mcu_bss_hw_amsdu_tlv(struct sk_buff *skb) } static void -mt7915_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt7915_vif *mvif) -{ -/* SIFS 20us + 512 byte beacon tranmitted by 1Mbps (3906us) */ -#define BCN_TX_ESTIMATE_TIME (4096 + 20) - struct bss_info_ext_bss *ext; - int ext_bss_idx, tsf_offset; - struct tlv *tlv; - - ext_bss_idx = mvif->mt76.omac_idx - EXT_BSSID_START; - if (ext_bss_idx < 0) - return; - - tlv = mt7915_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext)); - - ext = (struct bss_info_ext_bss *)tlv; - tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; - ext->mbss_tsf_offset = cpu_to_le32(tsf_offset); -} - -static void mt7915_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt7915_phy *phy) { struct bss_info_bmc_rate *bmc; @@ -957,7 +661,7 @@ mt7915_mcu_bss_bmc_tlv(struct sk_buff *skb, struct mt7915_phy *phy) enum nl80211_band band = chandef->chan->band; struct tlv *tlv; - tlv = mt7915_mcu_add_tlv(skb, BSS_INFO_BMC_RATE, sizeof(*bmc)); + tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BMC_RATE, sizeof(*bmc)); bmc = (struct bss_info_bmc_rate *)tlv; if (band == NL80211_BAND_2GHZ) { @@ -1010,6 +714,7 @@ int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, struct ieee80211_vif *vif, int enable) { struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; + struct mt7915_dev *dev = phy->dev; struct sk_buff *skb; if (mvif->mt76.omac_idx >= REPEATER_BSSID_START) { @@ -1017,16 +722,17 @@ int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, mt7915_mcu_muar_config(phy, vif, true, enable); } - skb = mt7915_mcu_alloc_sta_req(phy->dev, mvif, NULL, - MT7915_BSS_UPDATE_MAX_SIZE); + skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, NULL, + MT7915_BSS_UPDATE_MAX_SIZE); if (IS_ERR(skb)) return PTR_ERR(skb); /* bss_omac must be first */ if (enable) - mt7915_mcu_bss_omac_tlv(skb, vif); + mt76_connac_mcu_bss_omac_tlv(skb, vif); - mt7915_mcu_bss_basic_tlv(skb, vif, phy, enable); + mt76_connac_mcu_bss_basic_tlv(skb, vif, NULL, phy->mt76, + mvif->sta.wcid.idx, enable); if (vif->type == NL80211_IFTYPE_MONITOR) goto out; @@ -1042,309 +748,48 @@ int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, if (mvif->mt76.omac_idx >= EXT_BSSID_START && mvif->mt76.omac_idx < REPEATER_BSSID_START) - mt7915_mcu_bss_ext_tlv(skb, mvif); + mt76_connac_mcu_bss_ext_tlv(skb, &mvif->mt76); } out: - return mt76_mcu_skb_send_msg(&phy->dev->mt76, skb, + return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_EXT_CMD(BSS_INFO_UPDATE), true); } /** starec & wtbl **/ -static int -mt7915_mcu_sta_key_tlv(struct mt7915_sta *msta, struct sk_buff *skb, - struct ieee80211_key_conf *key, enum set_key_cmd cmd) -{ - struct mt7915_sta_key_conf *bip = &msta->bip; - struct sta_rec_sec *sec; - struct tlv *tlv; - u32 len = sizeof(*sec); - - tlv = mt7915_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); - - sec = (struct sta_rec_sec *)tlv; - sec->add = cmd; - - if (cmd == SET_KEY) { - struct sec_key *sec_key; - u8 cipher; - - cipher = mt7915_mcu_get_cipher(key->cipher); - if (cipher == MCU_CIPHER_NONE) - return -EOPNOTSUPP; - - sec_key = &sec->key[0]; - sec_key->cipher_len = sizeof(*sec_key); - - if (cipher == MCU_CIPHER_BIP_CMAC_128) { - sec_key->cipher_id = MCU_CIPHER_AES_CCMP; - sec_key->key_id = bip->keyidx; - sec_key->key_len = 16; - memcpy(sec_key->key, bip->key, 16); - - sec_key = &sec->key[1]; - sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; - sec_key->cipher_len = sizeof(*sec_key); - sec_key->key_len = 16; - memcpy(sec_key->key, key->key, 16); - - sec->n_cipher = 2; - } else { - sec_key->cipher_id = cipher; - sec_key->key_id = key->keyidx; - sec_key->key_len = key->keylen; - memcpy(sec_key->key, key->key, key->keylen); - - if (cipher == MCU_CIPHER_TKIP) { - /* Rx/Tx MIC keys are swapped */ - memcpy(sec_key->key + 16, key->key + 24, 8); - memcpy(sec_key->key + 24, key->key + 16, 8); - } - - /* store key_conf for BIP batch update */ - if (cipher == MCU_CIPHER_AES_CCMP) { - memcpy(bip->key, key->key, key->keylen); - bip->keyidx = key->keyidx; - } - - len -= sizeof(*sec_key); - sec->n_cipher = 1; - } - } else { - len -= sizeof(sec->key); - sec->n_cipher = 0; - } - sec->len = cpu_to_le16(len); - - return 0; -} - -int mt7915_mcu_add_key(struct mt7915_dev *dev, struct ieee80211_vif *vif, - struct mt7915_sta *msta, struct ieee80211_key_conf *key, - enum set_key_cmd cmd) -{ - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct sk_buff *skb; - int len = sizeof(struct sta_req_hdr) + sizeof(struct sta_rec_sec); - int ret; - - skb = mt7915_mcu_alloc_sta_req(dev, mvif, msta, len); - if (IS_ERR(skb)) - return PTR_ERR(skb); - - ret = mt7915_mcu_sta_key_tlv(msta, skb, key, cmd); - if (ret) - return ret; - - return mt76_mcu_skb_send_msg(&dev->mt76, skb, - MCU_EXT_CMD(STA_REC_UPDATE), true); -} - -static void -mt7915_mcu_sta_ba_tlv(struct sk_buff *skb, - struct ieee80211_ampdu_params *params, - bool enable, bool tx) -{ - struct sta_rec_ba *ba; - struct tlv *tlv; - - tlv = mt7915_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); - - ba = (struct sta_rec_ba *)tlv; - ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; - ba->winsize = cpu_to_le16(params->buf_size); - ba->ssn = cpu_to_le16(params->ssn); - ba->ba_en = enable << params->tid; - ba->amsdu = params->amsdu; - ba->tid = params->tid; -} - -static void -mt7915_mcu_wtbl_ba_tlv(struct sk_buff *skb, - struct ieee80211_ampdu_params *params, - bool enable, bool tx, void *sta_wtbl, - void *wtbl_tlv) -{ - struct wtbl_ba *ba; - struct tlv *tlv; - - tlv = mt7915_mcu_add_nested_tlv(skb, WTBL_BA, sizeof(*ba), - wtbl_tlv, sta_wtbl); - - ba = (struct wtbl_ba *)tlv; - ba->tid = params->tid; - - if (tx) { - ba->ba_type = MT_BA_TYPE_ORIGINATOR; - ba->sn = enable ? cpu_to_le16(params->ssn) : 0; - ba->ba_en = enable; - } else { - memcpy(ba->peer_addr, params->sta->addr, ETH_ALEN); - ba->ba_type = MT_BA_TYPE_RECIPIENT; - ba->rst_ba_tid = params->tid; - ba->rst_ba_sel = RST_BA_MAC_TID_MATCH; - ba->rst_ba_sb = 1; - } - - if (enable) - ba->ba_winsize = cpu_to_le16(params->buf_size); -} - -static int -mt7915_mcu_sta_ba(struct mt7915_dev *dev, - struct ieee80211_ampdu_params *params, - bool enable, bool tx) +int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, + struct ieee80211_ampdu_params *params, + bool enable) { struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv; struct mt7915_vif *mvif = msta->vif; - struct wtbl_req_hdr *wtbl_hdr; - struct tlv *sta_wtbl; - struct sk_buff *skb; - int ret; - if (enable && tx && !params->amsdu) + if (enable && !params->amsdu) msta->wcid.amsdu = false; - skb = mt7915_mcu_alloc_sta_req(dev, mvif, msta, - MT76_CONNAC_STA_UPDATE_MAX_SIZE); - if (IS_ERR(skb)) - return PTR_ERR(skb); - - sta_wtbl = mt7915_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); - - wtbl_hdr = mt7915_mcu_alloc_wtbl_req(dev, msta, WTBL_SET, sta_wtbl, - &skb); - if (IS_ERR(wtbl_hdr)) - return PTR_ERR(wtbl_hdr); - - mt7915_mcu_wtbl_ba_tlv(skb, params, enable, tx, sta_wtbl, wtbl_hdr); - - ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, - MCU_EXT_CMD(STA_REC_UPDATE), true); - if (ret) - return ret; - - skb = mt7915_mcu_alloc_sta_req(dev, mvif, msta, - MT76_CONNAC_STA_UPDATE_MAX_SIZE); - if (IS_ERR(skb)) - return PTR_ERR(skb); - - mt7915_mcu_sta_ba_tlv(skb, params, enable, tx); - - return mt76_mcu_skb_send_msg(&dev->mt76, skb, - MCU_EXT_CMD(STA_REC_UPDATE), true); -} - -int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, - struct ieee80211_ampdu_params *params, - bool enable) -{ - return mt7915_mcu_sta_ba(dev, params, enable, true); + return mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, + MCU_EXT_CMD(STA_REC_UPDATE), + enable, true); } int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev, struct ieee80211_ampdu_params *params, bool enable) { - return mt7915_mcu_sta_ba(dev, params, enable, false); -} - -static void -mt7915_mcu_wtbl_generic_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, - struct ieee80211_sta *sta, void *sta_wtbl, - void *wtbl_tlv) -{ - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct wtbl_generic *generic; - struct wtbl_rx *rx; - struct tlv *tlv; - - tlv = mt7915_mcu_add_nested_tlv(skb, WTBL_GENERIC, sizeof(*generic), - wtbl_tlv, sta_wtbl); - - generic = (struct wtbl_generic *)tlv; - - if (sta) { - memcpy(generic->peer_addr, sta->addr, ETH_ALEN); - generic->partial_aid = cpu_to_le16(sta->aid); - generic->muar_idx = mvif->mt76.omac_idx; - generic->qos = sta->wme; - } else { - /* use BSSID in station mode */ - if (vif->type == NL80211_IFTYPE_STATION) - memcpy(generic->peer_addr, vif->bss_conf.bssid, - ETH_ALEN); - else - eth_broadcast_addr(generic->peer_addr); - - generic->muar_idx = 0xe; - } - - tlv = mt7915_mcu_add_nested_tlv(skb, WTBL_RX, sizeof(*rx), - wtbl_tlv, sta_wtbl); - - rx = (struct wtbl_rx *)tlv; - rx->rca1 = sta ? vif->type != NL80211_IFTYPE_AP : 1; - rx->rca2 = 1; - rx->rv = 1; -} - -static void -mt7915_mcu_sta_basic_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, - struct ieee80211_sta *sta, bool enable) -{ -#define EXTRA_INFO_VER BIT(0) -#define EXTRA_INFO_NEW BIT(1) - struct sta_rec_basic *basic; - struct tlv *tlv; - - tlv = mt7915_mcu_add_tlv(skb, STA_REC_BASIC, sizeof(*basic)); - - basic = (struct sta_rec_basic *)tlv; - basic->extra_info = cpu_to_le16(EXTRA_INFO_VER); - - if (enable) { - basic->extra_info |= cpu_to_le16(EXTRA_INFO_NEW); - basic->conn_state = CONN_STATE_PORT_SECURE; - } else { - basic->conn_state = CONN_STATE_DISCONNECT; - } - - if (!sta) { - basic->conn_type = cpu_to_le32(CONNECTION_INFRA_BC); - eth_broadcast_addr(basic->peer_addr); - return; - } - - switch (vif->type) { - case NL80211_IFTYPE_MESH_POINT: - case NL80211_IFTYPE_AP: - basic->conn_type = cpu_to_le32(CONNECTION_INFRA_STA); - break; - case NL80211_IFTYPE_STATION: - basic->conn_type = cpu_to_le32(CONNECTION_INFRA_AP); - break; - case NL80211_IFTYPE_ADHOC: - basic->conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); - break; - default: - WARN_ON(1); - break; - } + struct mt7915_sta *msta = (struct mt7915_sta *)params->sta->drv_priv; + struct mt7915_vif *mvif = msta->vif; - memcpy(basic->peer_addr, sta->addr, ETH_ALEN); - basic->aid = cpu_to_le16(sta->aid); - basic->qos = sta->wme; + return mt76_connac_mcu_sta_ba(&dev->mt76, &mvif->mt76, params, + MCU_EXT_CMD(STA_REC_UPDATE), + enable, false); } static void mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, struct ieee80211_vif *vif) { - struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; struct ieee80211_he_cap_elem *elem = &sta->he_cap.he_cap_elem; - enum nl80211_band band = msta->vif->phy->mt76->chandef.chan->band; - const u16 *mcs_mask = msta->vif->bitrate_mask.control[band].he_mcs; + struct ieee80211_he_mcs_nss_supp mcs_map; struct sta_rec_he *he; struct tlv *tlv; u32 cap = 0; @@ -1352,7 +797,7 @@ mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, if (!sta->he_cap.has_he) return; - tlv = mt7915_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he)); + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he)); he = (struct sta_rec_he *)tlv; @@ -1376,8 +821,9 @@ mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G)) cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT; - if (mvif->cap.ldpc && (elem->phy_cap_info[1] & - IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)) + if (mvif->cap.he_ldpc && + (elem->phy_cap_info[1] & + IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD)) cap |= STA_REC_HE_CAP_LDPC; if (elem->phy_cap_info[1] & @@ -1434,22 +880,23 @@ mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, he->he_cap = cpu_to_le32(cap); + mcs_map = sta->he_cap.he_mcs_nss_supp; switch (sta->bandwidth) { case IEEE80211_STA_RX_BW_160: if (elem->phy_cap_info[0] & IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) mt7915_mcu_set_sta_he_mcs(sta, &he->max_nss_mcs[CMD_HE_MCS_BW8080], - mcs_mask); + le16_to_cpu(mcs_map.rx_mcs_80p80)); mt7915_mcu_set_sta_he_mcs(sta, &he->max_nss_mcs[CMD_HE_MCS_BW160], - mcs_mask); + le16_to_cpu(mcs_map.rx_mcs_160)); fallthrough; default: mt7915_mcu_set_sta_he_mcs(sta, &he->max_nss_mcs[CMD_HE_MCS_BW80], - mcs_mask); + le16_to_cpu(mcs_map.rx_mcs_80)); break; } @@ -1480,38 +927,6 @@ mt7915_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, } static void -mt7915_mcu_sta_uapsd_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, - struct ieee80211_vif *vif) -{ - struct sta_rec_uapsd *uapsd; - struct tlv *tlv; - - if (vif->type != NL80211_IFTYPE_AP || !sta->wme) - return; - - tlv = mt7915_mcu_add_tlv(skb, STA_REC_APPS, sizeof(*uapsd)); - uapsd = (struct sta_rec_uapsd *)tlv; - - if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO) { - uapsd->dac_map |= BIT(3); - uapsd->tac_map |= BIT(3); - } - if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI) { - uapsd->dac_map |= BIT(2); - uapsd->tac_map |= BIT(2); - } - if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE) { - uapsd->dac_map |= BIT(1); - uapsd->tac_map |= BIT(1); - } - if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) { - uapsd->dac_map |= BIT(0); - uapsd->tac_map |= BIT(0); - } - uapsd->max_sp = sta->max_sp; -} - -static void mt7915_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, struct ieee80211_vif *vif) { @@ -1524,19 +939,19 @@ mt7915_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, vif->type != NL80211_IFTYPE_AP) return; - if (!sta->vht_cap.vht_supported) - return; - - tlv = mt7915_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_MURU, sizeof(*muru)); muru = (struct sta_rec_muru *)tlv; muru->cfg.mimo_dl_en = mvif->cap.he_mu_ebfer || mvif->cap.vht_mu_ebfer || mvif->cap.vht_mu_ebfee; + muru->cfg.mimo_ul_en = true; + muru->cfg.ofdma_dl_en = true; - muru->mimo_dl.vht_mu_bfee = - !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); + if (sta->vht_cap.vht_supported) + muru->mimo_dl.vht_mu_bfee = + !!(sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE); if (!sta->he_cap.has_he) return; @@ -1544,13 +959,11 @@ mt7915_mcu_sta_muru_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, muru->mimo_dl.partial_bw_dl_mimo = HE_PHY(CAP6_PARTIAL_BANDWIDTH_DL_MUMIMO, elem->phy_cap_info[6]); - muru->cfg.mimo_ul_en = true; muru->mimo_ul.full_ul_mimo = HE_PHY(CAP2_UL_MU_FULL_MU_MIMO, elem->phy_cap_info[2]); muru->mimo_ul.partial_ul_mimo = HE_PHY(CAP2_UL_MU_PARTIAL_MU_MIMO, elem->phy_cap_info[2]); - muru->cfg.ofdma_dl_en = true; muru->ofdma_dl.punc_pream_rx = HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); muru->ofdma_dl.he_20m_in_40m_2g = @@ -1574,7 +987,10 @@ mt7915_mcu_sta_ht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) struct sta_rec_ht *ht; struct tlv *tlv; - tlv = mt7915_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); + if (!sta->ht_cap.ht_supported) + return; + + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); ht = (struct sta_rec_ht *)tlv; ht->ht_cap = cpu_to_le16(sta->ht_cap.cap); @@ -1589,7 +1005,7 @@ mt7915_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) if (!sta->vht_cap.vht_supported) return; - tlv = mt7915_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, sizeof(*vht)); vht = (struct sta_rec_vht *)tlv; vht->vht_cap = cpu_to_le32(sta->vht_cap.cap); @@ -1598,8 +1014,8 @@ mt7915_mcu_sta_vht_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) } static void -mt7915_mcu_sta_amsdu_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, - struct ieee80211_sta *sta) +mt7915_mcu_sta_amsdu_tlv(struct mt7915_dev *dev, struct sk_buff *skb, + struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; struct sta_rec_amsdu *amsdu; @@ -1612,96 +1028,27 @@ mt7915_mcu_sta_amsdu_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, if (!sta->max_amsdu_len) return; - tlv = mt7915_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); amsdu = (struct sta_rec_amsdu *)tlv; amsdu->max_amsdu_num = 8; amsdu->amsdu_en = true; - amsdu->max_mpdu_size = sta->max_amsdu_len >= - IEEE80211_MAX_MPDU_LEN_VHT_7991; msta->wcid.amsdu = true; -} - -static void -mt7915_mcu_wtbl_smps_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, - void *sta_wtbl, void *wtbl_tlv) -{ - struct wtbl_smps *smps; - struct tlv *tlv; - tlv = mt7915_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps), - wtbl_tlv, sta_wtbl); - smps = (struct wtbl_smps *)tlv; - smps->smps = (sta->smps_mode == IEEE80211_SMPS_DYNAMIC); -} - -static void -mt7915_mcu_wtbl_ht_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, - struct ieee80211_sta *sta, void *sta_wtbl, - void *wtbl_tlv) -{ - struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct wtbl_ht *ht = NULL; - struct tlv *tlv; - - /* wtbl ht */ - if (sta->ht_cap.ht_supported) { - tlv = mt7915_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht), - wtbl_tlv, sta_wtbl); - ht = (struct wtbl_ht *)tlv; - ht->ldpc = mvif->cap.ldpc && - (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING); - ht->af = sta->ht_cap.ampdu_factor; - ht->mm = sta->ht_cap.ampdu_density; - ht->ht = true; - } - - /* wtbl vht */ - if (sta->vht_cap.vht_supported) { - struct wtbl_vht *vht; - u8 af; - - tlv = mt7915_mcu_add_nested_tlv(skb, WTBL_VHT, sizeof(*vht), - wtbl_tlv, sta_wtbl); - vht = (struct wtbl_vht *)tlv; - vht->ldpc = mvif->cap.ldpc && - (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC); - vht->vht = true; - - af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, - sta->vht_cap.cap); - if (ht) - ht->af = max_t(u8, ht->af, af); - } - - mt7915_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_tlv); -} - -static void -mt7915_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, struct ieee80211_vif *vif, - struct ieee80211_sta *sta, - void *sta_wtbl, void *wtbl_tlv) -{ - struct mt7915_sta *msta; - struct wtbl_hdr_trans *htr = NULL; - struct tlv *tlv; - - tlv = mt7915_mcu_add_nested_tlv(skb, WTBL_HDR_TRANS, sizeof(*htr), - wtbl_tlv, sta_wtbl); - htr = (struct wtbl_hdr_trans *)tlv; - htr->no_rx_trans = true; - if (vif->type == NL80211_IFTYPE_STATION) - htr->to_ds = true; - else - htr->from_ds = true; - - if (!sta) + switch (sta->max_amsdu_len) { + case IEEE80211_MAX_MPDU_LEN_VHT_11454: + if (!is_mt7915(&dev->mt76)) { + amsdu->max_mpdu_size = + IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454; + return; + } + fallthrough; + case IEEE80211_MAX_MPDU_LEN_HT_7935: + case IEEE80211_MAX_MPDU_LEN_VHT_7991: + amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_7991; + return; + default: + amsdu->max_mpdu_size = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_3895; return; - - msta = (struct mt7915_sta *)sta->drv_priv; - htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &msta->wcid.flags); - if (test_bit(MT_WCID_FLAG_4ADDR, &msta->wcid.flags)) { - htr->to_ds = true; - htr->from_ds = true; } } @@ -1712,48 +1059,30 @@ mt7915_mcu_sta_wtbl_tlv(struct mt7915_dev *dev, struct sk_buff *skb, struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; struct mt7915_sta *msta; struct wtbl_req_hdr *wtbl_hdr; + struct mt76_wcid *wcid; struct tlv *tlv; msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta; + wcid = sta ? &msta->wcid : NULL; - tlv = mt7915_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); - wtbl_hdr = mt7915_mcu_alloc_wtbl_req(dev, msta, WTBL_RESET_AND_SET, - tlv, &skb); + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); + wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid, + WTBL_RESET_AND_SET, tlv, + &skb); if (IS_ERR(wtbl_hdr)) return PTR_ERR(wtbl_hdr); - mt7915_mcu_wtbl_generic_tlv(skb, vif, sta, tlv, wtbl_hdr); - mt7915_mcu_wtbl_hdr_trans_tlv(skb, vif, sta, tlv, wtbl_hdr); - + mt76_connac_mcu_wtbl_generic_tlv(&dev->mt76, skb, vif, sta, tlv, + wtbl_hdr); + mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, tlv, wtbl_hdr); if (sta) - mt7915_mcu_wtbl_ht_tlv(skb, vif, sta, tlv, wtbl_hdr); + mt76_connac_mcu_wtbl_ht_tlv(&dev->mt76, skb, sta, tlv, + wtbl_hdr, mvif->cap.ht_ldpc, + mvif->cap.vht_ldpc); return 0; } -int mt7915_mcu_sta_update_hdr_trans(struct mt7915_dev *dev, - struct ieee80211_vif *vif, - struct ieee80211_sta *sta) -{ - struct mt7915_sta *msta = (struct mt7915_sta *)sta->drv_priv; - struct wtbl_req_hdr *wtbl_hdr; - struct sk_buff *skb; - - skb = mt76_mcu_msg_alloc(&dev->mt76, NULL, - MT76_CONNAC_WTBL_UPDATE_MAX_SIZE); - if (!skb) - return -ENOMEM; - - wtbl_hdr = mt7915_mcu_alloc_wtbl_req(dev, msta, WTBL_SET, NULL, &skb); - if (IS_ERR(wtbl_hdr)) - return PTR_ERR(wtbl_hdr); - - mt7915_mcu_wtbl_hdr_trans_tlv(skb, vif, sta, NULL, wtbl_hdr); - - return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_EXT_CMD(WTBL_UPDATE), - true); -} - static inline bool mt7915_is_ebf_supported(struct mt7915_phy *phy, struct ieee80211_vif *vif, struct ieee80211_sta *sta, bool bfee) @@ -1870,7 +1199,8 @@ mt7915_mcu_sta_bfer_he(struct ieee80211_sta *sta, struct ieee80211_vif *vif, { struct ieee80211_sta_he_cap *pc = &sta->he_cap; struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; - const struct ieee80211_sta_he_cap *vc = mt7915_get_he_phy_cap(phy, vif); + const struct ieee80211_sta_he_cap *vc = + mt76_connac_get_he_phy_cap(phy->mt76, vif); const struct ieee80211_he_cap_elem *ve = &vc->he_cap_elem; u16 mcs_map = le16_to_cpu(pc->he_mcs_nss_supp.rx_mcs_80); u8 nss_mcs = mt7915_mcu_get_sta_nss(mcs_map); @@ -1928,8 +1258,7 @@ mt7915_mcu_sta_bfer_tlv(struct mt7915_dev *dev, struct sk_buff *skb, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct mt7915_phy *phy = - mvif->mt76.band_idx ? mt7915_ext_phy(dev) : &dev->phy; + struct mt7915_phy *phy = mvif->phy; int tx_ant = hweight8(phy->mt76->chainmask) - 1; struct sta_rec_bf *bf; struct tlv *tlv; @@ -1941,11 +1270,14 @@ mt7915_mcu_sta_bfer_tlv(struct mt7915_dev *dev, struct sk_buff *skb, }; bool ebf; + if (!(sta->ht_cap.ht_supported || sta->he_cap.has_he)) + return; + ebf = mt7915_is_ebf_supported(phy, vif, sta, false); if (!ebf && !dev->ibf) return; - tlv = mt7915_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BF, sizeof(*bf)); bf = (struct sta_rec_bf *)tlv; /* he: eBF only, in accordance with spec @@ -1995,17 +1327,19 @@ mt7915_mcu_sta_bfee_tlv(struct mt7915_dev *dev, struct sk_buff *skb, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct mt7915_phy *phy = - mvif->mt76.band_idx ? mt7915_ext_phy(dev) : &dev->phy; + struct mt7915_phy *phy = mvif->phy; int tx_ant = hweight8(phy->mt76->chainmask) - 1; struct sta_rec_bfee *bfee; struct tlv *tlv; u8 nrow = 0; + if (!(sta->vht_cap.vht_supported || sta->he_cap.has_he)) + return; + if (!mt7915_is_ebf_supported(phy, vif, sta, true)) return; - tlv = mt7915_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BFEE, sizeof(*bfee)); bfee = (struct sta_rec_bfee *)tlv; if (sta->he_cap.has_he) { @@ -2050,13 +1384,13 @@ int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev, struct sta_rec_ra_fixed *ra; struct sk_buff *skb; struct tlv *tlv; - int len = sizeof(struct sta_req_hdr) + sizeof(*ra); - skb = mt7915_mcu_alloc_sta_req(dev, mvif, msta, len); + skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, + &msta->wcid); if (IS_ERR(skb)) return PTR_ERR(skb); - tlv = mt7915_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA_UPDATE, sizeof(*ra)); ra = (struct sta_rec_ra_fixed *)tlv; switch (field) { @@ -2091,19 +1425,19 @@ int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif, struct sk_buff *skb; int ret; - skb = mt7915_mcu_alloc_sta_req(dev, mvif, msta, - MT76_CONNAC_STA_UPDATE_MAX_SIZE); + skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, + &msta->wcid); if (IS_ERR(skb)) return PTR_ERR(skb); - sta_wtbl = mt7915_mcu_add_tlv(skb, STA_REC_WTBL, sizeof(struct tlv)); - - wtbl_hdr = mt7915_mcu_alloc_wtbl_req(dev, msta, WTBL_SET, sta_wtbl, - &skb); + sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, + sizeof(struct tlv)); + wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(&dev->mt76, &msta->wcid, + WTBL_SET, sta_wtbl, &skb); if (IS_ERR(wtbl_hdr)) return PTR_ERR(wtbl_hdr); - mt7915_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr); + mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_hdr); ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_EXT_CMD(STA_REC_UPDATE), true); @@ -2134,9 +1468,12 @@ mt7915_mcu_add_rate_ctrl_fixed(struct mt7915_dev *dev, phy.sgi |= gi << (i << (_he)); \ phy.he_ltf |= mask->control[band].he_ltf << (i << (_he));\ } \ - for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) \ - nrates += hweight16(mask->control[band]._mcs[i]); \ - phy.mcs = ffs(mask->control[band]._mcs[0]) - 1; \ + for (i = 0; i < ARRAY_SIZE(mask->control[band]._mcs); i++) { \ + if (!mask->control[band]._mcs[i]) \ + continue; \ + nrates += hweight16(mask->control[band]._mcs[i]); \ + phy.mcs = ffs(mask->control[band]._mcs[i]) - 1; \ + } \ } while (0) if (sta->he_cap.has_he) { @@ -2204,7 +1541,8 @@ mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev, struct ieee80211_vif *vif, struct ieee80211_sta *sta) { struct mt7915_vif *mvif = (struct mt7915_vif *)vif->drv_priv; - struct cfg80211_chan_def *chandef = &mvif->phy->mt76->chandef; + struct mt76_phy *mphy = mvif->phy->mt76; + struct cfg80211_chan_def *chandef = &mphy->chandef; struct cfg80211_bitrate_mask *mask = &mvif->bitrate_mask; enum nl80211_band band = chandef->chan->band; struct sta_rec_ra *ra; @@ -2212,15 +1550,16 @@ mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev, u32 supp_rate = sta->supp_rates[band]; u32 cap = sta->wme ? STA_CAP_WMM : 0; - tlv = mt7915_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); + tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra)); ra = (struct sta_rec_ra *)tlv; ra->valid = true; ra->auto_rate = true; - ra->phy_mode = mt7915_get_phy_mode(vif, sta); + ra->phy_mode = mt76_connac_get_phy_mode(mphy, vif, band, sta); ra->channel = chandef->chan->hw_value; ra->bw = sta->bandwidth; ra->phy.bw = sta->bandwidth; + ra->mmps_mode = mt7915_mcu_get_mmps_mode(sta->smps_mode); if (supp_rate) { supp_rate &= mask->control[band].legacy; @@ -2254,7 +1593,7 @@ mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev, cap |= STA_CAP_TX_STBC; if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) cap |= STA_CAP_RX_STBC; - if (mvif->cap.ldpc && + if (mvif->cap.ht_ldpc && (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)) cap |= STA_CAP_LDPC; @@ -2280,7 +1619,7 @@ mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev, cap |= STA_CAP_VHT_TX_STBC; if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_1) cap |= STA_CAP_VHT_RX_STBC; - if (mvif->cap.ldpc && + if (mvif->cap.vht_ldpc && (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)) cap |= STA_CAP_VHT_LDPC; @@ -2291,6 +1630,10 @@ mt7915_mcu_sta_rate_ctrl_tlv(struct sk_buff *skb, struct mt7915_dev *dev, if (sta->he_cap.has_he) { ra->supp_mode |= MODE_HE; cap |= STA_CAP_HE; + + if (sta->he_6ghz_capa.capa) + ra->af = le16_get_bits(sta->he_6ghz_capa.capa, + IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); } ra->sta_cap = cpu_to_le32(cap); @@ -2304,8 +1647,8 @@ int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, struct sk_buff *skb; int ret; - skb = mt7915_mcu_alloc_sta_req(dev, mvif, msta, - MT76_CONNAC_STA_UPDATE_MAX_SIZE); + skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, + &msta->wcid); if (IS_ERR(skb)) return PTR_ERR(skb); @@ -2313,7 +1656,7 @@ int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif, * once dev->rc_work changes the settings driver should also * update sta_rec_he here. */ - if (sta->he_cap.has_he && changed) + if (changed) mt7915_mcu_sta_he_tlv(skb, sta, vif); /* sta_rec_ra accommodates BW, NSS and only MCS range format @@ -2371,18 +1714,18 @@ int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, msta = sta ? (struct mt7915_sta *)sta->drv_priv : &mvif->sta; - skb = mt7915_mcu_alloc_sta_req(dev, mvif, msta, - MT76_CONNAC_STA_UPDATE_MAX_SIZE); + skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, + &msta->wcid); if (IS_ERR(skb)) return PTR_ERR(skb); /* starec basic */ - mt7915_mcu_sta_basic_tlv(skb, vif, sta, enable); + mt76_connac_mcu_sta_basic_tlv(skb, vif, sta, enable, true); if (!enable) goto out; /* tag order is in accordance with firmware dependency. */ - if (sta && sta->ht_cap.ht_supported) { + if (sta) { /* starec bfer */ mt7915_mcu_sta_bfer_tlv(dev, skb, vif, sta); /* starec ht */ @@ -2390,16 +1733,18 @@ int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, /* starec vht */ mt7915_mcu_sta_vht_tlv(skb, sta); /* starec uapsd */ - mt7915_mcu_sta_uapsd_tlv(skb, sta, vif); + mt76_connac_mcu_sta_uapsd(skb, vif, sta); } ret = mt7915_mcu_sta_wtbl_tlv(dev, skb, vif, sta); - if (ret) + if (ret) { + dev_kfree_skb(skb); return ret; + } - if (sta && sta->ht_cap.ht_supported) { + if (sta) { /* starec amsdu */ - mt7915_mcu_sta_amsdu_tlv(skb, vif, sta); + mt7915_mcu_sta_amsdu_tlv(dev, skb, vif, sta); /* starec he */ mt7915_mcu_sta_he_tlv(skb, sta, vif); /* starec muru */ @@ -2409,8 +1754,10 @@ int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, } ret = mt7915_mcu_add_group(dev, vif, sta); - if (ret) + if (ret) { + dev_kfree_skb(skb); return ret; + } out: return mt76_mcu_skb_send_msg(&dev->mt76, skb, MCU_EXT_CMD(STA_REC_UPDATE), true); @@ -2479,6 +1826,55 @@ mt7915_mcu_beacon_cntdwn(struct ieee80211_vif *vif, struct sk_buff *rskb, } static void +mt7915_mcu_beacon_mbss(struct sk_buff *rskb, struct sk_buff *skb, + struct ieee80211_vif *vif, struct bss_info_bcn *bcn, + struct ieee80211_mutable_offsets *offs) +{ + struct bss_info_bcn_mbss *mbss; + const struct element *elem; + struct tlv *tlv; + + if (!vif->bss_conf.bssid_indicator) + return; + + tlv = mt7915_mcu_add_nested_subtlv(rskb, BSS_INFO_BCN_MBSSID, + sizeof(*mbss), &bcn->sub_ntlv, + &bcn->len); + + mbss = (struct bss_info_bcn_mbss *)tlv; + mbss->offset[0] = cpu_to_le16(offs->tim_offset); + mbss->bitmap = cpu_to_le32(1); + + for_each_element_id(elem, WLAN_EID_MULTIPLE_BSSID, + &skb->data[offs->mbssid_off], + skb->len - offs->mbssid_off) { + const struct element *sub_elem; + + if (elem->datalen < 2) + continue; + + for_each_element(sub_elem, elem->data + 1, elem->datalen - 1) { + const u8 *data; + + if (sub_elem->id || sub_elem->datalen < 4) + continue; /* not a valid BSS profile */ + + /* Find WLAN_EID_MULTI_BSSID_IDX + * in the merged nontransmitted profile + */ + data = cfg80211_find_ie(WLAN_EID_MULTI_BSSID_IDX, + sub_elem->data, + sub_elem->datalen); + if (!data || data[1] < 1 || !data[2]) + continue; + + mbss->offset[data[2]] = cpu_to_le16(data - skb->data); + mbss->bitmap |= cpu_to_le32(BIT(data[2])); + } + } +} + +static void mt7915_mcu_beacon_cont(struct mt7915_dev *dev, struct ieee80211_vif *vif, struct sk_buff *rskb, struct sk_buff *skb, struct bss_info_bcn *bcn, @@ -2540,8 +1936,8 @@ mt7915_mcu_beacon_check_caps(struct mt7915_phy *phy, struct ieee80211_vif *vif, len); if (ie && ie[1] >= sizeof(*ht)) { ht = (void *)(ie + 2); - vc->ldpc |= !!(le16_to_cpu(ht->cap_info) & - IEEE80211_HT_CAP_LDPC_CODING); + vc->ht_ldpc = !!(le16_to_cpu(ht->cap_info) & + IEEE80211_HT_CAP_LDPC_CODING); } ie = cfg80211_find_ie(WLAN_EID_VHT_CAPABILITY, mgmt->u.beacon.variable, @@ -2552,7 +1948,7 @@ mt7915_mcu_beacon_check_caps(struct mt7915_phy *phy, struct ieee80211_vif *vif, vht = (void *)(ie + 2); bc = le32_to_cpu(vht->vht_cap_info); - vc->ldpc |= !!(bc & IEEE80211_VHT_CAP_RXLDPC); + vc->vht_ldpc = !!(bc & IEEE80211_VHT_CAP_RXLDPC); vc->vht_su_ebfer = (bc & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE) && (pc & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE); @@ -2571,11 +1967,13 @@ mt7915_mcu_beacon_check_caps(struct mt7915_phy *phy, struct ieee80211_vif *vif, mgmt->u.beacon.variable, len); if (ie && ie[1] >= sizeof(*he) + 1) { const struct ieee80211_sta_he_cap *pc = - mt7915_get_he_phy_cap(phy, vif); + mt76_connac_get_he_phy_cap(phy->mt76, vif); const struct ieee80211_he_cap_elem *pe = &pc->he_cap_elem; he = (void *)(ie + 3); + vc->he_ldpc = + HE_PHY(CAP1_LDPC_CODING_IN_PAYLOAD, pe->phy_cap_info[1]); vc->he_su_ebfer = HE_PHY(CAP3_SU_BEAMFORMER, he->phy_cap_info[3]) && HE_PHY(CAP3_SU_BEAMFORMER, pe->phy_cap_info[3]); @@ -2601,12 +1999,17 @@ int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct tlv *tlv; struct bss_info_bcn *bcn; int len = MT7915_BEACON_UPDATE_SIZE + MAX_BEACON_SIZE; + bool ext_phy = phy != &dev->phy; + + if (vif->bss_conf.nontransmitted) + return 0; - rskb = mt7915_mcu_alloc_sta_req(dev, mvif, NULL, len); + rskb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, + NULL, len); if (IS_ERR(rskb)) return PTR_ERR(rskb); - tlv = mt7915_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn)); + tlv = mt76_connac_mcu_add_tlv(rskb, BSS_INFO_OFFLOAD, sizeof(*bcn)); bcn = (struct bss_info_bcn *)tlv; bcn->enable = en; @@ -2623,15 +2026,15 @@ int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, return -EINVAL; } - if (mvif->mt76.band_idx) { + if (ext_phy) { info = IEEE80211_SKB_CB(skb); info->hw_queue |= MT_TX_HW_QUEUE_EXT_PHY; } mt7915_mcu_beacon_check_caps(phy, vif, skb); - /* TODO: subtag - 11v MBSSID */ mt7915_mcu_beacon_cntdwn(vif, rskb, skb, bcn, &offs); + mt7915_mcu_beacon_mbss(rskb, skb, vif, bcn, &offs); mt7915_mcu_beacon_cont(dev, vif, rskb, skb, bcn, &offs); dev_kfree_skb(skb); @@ -2640,91 +2043,20 @@ out: MCU_EXT_CMD(BSS_INFO_UPDATE), true); } -static int mt7915_mcu_start_firmware(struct mt7915_dev *dev, u32 addr, - u32 option) -{ - struct { - __le32 option; - __le32 addr; - } req = { - .option = cpu_to_le32(option), - .addr = cpu_to_le32(addr), - }; - - return mt76_mcu_send_msg(&dev->mt76, MCU_CMD(FW_START_REQ), &req, - sizeof(req), true); -} - -static int mt7915_mcu_restart(struct mt76_dev *dev) -{ - struct { - u8 power_mode; - u8 rsv[3]; - } req = { - .power_mode = 1, - }; - - return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req, - sizeof(req), false); -} - -static int mt7915_mcu_patch_sem_ctrl(struct mt7915_dev *dev, bool get) +static int mt7915_driver_own(struct mt7915_dev *dev, u8 band) { - struct { - __le32 op; - } req = { - .op = cpu_to_le32(get ? PATCH_SEM_GET : PATCH_SEM_RELEASE), - }; - - return mt76_mcu_send_msg(&dev->mt76, MCU_CMD(PATCH_SEM_CONTROL), &req, - sizeof(req), true); -} - -static int mt7915_mcu_start_patch(struct mt7915_dev *dev) -{ - struct { - u8 check_crc; - u8 reserved[3]; - } req = { - .check_crc = 0, - }; - - return mt76_mcu_send_msg(&dev->mt76, MCU_CMD(PATCH_FINISH_REQ), &req, - sizeof(req), true); -} - -static int mt7915_driver_own(struct mt7915_dev *dev) -{ - mt76_wr(dev, MT_TOP_LPCR_HOST_BAND0, MT_TOP_LPCR_HOST_DRV_OWN); - if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND0, - MT_TOP_LPCR_HOST_FW_OWN, 0, 500)) { + mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(band), MT_TOP_LPCR_HOST_DRV_OWN); + if (!mt76_poll_msec(dev, MT_TOP_LPCR_HOST_BAND(band), + MT_TOP_LPCR_HOST_FW_OWN_STAT, 0, 500)) { dev_err(dev->mt76.dev, "Timeout for driver own\n"); return -EIO; } - return 0; -} + /* clear irq when the driver own success */ + mt76_wr(dev, MT_TOP_LPCR_HOST_BAND_IRQ_STAT(band), + MT_TOP_LPCR_HOST_BAND_STAT); -static int mt7915_mcu_init_download(struct mt7915_dev *dev, u32 addr, - u32 len, u32 mode) -{ - struct { - __le32 addr; - __le32 len; - __le32 mode; - } req = { - .addr = cpu_to_le32(addr), - .len = cpu_to_le32(len), - .mode = cpu_to_le32(mode), - }; - int attr; - - if (req.addr == cpu_to_le32(MCU_PATCH_ADDRESS)) - attr = MCU_CMD(PATCH_START_REQ); - else - attr = MCU_CMD(TARGET_ADDRESS_LEN_REQ); - - return mt76_mcu_send_msg(&dev->mt76, attr, &req, sizeof(req), true); + return 0; } static int mt7915_load_patch(struct mt7915_dev *dev) @@ -2733,7 +2065,7 @@ static int mt7915_load_patch(struct mt7915_dev *dev) const struct firmware *fw = NULL; int i, ret, sem; - sem = mt7915_mcu_patch_sem_ctrl(dev, 1); + sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 1); switch (sem) { case PATCH_IS_DL: return 0; @@ -2744,7 +2076,8 @@ static int mt7915_load_patch(struct mt7915_dev *dev) return -EAGAIN; } - ret = request_firmware(&fw, MT7915_ROM_PATCH, dev->mt76.dev); + ret = request_firmware(&fw, fw_name_var(dev, ROM_PATCH), + dev->mt76.dev); if (ret) goto out; @@ -2776,8 +2109,8 @@ static int mt7915_load_patch(struct mt7915_dev *dev) len = be32_to_cpu(sec->info.len); dl = fw->data + be32_to_cpu(sec->offs); - ret = mt7915_mcu_init_download(dev, addr, len, - DL_MODE_NEED_RSP); + ret = mt76_connac_mcu_init_download(&dev->mt76, addr, len, + DL_MODE_NEED_RSP); if (ret) { dev_err(dev->mt76.dev, "Download request failed\n"); goto out; @@ -2791,12 +2124,12 @@ static int mt7915_load_patch(struct mt7915_dev *dev) } } - ret = mt7915_mcu_start_patch(dev); + ret = mt76_connac_mcu_start_patch(&dev->mt76); if (ret) dev_err(dev->mt76.dev, "Failed to start patch\n"); out: - sem = mt7915_mcu_patch_sem_ctrl(dev, 0); + sem = mt76_connac_mcu_patch_sem_ctrl(&dev->mt76, 0); switch (sem) { case PATCH_REL_SEM_SUCCESS: break; @@ -2810,20 +2143,6 @@ out: return ret; } -static u32 mt7915_mcu_gen_dl_mode(u8 feature_set, bool is_wa) -{ - u32 ret = 0; - - ret |= (feature_set & FW_FEATURE_SET_ENCRYPT) ? - (DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV) : 0; - ret |= FIELD_PREP(DL_MODE_KEY_IDX, - FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); - ret |= DL_MODE_NEED_RSP; - ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; - - return ret; -} - static int mt7915_mcu_send_ram_firmware(struct mt7915_dev *dev, const struct mt7915_fw_trailer *hdr, @@ -2839,14 +2158,16 @@ mt7915_mcu_send_ram_firmware(struct mt7915_dev *dev, region = (const struct mt7915_fw_region *)((const u8 *)hdr - (hdr->n_region - i) * sizeof(*region)); - mode = mt7915_mcu_gen_dl_mode(region->feature_set, is_wa); + mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, + region->feature_set, is_wa); len = le32_to_cpu(region->len); addr = le32_to_cpu(region->addr); if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) override = addr; - err = mt7915_mcu_init_download(dev, addr, len, mode); + err = mt76_connac_mcu_init_download(&dev->mt76, addr, len, + mode); if (err) { dev_err(dev->mt76.dev, "Download request failed\n"); return err; @@ -2868,7 +2189,7 @@ mt7915_mcu_send_ram_firmware(struct mt7915_dev *dev, if (is_wa) option |= FW_START_WORKING_PDA_CR4; - return mt7915_mcu_start_firmware(dev, override, option); + return mt76_connac_mcu_start_firmware(&dev->mt76, override, option); } static int mt7915_load_ram(struct mt7915_dev *dev) @@ -2877,7 +2198,8 @@ static int mt7915_load_ram(struct mt7915_dev *dev) const struct firmware *fw; int ret; - ret = request_firmware(&fw, MT7915_FIRMWARE_WM, dev->mt76.dev); + ret = request_firmware(&fw, fw_name_var(dev, FIRMWARE_WM), + dev->mt76.dev); if (ret) return ret; @@ -2901,7 +2223,8 @@ static int mt7915_load_ram(struct mt7915_dev *dev) release_firmware(fw); - ret = request_firmware(&fw, MT7915_FIRMWARE_WA, dev->mt76.dev); + ret = request_firmware(&fw, fw_name(dev, FIRMWARE_WA), + dev->mt76.dev); if (ret) return ret; @@ -2933,10 +2256,36 @@ out: return ret; } +static int +mt7915_firmware_state(struct mt7915_dev *dev, bool wa) +{ + u32 state = FIELD_PREP(MT_TOP_MISC_FW_STATE, + wa ? FW_STATE_RDY : FW_STATE_FW_DOWNLOAD); + + if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, + state, 1000)) { + dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); + return -EIO; + } + return 0; +} + static int mt7915_load_firmware(struct mt7915_dev *dev) { int ret; + /* make sure fw is download state */ + if (mt7915_firmware_state(dev, false)) { + /* restart firmware once */ + __mt76_mcu_restart(&dev->mt76); + ret = mt7915_firmware_state(dev, false); + if (ret) { + dev_err(dev->mt76.dev, + "Firmware is not ready for download\n"); + return ret; + } + } + ret = mt7915_load_patch(dev); if (ret) return ret; @@ -2945,12 +2294,9 @@ static int mt7915_load_firmware(struct mt7915_dev *dev) if (ret) return ret; - if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, - FIELD_PREP(MT_TOP_MISC_FW_STATE, - FW_STATE_RDY), 1000)) { - dev_err(dev->mt76.dev, "Timeout for initializing firmware\n"); - return -EIO; - } + ret = mt7915_firmware_state(dev, true); + if (ret) + return ret; mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_FWDL], false); @@ -3021,7 +2367,7 @@ int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy, void *ms) u8 band_idx; } req = { .cmd = cpu_to_le32(MURU_GET_TXC_TX_STATS), - .band_idx = phy != &dev->phy, + .band_idx = phy->band_idx, }; ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(MURU_CTRL), @@ -3110,15 +2456,29 @@ int mt7915_mcu_init(struct mt7915_dev *dev) .headroom = sizeof(struct mt7915_mcu_txd), .mcu_skb_send_msg = mt7915_mcu_send_message, .mcu_parse_response = mt7915_mcu_parse_response, - .mcu_restart = mt7915_mcu_restart, + .mcu_restart = mt76_connac_mcu_restart, }; int ret; dev->mt76.mcu_ops = &mt7915_mcu_ops; - ret = mt7915_driver_own(dev); + /* force firmware operation mode into normal state, + * which should be set before firmware download stage. + */ + if (is_mt7915(&dev->mt76)) + mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); + else + mt76_wr(dev, MT_SWDEF_MODE_MT7916, MT_SWDEF_NORMAL_MODE); + + ret = mt7915_driver_own(dev, 0); if (ret) return ret; + /* set driver own for band1 when two hif exist */ + if (dev->hif2) { + ret = mt7915_driver_own(dev, 1); + if (ret) + return ret; + } ret = mt7915_load_firmware(dev); if (ret) @@ -3153,14 +2513,15 @@ int mt7915_mcu_init(struct mt7915_dev *dev) void mt7915_mcu_exit(struct mt7915_dev *dev) { __mt76_mcu_restart(&dev->mt76); - if (!mt76_poll_msec(dev, MT_TOP_MISC, MT_TOP_MISC_FW_STATE, - FIELD_PREP(MT_TOP_MISC_FW_STATE, - FW_STATE_FW_DOWNLOAD), 1000)) { + if (mt7915_firmware_state(dev, false)) { dev_err(dev->mt76.dev, "Failed to exit mcu\n"); return; } - mt76_wr(dev, MT_TOP_LPCR_HOST_BAND0, MT_TOP_LPCR_HOST_FW_OWN); + mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(0), MT_TOP_LPCR_HOST_FW_OWN); + if (dev->hif2) + mt76_wr(dev, MT_TOP_LPCR_HOST_BAND(1), + MT_TOP_LPCR_HOST_FW_OWN); skb_queue_purge(&dev->mt76.mcu.res_q); } @@ -3238,26 +2599,6 @@ int mt7915_mcu_set_scs(struct mt7915_dev *dev, u8 band, bool enable) sizeof(req), false); } -int mt7915_mcu_set_rts_thresh(struct mt7915_phy *phy, u32 val) -{ - struct mt7915_dev *dev = phy->dev; - struct { - u8 prot_idx; - u8 band; - u8 rsv[2]; - __le32 len_thresh; - __le32 pkt_thresh; - } __packed req = { - .prot_idx = 1, - .band = phy != &dev->phy, - .len_thresh = cpu_to_le32(val), - .pkt_thresh = cpu_to_le32(0x2), - }; - - return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(PROTECT_CTRL), &req, - sizeof(req), true); -} - int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *param) { struct mt7915_mcu_tx *req = (struct mt7915_mcu_tx *)param; @@ -3303,58 +2644,6 @@ int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif) return mt7915_mcu_update_edca(dev, &req); } -int mt7915_mcu_set_pm(struct mt7915_dev *dev, int band, int enter) -{ -#define ENTER_PM_STATE 1 -#define EXIT_PM_STATE 2 - struct { - u8 pm_number; - u8 pm_state; - u8 bssid[ETH_ALEN]; - u8 dtim_period; - u8 wlan_idx_lo; - __le16 bcn_interval; - __le32 aid; - __le32 rx_filter; - u8 band_idx; - u8 wlan_idx_hi; - u8 rsv[2]; - __le32 feature; - u8 omac_idx; - u8 wmm_idx; - u8 bcn_loss_cnt; - u8 bcn_sp_duration; - } __packed req = { - .pm_number = 5, - .pm_state = (enter) ? ENTER_PM_STATE : EXIT_PM_STATE, - .band_idx = band, - }; - - return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(PM_STATE_CTRL), &req, - sizeof(req), true); -} - -int mt7915_mcu_rdd_cmd(struct mt7915_dev *dev, - enum mt7915_rdd_cmd cmd, u8 index, - u8 rx_sel, u8 val) -{ - struct { - u8 ctrl; - u8 rdd_idx; - u8 rdd_rx_sel; - u8 val; - u8 rsv[4]; - } __packed req = { - .ctrl = cmd, - .rdd_idx = index, - .rdd_rx_sel = rx_sel, - .val = val, - }; - - return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(SET_RDD_CTRL), &req, - sizeof(req), true); -} - int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val) { struct { @@ -3453,12 +2742,109 @@ int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index, sizeof(req), true); } +static int +mt7915_mcu_background_chain_ctrl(struct mt7915_phy *phy, + struct cfg80211_chan_def *chandef, + int cmd) +{ + struct mt7915_dev *dev = phy->dev; + struct mt76_phy *mphy = phy->mt76; + struct ieee80211_channel *chan = mphy->chandef.chan; + int freq = mphy->chandef.center_freq1; + struct mt7915_mcu_background_chain_ctrl req = { + .monitor_scan_type = 2, /* simple rx */ + }; + + if (!chandef && cmd != CH_SWITCH_BACKGROUND_SCAN_STOP) + return -EINVAL; + + if (!cfg80211_chandef_valid(&mphy->chandef)) + return -EINVAL; + + switch (cmd) { + case CH_SWITCH_BACKGROUND_SCAN_START: { + req.chan = chan->hw_value; + req.central_chan = ieee80211_frequency_to_channel(freq); + req.bw = mt76_connac_chan_bw(&mphy->chandef); + req.monitor_chan = chandef->chan->hw_value; + req.monitor_central_chan = + ieee80211_frequency_to_channel(chandef->center_freq1); + req.monitor_bw = mt76_connac_chan_bw(chandef); + req.band_idx = phy != &dev->phy; + req.scan_mode = 1; + break; + } + case CH_SWITCH_BACKGROUND_SCAN_RUNNING: + req.monitor_chan = chandef->chan->hw_value; + req.monitor_central_chan = + ieee80211_frequency_to_channel(chandef->center_freq1); + req.band_idx = phy != &dev->phy; + req.scan_mode = 2; + break; + case CH_SWITCH_BACKGROUND_SCAN_STOP: + req.chan = chan->hw_value; + req.central_chan = ieee80211_frequency_to_channel(freq); + req.bw = mt76_connac_chan_bw(&mphy->chandef); + req.tx_stream = hweight8(mphy->antenna_mask); + req.rx_stream = mphy->antenna_mask; + break; + default: + return -EINVAL; + } + req.band = chandef ? chandef->chan->band == NL80211_BAND_5GHZ : 1; + + return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(OFFCH_SCAN_CTRL), + &req, sizeof(req), false); +} + +int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy, + struct cfg80211_chan_def *chandef) +{ + struct mt7915_dev *dev = phy->dev; + int err, region; + + if (!chandef) { /* disable offchain */ + err = mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_STOP, MT_RX_SEL2, + 0, 0); + if (err) + return err; + + return mt7915_mcu_background_chain_ctrl(phy, NULL, + CH_SWITCH_BACKGROUND_SCAN_STOP); + } + + err = mt7915_mcu_background_chain_ctrl(phy, chandef, + CH_SWITCH_BACKGROUND_SCAN_START); + if (err) + return err; + + switch (dev->mt76.region) { + case NL80211_DFS_ETSI: + region = 0; + break; + case NL80211_DFS_JP: + region = 2; + break; + case NL80211_DFS_FCC: + default: + region = 1; + break; + } + + return mt76_connac_mcu_rdd_cmd(&dev->mt76, RDD_START, MT_RX_SEL2, + 0, region); +} + int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd) { + static const u8 ch_band[] = { + [NL80211_BAND_2GHZ] = 0, + [NL80211_BAND_5GHZ] = 1, + [NL80211_BAND_6GHZ] = 2, + }; struct mt7915_dev *dev = phy->dev; struct cfg80211_chan_def *chandef = &phy->mt76->chandef; int freq1 = chandef->center_freq1; - bool ext_phy = phy != &dev->phy; struct { u8 control_ch; u8 center_ch; @@ -3479,11 +2865,11 @@ int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd) } __packed req = { .control_ch = chandef->chan->hw_value, .center_ch = ieee80211_frequency_to_channel(freq1), - .bw = mt7915_mcu_chan_bw(chandef), + .bw = mt76_connac_chan_bw(chandef), .tx_streams_num = hweight8(phy->mt76->antenna_mask), .rx_streams = phy->mt76->antenna_mask, - .band_idx = ext_phy, - .channel_band = chandef->chan->band, + .band_idx = phy->band_idx, + .channel_band = ch_band[chandef->chan->band], }; #ifdef CONFIG_NL80211_TESTMODE @@ -3494,17 +2880,18 @@ int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd) req.tx_streams_num = fls(phy->mt76->test.tx_antenna_mask); req.rx_streams = phy->mt76->test.tx_antenna_mask; - if (ext_phy) { - req.tx_streams_num = 2; - req.rx_streams >>= 2; - } + if (phy != &dev->phy) + req.rx_streams >>= dev->chainshift; } #endif - if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) + if (cmd == MCU_EXT_CMD(SET_RX_PATH) || + dev->mt76.hw->conf.flags & IEEE80211_CONF_MONITOR) + req.switch_reason = CH_SWITCH_NORMAL; + else if (phy->mt76->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; - else if ((chandef->chan->flags & IEEE80211_CHAN_RADAR) && - chandef->chan->dfs_state != NL80211_DFS_AVAILABLE) + else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef, + NL80211_IFTYPE_AP)) req.switch_reason = CH_SWITCH_DFS; else req.switch_reason = CH_SWITCH_NORMAL; @@ -3527,7 +2914,8 @@ static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev) #define PAGE_IDX_MASK GENMASK(4, 2) #define PER_PAGE_SIZE 0x400 struct mt7915_mcu_eeprom req = { .buffer_mode = EE_MODE_BUFFER }; - u8 total = DIV_ROUND_UP(MT7915_EEPROM_SIZE, PER_PAGE_SIZE); + u16 eeprom_size = mt7915_eeprom_size(dev); + u8 total = DIV_ROUND_UP(eeprom_size, PER_PAGE_SIZE); u8 *eep = (u8 *)dev->mt76.eeprom.data; int eep_len; int i; @@ -3536,8 +2924,8 @@ static int mt7915_mcu_set_eeprom_flash(struct mt7915_dev *dev) struct sk_buff *skb; int ret; - if (i == total - 1 && !!(MT7915_EEPROM_SIZE % PER_PAGE_SIZE)) - eep_len = MT7915_EEPROM_SIZE % PER_PAGE_SIZE; + if (i == total - 1 && !!(eeprom_size % PER_PAGE_SIZE)) + eep_len = eeprom_size % PER_PAGE_SIZE; else eep_len = PER_PAGE_SIZE; @@ -3770,19 +3158,26 @@ int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy) int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch) { /* strict order */ - static const enum mt7915_chan_mib_offs offs[] = { - MIB_BUSY_TIME, MIB_TX_TIME, MIB_RX_TIME, MIB_OBSS_AIRTIME + static const u32 offs[] = { + MIB_BUSY_TIME, MIB_TX_TIME, MIB_RX_TIME, MIB_OBSS_AIRTIME, + MIB_BUSY_TIME_V2, MIB_TX_TIME_V2, MIB_RX_TIME_V2, + MIB_OBSS_AIRTIME_V2 }; struct mt76_channel_state *state = phy->mt76->chan_state; struct mt76_channel_state *state_ts = &phy->state_ts; struct mt7915_dev *dev = phy->dev; struct mt7915_mcu_mib *res, req[4]; struct sk_buff *skb; - int i, ret; + int i, ret, start = 0, ofs = 20; + + if (!is_mt7915(&dev->mt76)) { + start = 4; + ofs = 0; + } for (i = 0; i < 4; i++) { req[i].band = cpu_to_le32(phy != &dev->phy); - req[i].offs = cpu_to_le32(offs[i]); + req[i].offs = cpu_to_le32(offs[i + start]); } ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO), @@ -3790,7 +3185,7 @@ int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch) if (ret) return ret; - res = (struct mt7915_mcu_mib *)(skb->data + 20); + res = (struct mt7915_mcu_mib *)(skb->data + ofs); if (chan_switch) goto out; @@ -3842,7 +3237,7 @@ int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state) u8 rsv[2]; } __packed req = { .ctrl = { - .band_idx = phy != &dev->phy, + .band_idx = phy->band_idx, }, }; int level; @@ -4137,6 +3532,8 @@ int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, case MT_PHY_TYPE_OFDM: if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) sband = &mphy->sband_5g.sband; + else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) + sband = &mphy->sband_6g.sband; else sband = &mphy->sband_2g.sband; @@ -4210,11 +3607,13 @@ int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vi struct sk_buff *skb; struct tlv *tlv; - skb = mt7915_mcu_alloc_sta_req(dev, mvif, NULL, len); + skb = __mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, + NULL, len); if (IS_ERR(skb)) return PTR_ERR(skb); - tlv = mt7915_mcu_add_tlv(skb, BSS_INFO_BSS_COLOR, sizeof(*bss_color)); + tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BSS_COLOR, + sizeof(*bss_color)); bss_color = (struct bss_info_color *)tlv; bss_color->disable = !he_bss_color->enabled; bss_color->color = he_bss_color->color; diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h index 92268e696931..960072a44222 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h @@ -79,6 +79,15 @@ struct mt7915_mcu_csa_notify { u8 rsv; } __packed; +struct mt7915_mcu_bcc_notify { + struct mt7915_mcu_rxd rxd; + + u8 band_idx; + u8 omac_idx; + u8 cca_count; + u8 rsv; +} __packed; + struct mt7915_mcu_rdd_report { struct mt7915_mcu_rxd rxd; @@ -131,6 +140,29 @@ struct mt7915_mcu_rdd_report { } hw_pulse[32]; } __packed; +struct mt7915_mcu_background_chain_ctrl { + u8 chan; /* primary channel */ + u8 central_chan; /* central channel */ + u8 bw; + u8 tx_stream; + u8 rx_stream; + + u8 monitor_chan; /* monitor channel */ + u8 monitor_central_chan;/* monitor central channel */ + u8 monitor_bw; + u8 monitor_tx_stream; + u8 monitor_rx_stream; + + u8 scan_mode; /* 0: ScanStop + * 1: ScanStart + * 2: ScanRunning + */ + u8 band_idx; /* DBDC */ + u8 monitor_scan_type; + u8 band; /* 0: 2.4GHz, 1: 5GHz */ + u8 rsv[2]; +} __packed; + struct mt7915_mcu_eeprom { u8 buffer_mode; u8 format; @@ -161,10 +193,16 @@ struct mt7915_mcu_mib { } __packed; enum mt7915_chan_mib_offs { + /* mt7915 */ MIB_BUSY_TIME = 14, MIB_TX_TIME = 81, MIB_RX_TIME, - MIB_OBSS_AIRTIME = 86 + MIB_OBSS_AIRTIME = 86, + /* mt7916 */ + MIB_BUSY_TIME_V2 = 0, + MIB_TX_TIME_V2 = 6, + MIB_RX_TIME_V2 = 8, + MIB_OBSS_AIRTIME_V2 = 490 }; struct edca { @@ -266,29 +304,6 @@ enum mcu_mmps_mode { MCU_MMPS_DISABLE, }; -#define STA_TYPE_STA BIT(0) -#define STA_TYPE_AP BIT(1) -#define STA_TYPE_ADHOC BIT(2) -#define STA_TYPE_WDS BIT(4) -#define STA_TYPE_BC BIT(5) - -#define NETWORK_INFRA BIT(16) -#define NETWORK_P2P BIT(17) -#define NETWORK_IBSS BIT(18) -#define NETWORK_WDS BIT(21) - -#define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA) -#define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA) -#define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P) -#define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P) -#define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS) -#define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS) -#define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA) - -#define CONN_STATE_DISCONNECT 0 -#define CONN_STATE_CONNECT 1 -#define CONN_STATE_PORT_SECURE 2 - enum { SCS_SEND_DATA, SCS_SET_MANUAL_PD_TH, diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mmio.c b/drivers/net/wireless/mediatek/mt76/mt7915/mmio.c index 1f6ba306c850..5062e0d8cae4 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mmio.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mmio.c @@ -1,102 +1,441 @@ // SPDX-License-Identifier: ISC /* Copyright (C) 2020 MediaTek Inc. */ +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/pci.h> + #include "mt7915.h" +#include "mac.h" +#include "../trace.h" + +static const u32 mt7915_reg[] = { + [INT_SOURCE_CSR] = 0xd7010, + [INT_MASK_CSR] = 0xd7014, + [INT1_SOURCE_CSR] = 0xd7088, + [INT1_MASK_CSR] = 0xd708c, + [INT_MCU_CMD_SOURCE] = 0xd51f0, + [INT_MCU_CMD_EVENT] = 0x3108, + [WFDMA0_ADDR] = 0xd4000, + [WFDMA0_PCIE1_ADDR] = 0xd8000, + [WFDMA_EXT_CSR_ADDR] = 0xd7000, + [CBTOP1_PHY_END] = 0x77ffffff, + [INFRA_MCU_ADDR_END] = 0x7c3fffff, +}; + +static const u32 mt7916_reg[] = { + [INT_SOURCE_CSR] = 0xd4200, + [INT_MASK_CSR] = 0xd4204, + [INT1_SOURCE_CSR] = 0xd8200, + [INT1_MASK_CSR] = 0xd8204, + [INT_MCU_CMD_SOURCE] = 0xd41f0, + [INT_MCU_CMD_EVENT] = 0x2108, + [WFDMA0_ADDR] = 0xd4000, + [WFDMA0_PCIE1_ADDR] = 0xd8000, + [WFDMA_EXT_CSR_ADDR] = 0xd7000, + [CBTOP1_PHY_END] = 0x7fffffff, + [INFRA_MCU_ADDR_END] = 0x7c085fff, +}; + +static const u32 mt7986_reg[] = { + [INT_SOURCE_CSR] = 0x24200, + [INT_MASK_CSR] = 0x24204, + [INT1_SOURCE_CSR] = 0x28200, + [INT1_MASK_CSR] = 0x28204, + [INT_MCU_CMD_SOURCE] = 0x241f0, + [INT_MCU_CMD_EVENT] = 0x54000108, + [WFDMA0_ADDR] = 0x24000, + [WFDMA0_PCIE1_ADDR] = 0x28000, + [WFDMA_EXT_CSR_ADDR] = 0x27000, + [CBTOP1_PHY_END] = 0x7fffffff, + [INFRA_MCU_ADDR_END] = 0x7c085fff, +}; + +static const u32 mt7915_offs[] = { + [TMAC_CDTR] = 0x090, + [TMAC_ODTR] = 0x094, + [TMAC_ATCR] = 0x098, + [TMAC_TRCR0] = 0x09c, + [TMAC_ICR0] = 0x0a4, + [TMAC_ICR1] = 0x0b4, + [TMAC_CTCR0] = 0x0f4, + [TMAC_TFCR0] = 0x1e0, + [MDP_BNRCFR0] = 0x070, + [MDP_BNRCFR1] = 0x074, + [ARB_DRNGR0] = 0x194, + [ARB_SCR] = 0x080, + [RMAC_MIB_AIRTIME14] = 0x3b8, + [AGG_AWSCR0] = 0x05c, + [AGG_PCR0] = 0x06c, + [AGG_ACR0] = 0x084, + [AGG_MRCR] = 0x098, + [AGG_ATCR1] = 0x0f0, + [AGG_ATCR3] = 0x0f4, + [LPON_UTTR0] = 0x080, + [LPON_UTTR1] = 0x084, + [LPON_FRCR] = 0x314, + [MIB_SDR3] = 0x014, + [MIB_SDR4] = 0x018, + [MIB_SDR5] = 0x01c, + [MIB_SDR7] = 0x024, + [MIB_SDR8] = 0x028, + [MIB_SDR9] = 0x02c, + [MIB_SDR10] = 0x030, + [MIB_SDR11] = 0x034, + [MIB_SDR12] = 0x038, + [MIB_SDR13] = 0x03c, + [MIB_SDR14] = 0x040, + [MIB_SDR15] = 0x044, + [MIB_SDR16] = 0x048, + [MIB_SDR17] = 0x04c, + [MIB_SDR18] = 0x050, + [MIB_SDR19] = 0x054, + [MIB_SDR20] = 0x058, + [MIB_SDR21] = 0x05c, + [MIB_SDR22] = 0x060, + [MIB_SDR23] = 0x064, + [MIB_SDR24] = 0x068, + [MIB_SDR25] = 0x06c, + [MIB_SDR27] = 0x074, + [MIB_SDR28] = 0x078, + [MIB_SDR29] = 0x07c, + [MIB_SDRVEC] = 0x080, + [MIB_SDR31] = 0x084, + [MIB_SDR32] = 0x088, + [MIB_SDRMUBF] = 0x090, + [MIB_DR8] = 0x0c0, + [MIB_DR9] = 0x0c4, + [MIB_DR11] = 0x0cc, + [MIB_MB_SDR0] = 0x100, + [MIB_MB_SDR1] = 0x104, + [TX_AGG_CNT] = 0x0a8, + [TX_AGG_CNT2] = 0x164, + [MIB_ARNG] = 0x4b8, + [WTBLON_TOP_WDUCR] = 0x0, + [WTBL_UPDATE] = 0x030, + [PLE_FL_Q_EMPTY] = 0x0b0, + [PLE_FL_Q_CTRL] = 0x1b0, + [PLE_AC_QEMPTY] = 0x500, + [PLE_FREEPG_CNT] = 0x100, + [PLE_FREEPG_HEAD_TAIL] = 0x104, + [PLE_PG_HIF_GROUP] = 0x110, + [PLE_HIF_PG_INFO] = 0x114, + [AC_OFFSET] = 0x040, + [ETBF_PAR_RPT0] = 0x068, +}; + +static const u32 mt7916_offs[] = { + [TMAC_CDTR] = 0x0c8, + [TMAC_ODTR] = 0x0cc, + [TMAC_ATCR] = 0x00c, + [TMAC_TRCR0] = 0x010, + [TMAC_ICR0] = 0x014, + [TMAC_ICR1] = 0x018, + [TMAC_CTCR0] = 0x114, + [TMAC_TFCR0] = 0x0e4, + [MDP_BNRCFR0] = 0x090, + [MDP_BNRCFR1] = 0x094, + [ARB_DRNGR0] = 0x1e0, + [ARB_SCR] = 0x000, + [RMAC_MIB_AIRTIME14] = 0x0398, + [AGG_AWSCR0] = 0x030, + [AGG_PCR0] = 0x040, + [AGG_ACR0] = 0x054, + [AGG_MRCR] = 0x068, + [AGG_ATCR1] = 0x1a8, + [AGG_ATCR3] = 0x080, + [LPON_UTTR0] = 0x360, + [LPON_UTTR1] = 0x364, + [LPON_FRCR] = 0x37c, + [MIB_SDR3] = 0x698, + [MIB_SDR4] = 0x788, + [MIB_SDR5] = 0x780, + [MIB_SDR7] = 0x5a8, + [MIB_SDR8] = 0x78c, + [MIB_SDR9] = 0x024, + [MIB_SDR10] = 0x76c, + [MIB_SDR11] = 0x790, + [MIB_SDR12] = 0x558, + [MIB_SDR13] = 0x560, + [MIB_SDR14] = 0x564, + [MIB_SDR15] = 0x568, + [MIB_SDR16] = 0x7fc, + [MIB_SDR17] = 0x800, + [MIB_SDR18] = 0x030, + [MIB_SDR19] = 0x5ac, + [MIB_SDR20] = 0x5b0, + [MIB_SDR21] = 0x5b4, + [MIB_SDR22] = 0x770, + [MIB_SDR23] = 0x774, + [MIB_SDR24] = 0x778, + [MIB_SDR25] = 0x77c, + [MIB_SDR27] = 0x080, + [MIB_SDR28] = 0x084, + [MIB_SDR29] = 0x650, + [MIB_SDRVEC] = 0x5a8, + [MIB_SDR31] = 0x55c, + [MIB_SDR32] = 0x7a8, + [MIB_SDRMUBF] = 0x7ac, + [MIB_DR8] = 0x56c, + [MIB_DR9] = 0x570, + [MIB_DR11] = 0x574, + [MIB_MB_SDR0] = 0x688, + [MIB_MB_SDR1] = 0x690, + [TX_AGG_CNT] = 0x7dc, + [TX_AGG_CNT2] = 0x7ec, + [MIB_ARNG] = 0x0b0, + [WTBLON_TOP_WDUCR] = 0x200, + [WTBL_UPDATE] = 0x230, + [PLE_FL_Q_EMPTY] = 0x360, + [PLE_FL_Q_CTRL] = 0x3e0, + [PLE_AC_QEMPTY] = 0x600, + [PLE_FREEPG_CNT] = 0x380, + [PLE_FREEPG_HEAD_TAIL] = 0x384, + [PLE_PG_HIF_GROUP] = 0x00c, + [PLE_HIF_PG_INFO] = 0x388, + [AC_OFFSET] = 0x080, + [ETBF_PAR_RPT0] = 0x100, +}; + +static const struct __map mt7915_reg_map[] = { + { 0x00400000, 0x80000, 0x10000 }, /* WF_MCU_SYSRAM */ + { 0x00410000, 0x90000, 0x10000 }, /* WF_MCU_SYSRAM (configure regs) */ + { 0x40000000, 0x70000, 0x10000 }, /* WF_UMAC_SYSRAM */ + { 0x54000000, 0x02000, 0x1000 }, /* WFDMA PCIE0 MCU DMA0 */ + { 0x55000000, 0x03000, 0x1000 }, /* WFDMA PCIE0 MCU DMA1 */ + { 0x58000000, 0x06000, 0x1000 }, /* WFDMA PCIE1 MCU DMA0 (MEM_DMA) */ + { 0x59000000, 0x07000, 0x1000 }, /* WFDMA PCIE1 MCU DMA1 */ + { 0x7c000000, 0xf0000, 0x10000 }, /* CONN_INFRA */ + { 0x7c020000, 0xd0000, 0x10000 }, /* CONN_INFRA, WFDMA */ + { 0x80020000, 0xb0000, 0x10000 }, /* WF_TOP_MISC_OFF */ + { 0x81020000, 0xc0000, 0x10000 }, /* WF_TOP_MISC_ON */ + { 0x820c0000, 0x08000, 0x4000 }, /* WF_UMAC_TOP (PLE) */ + { 0x820c8000, 0x0c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */ + { 0x820cc000, 0x0e000, 0x2000 }, /* WF_UMAC_TOP (PP) */ + { 0x820ce000, 0x21c00, 0x0200 }, /* WF_LMAC_TOP (WF_SEC) */ + { 0x820cf000, 0x22000, 0x1000 }, /* WF_LMAC_TOP (WF_PF) */ + { 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */ + { 0x820e0000, 0x20000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_CFG) */ + { 0x820e1000, 0x20400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_TRB) */ + { 0x820e2000, 0x20800, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_AGG) */ + { 0x820e3000, 0x20c00, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_ARB) */ + { 0x820e4000, 0x21000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */ + { 0x820e5000, 0x21400, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_RMAC) */ + { 0x820e7000, 0x21e00, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_DMA) */ + { 0x820e9000, 0x23400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_WTBLOFF) */ + { 0x820ea000, 0x24000, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_ETBF) */ + { 0x820eb000, 0x24200, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_LPON) */ + { 0x820ec000, 0x24600, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_INT) */ + { 0x820ed000, 0x24800, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */ + { 0x820f0000, 0xa0000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_CFG) */ + { 0x820f1000, 0xa0600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_TRB) */ + { 0x820f2000, 0xa0800, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_AGG) */ + { 0x820f3000, 0xa0c00, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_ARB) */ + { 0x820f4000, 0xa1000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_TMAC) */ + { 0x820f5000, 0xa1400, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_RMAC) */ + { 0x820f7000, 0xa1e00, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_DMA) */ + { 0x820f9000, 0xa3400, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_WTBLOFF) */ + { 0x820fa000, 0xa4000, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_ETBF) */ + { 0x820fb000, 0xa4200, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_LPON) */ + { 0x820fc000, 0xa4600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_INT) */ + { 0x820fd000, 0xa4800, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_MIB) */ + { 0x0, 0x0, 0x0 }, /* imply end of search */ +}; + +static const struct __map mt7916_reg_map[] = { + { 0x54000000, 0x02000, 0x1000 }, /* WFDMA_0 (PCIE0 MCU DMA0) */ + { 0x55000000, 0x03000, 0x1000 }, /* WFDMA_1 (PCIE0 MCU DMA1) */ + { 0x56000000, 0x04000, 0x1000 }, /* WFDMA_2 (Reserved) */ + { 0x57000000, 0x05000, 0x1000 }, /* WFDMA_3 (MCU wrap CR) */ + { 0x58000000, 0x06000, 0x1000 }, /* WFDMA_4 (PCIE1 MCU DMA0) */ + { 0x59000000, 0x07000, 0x1000 }, /* WFDMA_5 (PCIE1 MCU DMA1) */ + { 0x820c0000, 0x08000, 0x4000 }, /* WF_UMAC_TOP (PLE) */ + { 0x820c8000, 0x0c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */ + { 0x820cc000, 0x0e000, 0x2000 }, /* WF_UMAC_TOP (PP) */ + { 0x820e0000, 0x20000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_CFG) */ + { 0x820e1000, 0x20400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_TRB) */ + { 0x820e2000, 0x20800, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_AGG) */ + { 0x820e3000, 0x20c00, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_ARB) */ + { 0x820e4000, 0x21000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */ + { 0x820e5000, 0x21400, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_RMAC) */ + { 0x820ce000, 0x21c00, 0x0200 }, /* WF_LMAC_TOP (WF_SEC) */ + { 0x820e7000, 0x21e00, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_DMA) */ + { 0x820cf000, 0x22000, 0x1000 }, /* WF_LMAC_TOP (WF_PF) */ + { 0x820e9000, 0x23400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_WTBLOFF) */ + { 0x820ea000, 0x24000, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_ETBF) */ + { 0x820eb000, 0x24200, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_LPON) */ + { 0x820ec000, 0x24600, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_INT) */ + { 0x820ed000, 0x24800, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */ + { 0x820ca000, 0x26000, 0x2000 }, /* WF_LMAC_TOP BN0 (WF_MUCOP) */ + { 0x820d0000, 0x30000, 0x10000}, /* WF_LMAC_TOP (WF_WTBLON) */ + { 0x00400000, 0x80000, 0x10000}, /* WF_MCU_SYSRAM */ + { 0x00410000, 0x90000, 0x10000}, /* WF_MCU_SYSRAM (configure cr) */ + { 0x820f0000, 0xa0000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_CFG) */ + { 0x820f1000, 0xa0600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_TRB) */ + { 0x820f2000, 0xa0800, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_AGG) */ + { 0x820f3000, 0xa0c00, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_ARB) */ + { 0x820f4000, 0xa1000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_TMAC) */ + { 0x820f5000, 0xa1400, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_RMAC) */ + { 0x820f7000, 0xa1e00, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_DMA) */ + { 0x820f9000, 0xa3400, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_WTBLOFF) */ + { 0x820fa000, 0xa4000, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_ETBF) */ + { 0x820fb000, 0xa4200, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_LPON) */ + { 0x820fc000, 0xa4600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_INT) */ + { 0x820fd000, 0xa4800, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_MIB) */ + { 0x820c4000, 0xa8000, 0x1000 }, /* WF_LMAC_TOP (WF_UWTBL ) */ + { 0x820b0000, 0xae000, 0x1000 }, /* [APB2] WFSYS_ON */ + { 0x80020000, 0xb0000, 0x10000}, /* WF_TOP_MISC_OFF */ + { 0x81020000, 0xc0000, 0x10000}, /* WF_TOP_MISC_ON */ + { 0x0, 0x0, 0x0 }, /* imply end of search */ +}; + +static const struct __map mt7986_reg_map[] = { + { 0x54000000, 0x402000, 0x1000 }, /* WFDMA_0 (PCIE0 MCU DMA0) */ + { 0x55000000, 0x403000, 0x1000 }, /* WFDMA_1 (PCIE0 MCU DMA1) */ + { 0x56000000, 0x404000, 0x1000 }, /* WFDMA_2 (Reserved) */ + { 0x57000000, 0x405000, 0x1000 }, /* WFDMA_3 (MCU wrap CR) */ + { 0x58000000, 0x406000, 0x1000 }, /* WFDMA_4 (PCIE1 MCU DMA0) */ + { 0x59000000, 0x407000, 0x1000 }, /* WFDMA_5 (PCIE1 MCU DMA1) */ + { 0x820c0000, 0x408000, 0x4000 }, /* WF_UMAC_TOP (PLE) */ + { 0x820c8000, 0x40c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */ + { 0x820cc000, 0x40e000, 0x2000 }, /* WF_UMAC_TOP (PP) */ + { 0x820e0000, 0x420000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_CFG) */ + { 0x820e1000, 0x420400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_TRB) */ + { 0x820e2000, 0x420800, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_AGG) */ + { 0x820e3000, 0x420c00, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_ARB) */ + { 0x820e4000, 0x421000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */ + { 0x820e5000, 0x421400, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_RMAC) */ + { 0x820ce000, 0x421c00, 0x0200 }, /* WF_LMAC_TOP (WF_SEC) */ + { 0x820e7000, 0x421e00, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_DMA) */ + { 0x820cf000, 0x422000, 0x1000 }, /* WF_LMAC_TOP (WF_PF) */ + { 0x820e9000, 0x423400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_WTBLOFF) */ + { 0x820ea000, 0x424000, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_ETBF) */ + { 0x820eb000, 0x424200, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_LPON) */ + { 0x820ec000, 0x424600, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_INT) */ + { 0x820ed000, 0x424800, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */ + { 0x820ca000, 0x426000, 0x2000 }, /* WF_LMAC_TOP BN0 (WF_MUCOP) */ + { 0x820d0000, 0x430000, 0x10000}, /* WF_LMAC_TOP (WF_WTBLON) */ + { 0x00400000, 0x480000, 0x10000}, /* WF_MCU_SYSRAM */ + { 0x00410000, 0x490000, 0x10000}, /* WF_MCU_SYSRAM */ + { 0x820f0000, 0x4a0000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_CFG) */ + { 0x820f1000, 0x4a0600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_TRB) */ + { 0x820f2000, 0x4a0800, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_AGG) */ + { 0x820f3000, 0x4a0c00, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_ARB) */ + { 0x820f4000, 0x4a1000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_TMAC) */ + { 0x820f5000, 0x4a1400, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_RMAC) */ + { 0x820f7000, 0x4a1e00, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_DMA) */ + { 0x820f9000, 0x4a3400, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_WTBLOFF) */ + { 0x820fa000, 0x4a4000, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_ETBF) */ + { 0x820fb000, 0x4a4200, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_LPON) */ + { 0x820fc000, 0x4a4600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_INT) */ + { 0x820fd000, 0x4a4800, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_MIB) */ + { 0x820c4000, 0x4a8000, 0x1000 }, /* WF_LMAC_TOP (WF_UWTBL ) */ + { 0x820b0000, 0x4ae000, 0x1000 }, /* [APB2] WFSYS_ON */ + { 0x80020000, 0x4b0000, 0x10000}, /* WF_TOP_MISC_OFF */ + { 0x81020000, 0x4c0000, 0x10000}, /* WF_TOP_MISC_ON */ + { 0x89000000, 0x4d0000, 0x1000 }, /* WF_MCU_CFG_ON */ + { 0x89010000, 0x4d1000, 0x1000 }, /* WF_MCU_CIRQ */ + { 0x89020000, 0x4d2000, 0x1000 }, /* WF_MCU_GPT */ + { 0x89030000, 0x4d3000, 0x1000 }, /* WF_MCU_WDT */ + { 0x80010000, 0x4d4000, 0x1000 }, /* WF_AXIDMA */ + { 0x0, 0x0, 0x0 }, /* imply end of search */ +}; static u32 mt7915_reg_map_l1(struct mt7915_dev *dev, u32 addr) { u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr); u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr); + u32 l1_remap; + + if (is_mt7986(&dev->mt76)) + return MT_CONN_INFRA_OFFSET(addr); - mt76_rmw_field(dev, MT_HIF_REMAP_L1, MT_HIF_REMAP_L1_MASK, base); + l1_remap = is_mt7915(&dev->mt76) ? + MT_HIF_REMAP_L1 : MT_HIF_REMAP_L1_MT7916; + + dev->bus_ops->rmw(&dev->mt76, l1_remap, + MT_HIF_REMAP_L1_MASK, + FIELD_PREP(MT_HIF_REMAP_L1_MASK, base)); /* use read to push write */ - mt76_rr(dev, MT_HIF_REMAP_L1); + dev->bus_ops->rr(&dev->mt76, l1_remap); return MT_HIF_REMAP_BASE_L1 + offset; } static u32 mt7915_reg_map_l2(struct mt7915_dev *dev, u32 addr) { - u32 offset = FIELD_GET(MT_HIF_REMAP_L2_OFFSET, addr); - u32 base = FIELD_GET(MT_HIF_REMAP_L2_BASE, addr); + u32 offset, base; - mt76_rmw_field(dev, MT_HIF_REMAP_L2, MT_HIF_REMAP_L2_MASK, base); - /* use read to push write */ - mt76_rr(dev, MT_HIF_REMAP_L2); + if (is_mt7915(&dev->mt76)) { + offset = FIELD_GET(MT_HIF_REMAP_L2_OFFSET, addr); + base = FIELD_GET(MT_HIF_REMAP_L2_BASE, addr); + + dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L2, + MT_HIF_REMAP_L2_MASK, + FIELD_PREP(MT_HIF_REMAP_L2_MASK, base)); - return MT_HIF_REMAP_BASE_L2 + offset; + /* use read to push write */ + dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L2); + } else { + u32 ofs = is_mt7986(&dev->mt76) ? 0x400000 : 0; + + offset = FIELD_GET(MT_HIF_REMAP_L2_OFFSET_MT7916, addr); + base = FIELD_GET(MT_HIF_REMAP_L2_BASE_MT7916, addr); + + dev->bus_ops->rmw(&dev->mt76, MT_HIF_REMAP_L2_MT7916 + ofs, + MT_HIF_REMAP_L2_MASK_MT7916, + FIELD_PREP(MT_HIF_REMAP_L2_MASK_MT7916, base)); + + /* use read to push write */ + dev->bus_ops->rr(&dev->mt76, MT_HIF_REMAP_L2_MT7916 + ofs); + + offset += (MT_HIF_REMAP_BASE_L2_MT7916 + ofs); + } + + return offset; } static u32 __mt7915_reg_addr(struct mt7915_dev *dev, u32 addr) { - static const struct { - u32 phys; - u32 mapped; - u32 size; - } fixed_map[] = { - { 0x00400000, 0x80000, 0x10000 }, /* WF_MCU_SYSRAM */ - { 0x00410000, 0x90000, 0x10000 }, /* WF_MCU_SYSRAM (configure regs) */ - { 0x40000000, 0x70000, 0x10000 }, /* WF_UMAC_SYSRAM */ - { 0x54000000, 0x02000, 0x1000 }, /* WFDMA PCIE0 MCU DMA0 */ - { 0x55000000, 0x03000, 0x1000 }, /* WFDMA PCIE0 MCU DMA1 */ - { 0x58000000, 0x06000, 0x1000 }, /* WFDMA PCIE1 MCU DMA0 (MEM_DMA) */ - { 0x59000000, 0x07000, 0x1000 }, /* WFDMA PCIE1 MCU DMA1 */ - { 0x7c000000, 0xf0000, 0x10000 }, /* CONN_INFRA */ - { 0x7c020000, 0xd0000, 0x10000 }, /* CONN_INFRA, WFDMA */ - { 0x80020000, 0xb0000, 0x10000 }, /* WF_TOP_MISC_OFF */ - { 0x81020000, 0xc0000, 0x10000 }, /* WF_TOP_MISC_ON */ - { 0x820c0000, 0x08000, 0x4000 }, /* WF_UMAC_TOP (PLE) */ - { 0x820c8000, 0x0c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */ - { 0x820cc000, 0x0e000, 0x2000 }, /* WF_UMAC_TOP (PP) */ - { 0x820ce000, 0x21c00, 0x0200 }, /* WF_LMAC_TOP (WF_SEC) */ - { 0x820cf000, 0x22000, 0x1000 }, /* WF_LMAC_TOP (WF_PF) */ - { 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */ - { 0x820e0000, 0x20000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_CFG) */ - { 0x820e1000, 0x20400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_TRB) */ - { 0x820e2000, 0x20800, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_AGG) */ - { 0x820e3000, 0x20c00, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_ARB) */ - { 0x820e4000, 0x21000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */ - { 0x820e5000, 0x21400, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_RMAC) */ - { 0x820e7000, 0x21e00, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_DMA) */ - { 0x820e9000, 0x23400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_WTBLOFF) */ - { 0x820ea000, 0x24000, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_ETBF) */ - { 0x820eb000, 0x24200, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_LPON) */ - { 0x820ec000, 0x24600, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_INT) */ - { 0x820ed000, 0x24800, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */ - { 0x820f0000, 0xa0000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_CFG) */ - { 0x820f1000, 0xa0600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_TRB) */ - { 0x820f2000, 0xa0800, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_AGG) */ - { 0x820f3000, 0xa0c00, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_ARB) */ - { 0x820f4000, 0xa1000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_TMAC) */ - { 0x820f5000, 0xa1400, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_RMAC) */ - { 0x820f7000, 0xa1e00, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_DMA) */ - { 0x820f9000, 0xa3400, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_WTBLOFF) */ - { 0x820fa000, 0xa4000, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_ETBF) */ - { 0x820fb000, 0xa4200, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_LPON) */ - { 0x820fc000, 0xa4600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_INT) */ - { 0x820fd000, 0xa4800, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_MIB) */ - }; int i; if (addr < 0x100000) return addr; - for (i = 0; i < ARRAY_SIZE(fixed_map); i++) { + if (!dev->reg.map) { + dev_err(dev->mt76.dev, "err: reg_map is null\n"); + return addr; + } + + for (i = 0; i < dev->reg.map_size; i++) { u32 ofs; - if (addr < fixed_map[i].phys) + if (addr < dev->reg.map[i].phys) continue; - ofs = addr - fixed_map[i].phys; - if (ofs > fixed_map[i].size) + ofs = addr - dev->reg.map[i].phys; + if (ofs > dev->reg.map[i].size) continue; - return fixed_map[i].mapped + ofs; + return dev->reg.map[i].maps + ofs; } - if ((addr >= 0x18000000 && addr < 0x18c00000) || - (addr >= 0x70000000 && addr < 0x78000000)) + if ((addr >= MT_INFRA_BASE && addr < MT_WFSYS0_PHY_START) || + (addr >= MT_WFSYS0_PHY_START && addr < MT_WFSYS1_PHY_START) || + (addr >= MT_WFSYS1_PHY_START && addr <= MT_WFSYS1_PHY_END)) + return mt7915_reg_map_l1(dev, addr); + + if (dev_is_pci(dev->mt76.dev) && + ((addr >= MT_CBTOP1_PHY_START && addr <= MT_CBTOP1_PHY_END) || + (addr >= MT_CBTOP2_PHY_START && addr <= MT_CBTOP2_PHY_END))) + return mt7915_reg_map_l1(dev, addr); + + /* CONN_INFRA: covert to phyiscal addr and use layer 1 remap */ + if (addr >= MT_INFRA_MCU_START && addr <= MT_INFRA_MCU_END) { + addr = addr - MT_INFRA_MCU_START + MT_INFRA_BASE; return mt7915_reg_map_l1(dev, addr); + } return mt7915_reg_map_l2(dev, addr); } @@ -125,7 +464,9 @@ static u32 mt7915_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) return dev->bus_ops->rmw(mdev, addr, mask, val); } -int mt7915_mmio_init(struct mt76_dev *mdev, void __iomem *mem_base, int irq) +static int mt7915_mmio_init(struct mt76_dev *mdev, + void __iomem *mem_base, + u32 device_id) { struct mt76_bus_ops *bus_ops; struct mt7915_dev *dev; @@ -133,6 +474,29 @@ int mt7915_mmio_init(struct mt76_dev *mdev, void __iomem *mem_base, int irq) dev = container_of(mdev, struct mt7915_dev, mt76); mt76_mmio_init(&dev->mt76, mem_base); + switch (device_id) { + case 0x7915: + dev->reg.reg_rev = mt7915_reg; + dev->reg.offs_rev = mt7915_offs; + dev->reg.map = mt7915_reg_map; + dev->reg.map_size = ARRAY_SIZE(mt7915_reg_map); + break; + case 0x7906: + dev->reg.reg_rev = mt7916_reg; + dev->reg.offs_rev = mt7916_offs; + dev->reg.map = mt7916_reg_map; + dev->reg.map_size = ARRAY_SIZE(mt7916_reg_map); + break; + case 0x7986: + dev->reg.reg_rev = mt7986_reg; + dev->reg.offs_rev = mt7916_offs; + dev->reg.map = mt7986_reg_map; + dev->reg.map_size = ARRAY_SIZE(mt7986_reg_map); + break; + default: + return -EINVAL; + } + dev->bus_ops = dev->mt76.bus; bus_ops = devm_kmemdup(dev->mt76.dev, dev->bus_ops, sizeof(*bus_ops), GFP_KERNEL); @@ -144,11 +508,210 @@ int mt7915_mmio_init(struct mt76_dev *mdev, void __iomem *mem_base, int irq) bus_ops->rmw = mt7915_rmw; dev->mt76.bus = bus_ops; - mdev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) | + mdev->rev = (device_id << 16) | (mt76_rr(dev, MT_HW_REV) & 0xff); dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev); + return 0; +} + +void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, + bool write_reg, + u32 clear, u32 set) +{ + struct mt76_dev *mdev = &dev->mt76; + unsigned long flags; + + spin_lock_irqsave(&mdev->mmio.irq_lock, flags); + + mdev->mmio.irqmask &= ~clear; + mdev->mmio.irqmask |= set; + + if (write_reg) { + mt76_wr(dev, MT_INT_MASK_CSR, mdev->mmio.irqmask); + mt76_wr(dev, MT_INT1_MASK_CSR, mdev->mmio.irqmask); + } + + spin_unlock_irqrestore(&mdev->mmio.irq_lock, flags); +} + +static void mt7915_rx_poll_complete(struct mt76_dev *mdev, + enum mt76_rxq_id q) +{ + struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); + + mt7915_irq_enable(dev, MT_INT_RX(q)); +} + +/* TODO: support 2/4/6/8 MSI-X vectors */ +static void mt7915_irq_tasklet(struct tasklet_struct *t) +{ + struct mt7915_dev *dev = from_tasklet(dev, t, irq_tasklet); + u32 intr, intr1, mask; + mt76_wr(dev, MT_INT_MASK_CSR, 0); + if (dev->hif2) + mt76_wr(dev, MT_INT1_MASK_CSR, 0); + + intr = mt76_rr(dev, MT_INT_SOURCE_CSR); + intr &= dev->mt76.mmio.irqmask; + mt76_wr(dev, MT_INT_SOURCE_CSR, intr); + + if (dev->hif2) { + intr1 = mt76_rr(dev, MT_INT1_SOURCE_CSR); + intr1 &= dev->mt76.mmio.irqmask; + mt76_wr(dev, MT_INT1_SOURCE_CSR, intr1); + + intr |= intr1; + } + + trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); + + mask = intr & MT_INT_RX_DONE_ALL; + if (intr & MT_INT_TX_DONE_MCU) + mask |= MT_INT_TX_DONE_MCU; + + mt7915_irq_disable(dev, mask); + + if (intr & MT_INT_TX_DONE_MCU) + napi_schedule(&dev->mt76.tx_napi); + + if (intr & MT_INT_RX(MT_RXQ_MAIN)) + napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]); + + if (intr & MT_INT_RX(MT_RXQ_EXT)) + napi_schedule(&dev->mt76.napi[MT_RXQ_EXT]); + + if (intr & MT_INT_RX(MT_RXQ_MCU)) + napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]); + + if (intr & MT_INT_RX(MT_RXQ_MCU_WA)) + napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]); + + if (!is_mt7915(&dev->mt76) && + (intr & MT_INT_RX(MT_RXQ_MAIN_WA))) + napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN_WA]); + + if (intr & MT_INT_RX(MT_RXQ_EXT_WA)) + napi_schedule(&dev->mt76.napi[MT_RXQ_EXT_WA]); + + if (intr & MT_INT_MCU_CMD) { + u32 val = mt76_rr(dev, MT_MCU_CMD); + + mt76_wr(dev, MT_MCU_CMD, val); + if (val & MT_MCU_CMD_ERROR_MASK) { + dev->reset_state = val; + ieee80211_queue_work(mt76_hw(dev), &dev->reset_work); + wake_up(&dev->reset_wait); + } + } +} + +irqreturn_t mt7915_irq_handler(int irq, void *dev_instance) +{ + struct mt7915_dev *dev = dev_instance; + + mt76_wr(dev, MT_INT_MASK_CSR, 0); + if (dev->hif2) + mt76_wr(dev, MT_INT1_MASK_CSR, 0); + + if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) + return IRQ_NONE; + + tasklet_schedule(&dev->irq_tasklet); + + return IRQ_HANDLED; +} + +struct mt7915_dev *mt7915_mmio_probe(struct device *pdev, + void __iomem *mem_base, u32 device_id) +{ + static const struct mt76_driver_ops drv_ops = { + /* txwi_size = txd size + txp size */ + .txwi_size = MT_TXD_SIZE + sizeof(struct mt7915_txp), + .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ, + .survey_flags = SURVEY_INFO_TIME_TX | + SURVEY_INFO_TIME_RX | + SURVEY_INFO_TIME_BSS_RX, + .token_size = MT7915_TOKEN_SIZE, + .tx_prepare_skb = mt7915_tx_prepare_skb, + .tx_complete_skb = mt7915_tx_complete_skb, + .rx_skb = mt7915_queue_rx_skb, + .rx_check = mt7915_rx_check, + .rx_poll_complete = mt7915_rx_poll_complete, + .sta_ps = mt7915_sta_ps, + .sta_add = mt7915_mac_sta_add, + .sta_remove = mt7915_mac_sta_remove, + .update_survey = mt7915_update_channel, + }; + struct ieee80211_ops *ops; + struct mt7915_dev *dev; + struct mt76_dev *mdev; + int ret; + + ops = devm_kmemdup(pdev, &mt7915_ops, sizeof(mt7915_ops), GFP_KERNEL); + if (!ops) + return ERR_PTR(-ENOMEM); + + mdev = mt76_alloc_device(pdev, sizeof(*dev), ops, &drv_ops); + if (!mdev) + return ERR_PTR(-ENOMEM); + + dev = container_of(mdev, struct mt7915_dev, mt76); + + ret = mt7915_mmio_init(mdev, mem_base, device_id); + if (ret) + goto error; + + tasklet_setup(&dev->irq_tasklet, mt7915_irq_tasklet); + + mt76_wr(dev, MT_INT_MASK_CSR, 0); + + return dev; + +error: + mt76_free_device(&dev->mt76); + + return ERR_PTR(ret); +} + +static int __init mt7915_init(void) +{ + int ret; + + ret = pci_register_driver(&mt7915_hif_driver); + if (ret) + return ret; + + ret = pci_register_driver(&mt7915_pci_driver); + if (ret) + goto error_pci; + + if (IS_ENABLED(CONFIG_MT7986_WMAC)) { + ret = platform_driver_register(&mt7986_wmac_driver); + if (ret) + goto error_wmac; + } return 0; + +error_wmac: + pci_unregister_driver(&mt7915_pci_driver); +error_pci: + pci_unregister_driver(&mt7915_hif_driver); + + return ret; +} + +static void __exit mt7915_exit(void) +{ + if (IS_ENABLED(CONFIG_MT7986_WMAC)) + platform_driver_unregister(&mt7986_wmac_driver); + + pci_unregister_driver(&mt7915_pci_driver); + pci_unregister_driver(&mt7915_hif_driver); } + +module_init(mt7915_init); +module_exit(mt7915_exit); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h b/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h index 42d887383e8d..6efa0a2e2345 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mt7915.h @@ -6,13 +6,14 @@ #include <linux/interrupt.h> #include <linux/ktime.h> -#include "../mt76.h" +#include "../mt76_connac.h" #include "regs.h" #define MT7915_MAX_INTERFACES 19 #define MT7915_MAX_WMM_SETS 4 #define MT7915_WTBL_SIZE 288 -#define MT7915_WTBL_RESERVED (MT7915_WTBL_SIZE - 1) +#define MT7916_WTBL_SIZE 544 +#define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1) #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \ MT7915_MAX_INTERFACES) @@ -30,10 +31,28 @@ #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin" #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin" +#define MT7916_FIRMWARE_WA "mediatek/mt7916_wa.bin" +#define MT7916_FIRMWARE_WM "mediatek/mt7916_wm.bin" +#define MT7916_ROM_PATCH "mediatek/mt7916_rom_patch.bin" + +#define MT7986_FIRMWARE_WA "mediatek/mt7986_wa.bin" +#define MT7986_FIRMWARE_WM "mediatek/mt7986_wm.bin" +#define MT7986_FIRMWARE_WM_MT7975 "mediatek/mt7986_wm_mt7975.bin" +#define MT7986_ROM_PATCH "mediatek/mt7986_rom_patch.bin" +#define MT7986_ROM_PATCH_MT7975 "mediatek/mt7986_rom_patch_mt7975.bin" + #define MT7915_EEPROM_DEFAULT "mediatek/mt7915_eeprom.bin" #define MT7915_EEPROM_DEFAULT_DBDC "mediatek/mt7915_eeprom_dbdc.bin" +#define MT7916_EEPROM_DEFAULT "mediatek/mt7916_eeprom.bin" +#define MT7986_EEPROM_MT7975_DEFAULT "mediatek/mt7986_eeprom_mt7975.bin" +#define MT7986_EEPROM_MT7975_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7975_dual.bin" +#define MT7986_EEPROM_MT7976_DEFAULT "mediatek/mt7986_eeprom_mt7976.bin" +#define MT7986_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7986_eeprom_mt7976_dbdc.bin" +#define MT7986_EEPROM_MT7976_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7976_dual.bin" #define MT7915_EEPROM_SIZE 3584 +#define MT7916_EEPROM_SIZE 4096 + #define MT7915_EEPROM_BLOCK_SIZE 16 #define MT7915_TOKEN_SIZE 8192 @@ -41,11 +60,13 @@ #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */ #define MT7915_THERMAL_THROTTLE_MAX 100 +#define MT7915_CDEV_THROTTLE_MAX 99 #define MT7915_SKU_RATE_NUM 161 #define MT7915_MAX_TWT_AGRT 16 #define MT7915_MAX_STA_TWT_AGRT 8 +#define MT7915_MAX_QUEUE (__MT_RXQ_MAX + __MT_MCUQ_MAX + 2) struct mt7915_vif; struct mt7915_sta; @@ -68,9 +89,13 @@ enum mt7915_rxq_id { MT7915_RXQ_MCU_WA_EXT, }; -struct mt7915_sta_key_conf { - s8 keyidx; - u8 key[16]; +enum mt7916_rxq_id { + MT7916_RXQ_MCU_WM = 0, + MT7916_RXQ_MCU_WA, + MT7916_RXQ_MCU_WA_MAIN, + MT7916_RXQ_MCU_WA_EXT, + MT7916_RXQ_BAND0, + MT7916_RXQ_BAND1, }; struct mt7915_twt_flow { @@ -104,7 +129,7 @@ struct mt7915_sta { struct mt76_sta_stats stats; - struct mt7915_sta_key_conf bip; + struct mt76_connac_sta_key_conf bip; struct { u8 flowid_mask; @@ -113,7 +138,9 @@ struct mt7915_sta { }; struct mt7915_vif_cap { - bool ldpc:1; + bool ht_ldpc:1; + bool vht_ldpc:1; + bool he_ldpc:1; bool vht_su_ebfer:1; bool vht_su_ebfee:1; bool vht_mu_ebfer:1; @@ -200,16 +227,18 @@ struct mt7915_phy { struct mt76_phy *mt76; struct mt7915_dev *dev; - struct ieee80211_sband_iftype_data iftype[2][NUM_NL80211_IFTYPES]; + struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; struct ieee80211_vif *monitor_vif; struct thermal_cooling_device *cdev; + u8 cdev_state; u8 throttle_state; u32 throttle_temp[2]; /* 0: critical high, 1: maximum */ u32 rxfilter; u64 omac_mask; + u8 band_idx; u16 noise; @@ -217,7 +246,6 @@ struct mt7915_phy { u8 slottime; u8 rdd_state; - int dfs_state; u32 rx_ampdu_ts; u32 ampdu_ref; @@ -247,12 +275,21 @@ struct mt7915_dev { }; struct mt7915_hif *hif2; + struct mt7915_reg_desc reg; + u8 q_id[MT7915_MAX_QUEUE]; + u32 q_int_mask[MT7915_MAX_QUEUE]; + u32 wfdma_mask; const struct mt76_bus_ops *bus_ops; struct tasklet_struct irq_tasklet; struct mt7915_phy phy; + /* monitor rx chain configured channel */ + struct cfg80211_chan_def rdd2_chandef; + struct mt7915_phy *rdd2_phy; + u16 chainmask; + u16 chainshift; u32 hif_idx; struct work_struct init_work; @@ -274,6 +311,10 @@ struct mt7915_dev { bool ibf; u8 fw_debug_wm; u8 fw_debug_wa; + u8 fw_debug_bin; + + struct dentry *debugfs_dir; + struct rchan *relay_fwlog; void *cal; @@ -281,6 +322,17 @@ struct mt7915_dev { u8 table_mask; u8 n_agrt; } twt; + + struct reset_control *rstc; + void __iomem *dcm; + void __iomem *sku; +}; + +enum { + WFDMA0 = 0x0, + WFDMA1, + WFDMA_EXT, + __MT_WFDMA_MAX, }; enum { @@ -300,6 +352,7 @@ enum { enum { MT_RX_SEL0, MT_RX_SEL1, + MT_RX_SEL2, /* monitor chain */ }; enum mt7915_rdd_cmd { @@ -345,21 +398,44 @@ mt7915_ext_phy(struct mt7915_dev *dev) return phy->priv; } -static inline u8 mt7915_lmac_mapping(struct mt7915_dev *dev, u8 ac) +static inline u32 mt7915_check_adie(struct mt7915_dev *dev, bool sku) { - /* LMAC uses the reverse order of mac80211 AC indexes */ - return 3 - ac; + u32 mask = sku ? MT_CONNINFRA_SKU_MASK : MT_ADIE_TYPE_MASK; + + if (!is_mt7986(&dev->mt76)) + return 0; + + return mt76_rr(dev, MT_CONNINFRA_SKU_DEC_ADDR) & mask; } extern const struct ieee80211_ops mt7915_ops; extern const struct mt76_testmode_ops mt7915_testmode_ops; +extern struct pci_driver mt7915_pci_driver; +extern struct pci_driver mt7915_hif_driver; +extern struct platform_driver mt7986_wmac_driver; + +#ifdef CONFIG_MT7986_WMAC +int mt7986_wmac_enable(struct mt7915_dev *dev); +void mt7986_wmac_disable(struct mt7915_dev *dev); +#else +static inline int mt7986_wmac_enable(struct mt7915_dev *dev) +{ + return 0; +} -u32 mt7915_reg_map(struct mt7915_dev *dev, u32 addr); +static inline void mt7986_wmac_disable(struct mt7915_dev *dev) +{ +} +#endif +struct mt7915_dev *mt7915_mmio_probe(struct device *pdev, + void __iomem *mem_base, u32 device_id); +irqreturn_t mt7915_irq_handler(int irq, void *dev_instance); u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif); int mt7915_register_device(struct mt7915_dev *dev); void mt7915_unregister_device(struct mt7915_dev *dev); int mt7915_eeprom_init(struct mt7915_dev *dev); -void mt7915_eeprom_parse_band_config(struct mt7915_phy *phy); +void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev, + struct mt7915_phy *phy); int mt7915_eeprom_get_target_power(struct mt7915_dev *dev, struct ieee80211_channel *chan, u8 chain_idx); @@ -378,18 +454,12 @@ int mt7915_mcu_add_bss_info(struct mt7915_phy *phy, struct ieee80211_vif *vif, int enable); int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif, struct ieee80211_sta *sta, bool enable); -int mt7915_mcu_sta_update_hdr_trans(struct mt7915_dev *dev, - struct ieee80211_vif *vif, - struct ieee80211_sta *sta); int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev, struct ieee80211_ampdu_params *params, bool add); int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev, struct ieee80211_ampdu_params *params, bool add); -int mt7915_mcu_add_key(struct mt7915_dev *dev, struct ieee80211_vif *vif, - struct mt7915_sta *msta, struct ieee80211_key_conf *key, - enum set_key_cmd cmd); int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif, struct cfg80211_he_bss_color *he_bss_color); int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif, @@ -417,8 +487,6 @@ int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode, u8 en); int mt7915_mcu_set_scs(struct mt7915_dev *dev, u8 band, bool enable); int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band); -int mt7915_mcu_set_rts_thresh(struct mt7915_phy *phy, u32 val); -int mt7915_mcu_set_pm(struct mt7915_dev *dev, int band, int enter); int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable); int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy); int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len); @@ -436,17 +504,22 @@ int mt7915_mcu_get_temperature(struct mt7915_phy *phy); int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state); int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct rate_info *rate); -int mt7915_mcu_rdd_cmd(struct mt7915_dev *dev, enum mt7915_rdd_cmd cmd, - u8 index, u8 rx_sel, u8 val); +int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy, + struct cfg80211_chan_def *chandef); int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3); int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl); int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level); void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb); void mt7915_mcu_exit(struct mt7915_dev *dev); -static inline bool is_mt7915(struct mt76_dev *dev) +static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev) +{ + return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE; +} + +static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev) { - return mt76_chip(dev) == 0x7915; + return is_mt7915(&dev->mt76) ? MT7915_EEPROM_SIZE : MT7916_EEPROM_SIZE; } void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg, @@ -487,7 +560,6 @@ void mt7915_mac_work(struct work_struct *work); void mt7915_mac_reset_work(struct work_struct *work); void mt7915_mac_sta_rc_work(struct work_struct *work); void mt7915_mac_update_stats(struct mt7915_phy *phy); -int mt7915_mmio_init(struct mt76_dev *mdev, void __iomem *mem_base, int irq); void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev, struct mt7915_sta *msta, u8 flowid); @@ -500,7 +572,7 @@ int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, struct mt76_tx_info *tx_info); void mt7915_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e); void mt7915_tx_token_put(struct mt7915_dev *dev); -int mt7915_init_tx_queues(struct mt7915_phy *phy, int idx, int n_desc); +int mt7915_init_tx_queues(struct mt7915_phy *phy, int idx, int n_desc, int ring_base); void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, struct sk_buff *skb); bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len); @@ -514,6 +586,8 @@ void mt7915_update_channel(struct mt76_phy *mphy); int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enable); int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy, void *ms); int mt7915_init_debugfs(struct mt7915_phy *phy); +void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len); +bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len); #ifdef CONFIG_MAC80211_DEBUGFS void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct dentry *dir); diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/pci.c b/drivers/net/wireless/mediatek/mt76/mt7915/pci.c index 8130ea43971f..6f819c41a4c4 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/pci.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/pci.c @@ -18,35 +18,17 @@ static u32 hif_idx; static const struct pci_device_id mt7915_pci_device_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7915) }, + { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7906) }, { }, }; static const struct pci_device_id mt7915_hif_device_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7916) }, + { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x790a) }, { }, }; -void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg, - u32 clear, u32 set) -{ - struct mt76_dev *mdev = &dev->mt76; - unsigned long flags; - - spin_lock_irqsave(&mdev->mmio.irq_lock, flags); - - mdev->mmio.irqmask &= ~clear; - mdev->mmio.irqmask |= set; - - if (write_reg) { - mt76_wr(dev, MT_INT_MASK_CSR, mdev->mmio.irqmask); - mt76_wr(dev, MT_INT1_MASK_CSR, mdev->mmio.irqmask); - } - - spin_unlock_irqrestore(&mdev->mmio.irq_lock, flags); -} - -static struct mt7915_hif * -mt7915_pci_get_hif2(struct mt7915_dev *dev) +static struct mt7915_hif *mt7915_pci_get_hif2(u32 idx) { struct mt7915_hif *hif; u32 val; @@ -56,7 +38,7 @@ mt7915_pci_get_hif2(struct mt7915_dev *dev) list_for_each_entry(hif, &hif_list, list) { val = readl(hif->regs + MT_PCIE_RECOG_ID); val &= MT_PCIE_RECOG_ID_MASK; - if (val != dev->hif_idx) + if (val != idx) continue; get_device(hif->dev); @@ -78,123 +60,17 @@ static void mt7915_put_hif2(struct mt7915_hif *hif) put_device(hif->dev); } -static void -mt7915_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q) -{ - struct mt7915_dev *dev = container_of(mdev, struct mt7915_dev, mt76); - static const u32 rx_irq_mask[] = { - [MT_RXQ_MAIN] = MT_INT_RX_DONE_DATA0, - [MT_RXQ_EXT] = MT_INT_RX_DONE_DATA1, - [MT_RXQ_MCU] = MT_INT_RX_DONE_WM, - [MT_RXQ_MCU_WA] = MT_INT_RX_DONE_WA, - [MT_RXQ_EXT_WA] = MT_INT_RX_DONE_WA_EXT, - }; - - mt7915_irq_enable(dev, rx_irq_mask[q]); -} - -/* TODO: support 2/4/6/8 MSI-X vectors */ -static void mt7915_irq_tasklet(struct tasklet_struct *t) +static struct mt7915_hif *mt7915_pci_init_hif2(struct pci_dev *pdev) { - struct mt7915_dev *dev = from_tasklet(dev, t, irq_tasklet); - u32 intr, intr1, mask; - - mt76_wr(dev, MT_INT_MASK_CSR, 0); - if (dev->hif2) - mt76_wr(dev, MT_INT1_MASK_CSR, 0); - - intr = mt76_rr(dev, MT_INT_SOURCE_CSR); - intr &= dev->mt76.mmio.irqmask; - mt76_wr(dev, MT_INT_SOURCE_CSR, intr); - - if (dev->hif2) { - intr1 = mt76_rr(dev, MT_INT1_SOURCE_CSR); - intr1 &= dev->mt76.mmio.irqmask; - mt76_wr(dev, MT_INT1_SOURCE_CSR, intr1); - - intr |= intr1; - } - - trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); - - mask = intr & MT_INT_RX_DONE_ALL; - if (intr & MT_INT_TX_DONE_MCU) - mask |= MT_INT_TX_DONE_MCU; + hif_idx++; + if (!pci_get_device(PCI_VENDOR_ID_MEDIATEK, 0x7916, NULL) && + !pci_get_device(PCI_VENDOR_ID_MEDIATEK, 0x790a, NULL)) + return NULL; - mt7915_irq_disable(dev, mask); + writel(hif_idx | MT_PCIE_RECOG_ID_SEM, + pcim_iomap_table(pdev)[0] + MT_PCIE_RECOG_ID); - if (intr & MT_INT_TX_DONE_MCU) - napi_schedule(&dev->mt76.tx_napi); - - if (intr & MT_INT_RX_DONE_DATA0) - napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]); - - if (intr & MT_INT_RX_DONE_DATA1) - napi_schedule(&dev->mt76.napi[MT_RXQ_EXT]); - - if (intr & MT_INT_RX_DONE_WM) - napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]); - - if (intr & MT_INT_RX_DONE_WA) - napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]); - - if (intr & MT_INT_RX_DONE_WA_EXT) - napi_schedule(&dev->mt76.napi[MT_RXQ_EXT_WA]); - - if (intr & MT_INT_MCU_CMD) { - u32 val = mt76_rr(dev, MT_MCU_CMD); - - mt76_wr(dev, MT_MCU_CMD, val); - if (val & MT_MCU_CMD_ERROR_MASK) { - dev->reset_state = val; - ieee80211_queue_work(mt76_hw(dev), &dev->reset_work); - wake_up(&dev->reset_wait); - } - } -} - -static irqreturn_t mt7915_irq_handler(int irq, void *dev_instance) -{ - struct mt7915_dev *dev = dev_instance; - - mt76_wr(dev, MT_INT_MASK_CSR, 0); - if (dev->hif2) - mt76_wr(dev, MT_INT1_MASK_CSR, 0); - - if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) - return IRQ_NONE; - - tasklet_schedule(&dev->irq_tasklet); - - return IRQ_HANDLED; -} - -static void mt7915_pci_init_hif2(struct mt7915_dev *dev) -{ - struct mt7915_hif *hif; - - dev->hif_idx = ++hif_idx; - if (!pci_get_device(PCI_VENDOR_ID_MEDIATEK, 0x7916, NULL)) - return; - - mt76_wr(dev, MT_PCIE_RECOG_ID, dev->hif_idx | MT_PCIE_RECOG_ID_SEM); - - hif = mt7915_pci_get_hif2(dev); - if (!hif) - return; - - dev->hif2 = hif; - - mt76_wr(dev, MT_INT1_MASK_CSR, 0); - - if (devm_request_irq(dev->mt76.dev, hif->irq, mt7915_irq_handler, - IRQF_SHARED, KBUILD_MODNAME "-hif", dev)) { - mt7915_put_hif2(hif); - hif = NULL; - } - - /* master switch of PCIe tnterrupt enable */ - mt76_wr(dev, MT_PCIE1_MAC_INT_ENABLE, 0xff); + return mt7915_pci_get_hif2(hif_idx); } static int mt7915_pci_hif2_probe(struct pci_dev *pdev) @@ -219,26 +95,10 @@ static int mt7915_pci_hif2_probe(struct pci_dev *pdev) static int mt7915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { - static const struct mt76_driver_ops drv_ops = { - /* txwi_size = txd size + txp size */ - .txwi_size = MT_TXD_SIZE + sizeof(struct mt7915_txp), - .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ, - .survey_flags = SURVEY_INFO_TIME_TX | - SURVEY_INFO_TIME_RX | - SURVEY_INFO_TIME_BSS_RX, - .token_size = MT7915_TOKEN_SIZE, - .tx_prepare_skb = mt7915_tx_prepare_skb, - .tx_complete_skb = mt7915_tx_complete_skb, - .rx_skb = mt7915_queue_rx_skb, - .rx_check = mt7915_rx_check, - .rx_poll_complete = mt7915_rx_poll_complete, - .sta_ps = mt7915_sta_ps, - .sta_add = mt7915_mac_sta_add, - .sta_remove = mt7915_mac_sta_remove, - .update_survey = mt7915_update_channel, - }; struct mt7915_dev *dev; struct mt76_dev *mdev; + struct mt7915_hif *hif2; + int irq; int ret; ret = pcim_enable_device(pdev); @@ -257,48 +117,65 @@ static int mt7915_pci_probe(struct pci_dev *pdev, mt76_pci_disable_aspm(pdev); - if (id->device == 0x7916) + if (id->device == 0x7916 || id->device == 0x790a) return mt7915_pci_hif2_probe(pdev); - mdev = mt76_alloc_device(&pdev->dev, sizeof(*dev), &mt7915_ops, - &drv_ops); - if (!mdev) - return -ENOMEM; + dev = mt7915_mmio_probe(&pdev->dev, pcim_iomap_table(pdev)[0], + id->device); + if (IS_ERR(dev)) + return PTR_ERR(dev); - dev = container_of(mdev, struct mt7915_dev, mt76); + mdev = &dev->mt76; + hif2 = mt7915_pci_init_hif2(pdev); ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); if (ret < 0) - goto free; + goto free_device; - ret = mt7915_mmio_init(mdev, pcim_iomap_table(pdev)[0], pdev->irq); + irq = pdev->irq; + ret = devm_request_irq(mdev->dev, irq, mt7915_irq_handler, + IRQF_SHARED, KBUILD_MODNAME, dev); if (ret) - goto error; - - tasklet_setup(&dev->irq_tasklet, mt7915_irq_tasklet); + goto free_irq_vector; mt76_wr(dev, MT_INT_MASK_CSR, 0); /* master switch of PCIe tnterrupt enable */ mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff); - ret = devm_request_irq(mdev->dev, pdev->irq, mt7915_irq_handler, - IRQF_SHARED, KBUILD_MODNAME, dev); - if (ret) - goto error; + if (hif2) { + dev->hif2 = hif2; - mt7915_pci_init_hif2(dev); + mt76_wr(dev, MT_INT1_MASK_CSR, 0); + /* master switch of PCIe tnterrupt enable */ + if (is_mt7915(mdev)) + mt76_wr(dev, MT_PCIE1_MAC_INT_ENABLE, 0xff); + else + mt76_wr(dev, MT_PCIE1_MAC_INT_ENABLE_MT7916, 0xff); + + ret = devm_request_irq(mdev->dev, dev->hif2->irq, + mt7915_irq_handler, IRQF_SHARED, + KBUILD_MODNAME "-hif", dev); + if (ret) + goto free_hif2; + } ret = mt7915_register_device(dev); if (ret) - goto free_irq; + goto free_hif2_irq; return 0; -free_irq: - devm_free_irq(mdev->dev, pdev->irq, dev); -error: + +free_hif2_irq: + if (dev->hif2) + devm_free_irq(mdev->dev, dev->hif2->irq, dev); +free_hif2: + if (dev->hif2) + put_device(dev->hif2->dev); + devm_free_irq(mdev->dev, irq, dev); +free_irq_vector: pci_free_irq_vectors(pdev); -free: +free_device: mt76_free_device(&dev->mt76); return ret; @@ -322,47 +199,25 @@ static void mt7915_pci_remove(struct pci_dev *pdev) mt7915_unregister_device(dev); } -static struct pci_driver mt7915_hif_driver = { +struct pci_driver mt7915_hif_driver = { .name = KBUILD_MODNAME "_hif", .id_table = mt7915_hif_device_table, .probe = mt7915_pci_probe, .remove = mt7915_hif_remove, }; -static struct pci_driver mt7915_pci_driver = { +struct pci_driver mt7915_pci_driver = { .name = KBUILD_MODNAME, .id_table = mt7915_pci_device_table, .probe = mt7915_pci_probe, .remove = mt7915_pci_remove, }; -static int __init mt7915_init(void) -{ - int ret; - - ret = pci_register_driver(&mt7915_hif_driver); - if (ret) - return ret; - - ret = pci_register_driver(&mt7915_pci_driver); - if (ret) - pci_unregister_driver(&mt7915_hif_driver); - - return ret; -} - -static void __exit mt7915_exit(void) -{ - pci_unregister_driver(&mt7915_pci_driver); - pci_unregister_driver(&mt7915_hif_driver); -} - -module_init(mt7915_init); -module_exit(mt7915_exit); - MODULE_DEVICE_TABLE(pci, mt7915_pci_device_table); MODULE_DEVICE_TABLE(pci, mt7915_hif_device_table); MODULE_FIRMWARE(MT7915_FIRMWARE_WA); MODULE_FIRMWARE(MT7915_FIRMWARE_WM); MODULE_FIRMWARE(MT7915_ROM_PATCH); -MODULE_LICENSE("Dual BSD/GPL"); +MODULE_FIRMWARE(MT7916_FIRMWARE_WA); +MODULE_FIRMWARE(MT7916_FIRMWARE_WM); +MODULE_FIRMWARE(MT7916_ROM_PATCH); diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/regs.h b/drivers/net/wireless/mediatek/mt76/mt7915/regs.h index 59693535b098..e5f93c40591c 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/regs.h @@ -4,41 +4,152 @@ #ifndef __MT7915_REGS_H #define __MT7915_REGS_H +struct __map { + u32 phys; + u32 maps; + u32 size; +}; + +/* used to differentiate between generations */ +struct mt7915_reg_desc { + const u32 *reg_rev; + const u32 *offs_rev; + const struct __map *map; + u32 map_size; +}; + +enum reg_rev { + INT_SOURCE_CSR, + INT_MASK_CSR, + INT1_SOURCE_CSR, + INT1_MASK_CSR, + INT_MCU_CMD_SOURCE, + INT_MCU_CMD_EVENT, + WFDMA0_ADDR, + WFDMA0_PCIE1_ADDR, + WFDMA_EXT_CSR_ADDR, + CBTOP1_PHY_END, + INFRA_MCU_ADDR_END, + __MT_REG_MAX, +}; + +enum offs_rev { + TMAC_CDTR, + TMAC_ODTR, + TMAC_ATCR, + TMAC_TRCR0, + TMAC_ICR0, + TMAC_ICR1, + TMAC_CTCR0, + TMAC_TFCR0, + MDP_BNRCFR0, + MDP_BNRCFR1, + ARB_DRNGR0, + ARB_SCR, + RMAC_MIB_AIRTIME14, + AGG_AWSCR0, + AGG_PCR0, + AGG_ACR0, + AGG_MRCR, + AGG_ATCR1, + AGG_ATCR3, + LPON_UTTR0, + LPON_UTTR1, + LPON_FRCR, + MIB_SDR3, + MIB_SDR4, + MIB_SDR5, + MIB_SDR7, + MIB_SDR8, + MIB_SDR9, + MIB_SDR10, + MIB_SDR11, + MIB_SDR12, + MIB_SDR13, + MIB_SDR14, + MIB_SDR15, + MIB_SDR16, + MIB_SDR17, + MIB_SDR18, + MIB_SDR19, + MIB_SDR20, + MIB_SDR21, + MIB_SDR22, + MIB_SDR23, + MIB_SDR24, + MIB_SDR25, + MIB_SDR27, + MIB_SDR28, + MIB_SDR29, + MIB_SDRVEC, + MIB_SDR31, + MIB_SDR32, + MIB_SDRMUBF, + MIB_DR8, + MIB_DR9, + MIB_DR11, + MIB_MB_SDR0, + MIB_MB_SDR1, + TX_AGG_CNT, + TX_AGG_CNT2, + MIB_ARNG, + WTBLON_TOP_WDUCR, + WTBL_UPDATE, + PLE_FL_Q_EMPTY, + PLE_FL_Q_CTRL, + PLE_AC_QEMPTY, + PLE_FREEPG_CNT, + PLE_FREEPG_HEAD_TAIL, + PLE_PG_HIF_GROUP, + PLE_HIF_PG_INFO, + AC_OFFSET, + ETBF_PAR_RPT0, + __MT_OFFS_MAX, +}; + +#define __REG(id) (dev->reg.reg_rev[(id)]) +#define __OFFS(id) (dev->reg.offs_rev[(id)]) + /* MCU WFDMA0 */ #define MT_MCU_WFDMA0_BASE 0x2000 #define MT_MCU_WFDMA0(ofs) (MT_MCU_WFDMA0_BASE + (ofs)) + #define MT_MCU_WFDMA0_DUMMY_CR MT_MCU_WFDMA0(0x120) /* MCU WFDMA1 */ #define MT_MCU_WFDMA1_BASE 0x3000 #define MT_MCU_WFDMA1(ofs) (MT_MCU_WFDMA1_BASE + (ofs)) -#define MT_MCU_INT_EVENT MT_MCU_WFDMA1(0x108) +#define MT_MCU_INT_EVENT __REG(INT_MCU_CMD_EVENT) #define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0) #define MT_MCU_INT_EVENT_DMA_INIT BIT(1) #define MT_MCU_INT_EVENT_SER_TRIGGER BIT(2) #define MT_MCU_INT_EVENT_RESET_DONE BIT(3) -#define MT_PLE_BASE 0x8000 +/* PLE */ +#define MT_PLE_BASE 0x820c0000 #define MT_PLE(ofs) (MT_PLE_BASE + (ofs)) -#define MT_FL_Q_EMPTY 0x0b0 -#define MT_FL_Q0_CTRL 0x1b0 -#define MT_FL_Q2_CTRL 0x1b8 -#define MT_FL_Q3_CTRL 0x1bc - -#define MT_PLE_FREEPG_CNT MT_PLE(0x100) -#define MT_PLE_FREEPG_HEAD_TAIL MT_PLE(0x104) -#define MT_PLE_PG_HIF_GROUP MT_PLE(0x110) -#define MT_PLE_HIF_PG_INFO MT_PLE(0x114) -#define MT_PLE_AC_QEMPTY(ac, n) MT_PLE(0x500 + 0x40 * (ac) + \ - ((n) << 2)) +#define MT_FL_Q_EMPTY MT_PLE(__OFFS(PLE_FL_Q_EMPTY)) +#define MT_FL_Q0_CTRL MT_PLE(__OFFS(PLE_FL_Q_CTRL)) +#define MT_FL_Q2_CTRL MT_PLE(__OFFS(PLE_FL_Q_CTRL) + 0x8) +#define MT_FL_Q3_CTRL MT_PLE(__OFFS(PLE_FL_Q_CTRL) + 0xc) + +#define MT_PLE_FREEPG_CNT MT_PLE(__OFFS(PLE_FREEPG_CNT)) +#define MT_PLE_FREEPG_HEAD_TAIL MT_PLE(__OFFS(PLE_FREEPG_HEAD_TAIL)) +#define MT_PLE_PG_HIF_GROUP MT_PLE(__OFFS(PLE_PG_HIF_GROUP)) +#define MT_PLE_HIF_PG_INFO MT_PLE(__OFFS(PLE_HIF_PG_INFO)) + +#define MT_PLE_AC_QEMPTY(ac, n) MT_PLE(__OFFS(PLE_AC_QEMPTY) + \ + __OFFS(AC_OFFSET) * \ + (ac) + ((n) << 2)) #define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2)) -#define MT_PSE_BASE 0xc000 +#define MT_PSE_BASE 0x820c8000 #define MT_PSE(ofs) (MT_PSE_BASE + (ofs)) -#define MT_MDP_BASE 0xf000 +/* WF MDP TOP */ +#define MT_MDP_BASE 0x820cd000 #define MT_MDP(ofs) (MT_MDP_BASE + (ofs)) #define MT_MDP_DCR0 MT_MDP(0x000) @@ -47,73 +158,76 @@ #define MT_MDP_DCR1 MT_MDP(0x004) #define MT_MDP_DCR1_MAX_RX_LEN GENMASK(15, 3) -#define MT_MDP_BNRCFR0(_band) MT_MDP(0x070 + ((_band) << 8)) +#define MT_MDP_BNRCFR0(_band) MT_MDP(__OFFS(MDP_BNRCFR0) + \ + ((_band) << 8)) #define MT_MDP_RCFR0_MCU_RX_MGMT GENMASK(5, 4) #define MT_MDP_RCFR0_MCU_RX_CTL_NON_BAR GENMASK(7, 6) #define MT_MDP_RCFR0_MCU_RX_CTL_BAR GENMASK(9, 8) -#define MT_MDP_BNRCFR1(_band) MT_MDP(0x074 + ((_band) << 8)) +#define MT_MDP_BNRCFR1(_band) MT_MDP(__OFFS(MDP_BNRCFR1) + \ + ((_band) << 8)) #define MT_MDP_RCFR1_MCU_RX_BYPASS GENMASK(23, 22) #define MT_MDP_RCFR1_RX_DROPPED_UCAST GENMASK(28, 27) #define MT_MDP_RCFR1_RX_DROPPED_MCAST GENMASK(30, 29) #define MT_MDP_TO_HIF 0 #define MT_MDP_TO_WM 1 -/* TMAC: band 0(0x21000), band 1(0xa1000) */ -#define MT_WF_TMAC_BASE(_band) ((_band) ? 0xa1000 : 0x21000) +/* TMAC: band 0(0x820e4000), band 1(0x820f4000) */ +#define MT_WF_TMAC_BASE(_band) ((_band) ? 0x820f4000 : 0x820e4000) #define MT_WF_TMAC(_band, ofs) (MT_WF_TMAC_BASE(_band) + (ofs)) #define MT_TMAC_TCR0(_band) MT_WF_TMAC(_band, 0) #define MT_TMAC_TCR0_TX_BLINK GENMASK(7, 6) #define MT_TMAC_TCR0_TBTT_STOP_CTRL BIT(25) -#define MT_TMAC_CDTR(_band) MT_WF_TMAC(_band, 0x090) -#define MT_TMAC_ODTR(_band) MT_WF_TMAC(_band, 0x094) +#define MT_TMAC_CDTR(_band) MT_WF_TMAC(_band, __OFFS(TMAC_CDTR)) + #define MT_TMAC_ODTR(_band) MT_WF_TMAC(_band, __OFFS(TMAC_ODTR)) #define MT_TIMEOUT_VAL_PLCP GENMASK(15, 0) #define MT_TIMEOUT_VAL_CCA GENMASK(31, 16) -#define MT_TMAC_ATCR(_band) MT_WF_TMAC(_band, 0x098) +#define MT_TMAC_ATCR(_band) MT_WF_TMAC(_band, __OFFS(TMAC_ATCR)) #define MT_TMAC_ATCR_TXV_TOUT GENMASK(7, 0) -#define MT_TMAC_TRCR0(_band) MT_WF_TMAC(_band, 0x09c) +#define MT_TMAC_TRCR0(_band) MT_WF_TMAC(_band, __OFFS(TMAC_TRCR0)) #define MT_TMAC_TRCR0_TR2T_CHK GENMASK(8, 0) #define MT_TMAC_TRCR0_I2T_CHK GENMASK(24, 16) -#define MT_TMAC_ICR0(_band) MT_WF_TMAC(_band, 0x0a4) -#define MT_IFS_EIFS_OFDM GENMASK(8, 0) +#define MT_TMAC_ICR0(_band) MT_WF_TMAC(_band, __OFFS(TMAC_ICR0)) +#define MT_IFS_EIFS_OFDM GENMASK(8, 0) #define MT_IFS_RIFS GENMASK(14, 10) #define MT_IFS_SIFS GENMASK(22, 16) #define MT_IFS_SLOT GENMASK(30, 24) -#define MT_TMAC_ICR1(_band) MT_WF_TMAC(_band, 0x0b4) +#define MT_TMAC_ICR1(_band) MT_WF_TMAC(_band, __OFFS(TMAC_ICR1)) #define MT_IFS_EIFS_CCK GENMASK(8, 0) -#define MT_TMAC_CTCR0(_band) MT_WF_TMAC(_band, 0x0f4) +#define MT_TMAC_CTCR0(_band) MT_WF_TMAC(_band, __OFFS(TMAC_CTCR0)) #define MT_TMAC_CTCR0_INS_DDLMT_REFTIME GENMASK(5, 0) #define MT_TMAC_CTCR0_INS_DDLMT_EN BIT(17) #define MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN BIT(18) -#define MT_TMAC_TFCR0(_band) MT_WF_TMAC(_band, 0x1e0) +#define MT_TMAC_TFCR0(_band) MT_WF_TMAC(_band, __OFFS(TMAC_TFCR0)) -#define MT_WF_DMA_BASE(_band) ((_band) ? 0xa1e00 : 0x21e00) +/* WF DMA TOP: band 0(0x820e7000),band 1(0x820f7000) */ +#define MT_WF_DMA_BASE(_band) ((_band) ? 0x820f7000 : 0x820e7000) #define MT_WF_DMA(_band, ofs) (MT_WF_DMA_BASE(_band) + (ofs)) #define MT_DMA_DCR0(_band) MT_WF_DMA(_band, 0x000) #define MT_DMA_DCR0_MAX_RX_LEN GENMASK(15, 3) #define MT_DMA_DCR0_RXD_G5_EN BIT(23) -/* ETBF: band 0(0x24000), band 1(0xa4000) */ -#define MT_WF_ETBF_BASE(_band) ((_band) ? 0xa4000 : 0x24000) +/* ETBF: band 0(0x820ea000), band 1(0x820fa000) */ +#define MT_WF_ETBF_BASE(_band) ((_band) ? 0x820fa000 : 0x820ea000) #define MT_WF_ETBF(_band, ofs) (MT_WF_ETBF_BASE(_band) + (ofs)) #define MT_ETBF_TX_NDP_BFRP(_band) MT_WF_ETBF(_band, 0x040) #define MT_ETBF_TX_FB_CPL GENMASK(31, 16) #define MT_ETBF_TX_FB_TRI GENMASK(15, 0) -#define MT_ETBF_RX_FB_CONT(_band) MT_WF_ETBF(_band, 0x068) -#define MT_ETBF_RX_FB_BW GENMASK(7, 6) -#define MT_ETBF_RX_FB_NC GENMASK(5, 3) -#define MT_ETBF_RX_FB_NR GENMASK(2, 0) +#define MT_ETBF_PAR_RPT0(_band) MT_WF_ETBF(_band, __OFFS(ETBF_PAR_RPT0)) +#define MT_ETBF_PAR_RPT0_FB_BW GENMASK(7, 6) +#define MT_ETBF_PAR_RPT0_FB_NC GENMASK(5, 3) +#define MT_ETBF_PAR_RPT0_FB_NR GENMASK(2, 0) #define MT_ETBF_TX_APP_CNT(_band) MT_WF_ETBF(_band, 0x0f0) #define MT_ETBF_TX_IBF_CNT GENMASK(31, 16) @@ -125,174 +239,209 @@ #define MT_ETBF_RX_FB_VHT GENMASK(15, 8) #define MT_ETBF_RX_FB_HT GENMASK(7, 0) -/* LPON: band 0(0x24200), band 1(0xa4200) */ -#define MT_WF_LPON_BASE(_band) ((_band) ? 0xa4200 : 0x24200) +/* LPON: band 0(0x820eb000), band 1(0x820fb000) */ +#define MT_WF_LPON_BASE(_band) ((_band) ? 0x820fb000 : 0x820eb000) #define MT_WF_LPON(_band, ofs) (MT_WF_LPON_BASE(_band) + (ofs)) -#define MT_LPON_UTTR0(_band) MT_WF_LPON(_band, 0x080) -#define MT_LPON_UTTR1(_band) MT_WF_LPON(_band, 0x084) +#define MT_LPON_UTTR0(_band) MT_WF_LPON(_band, __OFFS(LPON_UTTR0)) +#define MT_LPON_UTTR1(_band) MT_WF_LPON(_band, __OFFS(LPON_UTTR1)) +#define MT_LPON_FRCR(_band) MT_WF_LPON(_band, __OFFS(LPON_FRCR)) -#define MT_LPON_TCR(_band, n) MT_WF_LPON(_band, 0x0a8 + (n) * 4) +#define MT_LPON_TCR(_band, n) MT_WF_LPON(_band, 0x0a8 + \ + (((n) * 4) << 1)) +#define MT_LPON_TCR_MT7916(_band, n) MT_WF_LPON(_band, 0x0a8 + \ + (((n) * 4) << 4)) #define MT_LPON_TCR_SW_MODE GENMASK(1, 0) #define MT_LPON_TCR_SW_WRITE BIT(0) #define MT_LPON_TCR_SW_ADJUST BIT(1) #define MT_LPON_TCR_SW_READ GENMASK(1, 0) -/* MIB: band 0(0x24800), band 1(0xa4800) */ +/* MIB: band 0(0x820ed000), band 1(0x820fd000) */ /* These counters are (mostly?) clear-on-read. So, some should not * be read at all in case firmware is already reading them. These * are commented with 'DNR' below. The DNR stats will be read by querying * the firmware API for the appropriate message. For counters the driver * does read, the driver should accumulate the counters. */ -#define MT_WF_MIB_BASE(_band) ((_band) ? 0xa4800 : 0x24800) +#define MT_WF_MIB_BASE(_band) ((_band) ? 0x820fd000 : 0x820ed000) #define MT_WF_MIB(_band, ofs) (MT_WF_MIB_BASE(_band) + (ofs)) #define MT_MIB_SDR0(_band) MT_WF_MIB(_band, 0x010) #define MT_MIB_SDR0_BERACON_TX_CNT_MASK GENMASK(15, 0) -#define MT_MIB_SDR3(_band) MT_WF_MIB(_band, 0x014) +#define MT_MIB_SDR3(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR3)) #define MT_MIB_SDR3_FCS_ERR_MASK GENMASK(15, 0) +#define MT_MIB_SDR3_FCS_ERR_MASK_MT7916 GENMASK(31, 16) -#define MT_MIB_SDR4(_band) MT_WF_MIB(_band, 0x018) +#define MT_MIB_SDR4(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR4)) #define MT_MIB_SDR4_RX_FIFO_FULL_MASK GENMASK(15, 0) /* rx mpdu counter, full 32 bits */ -#define MT_MIB_SDR5(_band) MT_WF_MIB(_band, 0x01c) +#define MT_MIB_SDR5(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR5)) #define MT_MIB_SDR6(_band) MT_WF_MIB(_band, 0x020) #define MT_MIB_SDR6_CHANNEL_IDL_CNT_MASK GENMASK(15, 0) -#define MT_MIB_SDR7(_band) MT_WF_MIB(_band, 0x024) +#define MT_MIB_SDR7(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR7)) #define MT_MIB_SDR7_RX_VECTOR_MISMATCH_CNT_MASK GENMASK(15, 0) -#define MT_MIB_SDR8(_band) MT_WF_MIB(_band, 0x028) +#define MT_MIB_SDR8(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR8)) #define MT_MIB_SDR8_RX_DELIMITER_FAIL_CNT_MASK GENMASK(15, 0) /* aka CCA_NAV_TX_TIME */ -#define MT_MIB_SDR9_DNR(_band) MT_WF_MIB(_band, 0x02c) -#define MT_MIB_SDR9_CCA_BUSY_TIME_MASK GENMASK(23, 0) +#define MT_MIB_SDR9_DNR(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR9)) +#define MT_MIB_SDR9_CCA_BUSY_TIME_MASK GENMASK(23, 0) -#define MT_MIB_SDR10_DNR(_band) MT_WF_MIB(_band, 0x030) -#define MT_MIB_SDR10_MRDY_COUNT_MASK GENMASK(25, 0) +#define MT_MIB_SDR10_DNR(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR10)) +#define MT_MIB_SDR10_MRDY_COUNT_MASK GENMASK(25, 0) +#define MT_MIB_SDR10_MRDY_COUNT_MASK_MT7916 GENMASK(31, 0) -#define MT_MIB_SDR11(_band) MT_WF_MIB(_band, 0x034) +#define MT_MIB_SDR11(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR11)) #define MT_MIB_SDR11_RX_LEN_MISMATCH_CNT_MASK GENMASK(15, 0) /* tx ampdu cnt, full 32 bits */ -#define MT_MIB_SDR12(_band) MT_WF_MIB(_band, 0x038) +#define MT_MIB_SDR12(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR12)) -#define MT_MIB_SDR13(_band) MT_WF_MIB(_band, 0x03c) +#define MT_MIB_SDR13(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR13)) #define MT_MIB_SDR13_TX_STOP_Q_EMPTY_CNT_MASK GENMASK(15, 0) /* counts all mpdus in ampdu, regardless of success */ -#define MT_MIB_SDR14(_band) MT_WF_MIB(_band, 0x040) +#define MT_MIB_SDR14(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR14)) #define MT_MIB_SDR14_TX_MPDU_ATTEMPTS_CNT_MASK GENMASK(23, 0) +#define MT_MIB_SDR14_TX_MPDU_ATTEMPTS_CNT_MASK_MT7916 GENMASK(31, 0) /* counts all successfully tx'd mpdus in ampdu */ -#define MT_MIB_SDR15(_band) MT_WF_MIB(_band, 0x044) +#define MT_MIB_SDR15(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR15)) #define MT_MIB_SDR15_TX_MPDU_SUCCESS_CNT_MASK GENMASK(23, 0) +#define MT_MIB_SDR15_TX_MPDU_SUCCESS_CNT_MASK_MT7916 GENMASK(31, 0) /* in units of 'us' */ -#define MT_MIB_SDR16_DNR(_band) MT_WF_MIB(_band, 0x048) +#define MT_MIB_SDR16_DNR(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR16)) #define MT_MIB_SDR16_PRIMARY_CCA_BUSY_TIME_MASK GENMASK(23, 0) -#define MT_MIB_SDR17_DNR(_band) MT_WF_MIB(_band, 0x04c) +#define MT_MIB_SDR17_DNR(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR17)) #define MT_MIB_SDR17_SECONDARY_CCA_BUSY_TIME_MASK GENMASK(23, 0) -#define MT_MIB_SDR18(_band) MT_WF_MIB(_band, 0x050) +#define MT_MIB_SDR18(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR18)) #define MT_MIB_SDR18_PRIMARY_ENERGY_DETECT_TIME_MASK GENMASK(23, 0) /* units are us */ -#define MT_MIB_SDR19_DNR(_band) MT_WF_MIB(_band, 0x054) +#define MT_MIB_SDR19_DNR(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR19)) #define MT_MIB_SDR19_CCK_MDRDY_TIME_MASK GENMASK(23, 0) -#define MT_MIB_SDR20_DNR(_band) MT_WF_MIB(_band, 0x058) +#define MT_MIB_SDR20_DNR(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR20)) #define MT_MIB_SDR20_OFDM_VHT_MDRDY_TIME_MASK GENMASK(23, 0) -#define MT_MIB_SDR21_DNR(_band) MT_WF_MIB(_band, 0x05c) +#define MT_MIB_SDR21_DNR(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR21)) #define MT_MIB_SDR20_GREEN_MDRDY_TIME_MASK GENMASK(23, 0) /* rx ampdu count, 32-bit */ -#define MT_MIB_SDR22(_band) MT_WF_MIB(_band, 0x060) +#define MT_MIB_SDR22(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR22)) /* rx ampdu bytes count, 32-bit */ -#define MT_MIB_SDR23(_band) MT_WF_MIB(_band, 0x064) +#define MT_MIB_SDR23(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR23)) /* rx ampdu valid subframe count */ -#define MT_MIB_SDR24(_band) MT_WF_MIB(_band, 0x068) +#define MT_MIB_SDR24(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR24)) #define MT_MIB_SDR24_RX_AMPDU_SF_CNT_MASK GENMASK(23, 0) +#define MT_MIB_SDR24_RX_AMPDU_SF_CNT_MASK_MT7916 GENMASK(31, 0) /* rx ampdu valid subframe bytes count, 32bits */ -#define MT_MIB_SDR25(_band) MT_WF_MIB(_band, 0x06c) +#define MT_MIB_SDR25(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR25)) /* remaining windows protected stats */ -#define MT_MIB_SDR27(_band) MT_WF_MIB(_band, 0x074) +#define MT_MIB_SDR27(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR27)) #define MT_MIB_SDR27_TX_RWP_FAIL_CNT_MASK GENMASK(15, 0) -#define MT_MIB_SDR28(_band) MT_WF_MIB(_band, 0x078) +#define MT_MIB_SDR28(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR28)) #define MT_MIB_SDR28_TX_RWP_NEED_CNT_MASK GENMASK(15, 0) -#define MT_MIB_SDR29(_band) MT_WF_MIB(_band, 0x07c) -#define MT_MIB_SDR29_RX_PFDROP_CNT_MASK GENMASK(7, 0) +#define MT_MIB_SDR29(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR29)) +#define MT_MIB_SDR29_RX_PFDROP_CNT_MASK GENMASK(7, 0) +#define MT_MIB_SDR29_RX_PFDROP_CNT_MASK_MT7916 GENMASK(15, 0) -#define MT_MIB_SDR30(_band) MT_WF_MIB(_band, 0x080) +#define MT_MIB_SDRVEC(_band) MT_WF_MIB(_band, __OFFS(MIB_SDRVEC)) #define MT_MIB_SDR30_RX_VEC_QUEUE_OVERFLOW_DROP_CNT_MASK GENMASK(15, 0) +#define MT_MIB_SDR30_RX_VEC_QUEUE_OVERFLOW_DROP_CNT_MASK_MT7916 GENMASK(31, 16) /* rx blockack count, 32 bits */ -#define MT_MIB_SDR31(_band) MT_WF_MIB(_band, 0x084) +#define MT_MIB_SDR31(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR31)) -#define MT_MIB_SDR32(_band) MT_WF_MIB(_band, 0x088) -#define MT_MIB_SDR32_TX_PKT_EBF_CNT_MASK GENMASK(15, 0) +#define MT_MIB_SDR32(_band) MT_WF_MIB(_band, __OFFS(MIB_SDR32)) +#define MT_MIB_SDR32_TX_PKT_EBF_CNT GENMASK(15, 0) +#define MT_MIB_SDR32_TX_PKT_IBF_CNT GENMASK(31, 16) -#define MT_MIB_SDR33(_band) MT_WF_MIB(_band, 0x08c) -#define MT_MIB_SDR33_TX_PKT_IBF_CNT_MASK GENMASK(15, 0) +#define MT_MIB_SDR33(_band) MT_WF_MIB(_band, 0x088) +#define MT_MIB_SDR33_TX_PKT_IBF_CNT GENMASK(15, 0) -#define MT_MIB_SDR34(_band) MT_WF_MIB(_band, 0x090) +#define MT_MIB_SDRMUBF(_band) MT_WF_MIB(_band, __OFFS(MIB_SDRMUBF)) #define MT_MIB_MU_BF_TX_CNT GENMASK(15, 0) /* 36, 37 both DNR */ -#define MT_MIB_DR8(_band) MT_WF_MIB(_band, 0x0c0) -#define MT_MIB_DR9(_band) MT_WF_MIB(_band, 0x0c4) -#define MT_MIB_DR11(_band) MT_WF_MIB(_band, 0x0cc) +#define MT_MIB_DR8(_band) MT_WF_MIB(_band, __OFFS(MIB_DR8)) +#define MT_MIB_DR9(_band) MT_WF_MIB(_band, __OFFS(MIB_DR9)) +#define MT_MIB_DR11(_band) MT_WF_MIB(_band, __OFFS(MIB_DR11)) -#define MT_MIB_MB_SDR0(_band, n) MT_WF_MIB(_band, 0x100 + ((n) << 4)) +#define MT_MIB_MB_SDR0(_band, n) MT_WF_MIB(_band, __OFFS(MIB_MB_SDR0) + (n)) #define MT_MIB_RTS_RETRIES_COUNT_MASK GENMASK(31, 16) #define MT_MIB_RTS_COUNT_MASK GENMASK(15, 0) -#define MT_MIB_MB_SDR1(_band, n) MT_WF_MIB(_band, 0x104 + ((n) << 4)) +#define MT_MIB_MB_SDR1(_band, n) MT_WF_MIB(_band, __OFFS(MIB_MB_SDR1) + (n)) #define MT_MIB_BA_MISS_COUNT_MASK GENMASK(15, 0) #define MT_MIB_ACK_FAIL_COUNT_MASK GENMASK(31, 16) -#define MT_TX_AGG_CNT(_band, n) MT_WF_MIB(_band, 0x0a8 + ((n) << 2)) -#define MT_TX_AGG_CNT2(_band, n) MT_WF_MIB(_band, 0x164 + ((n) << 2)) -#define MT_MIB_ARNG(_band, n) MT_WF_MIB(_band, 0x4b8 + ((n) << 2)) +#define MT_MIB_MB_SDR2(_band, n) MT_WF_MIB(_band, 0x518 + (n)) +#define MT_MIB_MB_BFTF(_band, n) MT_WF_MIB(_band, 0x510 + (n)) + +#define MT_TX_AGG_CNT(_band, n) MT_WF_MIB(_band, __OFFS(TX_AGG_CNT) + \ + ((n) << 2)) +#define MT_TX_AGG_CNT2(_band, n) MT_WF_MIB(_band, __OFFS(TX_AGG_CNT2) + \ + ((n) << 2)) +#define MT_MIB_ARNG(_band, n) MT_WF_MIB(_band, __OFFS(MIB_ARNG) + \ + ((n) << 2)) #define MT_MIB_ARNCR_RANGE(val, n) (((val) >> ((n) << 3)) & GENMASK(7, 0)) -#define MT_WTBLON_TOP_BASE 0x34000 +#define MT_MIB_BFCR0(_band) MT_WF_MIB(_band, 0x7b0) +#define MT_MIB_BFCR0_RX_FB_HT GENMASK(15, 0) +#define MT_MIB_BFCR0_RX_FB_VHT GENMASK(31, 16) + +#define MT_MIB_BFCR1(_band) MT_WF_MIB(_band, 0x7b4) +#define MT_MIB_BFCR1_RX_FB_HE GENMASK(15, 0) + +#define MT_MIB_BFCR2(_band) MT_WF_MIB(_band, 0x7b8) +#define MT_MIB_BFCR2_BFEE_TX_FB_TRIG GENMASK(15, 0) + +#define MT_MIB_BFCR7(_band) MT_WF_MIB(_band, 0x7cc) +#define MT_MIB_BFCR7_BFEE_TX_FB_CPL GENMASK(15, 0) + +/* WTBLON TOP */ +#define MT_WTBLON_TOP_BASE 0x820d4000 #define MT_WTBLON_TOP(ofs) (MT_WTBLON_TOP_BASE + (ofs)) -#define MT_WTBLON_TOP_WDUCR MT_WTBLON_TOP(0x0) +#define MT_WTBLON_TOP_WDUCR MT_WTBLON_TOP(__OFFS(WTBLON_TOP_WDUCR)) #define MT_WTBLON_TOP_WDUCR_GROUP GENMASK(2, 0) -#define MT_WTBL_UPDATE MT_WTBLON_TOP(0x030) +#define MT_WTBL_UPDATE MT_WTBLON_TOP(__OFFS(WTBL_UPDATE)) #define MT_WTBL_UPDATE_WLAN_IDX GENMASK(9, 0) #define MT_WTBL_UPDATE_ADM_COUNT_CLEAR BIT(12) #define MT_WTBL_UPDATE_BUSY BIT(31) -#define MT_WTBL_BASE 0x38000 +/* WTBL */ +#define MT_WTBL_BASE 0x820d8000 #define MT_WTBL_LMAC_ID GENMASK(14, 8) #define MT_WTBL_LMAC_DW GENMASK(7, 2) #define MT_WTBL_LMAC_OFFS(_id, _dw) (MT_WTBL_BASE | \ - FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \ - FIELD_PREP(MT_WTBL_LMAC_DW, _dw)) + FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \ + FIELD_PREP(MT_WTBL_LMAC_DW, _dw)) -/* AGG: band 0(0x20800), band 1(0xa0800) */ -#define MT_WF_AGG_BASE(_band) ((_band) ? 0xa0800 : 0x20800) +/* AGG: band 0(0x820e2000), band 1(0x820f2000) */ +#define MT_WF_AGG_BASE(_band) ((_band) ? 0x820f2000 : 0x820e2000) #define MT_WF_AGG(_band, ofs) (MT_WF_AGG_BASE(_band) + (ofs)) -#define MT_AGG_AWSCR0(_band, _n) MT_WF_AGG(_band, 0x05c + (_n) * 4) -#define MT_AGG_PCR0(_band, _n) MT_WF_AGG(_band, 0x06c + (_n) * 4) +#define MT_AGG_AWSCR0(_band, _n) MT_WF_AGG(_band, (__OFFS(AGG_AWSCR0) + \ + (_n) * 4)) +#define MT_AGG_PCR0(_band, _n) MT_WF_AGG(_band, (__OFFS(AGG_PCR0) + \ + (_n) * 4)) #define MT_AGG_PCR0_MM_PROT BIT(0) #define MT_AGG_PCR0_GF_PROT BIT(1) #define MT_AGG_PCR0_BW20_PROT BIT(2) @@ -305,31 +454,32 @@ #define MT_AGG_PCR1_RTS0_NUM_THRES GENMASK(31, 23) #define MT_AGG_PCR1_RTS0_LEN_THRES GENMASK(19, 0) -#define MT_AGG_ACR0(_band) MT_WF_AGG(_band, 0x084) +#define MT_AGG_ACR0(_band) MT_WF_AGG(_band, __OFFS(AGG_ACR0)) #define MT_AGG_ACR_CFEND_RATE GENMASK(13, 0) #define MT_AGG_ACR_BAR_RATE GENMASK(29, 16) -#define MT_AGG_MRCR(_band) MT_WF_AGG(_band, 0x098) -#define MT_AGG_MRCR_BAR_CNT_LIMIT GENMASK(15, 12) -#define MT_AGG_MRCR_LAST_RTS_CTS_RN BIT(6) -#define MT_AGG_MRCR_RTS_FAIL_LIMIT GENMASK(11, 7) +#define MT_AGG_MRCR(_band) MT_WF_AGG(_band, __OFFS(AGG_MRCR)) +#define MT_AGG_MRCR_BAR_CNT_LIMIT GENMASK(15, 12) +#define MT_AGG_MRCR_LAST_RTS_CTS_RN BIT(6) +#define MT_AGG_MRCR_RTS_FAIL_LIMIT GENMASK(11, 7) #define MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT GENMASK(28, 24) -#define MT_AGG_ATCR1(_band) MT_WF_AGG(_band, 0x0f0) -#define MT_AGG_ATCR3(_band) MT_WF_AGG(_band, 0x0f4) +#define MT_AGG_ATCR1(_band) MT_WF_AGG(_band, __OFFS(AGG_ATCR1)) +#define MT_AGG_ATCR3(_band) MT_WF_AGG(_band, __OFFS(AGG_ATCR3)) -/* ARB: band 0(0x20c00), band 1(0xa0c00) */ -#define MT_WF_ARB_BASE(_band) ((_band) ? 0xa0c00 : 0x20c00) +/* ARB: band 0(0x820e3000), band 1(0x820f3000) */ +#define MT_WF_ARB_BASE(_band) ((_band) ? 0x820f3000 : 0x820e3000) #define MT_WF_ARB(_band, ofs) (MT_WF_ARB_BASE(_band) + (ofs)) -#define MT_ARB_SCR(_band) MT_WF_ARB(_band, 0x080) +#define MT_ARB_SCR(_band) MT_WF_ARB(_band, __OFFS(ARB_SCR)) #define MT_ARB_SCR_TX_DISABLE BIT(8) #define MT_ARB_SCR_RX_DISABLE BIT(9) -#define MT_ARB_DRNGR0(_band, _n) MT_WF_ARB(_band, 0x194 + (_n) * 4) +#define MT_ARB_DRNGR0(_band, _n) MT_WF_ARB(_band, (__OFFS(ARB_DRNGR0) + \ + (_n) * 4)) -/* RMAC: band 0(0x21400), band 1(0xa1400) */ -#define MT_WF_RMAC_BASE(_band) ((_band) ? 0xa1400 : 0x21400) +/* RMAC: band 0(0x820e5000), band 1(0x820f5000) */ +#define MT_WF_RMAC_BASE(_band) ((_band) ? 0x820f5000 : 0x820e5000) #define MT_WF_RMAC(_band, ofs) (MT_WF_RMAC_BASE(_band) + (ofs)) #define MT_WF_RFCR(_band) MT_WF_RMAC(_band, 0x000) @@ -366,7 +516,7 @@ #define MT_WF_RMAC_MIB_RXTIME_CLR BIT(31) /* WFDMA0 */ -#define MT_WFDMA0_BASE 0xd4000 +#define MT_WFDMA0_BASE __REG(WFDMA0_ADDR) #define MT_WFDMA0(ofs) (MT_WFDMA0_BASE + (ofs)) #define MT_WFDMA0_RST MT_WFDMA0(0x100) @@ -381,15 +531,14 @@ #define MT_WFDMA0_GLO_CFG MT_WFDMA0(0x208) #define MT_WFDMA0_GLO_CFG_TX_DMA_EN BIT(0) #define MT_WFDMA0_GLO_CFG_RX_DMA_EN BIT(2) +#define MT_WFDMA0_GLO_CFG_OMIT_TX_INFO BIT(28) +#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO BIT(27) +#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 BIT(21) #define MT_WFDMA0_RST_DTX_PTR MT_WFDMA0(0x20c) #define MT_WFDMA0_PRI_DLY_INT_CFG0 MT_WFDMA0(0x2f0) - -#define MT_RX_DATA_RING_BASE MT_WFDMA0(0x500) - -#define MT_WFDMA0_RX_RING0_EXT_CTRL MT_WFDMA0(0x680) -#define MT_WFDMA0_RX_RING1_EXT_CTRL MT_WFDMA0(0x684) -#define MT_WFDMA0_RX_RING2_EXT_CTRL MT_WFDMA0(0x688) +#define MT_WFDMA0_PRI_DLY_INT_CFG1 MT_WFDMA0(0x2f4) +#define MT_WFDMA0_PRI_DLY_INT_CFG2 MT_WFDMA0(0x2f8) /* WFDMA1 */ #define MT_WFDMA1_BASE 0xd5000 @@ -404,129 +553,371 @@ #define MT_WFDMA1_BUSY_ENA_TX_FIFO1 BIT(1) #define MT_WFDMA1_BUSY_ENA_RX_FIFO BIT(2) -#define MT_MCU_CMD MT_WFDMA1(0x1f0) -#define MT_MCU_CMD_STOP_DMA_FW_RELOAD BIT(1) -#define MT_MCU_CMD_STOP_DMA BIT(2) -#define MT_MCU_CMD_RESET_DONE BIT(3) -#define MT_MCU_CMD_RECOVERY_DONE BIT(4) -#define MT_MCU_CMD_NORMAL_STATE BIT(5) -#define MT_MCU_CMD_ERROR_MASK GENMASK(5, 1) - #define MT_WFDMA1_GLO_CFG MT_WFDMA1(0x208) #define MT_WFDMA1_GLO_CFG_TX_DMA_EN BIT(0) #define MT_WFDMA1_GLO_CFG_RX_DMA_EN BIT(2) #define MT_WFDMA1_GLO_CFG_OMIT_TX_INFO BIT(28) #define MT_WFDMA1_GLO_CFG_OMIT_RX_INFO BIT(27) +#define MT_WFDMA1_GLO_CFG_OMIT_RX_INFO_PFET2 BIT(21) #define MT_WFDMA1_RST_DTX_PTR MT_WFDMA1(0x20c) #define MT_WFDMA1_PRI_DLY_INT_CFG0 MT_WFDMA1(0x2f0) -#define MT_TX_RING_BASE MT_WFDMA1(0x300) -#define MT_RX_EVENT_RING_BASE MT_WFDMA1(0x500) - -#define MT_WFDMA1_TX_RING0_EXT_CTRL MT_WFDMA1(0x600) -#define MT_WFDMA1_TX_RING1_EXT_CTRL MT_WFDMA1(0x604) -#define MT_WFDMA1_TX_RING2_EXT_CTRL MT_WFDMA1(0x608) -#define MT_WFDMA1_TX_RING3_EXT_CTRL MT_WFDMA1(0x60c) -#define MT_WFDMA1_TX_RING4_EXT_CTRL MT_WFDMA1(0x610) -#define MT_WFDMA1_TX_RING5_EXT_CTRL MT_WFDMA1(0x614) -#define MT_WFDMA1_TX_RING6_EXT_CTRL MT_WFDMA1(0x618) -#define MT_WFDMA1_TX_RING7_EXT_CTRL MT_WFDMA1(0x61c) - -#define MT_WFDMA1_TX_RING16_EXT_CTRL MT_WFDMA1(0x640) -#define MT_WFDMA1_TX_RING17_EXT_CTRL MT_WFDMA1(0x644) -#define MT_WFDMA1_TX_RING18_EXT_CTRL MT_WFDMA1(0x648) -#define MT_WFDMA1_TX_RING19_EXT_CTRL MT_WFDMA1(0x64c) -#define MT_WFDMA1_TX_RING20_EXT_CTRL MT_WFDMA1(0x650) -#define MT_WFDMA1_TX_RING21_EXT_CTRL MT_WFDMA1(0x654) -#define MT_WFDMA1_TX_RING22_EXT_CTRL MT_WFDMA1(0x658) -#define MT_WFDMA1_TX_RING23_EXT_CTRL MT_WFDMA1(0x65c) - -#define MT_WFDMA1_RX_RING0_EXT_CTRL MT_WFDMA1(0x680) -#define MT_WFDMA1_RX_RING1_EXT_CTRL MT_WFDMA1(0x684) -#define MT_WFDMA1_RX_RING2_EXT_CTRL MT_WFDMA1(0x688) -#define MT_WFDMA1_RX_RING3_EXT_CTRL MT_WFDMA1(0x68c) - /* WFDMA CSR */ -#define MT_WFDMA_EXT_CSR_BASE 0xd7000 +#define MT_WFDMA_EXT_CSR_BASE __REG(WFDMA_EXT_CSR_ADDR) #define MT_WFDMA_EXT_CSR(ofs) (MT_WFDMA_EXT_CSR_BASE + (ofs)) -#define MT_INT_SOURCE_CSR MT_WFDMA_EXT_CSR(0x10) -#define MT_INT_MASK_CSR MT_WFDMA_EXT_CSR(0x14) -#define MT_INT_RX_DONE_DATA0 BIT(16) -#define MT_INT_RX_DONE_DATA1 BIT(17) -#define MT_INT_RX_DONE_WM BIT(0) -#define MT_INT_RX_DONE_WA BIT(1) -#define MT_INT_RX_DONE_WA_EXT BIT(2) -#define MT_INT_RX_DONE_ALL (GENMASK(2, 0) | GENMASK(17, 16)) -#define MT_INT_TX_DONE_MCU_WA BIT(15) -#define MT_INT_TX_DONE_FWDL BIT(26) -#define MT_INT_TX_DONE_MCU_WM BIT(27) -#define MT_INT_TX_DONE_BAND0 BIT(30) -#define MT_INT_TX_DONE_BAND1 BIT(31) - -#define MT_INT_BAND1_MASK (MT_INT_RX_DONE_WA_EXT | \ - MT_INT_TX_DONE_BAND1) - -#define MT_INT_MCU_CMD BIT(29) - -#define MT_INT_TX_DONE_MCU (MT_INT_TX_DONE_MCU_WA | \ - MT_INT_TX_DONE_MCU_WM | \ - MT_INT_TX_DONE_FWDL) - #define MT_WFDMA_HOST_CONFIG MT_WFDMA_EXT_CSR(0x30) #define MT_WFDMA_HOST_CONFIG_PDMA_BAND BIT(0) #define MT_WFDMA_EXT_CSR_HIF_MISC MT_WFDMA_EXT_CSR(0x44) #define MT_WFDMA_EXT_CSR_HIF_MISC_BUSY BIT(0) -#define MT_INT1_SOURCE_CSR MT_WFDMA_EXT_CSR(0x88) -#define MT_INT1_MASK_CSR MT_WFDMA_EXT_CSR(0x8c) - -#define MT_PCIE_RECOG_ID MT_WFDMA_EXT_CSR(0x90) +#define MT_PCIE_RECOG_ID 0xd7090 #define MT_PCIE_RECOG_ID_MASK GENMASK(30, 0) #define MT_PCIE_RECOG_ID_SEM BIT(31) /* WFDMA0 PCIE1 */ -#define MT_WFDMA0_PCIE1_BASE 0xd8000 -#define MT_WFDMA0_PCIE1(ofs) (MT_WFDMA0_PCIE1_BASE + (ofs)) +#define MT_WFDMA0_PCIE1_BASE __REG(WFDMA0_PCIE1_ADDR) +#define MT_WFDMA0_PCIE1(ofs) (MT_WFDMA0_PCIE1_BASE + (ofs)) -#define MT_WFDMA0_PCIE1_BUSY_ENA MT_WFDMA0_PCIE1(0x13c) +#define MT_WFDMA0_PCIE1_BUSY_ENA MT_WFDMA0_PCIE1(0x13c) #define MT_WFDMA0_PCIE1_BUSY_ENA_TX_FIFO0 BIT(0) #define MT_WFDMA0_PCIE1_BUSY_ENA_TX_FIFO1 BIT(1) #define MT_WFDMA0_PCIE1_BUSY_ENA_RX_FIFO BIT(2) /* WFDMA1 PCIE1 */ -#define MT_WFDMA1_PCIE1_BASE 0xd9000 -#define MT_WFDMA1_PCIE1(ofs) (MT_WFDMA0_PCIE1_BASE + (ofs)) +#define MT_WFDMA1_PCIE1_BASE 0xd9000 +#define MT_WFDMA1_PCIE1(ofs) (MT_WFDMA1_PCIE1_BASE + (ofs)) -#define MT_WFDMA1_PCIE1_BUSY_ENA MT_WFDMA1_PCIE1(0x13c) +#define MT_WFDMA1_PCIE1_BUSY_ENA MT_WFDMA1_PCIE1(0x13c) #define MT_WFDMA1_PCIE1_BUSY_ENA_TX_FIFO0 BIT(0) #define MT_WFDMA1_PCIE1_BUSY_ENA_TX_FIFO1 BIT(1) #define MT_WFDMA1_PCIE1_BUSY_ENA_RX_FIFO BIT(2) -#define MT_TOP_RGU_BASE 0xf0000 -#define MT_TOP_PWR_CTRL (MT_TOP_RGU_BASE + (0x0)) -#define MT_TOP_PWR_KEY (0x5746 << 16) -#define MT_TOP_PWR_SW_RST BIT(0) -#define MT_TOP_PWR_SW_PWR_ON GENMASK(3, 2) -#define MT_TOP_PWR_HW_CTRL BIT(4) -#define MT_TOP_PWR_PWR_ON BIT(7) +/* WFDMA COMMON */ +#define __RXQ(q) ((q) + __MT_MCUQ_MAX) +#define __TXQ(q) (__RXQ(q) + __MT_RXQ_MAX) + +#define MT_Q_ID(q) (dev->q_id[(q)]) +#define MT_Q_BASE(q) ((dev->wfdma_mask >> (q)) & 0x1 ? \ + MT_WFDMA1_BASE : MT_WFDMA0_BASE) + +#define MT_MCUQ_ID(q) MT_Q_ID(q) +#define MT_TXQ_ID(q) MT_Q_ID(__TXQ(q)) +#define MT_RXQ_ID(q) MT_Q_ID(__RXQ(q)) + +#define MT_MCUQ_RING_BASE(q) (MT_Q_BASE(q) + 0x300) +#define MT_TXQ_RING_BASE(q) (MT_Q_BASE(__TXQ(q)) + 0x300) +#define MT_RXQ_RING_BASE(q) (MT_Q_BASE(__RXQ(q)) + 0x500) + +#define MT_MCUQ_EXT_CTRL(q) (MT_Q_BASE(q) + 0x600 + \ + MT_MCUQ_ID(q)* 0x4) +#define MT_RXQ_EXT_CTRL(q) (MT_Q_BASE(__RXQ(q)) + 0x680 + \ + MT_RXQ_ID(q)* 0x4) +#define MT_TXQ_EXT_CTRL(q) (MT_Q_BASE(__TXQ(q)) + 0x600 + \ + MT_TXQ_ID(q)* 0x4) + +#define MT_INT_SOURCE_CSR __REG(INT_SOURCE_CSR) +#define MT_INT_MASK_CSR __REG(INT_MASK_CSR) + +#define MT_INT1_SOURCE_CSR __REG(INT1_SOURCE_CSR) +#define MT_INT1_MASK_CSR __REG(INT1_MASK_CSR) + +#define MT_INT_RX_DONE_BAND0 BIT(16) +#define MT_INT_RX_DONE_BAND1 BIT(17) +#define MT_INT_RX_DONE_WM BIT(0) +#define MT_INT_RX_DONE_WA BIT(1) +#define MT_INT_RX_DONE_WA_MAIN BIT(1) +#define MT_INT_RX_DONE_WA_EXT BIT(2) +#define MT_INT_MCU_CMD BIT(29) +#define MT_INT_RX_DONE_BAND0_MT7916 BIT(22) +#define MT_INT_RX_DONE_BAND1_MT7916 BIT(23) +#define MT_INT_RX_DONE_WA_MAIN_MT7916 BIT(2) +#define MT_INT_RX_DONE_WA_EXT_MT7916 BIT(3) + +#define MT_INT_RX(q) (dev->q_int_mask[__RXQ(q)]) +#define MT_INT_TX_MCU(q) (dev->q_int_mask[(q)]) + +#define MT_INT_RX_DONE_MCU (MT_INT_RX(MT_RXQ_MCU) | \ + MT_INT_RX(MT_RXQ_MCU_WA)) + +#define MT_INT_BAND0_RX_DONE (MT_INT_RX(MT_RXQ_MAIN) | \ + MT_INT_RX(MT_RXQ_MAIN_WA)) + +#define MT_INT_BAND1_RX_DONE (MT_INT_RX(MT_RXQ_EXT) | \ + MT_INT_RX(MT_RXQ_EXT_WA) | \ + MT_INT_RX(MT_RXQ_MAIN_WA)) + +#define MT_INT_RX_DONE_ALL (MT_INT_RX_DONE_MCU | \ + MT_INT_BAND0_RX_DONE | \ + MT_INT_BAND1_RX_DONE) -#define MT_INFRA_CFG_BASE 0xf1000 -#define MT_INFRA(ofs) (MT_INFRA_CFG_BASE + (ofs)) +#define MT_INT_TX_DONE_FWDL BIT(26) +#define MT_INT_TX_DONE_MCU_WM BIT(27) +#define MT_INT_TX_DONE_MCU_WA BIT(15) +#define MT_INT_TX_DONE_BAND0 BIT(30) +#define MT_INT_TX_DONE_BAND1 BIT(31) +#define MT_INT_TX_DONE_MCU_WA_MT7916 BIT(25) + +#define MT_INT_TX_DONE_MCU (MT_INT_TX_MCU(MT_MCUQ_WA) | \ + MT_INT_TX_MCU(MT_MCUQ_WM) | \ + MT_INT_TX_MCU(MT_MCUQ_FWDL)) + +#define MT_MCU_CMD __REG(INT_MCU_CMD_SOURCE) +#define MT_MCU_CMD_STOP_DMA_FW_RELOAD BIT(1) +#define MT_MCU_CMD_STOP_DMA BIT(2) +#define MT_MCU_CMD_RESET_DONE BIT(3) +#define MT_MCU_CMD_RECOVERY_DONE BIT(4) +#define MT_MCU_CMD_NORMAL_STATE BIT(5) +#define MT_MCU_CMD_ERROR_MASK GENMASK(5, 1) -#define MT_HIF_REMAP_L1 MT_INFRA(0x1ac) +/* TOP RGU */ +#define MT_TOP_RGU_BASE 0x18000000 +#define MT_TOP_PWR_CTRL (MT_TOP_RGU_BASE + (0x0)) +#define MT_TOP_PWR_KEY (0x5746 << 16) +#define MT_TOP_PWR_SW_RST BIT(0) +#define MT_TOP_PWR_SW_PWR_ON GENMASK(3, 2) +#define MT_TOP_PWR_HW_CTRL BIT(4) +#define MT_TOP_PWR_PWR_ON BIT(7) + +#define MT_TOP_RGU_SYSRAM_PDN (MT_TOP_RGU_BASE + 0x050) +#define MT_TOP_RGU_SYSRAM_SLP (MT_TOP_RGU_BASE + 0x054) +#define MT_TOP_WFSYS_PWR (MT_TOP_RGU_BASE + 0x010) +#define MT_TOP_PWR_EN_MASK BIT(7) +#define MT_TOP_PWR_ACK_MASK BIT(6) +#define MT_TOP_PWR_KEY_MASK GENMASK(31, 16) + +#define MT7986_TOP_WM_RESET (MT_TOP_RGU_BASE + 0x120) +#define MT7986_TOP_WM_RESET_MASK BIT(0) + +/* l1/l2 remap */ +#define MT_HIF_REMAP_L1 0xf11ac +#define MT_HIF_REMAP_L1_MT7916 0xfe260 #define MT_HIF_REMAP_L1_MASK GENMASK(15, 0) #define MT_HIF_REMAP_L1_OFFSET GENMASK(15, 0) #define MT_HIF_REMAP_L1_BASE GENMASK(31, 16) #define MT_HIF_REMAP_BASE_L1 0xe0000 -#define MT_HIF_REMAP_L2 MT_INFRA(0x1b0) +#define MT_HIF_REMAP_L2 0xf11b0 #define MT_HIF_REMAP_L2_MASK GENMASK(19, 0) #define MT_HIF_REMAP_L2_OFFSET GENMASK(11, 0) #define MT_HIF_REMAP_L2_BASE GENMASK(31, 12) -#define MT_HIF_REMAP_BASE_L2 0x00000 +#define MT_HIF_REMAP_L2_MT7916 0x1b8 +#define MT_HIF_REMAP_L2_MASK_MT7916 GENMASK(31, 16) +#define MT_HIF_REMAP_L2_OFFSET_MT7916 GENMASK(15, 0) +#define MT_HIF_REMAP_L2_BASE_MT7916 GENMASK(31, 16) +#define MT_HIF_REMAP_BASE_L2_MT7916 0x40000 + +#define MT_INFRA_BASE 0x18000000 +#define MT_WFSYS0_PHY_START 0x18400000 +#define MT_WFSYS1_PHY_START 0x18800000 +#define MT_WFSYS1_PHY_END 0x18bfffff +#define MT_CBTOP1_PHY_START 0x70000000 +#define MT_CBTOP1_PHY_END __REG(CBTOP1_PHY_END) +#define MT_CBTOP2_PHY_START 0xf0000000 +#define MT_CBTOP2_PHY_END 0xffffffff +#define MT_INFRA_MCU_START 0x7c000000 +#define MT_INFRA_MCU_END __REG(INFRA_MCU_ADDR_END) +#define MT_CONN_INFRA_OFFSET(p) ((p) - MT_INFRA_BASE) + +/* CONN INFRA CFG */ +#define MT_CONN_INFRA_BASE 0x18001000 +#define MT_CONN_INFRA(ofs) (MT_CONN_INFRA_BASE + (ofs)) + +#define MT_CONN_INFRA_EFUSE MT_CONN_INFRA(0x020) + +#define MT_CONN_INFRA_ADIE_RESET MT_CONN_INFRA(0x030) +#define MT_CONN_INFRA_ADIE1_RESET_MASK BIT(0) +#define MT_CONN_INFRA_ADIE2_RESET_MASK BIT(2) + +#define MT_CONN_INFRA_OSC_RC_EN MT_CONN_INFRA(0x380) + +#define MT_CONN_INFRA_OSC_CTRL MT_CONN_INFRA(0x300) +#define MT_CONN_INFRA_OSC_RC_EN_MASK BIT(7) +#define MT_CONN_INFRA_OSC_STB_TIME_MASK GENMASK(23, 0) + +#define MT_CONN_INFRA_HW_CTRL MT_CONN_INFRA(0x200) +#define MT_CONN_INFRA_HW_CTRL_MASK BIT(0) + +#define MT_CONN_INFRA_WF_SLP_PROT MT_CONN_INFRA(0x540) +#define MT_CONN_INFRA_WF_SLP_PROT_MASK BIT(0) + +#define MT_CONN_INFRA_WF_SLP_PROT_RDY MT_CONN_INFRA(0x544) +#define MT_CONN_INFRA_CONN_WF_MASK (BIT(29) | BIT(31)) +#define MT_CONN_INFRA_CONN (BIT(25) | BIT(29) | BIT(31)) + +#define MT_CONN_INFRA_EMI_REQ MT_CONN_INFRA(0x414) +#define MT_CONN_INFRA_EMI_REQ_MASK BIT(0) +#define MT_CONN_INFRA_INFRA_REQ_MASK BIT(5) + +/* AFE */ +#define MT_AFE_CTRL_BASE(_band) (0x18003000 + ((_band) << 19)) +#define MT_AFE_CTRL(_band, ofs) (MT_AFE_CTRL_BASE(_band) + (ofs)) + +#define MT_AFE_DIG_EN_01(_band) MT_AFE_CTRL(_band, 0x00) +#define MT_AFE_DIG_EN_02(_band) MT_AFE_CTRL(_band, 0x04) +#define MT_AFE_DIG_EN_03(_band) MT_AFE_CTRL(_band, 0x08) +#define MT_AFE_DIG_TOP_01(_band) MT_AFE_CTRL(_band, 0x0c) + +#define MT_AFE_PLL_STB_TIME(_band) MT_AFE_CTRL(_band, 0xf4) +#define MT_AFE_PLL_STB_TIME_MASK (GENMASK(30, 16) | GENMASK(14, 0)) +#define MT_AFE_PLL_STB_TIME_VAL (FIELD_PREP(GENMASK(30, 16), 0x4bc) | \ + FIELD_PREP(GENMASK(14, 0), 0x7e4)) +#define MT_AFE_BPLL_CFG_MASK GENMASK(7, 6) +#define MT_AFE_WPLL_CFG_MASK GENMASK(1, 0) +#define MT_AFE_MCU_WPLL_CFG_MASK GENMASK(3, 2) +#define MT_AFE_MCU_BPLL_CFG_MASK GENMASK(17, 16) +#define MT_AFE_PLL_CFG_MASK (MT_AFE_BPLL_CFG_MASK | \ + MT_AFE_WPLL_CFG_MASK | \ + MT_AFE_MCU_WPLL_CFG_MASK | \ + MT_AFE_MCU_BPLL_CFG_MASK) +#define MT_AFE_PLL_CFG_VAL (FIELD_PREP(MT_AFE_BPLL_CFG_MASK, 0x1) | \ + FIELD_PREP(MT_AFE_WPLL_CFG_MASK, 0x2) | \ + FIELD_PREP(MT_AFE_MCU_WPLL_CFG_MASK, 0x1) | \ + FIELD_PREP(MT_AFE_MCU_BPLL_CFG_MASK, 0x2)) + +#define MT_AFE_DIG_TOP_01_MASK GENMASK(18, 15) +#define MT_AFE_DIG_TOP_01_VAL FIELD_PREP(MT_AFE_DIG_TOP_01_MASK, 0x9) + +#define MT_AFE_RG_WBG_EN_RCK_MASK BIT(0) +#define MT_AFE_RG_WBG_EN_BPLL_UP_MASK BIT(21) +#define MT_AFE_RG_WBG_EN_WPLL_UP_MASK BIT(20) +#define MT_AFE_RG_WBG_EN_PLL_UP_MASK (MT_AFE_RG_WBG_EN_BPLL_UP_MASK | \ + MT_AFE_RG_WBG_EN_WPLL_UP_MASK) +#define MT_AFE_RG_WBG_EN_TXCAL_MASK GENMASK(21, 17) + +#define MT_ADIE_SLP_CTRL_BASE(_band) (0x18005000 + ((_band) << 19)) +#define MT_ADIE_SLP_CTRL(_band, ofs) (MT_ADIE_SLP_CTRL_BASE(_band) + (ofs)) + +#define MT_ADIE_SLP_CTRL_CK0(_band) MT_ADIE_SLP_CTRL(_band, 0x120) + +/* ADIE */ +#define MT_ADIE_CHIP_ID 0x02c +#define MT_ADIE_CHIP_ID_MASK GENMASK(31, 16) +#define MT_ADIE_IDX0 GENMASK(15, 0) +#define MT_ADIE_IDX1 GENMASK(31, 16) + +#define MT_ADIE_RG_TOP_THADC_BG 0x034 +#define MT_ADIE_VRPI_SEL_CR_MASK GENMASK(15, 12) +#define MT_ADIE_VRPI_SEL_EFUSE_MASK GENMASK(6, 3) + +#define MT_ADIE_RG_TOP_THADC 0x038 +#define MT_ADIE_PGA_GAIN_MASK GENMASK(25, 23) +#define MT_ADIE_PGA_GAIN_EFUSE_MASK GENMASK(2, 0) +#define MT_ADIE_LDO_CTRL_MASK GENMASK(27, 26) +#define MT_ADIE_LDO_CTRL_EFUSE_MASK GENMASK(6, 5) + +#define MT_AFE_RG_ENCAL_WBTAC_IF_SW 0x070 +#define MT_ADIE_EFUSE_RDATA0 0x130 + +#define MT_ADIE_EFUSE2_CTRL 0x148 +#define MT_ADIE_EFUSE_CTRL_MASK BIT(1) + +#define MT_ADIE_EFUSE_CFG 0x144 +#define MT_ADIE_EFUSE_MODE_MASK GENMASK(7, 6) +#define MT_ADIE_EFUSE_ADDR_MASK GENMASK(25, 16) +#define MT_ADIE_EFUSE_VALID_MASK BIT(29) +#define MT_ADIE_EFUSE_KICK_MASK BIT(30) + +#define MT_ADIE_THADC_ANALOG 0x3a6 + +#define MT_ADIE_THADC_SLOP 0x3a7 +#define MT_ADIE_ANA_EN_MASK BIT(7) + +#define MT_ADIE_7975_XTAL_CAL 0x3a1 +#define MT_ADIE_TRIM_MASK GENMASK(6, 0) +#define MT_ADIE_EFUSE_TRIM_MASK GENMASK(5, 0) +#define MT_ADIE_XO_TRIM_EN_MASK BIT(7) +#define MT_ADIE_XTAL_DECREASE_MASK BIT(6) + +#define MT_ADIE_7975_XO_TRIM2 0x3a2 +#define MT_ADIE_7975_XO_TRIM3 0x3a3 +#define MT_ADIE_7975_XO_TRIM4 0x3a4 +#define MT_ADIE_7975_XTAL_EN 0x3a5 + +#define MT_ADIE_XO_TRIM_FLOW 0x3ac +#define MT_ADIE_XTAL_AXM_80M_OSC 0x390 +#define MT_ADIE_XTAL_AXM_40M_OSC 0x391 +#define MT_ADIE_XTAL_TRIM1_80M_OSC 0x398 +#define MT_ADIE_XTAL_TRIM1_40M_OSC 0x399 +#define MT_ADIE_WRI_CK_SEL 0x4ac +#define MT_ADIE_RG_STRAP_PIN_IN 0x4fc +#define MT_ADIE_XTAL_C1 0x654 +#define MT_ADIE_XTAL_C2 0x658 +#define MT_ADIE_RG_XO_01 0x65c +#define MT_ADIE_RG_XO_03 0x664 + +#define MT_ADIE_CLK_EN 0xa00 + +#define MT_ADIE_7975_XTAL 0xa18 +#define MT_ADIE_7975_XTAL_EN_MASK BIT(29) + +#define MT_ADIE_7975_COCLK 0xa1c +#define MT_ADIE_7975_XO_2 0xa84 +#define MT_ADIE_7975_XO_2_FIX_EN BIT(31) + +#define MT_ADIE_7975_XO_CTRL2 0xa94 +#define MT_ADIE_7975_XO_CTRL2_C1_MASK GENMASK(26, 20) +#define MT_ADIE_7975_XO_CTRL2_C2_MASK GENMASK(18, 12) +#define MT_ADIE_7975_XO_CTRL2_MASK (MT_ADIE_7975_XO_CTRL2_C1_MASK | \ + MT_ADIE_7975_XO_CTRL2_C2_MASK) + +#define MT_ADIE_7975_XO_CTRL6 0xaa4 +#define MT_ADIE_7975_XO_CTRL6_MASK BIT(16) + +/* TOP SPI */ +#define MT_TOP_SPI_ADIE_BASE(_band) (0x18004000 + ((_band) << 19)) +#define MT_TOP_SPI_ADIE(_band, ofs) (MT_TOP_SPI_ADIE_BASE(_band) + (ofs)) + +#define MT_TOP_SPI_BUSY_CR(_band) MT_TOP_SPI_ADIE(_band, 0) +#define MT_TOP_SPI_POLLING_BIT BIT(5) + +#define MT_TOP_SPI_ADDR_CR(_band) MT_TOP_SPI_ADIE(_band, 0x50) +#define MT_TOP_SPI_READ_ADDR_FORMAT (BIT(12) | BIT(13) | BIT(15)) +#define MT_TOP_SPI_WRITE_ADDR_FORMAT (BIT(13) | BIT(15)) + +#define MT_TOP_SPI_WRITE_DATA_CR(_band) MT_TOP_SPI_ADIE(_band, 0x54) +#define MT_TOP_SPI_READ_DATA_CR(_band) MT_TOP_SPI_ADIE(_band, 0x58) + +/* CONN INFRA CKGEN */ +#define MT_INFRA_CKGEN_BASE 0x18009000 +#define MT_INFRA_CKGEN(ofs) (MT_INFRA_CKGEN_BASE + (ofs)) + +#define MT_INFRA_CKGEN_BUS MT_INFRA_CKGEN(0xa00) +#define MT_INFRA_CKGEN_BUS_CLK_SEL_MASK BIT(23) +#define MT_INFRA_CKGEN_BUS_RDY_SEL_MASK BIT(29) + +#define MT_INFRA_CKGEN_BUS_WPLL_DIV_1 MT_INFRA_CKGEN(0x008) +#define MT_INFRA_CKGEN_BUS_WPLL_DIV_2 MT_INFRA_CKGEN(0x00c) + +#define MT_INFRA_CKGEN_RFSPI_WPLL_DIV MT_INFRA_CKGEN(0x040) +#define MT_INFRA_CKGEN_DIV_SEL_MASK GENMASK(7, 2) +#define MT_INFRA_CKGEN_DIV_EN_MASK BIT(0) + +/* CONN INFRA BUS */ +#define MT_INFRA_BUS_BASE 0x1800e000 +#define MT_INFRA_BUS(ofs) (MT_INFRA_BUS_BASE + (ofs)) + +#define MT_INFRA_BUS_OFF_TIMEOUT MT_INFRA_BUS(0x300) +#define MT_INFRA_BUS_TIMEOUT_LIMIT_MASK GENMASK(14, 7) +#define MT_INFRA_BUS_TIMEOUT_EN_MASK GENMASK(3, 0) + +#define MT_INFRA_BUS_ON_TIMEOUT MT_INFRA_BUS(0x31c) +#define MT_INFRA_BUS_EMI_START MT_INFRA_BUS(0x360) +#define MT_INFRA_BUS_EMI_END MT_INFRA_BUS(0x364) + +/* CONN_INFRA_SKU */ +#define MT_CONNINFRA_SKU_DEC_ADDR 0x18050000 +#define MT_CONNINFRA_SKU_MASK GENMASK(15, 0) +#define MT_ADIE_TYPE_MASK BIT(1) + +/* FW MODE SYNC */ +#define MT_SWDEF_MODE 0x41f23c +#define MT_SWDEF_MODE_MT7916 0x41143c +#define MT_SWDEF_NORMAL_MODE 0 +#define MT_SWDEF_ICAP_MODE 1 +#define MT_SWDEF_SPECTRUM_MODE 2 #define MT_DIC_CMD_REG_BASE 0x41f000 #define MT_DIC_CMD_REG(ofs) (MT_DIC_CMD_REG_BASE + (ofs)) @@ -540,13 +931,7 @@ #define MT_CPU_UTIL_PEAK_IDLE_CNT MT_CPU_UTIL(0x0c) #define MT_CPU_UTIL_CTRL MT_CPU_UTIL(0x1c) -#define MT_SWDEF_BASE 0x41f200 -#define MT_SWDEF(ofs) (MT_SWDEF_BASE + (ofs)) -#define MT_SWDEF_MODE MT_SWDEF(0x3c) -#define MT_SWDEF_NORMAL_MODE 0 -#define MT_SWDEF_ICAP_MODE 1 -#define MT_SWDEF_SPECTRUM_MODE 2 - +/* LED */ #define MT_LED_TOP_BASE 0x18013000 #define MT_LED_PHYS(_n) (MT_LED_TOP_BASE + (_n)) @@ -561,46 +946,124 @@ #define MT_LED_EN(_n) MT_LED_PHYS(0x40 + ((_n) * 4)) +#define MT_LED_GPIO_MUX2 0x70005058 /* GPIO 18 */ +#define MT_LED_GPIO_MUX3 0x7000505C /* GPIO 26 */ +#define MT_LED_GPIO_SEL_MASK GENMASK(11, 8) + +/* MT TOP */ #define MT_TOP_BASE 0x18060000 #define MT_TOP(ofs) (MT_TOP_BASE + (ofs)) -#define MT_TOP_LPCR_HOST_BAND0 MT_TOP(0x10) +#define MT_TOP_LPCR_HOST_BAND(_band) MT_TOP(0x10 + ((_band) * 0x10)) #define MT_TOP_LPCR_HOST_FW_OWN BIT(0) #define MT_TOP_LPCR_HOST_DRV_OWN BIT(1) +#define MT_TOP_LPCR_HOST_FW_OWN_STAT BIT(2) + +#define MT_TOP_LPCR_HOST_BAND_IRQ_STAT(_band) MT_TOP(0x14 + ((_band) * 0x10)) +#define MT_TOP_LPCR_HOST_BAND_STAT BIT(0) #define MT_TOP_MISC MT_TOP(0xf0) #define MT_TOP_MISC_FW_STATE GENMASK(2, 0) -#define MT_LED_GPIO_MUX2 0x70005058 /* GPIO 18 */ -#define MT_LED_GPIO_MUX3 0x7000505C /* GPIO 26 */ -#define MT_LED_GPIO_SEL_MASK GENMASK(11, 8) - #define MT_HW_BOUND 0x70010020 -#define MT_HW_CHIPID 0x70010200 #define MT_HW_REV 0x70010204 +#define MT_WF_SUBSYS_RST 0x70002600 + +#define MT_TOP_WFSYS_WAKEUP MT_TOP(0x1a4) +#define MT_TOP_WFSYS_WAKEUP_MASK BIT(0) + +#define MT_TOP_MCU_EMI_BASE MT_TOP(0x1c4) +#define MT_TOP_MCU_EMI_BASE_MASK GENMASK(19, 0) + +#define MT_TOP_CONN_INFRA_WAKEUP MT_TOP(0x1a0) +#define MT_TOP_CONN_INFRA_WAKEUP_MASK BIT(0) + +#define MT_TOP_WFSYS_RESET_STATUS MT_TOP(0x2cc) +#define MT_TOP_WFSYS_RESET_STATUS_MASK BIT(30) + +/* SEMA */ +#define MT_SEMA_BASE 0x18070000 +#define MT_SEMA(ofs) (MT_SEMA_BASE + (ofs)) + +#define MT_SEMA_RFSPI_STATUS (MT_SEMA(0x2000) + (11 * 4)) +#define MT_SEMA_RFSPI_RELEASE (MT_SEMA(0x2200) + (11 * 4)) +#define MT_SEMA_RFSPI_STATUS_MASK BIT(1) + +/* MCU BUS */ +#define MT_MCU_BUS_BASE 0x18400000 +#define MT_MCU_BUS(ofs) (MT_MCU_BUS_BASE + (ofs)) + +#define MT_MCU_BUS_TIMEOUT MT_MCU_BUS(0xf0440) +#define MT_MCU_BUS_TIMEOUT_SET_MASK GENMASK(7, 0) +#define MT_MCU_BUS_TIMEOUT_CG_EN_MASK BIT(28) +#define MT_MCU_BUS_TIMEOUT_EN_MASK BIT(31) -#define MT_PCIE1_MAC_BASE 0x74020000 -#define MT_PCIE1_MAC(ofs) (MT_PCIE1_MAC_BASE + (ofs)) -#define MT_PCIE1_MAC_INT_ENABLE MT_PCIE1_MAC(0x188) +#define MT_MCU_BUS_REMAP MT_MCU_BUS(0x120) +/* TOP CFG */ +#define MT_TOP_CFG_BASE 0x184b0000 +#define MT_TOP_CFG(ofs) (MT_TOP_CFG_BASE + (ofs)) + +#define MT_TOP_CFG_IP_VERSION_ADDR MT_TOP_CFG(0x010) + +/* TOP CFG ON */ +#define MT_TOP_CFG_ON_BASE 0x184c1000 +#define MT_TOP_CFG_ON(ofs) (MT_TOP_CFG_ON_BASE + (ofs)) + +#define MT_TOP_CFG_ON_ROM_IDX MT_TOP_CFG_ON(0x604) + +/* SLP CTRL */ +#define MT_SLP_BASE 0x184c3000 +#define MT_SLP(ofs) (MT_SLP_BASE + (ofs)) + +#define MT_SLP_STATUS MT_SLP(0x00c) +#define MT_SLP_WFDMA2CONN_MASK (BIT(21) | BIT(23)) +#define MT_SLP_CTRL_EN_MASK BIT(0) +#define MT_SLP_CTRL_BSY_MASK BIT(1) + +/* MCU BUS DBG */ +#define MT_MCU_BUS_DBG_BASE 0x18500000 +#define MT_MCU_BUS_DBG(ofs) (MT_MCU_BUS_DBG_BASE + (ofs)) + +#define MT_MCU_BUS_DBG_TIMEOUT MT_MCU_BUS_DBG(0x0) +#define MT_MCU_BUS_DBG_TIMEOUT_SET_MASK GENMASK(31, 16) +#define MT_MCU_BUS_DBG_TIMEOUT_CK_EN_MASK BIT(3) +#define MT_MCU_BUS_DBG_TIMEOUT_EN_MASK BIT(2) + +/* PCIE MAC */ #define MT_PCIE_MAC_BASE 0x74030000 #define MT_PCIE_MAC(ofs) (MT_PCIE_MAC_BASE + (ofs)) #define MT_PCIE_MAC_INT_ENABLE MT_PCIE_MAC(0x188) -#define MT_WF_IRPI_BASE 0x83006000 -#define MT_WF_IRPI(ofs) (MT_WF_IRPI_BASE + ((ofs) << 16)) +#define MT_PCIE1_MAC_INT_ENABLE 0x74020188 +#define MT_PCIE1_MAC_INT_ENABLE_MT7916 0x74090188 + +/* PP TOP */ +#define MT_WF_PP_TOP_BASE 0x820cc000 +#define MT_WF_PP_TOP(ofs) (MT_WF_PP_TOP_BASE + (ofs)) + +#define MT_WF_PP_TOP_RXQ_WFDMA_CF_5 MT_WF_PP_TOP(0x0e8) +#define MT_WF_PP_TOP_RXQ_QID6_WFDMA_HIF_SEL_MASK BIT(6) + +#define MT_WF_IRPI_BASE 0x83000000 +#define MT_WF_IRPI(ofs) (MT_WF_IRPI_BASE + (ofs)) + +#define MT_WF_IRPI_NSS(phy, nss) MT_WF_IRPI(0x6000 + ((phy) << 20) + ((nss) << 16)) +#define MT_WF_IRPI_NSS_MT7916(phy, nss) MT_WF_IRPI(0x1000 + ((phy) << 20) + ((nss) << 16)) -/* PHY: band 0(0x83080000), band 1(0x83090000) */ +/* PHY */ #define MT_WF_PHY_BASE 0x83080000 #define MT_WF_PHY(ofs) (MT_WF_PHY_BASE + (ofs)) #define MT_WF_PHY_RX_CTRL1(_phy) MT_WF_PHY(0x2004 + ((_phy) << 16)) +#define MT_WF_PHY_RX_CTRL1_MT7916(_phy) MT_WF_PHY(0x2004 + ((_phy) << 20)) #define MT_WF_PHY_RX_CTRL1_IPI_EN GENMASK(2, 0) #define MT_WF_PHY_RX_CTRL1_STSCNT_EN GENMASK(11, 9) #define MT_WF_PHY_RXTD12(_phy) MT_WF_PHY(0x8230 + ((_phy) << 16)) +#define MT_WF_PHY_RXTD12_MT7916(_phy) MT_WF_PHY(0x8230 + ((_phy) << 20)) #define MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY BIT(18) -#define MT_WF_PHY_RXTD12_IRPI_SW_CLR BIT(29) +#define MT_WF_PHY_RXTD12_IRPI_SW_CLR BIT(29) #define MT_MCU_WM_CIRQ_BASE 0x89010000 #define MT_MCU_WM_CIRQ(ofs) (MT_MCU_WM_CIRQ_BASE + (ofs)) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/soc.c b/drivers/net/wireless/mediatek/mt76/mt7915/soc.c new file mode 100644 index 000000000000..3028c02cb840 --- /dev/null +++ b/drivers/net/wireless/mediatek/mt76/mt7915/soc.c @@ -0,0 +1,1212 @@ +// SPDX-License-Identifier: ISC +/* Copyright (C) 2022 MediaTek Inc. */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/pinctrl/consumer.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/of_reserved_mem.h> +#include <linux/of_gpio.h> +#include <linux/iopoll.h> +#include <linux/reset.h> +#include <linux/of_net.h> + +#include "mt7915.h" + +/* INFRACFG */ +#define MT_INFRACFG_CONN2AP_SLPPROT 0x0d0 +#define MT_INFRACFG_AP2CONN_SLPPROT 0x0d4 + +#define MT_INFRACFG_RX_EN_MASK BIT(16) +#define MT_INFRACFG_TX_RDY_MASK BIT(4) +#define MT_INFRACFG_TX_EN_MASK BIT(0) + +/* TOP POS */ +#define MT_TOP_POS_FAST_CTRL 0x114 +#define MT_TOP_POS_FAST_EN_MASK BIT(3) + +#define MT_TOP_POS_SKU 0x21c +#define MT_TOP_POS_SKU_MASK GENMASK(31, 28) +#define MT_TOP_POS_SKU_ADIE_DBDC_MASK BIT(2) + +enum { + ADIE_SB, + ADIE_DBDC +}; + +static int +mt76_wmac_spi_read(struct mt7915_dev *dev, u8 adie, u32 addr, u32 *val) +{ + int ret; + u32 cur; + + ret = read_poll_timeout(mt76_rr, cur, !(cur & MT_TOP_SPI_POLLING_BIT), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_TOP_SPI_BUSY_CR(adie)); + if (ret) + return ret; + + mt76_wr(dev, MT_TOP_SPI_ADDR_CR(adie), + MT_TOP_SPI_READ_ADDR_FORMAT | addr); + mt76_wr(dev, MT_TOP_SPI_WRITE_DATA_CR(adie), 0); + + ret = read_poll_timeout(mt76_rr, cur, !(cur & MT_TOP_SPI_POLLING_BIT), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_TOP_SPI_BUSY_CR(adie)); + if (ret) + return ret; + + *val = mt76_rr(dev, MT_TOP_SPI_READ_DATA_CR(adie)); + + return 0; +} + +static int +mt76_wmac_spi_write(struct mt7915_dev *dev, u8 adie, u32 addr, u32 val) +{ + int ret; + u32 cur; + + ret = read_poll_timeout(mt76_rr, cur, !(cur & MT_TOP_SPI_POLLING_BIT), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_TOP_SPI_BUSY_CR(adie)); + if (ret) + return ret; + + mt76_wr(dev, MT_TOP_SPI_ADDR_CR(adie), + MT_TOP_SPI_WRITE_ADDR_FORMAT | addr); + mt76_wr(dev, MT_TOP_SPI_WRITE_DATA_CR(adie), val); + + return read_poll_timeout(mt76_rr, cur, !(cur & MT_TOP_SPI_POLLING_BIT), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_TOP_SPI_BUSY_CR(adie)); +} + +static int +mt76_wmac_spi_rmw(struct mt7915_dev *dev, u8 adie, + u32 addr, u32 mask, u32 val) +{ + u32 cur, ret; + + ret = mt76_wmac_spi_read(dev, adie, addr, &cur); + if (ret) + return ret; + + cur &= ~mask; + cur |= val; + + return mt76_wmac_spi_write(dev, adie, addr, cur); +} + +static int +mt7986_wmac_adie_efuse_read(struct mt7915_dev *dev, u8 adie, + u32 addr, u32 *data) +{ + int ret, temp; + u32 val, mask; + + ret = mt76_wmac_spi_write(dev, adie, MT_ADIE_EFUSE_CFG, + MT_ADIE_EFUSE_CTRL_MASK); + if (ret) + return ret; + + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_EFUSE2_CTRL, BIT(30), 0x0); + if (ret) + return ret; + + mask = (MT_ADIE_EFUSE_MODE_MASK | MT_ADIE_EFUSE_ADDR_MASK | + MT_ADIE_EFUSE_KICK_MASK); + val = FIELD_PREP(MT_ADIE_EFUSE_MODE_MASK, 0) | + FIELD_PREP(MT_ADIE_EFUSE_ADDR_MASK, addr) | + FIELD_PREP(MT_ADIE_EFUSE_KICK_MASK, 1); + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_EFUSE2_CTRL, mask, val); + if (ret) + return ret; + + ret = read_poll_timeout(mt76_wmac_spi_read, temp, + !temp && !FIELD_GET(MT_ADIE_EFUSE_KICK_MASK, val), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, adie, MT_ADIE_EFUSE2_CTRL, &val); + if (ret) + return ret; + + ret = mt76_wmac_spi_read(dev, adie, MT_ADIE_EFUSE2_CTRL, &val); + if (ret) + return ret; + + if (FIELD_GET(MT_ADIE_EFUSE_VALID_MASK, val) == 1) + ret = mt76_wmac_spi_read(dev, adie, MT_ADIE_EFUSE_RDATA0, + data); + + return ret; +} + +static inline void mt76_wmac_spi_lock(struct mt7915_dev *dev) +{ + u32 cur; + + read_poll_timeout(mt76_rr, cur, + FIELD_GET(MT_SEMA_RFSPI_STATUS_MASK, cur), + 1000, 1000 * MSEC_PER_SEC, false, dev, + MT_SEMA_RFSPI_STATUS); +} + +static inline void mt76_wmac_spi_unlock(struct mt7915_dev *dev) +{ + mt76_wr(dev, MT_SEMA_RFSPI_RELEASE, 1); +} + +static u32 mt76_wmac_rmw(void __iomem *base, u32 offset, u32 mask, u32 val) +{ + val |= readl(base + offset) & ~mask; + writel(val, base + offset); + + return val; +} + +static u8 mt7986_wmac_check_adie_type(struct mt7915_dev *dev) +{ + u32 val; + + val = readl(dev->sku + MT_TOP_POS_SKU); + + return FIELD_GET(MT_TOP_POS_SKU_ADIE_DBDC_MASK, val); +} + +static int mt7986_wmac_consys_reset(struct mt7915_dev *dev, bool enable) +{ + if (!enable) + return reset_control_assert(dev->rstc); + + mt76_wmac_rmw(dev->sku, MT_TOP_POS_FAST_CTRL, + MT_TOP_POS_FAST_EN_MASK, + FIELD_PREP(MT_TOP_POS_FAST_EN_MASK, 0x1)); + + return reset_control_deassert(dev->rstc); +} + +static int mt7986_wmac_gpio_setup(struct mt7915_dev *dev) +{ + struct pinctrl_state *state; + struct pinctrl *pinctrl; + int ret; + u8 type; + + type = mt7986_wmac_check_adie_type(dev); + pinctrl = devm_pinctrl_get(dev->mt76.dev); + if (IS_ERR(pinctrl)) + return PTR_ERR(pinctrl); + + switch (type) { + case ADIE_SB: + state = pinctrl_lookup_state(pinctrl, "default"); + if (IS_ERR_OR_NULL(state)) + return -EINVAL; + break; + case ADIE_DBDC: + state = pinctrl_lookup_state(pinctrl, "dbdc"); + if (IS_ERR_OR_NULL(state)) + return -EINVAL; + break; + } + + ret = pinctrl_select_state(pinctrl, state); + if (ret) + return ret; + + usleep_range(500, 1000); + + return 0; +} + +static int mt7986_wmac_consys_lockup(struct mt7915_dev *dev, bool enable) +{ + int ret; + u32 cur; + + mt76_wmac_rmw(dev->dcm, MT_INFRACFG_AP2CONN_SLPPROT, + MT_INFRACFG_RX_EN_MASK, + FIELD_PREP(MT_INFRACFG_RX_EN_MASK, enable)); + ret = read_poll_timeout(readl, cur, !(cur & MT_INFRACFG_RX_EN_MASK), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev->dcm + MT_INFRACFG_AP2CONN_SLPPROT); + if (ret) + return ret; + + mt76_wmac_rmw(dev->dcm, MT_INFRACFG_AP2CONN_SLPPROT, + MT_INFRACFG_TX_EN_MASK, + FIELD_PREP(MT_INFRACFG_TX_EN_MASK, enable)); + ret = read_poll_timeout(readl, cur, !(cur & MT_INFRACFG_TX_RDY_MASK), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev->dcm + MT_INFRACFG_AP2CONN_SLPPROT); + if (ret) + return ret; + + mt76_wmac_rmw(dev->dcm, MT_INFRACFG_CONN2AP_SLPPROT, + MT_INFRACFG_RX_EN_MASK, + FIELD_PREP(MT_INFRACFG_RX_EN_MASK, enable)); + mt76_wmac_rmw(dev->dcm, MT_INFRACFG_CONN2AP_SLPPROT, + MT_INFRACFG_TX_EN_MASK, + FIELD_PREP(MT_INFRACFG_TX_EN_MASK, enable)); + + return 0; +} + +static int mt7986_wmac_coninfra_check(struct mt7915_dev *dev) +{ + u32 cur; + + return read_poll_timeout(mt76_rr, cur, (cur == 0x02070000), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, + false, dev, MT_CONN_INFRA_BASE); +} + +static int mt7986_wmac_coninfra_setup(struct mt7915_dev *dev) +{ + struct device *pdev = dev->mt76.dev; + struct reserved_mem *rmem; + struct device_node *np; + u32 val; + + np = of_parse_phandle(pdev->of_node, "memory-region", 0); + if (!np) + return -EINVAL; + + rmem = of_reserved_mem_lookup(np); + if (!rmem) + return -EINVAL; + + val = (rmem->base >> 16) & MT_TOP_MCU_EMI_BASE_MASK; + + /* Set conninfra subsys PLL check */ + mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS, + MT_INFRA_CKGEN_BUS_RDY_SEL_MASK, 0x1); + mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS, + MT_INFRA_CKGEN_BUS_RDY_SEL_MASK, 0x1); + + mt76_rmw_field(dev, MT_TOP_MCU_EMI_BASE, + MT_TOP_MCU_EMI_BASE_MASK, val); + + mt76_wr(dev, MT_INFRA_BUS_EMI_START, rmem->base); + mt76_wr(dev, MT_INFRA_BUS_EMI_END, rmem->size); + + mt76_rr(dev, MT_CONN_INFRA_EFUSE); + + /* Set conninfra sysram */ + mt76_wr(dev, MT_TOP_RGU_SYSRAM_PDN, 0); + mt76_wr(dev, MT_TOP_RGU_SYSRAM_SLP, 1); + + return 0; +} + +static int mt7986_wmac_sku_setup(struct mt7915_dev *dev, u32 *adie_type) +{ + int ret; + u32 adie_main, adie_ext; + + mt76_rmw_field(dev, MT_CONN_INFRA_ADIE_RESET, + MT_CONN_INFRA_ADIE1_RESET_MASK, 0x1); + mt76_rmw_field(dev, MT_CONN_INFRA_ADIE_RESET, + MT_CONN_INFRA_ADIE2_RESET_MASK, 0x1); + + mt76_wmac_spi_lock(dev); + + ret = mt76_wmac_spi_read(dev, 0, MT_ADIE_CHIP_ID, &adie_main); + if (ret) + goto out; + + ret = mt76_wmac_spi_read(dev, 1, MT_ADIE_CHIP_ID, &adie_ext); + if (ret) + goto out; + + *adie_type = FIELD_GET(MT_ADIE_CHIP_ID_MASK, adie_main) | + (MT_ADIE_CHIP_ID_MASK & adie_ext); + +out: + mt76_wmac_spi_unlock(dev); + + return 0; +} + +static inline u16 mt7986_adie_idx(u8 adie, u32 adie_type) +{ + if (adie == 0) + return u32_get_bits(adie_type, MT_ADIE_IDX0); + else + return u32_get_bits(adie_type, MT_ADIE_IDX1); +} + +static inline bool is_7975(struct mt7915_dev *dev, u8 adie, u32 adie_type) +{ + return mt7986_adie_idx(adie, adie_type) == 0x7975; +} + +static inline bool is_7976(struct mt7915_dev *dev, u8 adie, u32 adie_type) +{ + return mt7986_adie_idx(adie, adie_type) == 0x7976; +} + +static int mt7986_wmac_adie_thermal_cal(struct mt7915_dev *dev, u8 adie) +{ + int ret; + u32 data, val; + + ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_THADC_ANALOG, + &data); + if (ret || FIELD_GET(MT_ADIE_ANA_EN_MASK, data)) { + val = FIELD_GET(MT_ADIE_VRPI_SEL_EFUSE_MASK, data); + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_RG_TOP_THADC_BG, + MT_ADIE_VRPI_SEL_CR_MASK, + FIELD_PREP(MT_ADIE_VRPI_SEL_CR_MASK, val)); + if (ret) + return ret; + + val = FIELD_GET(MT_ADIE_PGA_GAIN_EFUSE_MASK, data); + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_RG_TOP_THADC, + MT_ADIE_PGA_GAIN_MASK, + FIELD_PREP(MT_ADIE_PGA_GAIN_MASK, val)); + if (ret) + return ret; + } + + ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_THADC_SLOP, + &data); + if (ret || FIELD_GET(MT_ADIE_ANA_EN_MASK, data)) { + val = FIELD_GET(MT_ADIE_LDO_CTRL_EFUSE_MASK, data); + + return mt76_wmac_spi_rmw(dev, adie, MT_ADIE_RG_TOP_THADC, + MT_ADIE_LDO_CTRL_MASK, + FIELD_PREP(MT_ADIE_LDO_CTRL_MASK, val)); + } + + return 0; +} + +static int +mt7986_read_efuse_xo_trim_7976(struct mt7915_dev *dev, u8 adie, + bool is_40m, int *result) +{ + int ret; + u32 data, addr; + + addr = is_40m ? MT_ADIE_XTAL_AXM_40M_OSC : MT_ADIE_XTAL_AXM_80M_OSC; + ret = mt7986_wmac_adie_efuse_read(dev, adie, addr, &data); + if (ret) + return ret; + + if (!FIELD_GET(MT_ADIE_XO_TRIM_EN_MASK, data)) { + *result = 64; + } else { + *result = FIELD_GET(MT_ADIE_TRIM_MASK, data); + addr = is_40m ? MT_ADIE_XTAL_TRIM1_40M_OSC : + MT_ADIE_XTAL_TRIM1_80M_OSC; + ret = mt7986_wmac_adie_efuse_read(dev, adie, addr, &data); + if (ret) + return ret; + + if (FIELD_GET(MT_ADIE_XO_TRIM_EN_MASK, data) && + FIELD_GET(MT_ADIE_XTAL_DECREASE_MASK, data)) + *result -= FIELD_GET(MT_ADIE_EFUSE_TRIM_MASK, data); + else if (FIELD_GET(MT_ADIE_XO_TRIM_EN_MASK, data)) + *result += FIELD_GET(MT_ADIE_EFUSE_TRIM_MASK, data); + + *result = max(0, min(127, *result)); + } + + return 0; +} + +static int mt7986_wmac_adie_xtal_trim_7976(struct mt7915_dev *dev, u8 adie) +{ + int ret, trim_80m, trim_40m; + u32 data, val, mode; + + ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_XO_TRIM_FLOW, + &data); + if (ret || !FIELD_GET(BIT(1), data)) + return 0; + + ret = mt7986_read_efuse_xo_trim_7976(dev, adie, false, &trim_80m); + if (ret) + return ret; + + ret = mt7986_read_efuse_xo_trim_7976(dev, adie, true, &trim_40m); + if (ret) + return ret; + + ret = mt76_wmac_spi_read(dev, adie, MT_ADIE_RG_STRAP_PIN_IN, &val); + if (ret) + return ret; + + mode = FIELD_PREP(GENMASK(6, 4), val); + if (!mode || mode == 0x2) { + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_XTAL_C1, + GENMASK(31, 24), + FIELD_PREP(GENMASK(31, 24), trim_80m)); + if (ret) + return ret; + + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_XTAL_C2, + GENMASK(31, 24), + FIELD_PREP(GENMASK(31, 24), trim_80m)); + } else if (mode == 0x3 || mode == 0x4 || mode == 0x6) { + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_XTAL_C1, + GENMASK(23, 16), + FIELD_PREP(GENMASK(23, 16), trim_40m)); + if (ret) + return ret; + + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_XTAL_C2, + GENMASK(23, 16), + FIELD_PREP(GENMASK(23, 16), trim_40m)); + } + + return ret; +} + +static int mt7986_wmac_adie_patch_7976(struct mt7915_dev *dev, u8 adie) +{ + int ret; + + ret = mt76_wmac_spi_write(dev, adie, MT_ADIE_RG_TOP_THADC, 0x4a563b00); + if (ret) + return ret; + + ret = mt76_wmac_spi_write(dev, adie, MT_ADIE_RG_XO_01, 0x1d59080f); + if (ret) + return ret; + + return mt76_wmac_spi_write(dev, adie, MT_ADIE_RG_XO_03, 0x34c00fe0); +} + +static int +mt7986_read_efuse_xo_trim_7975(struct mt7915_dev *dev, u8 adie, + u32 addr, u32 *result) +{ + int ret; + u32 data; + + ret = mt7986_wmac_adie_efuse_read(dev, adie, addr, &data); + if (ret) + return ret; + + if ((data & MT_ADIE_XO_TRIM_EN_MASK)) { + if ((data & MT_ADIE_XTAL_DECREASE_MASK)) + *result -= (data & MT_ADIE_EFUSE_TRIM_MASK); + else + *result += (data & MT_ADIE_EFUSE_TRIM_MASK); + + *result = (*result & MT_ADIE_TRIM_MASK); + } + + return 0; +} + +static int mt7986_wmac_adie_xtal_trim_7975(struct mt7915_dev *dev, u8 adie) +{ + int ret; + u32 data, result = 0, value; + + ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_7975_XTAL_EN, + &data); + if (ret || !(data & BIT(1))) + return 0; + + ret = mt7986_wmac_adie_efuse_read(dev, adie, MT_ADIE_7975_XTAL_CAL, + &data); + if (ret) + return ret; + + if (data & MT_ADIE_XO_TRIM_EN_MASK) + result = (data & MT_ADIE_TRIM_MASK); + + ret = mt7986_read_efuse_xo_trim_7975(dev, adie, MT_ADIE_7975_XO_TRIM2, + &result); + if (ret) + return ret; + + ret = mt7986_read_efuse_xo_trim_7975(dev, adie, MT_ADIE_7975_XO_TRIM3, + &result); + if (ret) + return ret; + + ret = mt7986_read_efuse_xo_trim_7975(dev, adie, MT_ADIE_7975_XO_TRIM4, + &result); + if (ret) + return ret; + + /* Update trim value to C1 and C2*/ + value = FIELD_GET(MT_ADIE_7975_XO_CTRL2_C1_MASK, result) | + FIELD_GET(MT_ADIE_7975_XO_CTRL2_C2_MASK, result); + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_7975_XO_CTRL2, + MT_ADIE_7975_XO_CTRL2_MASK, value); + if (ret) + return ret; + + ret = mt76_wmac_spi_read(dev, adie, MT_ADIE_7975_XTAL, &value); + if (ret) + return ret; + + if (value & MT_ADIE_7975_XTAL_EN_MASK) { + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_7975_XO_2, + MT_ADIE_7975_XO_2_FIX_EN, 0x0); + if (ret) + return ret; + } + + return mt76_wmac_spi_rmw(dev, adie, MT_ADIE_7975_XO_CTRL6, + MT_ADIE_7975_XO_CTRL6_MASK, 0x1); +} + +static int mt7986_wmac_adie_patch_7975(struct mt7915_dev *dev, u8 adie) +{ + int ret; + + /* disable CAL LDO and fine tune RFDIG LDO */ + ret = mt76_wmac_spi_write(dev, adie, 0x348, 0x00000002); + if (ret) + return ret; + + ret = mt76_wmac_spi_write(dev, adie, 0x378, 0x00000002); + if (ret) + return ret; + + ret = mt76_wmac_spi_write(dev, adie, 0x3a8, 0x00000002); + if (ret) + return ret; + + ret = mt76_wmac_spi_write(dev, adie, 0x3d8, 0x00000002); + if (ret) + return ret; + + /* set CKA driving and filter */ + ret = mt76_wmac_spi_write(dev, adie, 0xa1c, 0x30000aaa); + if (ret) + return ret; + + /* set CKB LDO to 1.4V */ + ret = mt76_wmac_spi_write(dev, adie, 0xa84, 0x8470008a); + if (ret) + return ret; + + /* turn on SX0 LTBUF */ + ret = mt76_wmac_spi_write(dev, adie, 0x074, 0x00000002); + if (ret) + return ret; + + /* CK_BUF_SW_EN = 1 (all buf in manual mode.) */ + ret = mt76_wmac_spi_write(dev, adie, 0xaa4, 0x01001fc0); + if (ret) + return ret; + + /* BT mode/WF normal mode 00000005 */ + ret = mt76_wmac_spi_write(dev, adie, 0x070, 0x00000005); + if (ret) + return ret; + + /* BG thermal sensor offset update */ + ret = mt76_wmac_spi_write(dev, adie, 0x344, 0x00000088); + if (ret) + return ret; + + ret = mt76_wmac_spi_write(dev, adie, 0x374, 0x00000088); + if (ret) + return ret; + + ret = mt76_wmac_spi_write(dev, adie, 0x3a4, 0x00000088); + if (ret) + return ret; + + ret = mt76_wmac_spi_write(dev, adie, 0x3d4, 0x00000088); + if (ret) + return ret; + + /* set WCON VDD IPTAT to "0000" */ + ret = mt76_wmac_spi_write(dev, adie, 0xa80, 0x44d07000); + if (ret) + return ret; + + /* change back LTBUF SX3 drving to default value */ + ret = mt76_wmac_spi_write(dev, adie, 0xa88, 0x3900aaaa); + if (ret) + return ret; + + /* SM input cap off */ + ret = mt76_wmac_spi_write(dev, adie, 0x2c4, 0x00000000); + if (ret) + return ret; + + /* set CKB driving and filter */ + return mt76_wmac_spi_write(dev, adie, 0x2c8, 0x00000072); +} + +static int mt7986_wmac_adie_cfg(struct mt7915_dev *dev, u8 adie, u32 adie_type) +{ + int ret; + + mt76_wmac_spi_lock(dev); + ret = mt76_wmac_spi_write(dev, adie, MT_ADIE_CLK_EN, ~0); + if (ret) + goto out; + + if (is_7975(dev, adie, adie_type)) { + ret = mt76_wmac_spi_rmw(dev, adie, MT_ADIE_7975_COCLK, + BIT(1), 0x1); + if (ret) + goto out; + + ret = mt7986_wmac_adie_thermal_cal(dev, adie); + if (ret) + goto out; + + ret = mt7986_wmac_adie_xtal_trim_7975(dev, adie); + if (ret) + goto out; + + ret = mt7986_wmac_adie_patch_7975(dev, adie); + } else if (is_7976(dev, adie, adie_type)) { + if (mt7986_wmac_check_adie_type(dev) == ADIE_DBDC) { + ret = mt76_wmac_spi_write(dev, adie, + MT_ADIE_WRI_CK_SEL, 0x1c); + if (ret) + goto out; + } + + ret = mt7986_wmac_adie_thermal_cal(dev, adie); + if (ret) + goto out; + + ret = mt7986_wmac_adie_xtal_trim_7976(dev, adie); + if (ret) + goto out; + + ret = mt7986_wmac_adie_patch_7976(dev, adie); + } +out: + mt76_wmac_spi_unlock(dev); + + return ret; +} + +static int +mt7986_wmac_afe_cal(struct mt7915_dev *dev, u8 adie, bool dbdc, u32 adie_type) +{ + int ret; + u8 idx; + + mt76_wmac_spi_lock(dev); + if (is_7975(dev, adie, adie_type)) + ret = mt76_wmac_spi_write(dev, adie, + MT_AFE_RG_ENCAL_WBTAC_IF_SW, + 0x80000000); + else + ret = mt76_wmac_spi_write(dev, adie, + MT_AFE_RG_ENCAL_WBTAC_IF_SW, + 0x88888005); + if (ret) + goto out; + + idx = dbdc ? ADIE_DBDC : adie; + + mt76_rmw_field(dev, MT_AFE_DIG_EN_01(idx), + MT_AFE_RG_WBG_EN_RCK_MASK, 0x1); + usleep_range(60, 100); + + mt76_rmw(dev, MT_AFE_DIG_EN_01(idx), + MT_AFE_RG_WBG_EN_RCK_MASK, 0x0); + + mt76_rmw_field(dev, MT_AFE_DIG_EN_03(idx), + MT_AFE_RG_WBG_EN_BPLL_UP_MASK, 0x1); + usleep_range(30, 100); + + mt76_rmw_field(dev, MT_AFE_DIG_EN_03(idx), + MT_AFE_RG_WBG_EN_WPLL_UP_MASK, 0x1); + usleep_range(60, 100); + + mt76_rmw_field(dev, MT_AFE_DIG_EN_01(idx), + MT_AFE_RG_WBG_EN_TXCAL_MASK, 0x1f); + usleep_range(800, 1000); + + mt76_rmw(dev, MT_AFE_DIG_EN_01(idx), + MT_AFE_RG_WBG_EN_TXCAL_MASK, 0x0); + mt76_rmw(dev, MT_AFE_DIG_EN_03(idx), + MT_AFE_RG_WBG_EN_PLL_UP_MASK, 0x0); + + ret = mt76_wmac_spi_write(dev, adie, MT_AFE_RG_ENCAL_WBTAC_IF_SW, + 0x5); + +out: + mt76_wmac_spi_unlock(dev); + + return ret; +} + +static void mt7986_wmac_subsys_pll_initial(struct mt7915_dev *dev, u8 band) +{ + mt76_rmw(dev, MT_AFE_PLL_STB_TIME(band), + MT_AFE_PLL_STB_TIME_MASK, MT_AFE_PLL_STB_TIME_VAL); + + mt76_rmw(dev, MT_AFE_DIG_EN_02(band), + MT_AFE_PLL_CFG_MASK, MT_AFE_PLL_CFG_VAL); + + mt76_rmw(dev, MT_AFE_DIG_TOP_01(band), + MT_AFE_DIG_TOP_01_MASK, MT_AFE_DIG_TOP_01_VAL); +} + +static void mt7986_wmac_subsys_setting(struct mt7915_dev *dev) +{ + /* Subsys pll init */ + mt7986_wmac_subsys_pll_initial(dev, 0); + mt7986_wmac_subsys_pll_initial(dev, 1); + + /* Set legacy OSC control stable time*/ + mt76_rmw(dev, MT_CONN_INFRA_OSC_RC_EN, + MT_CONN_INFRA_OSC_RC_EN_MASK, 0x0); + mt76_rmw(dev, MT_CONN_INFRA_OSC_CTRL, + MT_CONN_INFRA_OSC_STB_TIME_MASK, 0x80706); + + /* prevent subsys from power on/of in a short time interval */ + mt76_rmw(dev, MT_TOP_WFSYS_PWR, + MT_TOP_PWR_ACK_MASK | MT_TOP_PWR_KEY_MASK, + MT_TOP_PWR_KEY); +} + +static int mt7986_wmac_bus_timeout(struct mt7915_dev *dev) +{ + mt76_rmw_field(dev, MT_INFRA_BUS_OFF_TIMEOUT, + MT_INFRA_BUS_TIMEOUT_LIMIT_MASK, 0x2); + + mt76_rmw_field(dev, MT_INFRA_BUS_OFF_TIMEOUT, + MT_INFRA_BUS_TIMEOUT_EN_MASK, 0xf); + + mt76_rmw_field(dev, MT_INFRA_BUS_ON_TIMEOUT, + MT_INFRA_BUS_TIMEOUT_LIMIT_MASK, 0xc); + + mt76_rmw_field(dev, MT_INFRA_BUS_ON_TIMEOUT, + MT_INFRA_BUS_TIMEOUT_EN_MASK, 0xf); + + return mt7986_wmac_coninfra_check(dev); +} + +static void mt7986_wmac_clock_enable(struct mt7915_dev *dev, u32 adie_type) +{ + u32 cur; + + mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS_WPLL_DIV_1, + MT_INFRA_CKGEN_DIV_SEL_MASK, 0x1); + + mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS_WPLL_DIV_2, + MT_INFRA_CKGEN_DIV_SEL_MASK, 0x1); + + mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS_WPLL_DIV_1, + MT_INFRA_CKGEN_DIV_EN_MASK, 0x1); + + mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS_WPLL_DIV_2, + MT_INFRA_CKGEN_DIV_EN_MASK, 0x1); + + mt76_rmw_field(dev, MT_INFRA_CKGEN_RFSPI_WPLL_DIV, + MT_INFRA_CKGEN_DIV_SEL_MASK, 0x8); + + mt76_rmw_field(dev, MT_INFRA_CKGEN_RFSPI_WPLL_DIV, + MT_INFRA_CKGEN_DIV_EN_MASK, 0x1); + + mt76_rmw_field(dev, MT_INFRA_CKGEN_BUS, + MT_INFRA_CKGEN_BUS_CLK_SEL_MASK, 0x0); + + mt76_rmw_field(dev, MT_CONN_INFRA_HW_CTRL, + MT_CONN_INFRA_HW_CTRL_MASK, 0x1); + + mt76_rmw(dev, MT_TOP_CONN_INFRA_WAKEUP, + MT_TOP_CONN_INFRA_WAKEUP_MASK, 0x1); + + usleep_range(900, 1000); + + mt76_wmac_spi_lock(dev); + if (is_7975(dev, 0, adie_type) || is_7976(dev, 0, adie_type)) { + mt76_rmw_field(dev, MT_ADIE_SLP_CTRL_CK0(0), + MT_SLP_CTRL_EN_MASK, 0x1); + + read_poll_timeout(mt76_rr, cur, !(cur & MT_SLP_CTRL_BSY_MASK), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_ADIE_SLP_CTRL_CK0(0)); + } + if (is_7975(dev, 1, adie_type) || is_7976(dev, 1, adie_type)) { + mt76_rmw_field(dev, MT_ADIE_SLP_CTRL_CK0(1), + MT_SLP_CTRL_EN_MASK, 0x1); + + read_poll_timeout(mt76_rr, cur, !(cur & MT_SLP_CTRL_BSY_MASK), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_ADIE_SLP_CTRL_CK0(0)); + } + mt76_wmac_spi_unlock(dev); + + mt76_rmw(dev, MT_TOP_CONN_INFRA_WAKEUP, + MT_TOP_CONN_INFRA_WAKEUP_MASK, 0x0); + usleep_range(900, 1000); +} + +static int mt7986_wmac_top_wfsys_wakeup(struct mt7915_dev *dev, bool enable) +{ + mt76_rmw_field(dev, MT_TOP_WFSYS_WAKEUP, + MT_TOP_WFSYS_WAKEUP_MASK, enable); + + usleep_range(900, 1000); + + if (!enable) + return 0; + + return mt7986_wmac_coninfra_check(dev); +} + +static int mt7986_wmac_wm_enable(struct mt7915_dev *dev, bool enable) +{ + u32 cur; + + mt76_rmw_field(dev, MT7986_TOP_WM_RESET, + MT7986_TOP_WM_RESET_MASK, enable); + if (!enable) + return 0; + + return read_poll_timeout(mt76_rr, cur, (cur == 0x1d1e), + USEC_PER_MSEC, 5000 * USEC_PER_MSEC, false, + dev, MT_TOP_CFG_ON_ROM_IDX); +} + +static int mt7986_wmac_wfsys_poweron(struct mt7915_dev *dev, bool enable) +{ + u32 mask = MT_TOP_PWR_EN_MASK | MT_TOP_PWR_KEY_MASK; + u32 cur; + + mt76_rmw(dev, MT_TOP_WFSYS_PWR, mask, + MT_TOP_PWR_KEY | FIELD_PREP(MT_TOP_PWR_EN_MASK, enable)); + + return read_poll_timeout(mt76_rr, cur, + (FIELD_GET(MT_TOP_WFSYS_RESET_STATUS_MASK, cur) == enable), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_TOP_WFSYS_RESET_STATUS); +} + +static int mt7986_wmac_wfsys_setting(struct mt7915_dev *dev) +{ + int ret; + u32 cur; + + /* Turn off wfsys2conn bus sleep protect */ + mt76_rmw(dev, MT_CONN_INFRA_WF_SLP_PROT, + MT_CONN_INFRA_WF_SLP_PROT_MASK, 0x0); + + ret = mt7986_wmac_wfsys_poweron(dev, true); + if (ret) + return ret; + + /* Check bus sleep protect */ + + ret = read_poll_timeout(mt76_rr, cur, + !(cur & MT_CONN_INFRA_CONN_WF_MASK), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_CONN_INFRA_WF_SLP_PROT_RDY); + if (ret) + return ret; + + ret = read_poll_timeout(mt76_rr, cur, !(cur & MT_SLP_WFDMA2CONN_MASK), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_SLP_STATUS); + if (ret) + return ret; + + return read_poll_timeout(mt76_rr, cur, (cur == 0x02060000), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_TOP_CFG_IP_VERSION_ADDR); +} + +static void mt7986_wmac_wfsys_set_timeout(struct mt7915_dev *dev) +{ + u32 mask = MT_MCU_BUS_TIMEOUT_SET_MASK | + MT_MCU_BUS_TIMEOUT_CG_EN_MASK | + MT_MCU_BUS_TIMEOUT_EN_MASK; + u32 val = FIELD_PREP(MT_MCU_BUS_TIMEOUT_SET_MASK, 1) | + FIELD_PREP(MT_MCU_BUS_TIMEOUT_CG_EN_MASK, 1) | + FIELD_PREP(MT_MCU_BUS_TIMEOUT_EN_MASK, 1); + + mt76_rmw(dev, MT_MCU_BUS_TIMEOUT, mask, val); + + mt76_wr(dev, MT_MCU_BUS_REMAP, 0x810f0000); + + mask = MT_MCU_BUS_DBG_TIMEOUT_SET_MASK | + MT_MCU_BUS_DBG_TIMEOUT_CK_EN_MASK | + MT_MCU_BUS_DBG_TIMEOUT_EN_MASK; + val = FIELD_PREP(MT_MCU_BUS_DBG_TIMEOUT_SET_MASK, 0x3aa) | + FIELD_PREP(MT_MCU_BUS_DBG_TIMEOUT_CK_EN_MASK, 1) | + FIELD_PREP(MT_MCU_BUS_DBG_TIMEOUT_EN_MASK, 1); + + mt76_rmw(dev, MT_MCU_BUS_DBG_TIMEOUT, mask, val); +} + +static int mt7986_wmac_sku_update(struct mt7915_dev *dev, u32 adie_type) +{ + u32 val; + + if (is_7976(dev, 0, adie_type) && is_7976(dev, 1, adie_type)) + val = 0xf; + else if (is_7975(dev, 0, adie_type) && is_7975(dev, 1, adie_type)) + val = 0xd; + else if (is_7976(dev, 0, adie_type)) + val = 0x7; + else if (is_7975(dev, 1, adie_type)) + val = 0x8; + else if (is_7976(dev, 1, adie_type)) + val = 0xa; + else + return -EINVAL; + + mt76_wmac_rmw(dev->sku, MT_TOP_POS_SKU, MT_TOP_POS_SKU_MASK, + FIELD_PREP(MT_TOP_POS_SKU_MASK, val)); + + mt76_wr(dev, MT_CONNINFRA_SKU_DEC_ADDR, val); + + return 0; +} + +static int +mt7986_wmac_adie_setup(struct mt7915_dev *dev, u8 adie, u32 adie_type) +{ + int ret; + + if (!(is_7975(dev, adie, adie_type) || is_7976(dev, adie, adie_type))) + return 0; + + ret = mt7986_wmac_adie_cfg(dev, adie, adie_type); + if (ret) + return ret; + + ret = mt7986_wmac_afe_cal(dev, adie, false, adie_type); + if (ret) + return ret; + + if (!adie && (mt7986_wmac_check_adie_type(dev) == ADIE_DBDC)) + ret = mt7986_wmac_afe_cal(dev, adie, true, adie_type); + + return ret; +} + +static int mt7986_wmac_subsys_powerup(struct mt7915_dev *dev, u32 adie_type) +{ + int ret; + + mt7986_wmac_subsys_setting(dev); + + ret = mt7986_wmac_bus_timeout(dev); + if (ret) + return ret; + + mt7986_wmac_clock_enable(dev, adie_type); + + return 0; +} + +static int mt7986_wmac_wfsys_powerup(struct mt7915_dev *dev) +{ + int ret; + + ret = mt7986_wmac_wm_enable(dev, false); + if (ret) + return ret; + + ret = mt7986_wmac_wfsys_setting(dev); + if (ret) + return ret; + + mt7986_wmac_wfsys_set_timeout(dev); + + return mt7986_wmac_wm_enable(dev, true); +} + +int mt7986_wmac_enable(struct mt7915_dev *dev) +{ + int ret; + u32 adie_type; + + ret = mt7986_wmac_consys_reset(dev, true); + if (ret) + return ret; + + ret = mt7986_wmac_gpio_setup(dev); + if (ret) + return ret; + + ret = mt7986_wmac_consys_lockup(dev, false); + if (ret) + return ret; + + ret = mt7986_wmac_coninfra_check(dev); + if (ret) + return ret; + + ret = mt7986_wmac_coninfra_setup(dev); + if (ret) + return ret; + + ret = mt7986_wmac_sku_setup(dev, &adie_type); + if (ret) + return ret; + + ret = mt7986_wmac_adie_setup(dev, 0, adie_type); + if (ret) + return ret; + + ret = mt7986_wmac_adie_setup(dev, 1, adie_type); + if (ret) + return ret; + + ret = mt7986_wmac_subsys_powerup(dev, adie_type); + if (ret) + return ret; + + ret = mt7986_wmac_top_wfsys_wakeup(dev, true); + if (ret) + return ret; + + ret = mt7986_wmac_wfsys_powerup(dev); + if (ret) + return ret; + + return mt7986_wmac_sku_update(dev, adie_type); +} + +void mt7986_wmac_disable(struct mt7915_dev *dev) +{ + u32 cur; + + mt7986_wmac_top_wfsys_wakeup(dev, true); + + /* Turn on wfsys2conn bus sleep protect */ + mt76_rmw_field(dev, MT_CONN_INFRA_WF_SLP_PROT, + MT_CONN_INFRA_WF_SLP_PROT_MASK, 0x1); + + /* Check wfsys2conn bus sleep protect */ + read_poll_timeout(mt76_rr, cur, !(cur ^ MT_CONN_INFRA_CONN), + USEC_PER_MSEC, 50 * USEC_PER_MSEC, false, + dev, MT_CONN_INFRA_WF_SLP_PROT_RDY); + + mt7986_wmac_wfsys_poweron(dev, false); + + /* Turn back wpll setting */ + mt76_rmw_field(dev, MT_AFE_DIG_EN_02(0), MT_AFE_MCU_BPLL_CFG_MASK, 0x2); + mt76_rmw_field(dev, MT_AFE_DIG_EN_02(0), MT_AFE_WPLL_CFG_MASK, 0x2); + + /* Reset EMI */ + mt76_rmw_field(dev, MT_CONN_INFRA_EMI_REQ, + MT_CONN_INFRA_EMI_REQ_MASK, 0x1); + mt76_rmw_field(dev, MT_CONN_INFRA_EMI_REQ, + MT_CONN_INFRA_EMI_REQ_MASK, 0x0); + mt76_rmw_field(dev, MT_CONN_INFRA_EMI_REQ, + MT_CONN_INFRA_INFRA_REQ_MASK, 0x1); + mt76_rmw_field(dev, MT_CONN_INFRA_EMI_REQ, + MT_CONN_INFRA_INFRA_REQ_MASK, 0x0); + + mt7986_wmac_top_wfsys_wakeup(dev, false); + mt7986_wmac_consys_lockup(dev, true); + mt7986_wmac_consys_reset(dev, false); +} + +static int mt7986_wmac_init(struct mt7915_dev *dev) +{ + struct device *pdev = dev->mt76.dev; + struct platform_device *pfdev = to_platform_device(pdev); + + dev->dcm = devm_platform_ioremap_resource(pfdev, 1); + if (IS_ERR(dev->dcm)) + return PTR_ERR(dev->dcm); + + dev->sku = devm_platform_ioremap_resource(pfdev, 2); + if (IS_ERR(dev->sku)) + return PTR_ERR(dev->sku); + + dev->rstc = devm_reset_control_get(pdev, "consys"); + if (IS_ERR(dev->rstc)) + return PTR_ERR(dev->rstc); + + return mt7986_wmac_enable(dev); +} + +static int mt7986_wmac_probe(struct platform_device *pdev) +{ + void __iomem *mem_base; + struct mt7915_dev *dev; + struct mt76_dev *mdev; + int irq, ret; + u32 chip_id; + + chip_id = (uintptr_t)of_device_get_match_data(&pdev->dev); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + mem_base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(mem_base)) { + dev_err(&pdev->dev, "Failed to get memory resource\n"); + return PTR_ERR(mem_base); + } + + dev = mt7915_mmio_probe(&pdev->dev, mem_base, chip_id); + if (IS_ERR(dev)) + return PTR_ERR(dev); + + mdev = &dev->mt76; + ret = devm_request_irq(mdev->dev, irq, mt7915_irq_handler, + IRQF_SHARED, KBUILD_MODNAME, dev); + if (ret) + goto free_device; + + mt76_wr(dev, MT_INT_MASK_CSR, 0); + + ret = mt7986_wmac_init(dev); + if (ret) + goto free_irq; + + ret = mt7915_register_device(dev); + if (ret) + goto free_irq; + + return 0; + +free_irq: + devm_free_irq(mdev->dev, irq, dev); + +free_device: + mt76_free_device(&dev->mt76); + + return ret; +} + +static int mt7986_wmac_remove(struct platform_device *pdev) +{ + struct mt7915_dev *dev = platform_get_drvdata(pdev); + + mt7915_unregister_device(dev); + + return 0; +} + +static const struct of_device_id mt7986_wmac_of_match[] = { + { .compatible = "mediatek,mt7986-wmac", .data = (u32 *)0x7986 }, + {}, +}; + +struct platform_driver mt7986_wmac_driver = { + .driver = { + .name = "mt7986-wmac", + .of_match_table = mt7986_wmac_of_match, + }, + .probe = mt7986_wmac_probe, + .remove = mt7986_wmac_remove, +}; + +MODULE_FIRMWARE(MT7986_FIRMWARE_WA); +MODULE_FIRMWARE(MT7986_FIRMWARE_WM); +MODULE_FIRMWARE(MT7986_FIRMWARE_WM_MT7975); +MODULE_FIRMWARE(MT7986_ROM_PATCH); +MODULE_FIRMWARE(MT7986_ROM_PATCH_MT7975); diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c index af80c2cf8c83..20f63644e929 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c @@ -23,30 +23,16 @@ struct reg_band { u32 band[2]; }; -#define REG_BAND(_reg) \ - { .band[0] = MT_##_reg(0), .band[1] = MT_##_reg(1) } -#define REG_BAND_IDX(_reg, _idx) \ - { .band[0] = MT_##_reg(0, _idx), .band[1] = MT_##_reg(1, _idx) } - -static const struct reg_band reg_backup_list[] = { - REG_BAND_IDX(AGG_PCR0, 0), - REG_BAND_IDX(AGG_PCR0, 1), - REG_BAND_IDX(AGG_AWSCR0, 0), - REG_BAND_IDX(AGG_AWSCR0, 1), - REG_BAND_IDX(AGG_AWSCR0, 2), - REG_BAND_IDX(AGG_AWSCR0, 3), - REG_BAND(AGG_MRCR), - REG_BAND(TMAC_TFCR0), - REG_BAND(TMAC_TCR0), - REG_BAND(AGG_ATCR1), - REG_BAND(AGG_ATCR3), - REG_BAND(TMAC_TRCR0), - REG_BAND(TMAC_ICR0), - REG_BAND_IDX(ARB_DRNGR0, 0), - REG_BAND_IDX(ARB_DRNGR0, 1), - REG_BAND(WF_RFCR), - REG_BAND(WF_RFCR1), -}; +#define REG_BAND(_list, _reg) \ + { _list.band[0] = MT_##_reg(0); \ + _list.band[1] = MT_##_reg(1); } +#define REG_BAND_IDX(_list, _reg, _idx) \ + { _list.band[0] = MT_##_reg(0, _idx); \ + _list.band[1] = MT_##_reg(1, _idx); } + +#define TM_REG_MAX_ID 17 +static struct reg_band reg_backup_list[TM_REG_MAX_ID]; + static int mt7915_tm_set_tx_power(struct mt7915_phy *phy) @@ -212,7 +198,6 @@ mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode) u8 slot_time = 9, sifs = TM_DEFAULT_SIFS; u8 aifsn = TM_MIN_AIFSN; u32 i2t_time, tr2t_time, txv_time; - bool ext_phy = phy != &dev->phy; u16 cw = 0; if (ipg < sig_ext + slot_time + sifs) @@ -242,29 +227,25 @@ mt7915_tm_set_ipg_params(struct mt7915_phy *phy, u32 ipg, u8 mode) ipg -= aifsn * slot_time; - if (ipg > TM_DEFAULT_SIFS) { - if (ipg < TM_MAX_SIFS) - sifs = ipg; - else - sifs = TM_MAX_SIFS; - } + if (ipg > TM_DEFAULT_SIFS) + sifs = min_t(u32, ipg, TM_MAX_SIFS); } done: - txv_time = mt76_get_field(dev, MT_TMAC_ATCR(ext_phy), + txv_time = mt76_get_field(dev, MT_TMAC_ATCR(phy->band_idx), MT_TMAC_ATCR_TXV_TOUT); txv_time *= 50; /* normal clock time */ i2t_time = (slot_time * 1000 - txv_time - BBP_PROC_TIME) / 50; tr2t_time = (sifs * 1000 - txv_time - BBP_PROC_TIME) / 50; - mt76_set(dev, MT_TMAC_TRCR0(ext_phy), + mt76_set(dev, MT_TMAC_TRCR0(phy->band_idx), FIELD_PREP(MT_TMAC_TRCR0_TR2T_CHK, tr2t_time) | FIELD_PREP(MT_TMAC_TRCR0_I2T_CHK, i2t_time)); mt7915_tm_set_slot_time(phy, slot_time, sifs); return mt7915_tm_set_wmm_qid(dev, - mt7915_lmac_mapping(dev, IEEE80211_AC_BE), + mt76_connac_lmac_mapping(IEEE80211_AC_BE), aifsn, cw, cw, 0); } @@ -290,6 +271,8 @@ mt7915_tm_set_tx_len(struct mt7915_phy *phy, u32 tx_time) case MT76_TM_TX_MODE_OFDM: if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) sband = &mphy->sband_5g.sband; + else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) + sband = &mphy->sband_6g.sband; else sband = &mphy->sband_2g.sband; @@ -351,13 +334,30 @@ mt7915_tm_reg_backup_restore(struct mt7915_phy *phy) { int n_regs = ARRAY_SIZE(reg_backup_list); struct mt7915_dev *dev = phy->dev; - bool ext_phy = phy != &dev->phy; u32 *b = phy->test.reg_backup; int i; + REG_BAND_IDX(reg_backup_list[0], AGG_PCR0, 0); + REG_BAND_IDX(reg_backup_list[1], AGG_PCR0, 1); + REG_BAND_IDX(reg_backup_list[2], AGG_AWSCR0, 0); + REG_BAND_IDX(reg_backup_list[3], AGG_AWSCR0, 1); + REG_BAND_IDX(reg_backup_list[4], AGG_AWSCR0, 2); + REG_BAND_IDX(reg_backup_list[5], AGG_AWSCR0, 3); + REG_BAND(reg_backup_list[6], AGG_MRCR); + REG_BAND(reg_backup_list[7], TMAC_TFCR0); + REG_BAND(reg_backup_list[8], TMAC_TCR0); + REG_BAND(reg_backup_list[9], AGG_ATCR1); + REG_BAND(reg_backup_list[10], AGG_ATCR3); + REG_BAND(reg_backup_list[11], TMAC_TRCR0); + REG_BAND(reg_backup_list[12], TMAC_ICR0); + REG_BAND_IDX(reg_backup_list[13], ARB_DRNGR0, 0); + REG_BAND_IDX(reg_backup_list[14], ARB_DRNGR0, 1); + REG_BAND(reg_backup_list[15], WF_RFCR); + REG_BAND(reg_backup_list[16], WF_RFCR1); + if (phy->mt76->test.state == MT76_TM_STATE_OFF) { for (i = 0; i < n_regs; i++) - mt76_wr(dev, reg_backup_list[i].band[ext_phy], b[i]); + mt76_wr(dev, reg_backup_list[i].band[phy->band_idx], b[i]); return; } @@ -368,33 +368,33 @@ mt7915_tm_reg_backup_restore(struct mt7915_phy *phy) phy->test.reg_backup = b; for (i = 0; i < n_regs; i++) - b[i] = mt76_rr(dev, reg_backup_list[i].band[ext_phy]); + b[i] = mt76_rr(dev, reg_backup_list[i].band[phy->band_idx]); } - mt76_clear(dev, MT_AGG_PCR0(ext_phy, 0), MT_AGG_PCR0_MM_PROT | + mt76_clear(dev, MT_AGG_PCR0(phy->band_idx, 0), MT_AGG_PCR0_MM_PROT | MT_AGG_PCR0_GF_PROT | MT_AGG_PCR0_ERP_PROT | MT_AGG_PCR0_VHT_PROT | MT_AGG_PCR0_BW20_PROT | MT_AGG_PCR0_BW40_PROT | MT_AGG_PCR0_BW80_PROT); - mt76_set(dev, MT_AGG_PCR0(ext_phy, 0), MT_AGG_PCR0_PTA_WIN_DIS); + mt76_set(dev, MT_AGG_PCR0(phy->band_idx, 0), MT_AGG_PCR0_PTA_WIN_DIS); - mt76_wr(dev, MT_AGG_PCR0(ext_phy, 1), MT_AGG_PCR1_RTS0_NUM_THRES | + mt76_wr(dev, MT_AGG_PCR0(phy->band_idx, 1), MT_AGG_PCR1_RTS0_NUM_THRES | MT_AGG_PCR1_RTS0_LEN_THRES); - mt76_clear(dev, MT_AGG_MRCR(ext_phy), MT_AGG_MRCR_BAR_CNT_LIMIT | + mt76_clear(dev, MT_AGG_MRCR(phy->band_idx), MT_AGG_MRCR_BAR_CNT_LIMIT | MT_AGG_MRCR_LAST_RTS_CTS_RN | MT_AGG_MRCR_RTS_FAIL_LIMIT | MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT); - mt76_rmw(dev, MT_AGG_MRCR(ext_phy), MT_AGG_MRCR_RTS_FAIL_LIMIT | + mt76_rmw(dev, MT_AGG_MRCR(phy->band_idx), MT_AGG_MRCR_RTS_FAIL_LIMIT | MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT, FIELD_PREP(MT_AGG_MRCR_RTS_FAIL_LIMIT, 1) | FIELD_PREP(MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT, 1)); - mt76_wr(dev, MT_TMAC_TFCR0(ext_phy), 0); - mt76_clear(dev, MT_TMAC_TCR0(ext_phy), MT_TMAC_TCR0_TBTT_STOP_CTRL); + mt76_wr(dev, MT_TMAC_TFCR0(phy->band_idx), 0); + mt76_clear(dev, MT_TMAC_TCR0(phy->band_idx), MT_TMAC_TCR0_TBTT_STOP_CTRL); /* config rx filter for testmode rx */ - mt76_wr(dev, MT_WF_RFCR(ext_phy), 0xcf70a); - mt76_wr(dev, MT_WF_RFCR1(ext_phy), 0); + mt76_wr(dev, MT_WF_RFCR(phy->band_idx), 0xcf70a); + mt76_wr(dev, MT_WF_RFCR1(phy->band_idx), 0); } static void @@ -452,7 +452,7 @@ mt7915_tm_set_tx_frames(struct mt7915_phy *phy, bool en) u8 tx_ant = td->tx_antenna_mask; if (phy != &dev->phy) - tx_ant >>= 2; + tx_ant >>= dev->chainshift; phy->test.spe_idx = spe_idx_map[tx_ant]; } } @@ -574,6 +574,8 @@ mt7915_tm_set_tx_cont(struct mt7915_phy *phy, bool en) if (chandef->chan->band == NL80211_BAND_5GHZ) sband = &phy->mt76->sband_5g.sband; + else if (chandef->chan->band == NL80211_BAND_6GHZ) + sband = &phy->mt76->sband_6g.sband; else sband = &phy->mt76->sband_2g.sband; @@ -720,11 +722,11 @@ mt7915_tm_dump_stats(struct mt76_phy *mphy, struct sk_buff *msg) { struct mt7915_phy *phy = mphy->priv; struct mt7915_dev *dev = phy->dev; - bool ext_phy = phy != &dev->phy; enum mt76_rxq_id q; void *rx, *rssi; u16 fcs_err; int i; + u32 cnt; rx = nla_nest_start(msg, MT76_TM_STATS_ATTR_LAST_RX); if (!rx) @@ -768,9 +770,11 @@ mt7915_tm_dump_stats(struct mt76_phy *mphy, struct sk_buff *msg) nla_nest_end(msg, rx); - fcs_err = mt76_get_field(dev, MT_MIB_SDR3(ext_phy), - MT_MIB_SDR3_FCS_ERR_MASK); - q = ext_phy ? MT_RXQ_EXT : MT_RXQ_MAIN; + cnt = mt76_rr(dev, MT_MIB_SDR3(phy->band_idx)); + fcs_err = is_mt7915(&dev->mt76) ? FIELD_GET(MT_MIB_SDR3_FCS_ERR_MASK, cnt) : + FIELD_GET(MT_MIB_SDR3_FCS_ERR_MASK_MT7916, cnt); + + q = phy->band_idx ? MT_RXQ_EXT : MT_RXQ_MAIN; mphy->test.rx_stats.packets[q] += fcs_err; mphy->test.rx_stats.fcs_error[q] += fcs_err; diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/Kconfig b/drivers/net/wireless/mediatek/mt76/mt7921/Kconfig index 71154fc2a87c..adff2d7350b5 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/Kconfig +++ b/drivers/net/wireless/mediatek/mt76/mt7921/Kconfig @@ -24,3 +24,14 @@ config MT7921S This adds support for MT7921S 802.11ax 2x2:2SS wireless devices. To compile this driver as a module, choose M here. + +config MT7921U + tristate "MediaTek MT7921U (USB) support" + select MT76_USB + select MT7921_COMMON + depends on MAC80211 + depends on USB + help + This adds support for MT7921U 802.11ax 2x2:2SS wireless devices. + + To compile this driver as a module, choose M here. diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/Makefile b/drivers/net/wireless/mediatek/mt76/mt7921/Makefile index 1187acedfeda..0a146818c623 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/Makefile +++ b/drivers/net/wireless/mediatek/mt76/mt7921/Makefile @@ -3,6 +3,7 @@ obj-$(CONFIG_MT7921_COMMON) += mt7921-common.o obj-$(CONFIG_MT7921E) += mt7921e.o obj-$(CONFIG_MT7921S) += mt7921s.o +obj-$(CONFIG_MT7921U) += mt7921u.o CFLAGS_trace.o := -I$(src) @@ -10,3 +11,4 @@ mt7921-common-y := mac.o mcu.o main.o init.o debugfs.o trace.o mt7921-common-$(CONFIG_NL80211_TESTMODE) += testmode.o mt7921e-y := pci.o pci_mac.o pci_mcu.o dma.o mt7921s-y := sdio.o sdio_mac.o sdio_mcu.o +mt7921u-y := usb.o usb_mac.o diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c b/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c index 86fd7292b229..bce76417f95d 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/debugfs.c @@ -129,23 +129,22 @@ mt7921_queues_acq(struct seq_file *s, void *data) mt7921_mutex_acquire(dev); - for (i = 0; i < 16; i++) { - int j, acs = i / 4, index = i % 4; + for (i = 0; i < 4; i++) { u32 ctrl, val, qlen = 0; + int j; - val = mt76_rr(dev, MT_PLE_AC_QEMPTY(acs, index)); - ctrl = BIT(31) | BIT(15) | (acs << 8); + val = mt76_rr(dev, MT_PLE_AC_QEMPTY(i)); + ctrl = BIT(31) | BIT(11) | (i << 24); for (j = 0; j < 32; j++) { if (val & BIT(j)) continue; - mt76_wr(dev, MT_PLE_FL_Q0_CTRL, - ctrl | (j + (index << 5))); + mt76_wr(dev, MT_PLE_FL_Q0_CTRL, ctrl | j); qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL, GENMASK(11, 0)); } - seq_printf(s, "AC%d%d: queued=%d\n", acs, index, qlen); + seq_printf(s, "AC%d: queued=%d\n", i, qlen); } mt7921_mutex_release(dev); @@ -262,26 +261,21 @@ mt7921_txpwr(struct seq_file *s, void *data) return 0; } -static void -mt7921_pm_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) -{ - struct mt7921_dev *dev = priv; - - mt7921_mcu_set_beacon_filter(dev, vif, dev->pm.enable); -} - static int mt7921_pm_set(void *data, u64 val) { struct mt7921_dev *dev = data; struct mt76_connac_pm *pm = &dev->pm; + if (mt76_is_usb(&dev->mt76)) + return -EOPNOTSUPP; + mutex_lock(&dev->mt76.mutex); - if (val == pm->enable) + if (val == pm->enable_user) goto out; - if (!pm->enable) { + if (!pm->enable_user) { pm->stats.last_wake_event = jiffies; pm->stats.last_doze_event = jiffies; } @@ -291,13 +285,8 @@ mt7921_pm_set(void *data, u64 val) pm->enable = false; mt76_connac_pm_wake(&dev->mphy, pm); - ieee80211_iterate_active_interfaces(mt76_hw(dev), - IEEE80211_IFACE_ITER_RESUME_ALL, - mt7921_pm_interface_iter, dev); - - mt76_connac_mcu_set_deep_sleep(&dev->mt76, pm->ds_enable); - - pm->enable = val; + pm->enable_user = val; + mt7921_set_runtime_pm(dev); mt76_connac_power_save_sched(&dev->mphy, pm); out: mutex_unlock(&dev->mt76.mutex); @@ -310,7 +299,7 @@ mt7921_pm_get(void *data, u64 *val) { struct mt7921_dev *dev = data; - *val = dev->pm.enable; + *val = dev->pm.enable_user; return 0; } @@ -322,13 +311,20 @@ mt7921_deep_sleep_set(void *data, u64 val) { struct mt7921_dev *dev = data; struct mt76_connac_pm *pm = &dev->pm; + bool monitor = !!(dev->mphy.hw->conf.flags & IEEE80211_CONF_MONITOR); bool enable = !!val; + if (mt76_is_usb(&dev->mt76)) + return -EOPNOTSUPP; + mt7921_mutex_acquire(dev); - if (pm->ds_enable != enable) { - mt76_connac_mcu_set_deep_sleep(&dev->mt76, enable); - pm->ds_enable = enable; - } + if (pm->ds_enable_user == enable) + goto out; + + pm->ds_enable_user = enable; + pm->ds_enable = enable && !monitor; + mt76_connac_mcu_set_deep_sleep(&dev->mt76, pm->ds_enable); +out: mt7921_mutex_release(dev); return 0; @@ -339,7 +335,7 @@ mt7921_deep_sleep_get(void *data, u64 *val) { struct mt7921_dev *dev = data; - *val = dev->pm.ds_enable; + *val = dev->pm.ds_enable_user; return 0; } @@ -438,8 +434,13 @@ int mt7921_init_debugfs(struct mt7921_dev *dev) if (!dir) return -ENOMEM; - debugfs_create_devm_seqfile(dev->mt76.dev, "queues", dir, - mt7921_queues_read); + if (mt76_is_mmio(&dev->mt76)) + debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues", + dir, mt7921_queues_read); + else + debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues", + dir, mt76_queues_read); + debugfs_create_devm_seqfile(dev->mt76.dev, "acq", dir, mt7921_queues_acq); debugfs_create_devm_seqfile(dev->mt76.dev, "txpower_sku", dir, diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c index cdff1fd52d93..ca7e20fb5fc0 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/dma.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/dma.c @@ -5,7 +5,7 @@ #include "../dma.h" #include "mac.h" -int mt7921_init_tx_queues(struct mt7921_phy *phy, int idx, int n_desc) +static int mt7921_init_tx_queues(struct mt7921_phy *phy, int idx, int n_desc) { int i, err; @@ -78,110 +78,6 @@ static void mt7921_dma_prefetch(struct mt7921_dev *dev) mt76_wr(dev, MT_WFDMA0_TX_RING17_EXT_CTRL, PREFETCH(0x380, 0x4)); } -static u32 __mt7921_reg_addr(struct mt7921_dev *dev, u32 addr) -{ - static const struct { - u32 phys; - u32 mapped; - u32 size; - } fixed_map[] = { - { 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */ - { 0x820ed000, 0x24800, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */ - { 0x820e4000, 0x21000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */ - { 0x820e7000, 0x21e00, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_DMA) */ - { 0x820eb000, 0x24200, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_LPON) */ - { 0x820e2000, 0x20800, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_AGG) */ - { 0x820e3000, 0x20c00, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_ARB) */ - { 0x820e5000, 0x21400, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_RMAC) */ - { 0x00400000, 0x80000, 0x10000 }, /* WF_MCU_SYSRAM */ - { 0x00410000, 0x90000, 0x10000 }, /* WF_MCU_SYSRAM (configure register) */ - { 0x40000000, 0x70000, 0x10000 }, /* WF_UMAC_SYSRAM */ - { 0x54000000, 0x02000, 0x1000 }, /* WFDMA PCIE0 MCU DMA0 */ - { 0x55000000, 0x03000, 0x1000 }, /* WFDMA PCIE0 MCU DMA1 */ - { 0x58000000, 0x06000, 0x1000 }, /* WFDMA PCIE1 MCU DMA0 (MEM_DMA) */ - { 0x59000000, 0x07000, 0x1000 }, /* WFDMA PCIE1 MCU DMA1 */ - { 0x7c000000, 0xf0000, 0x10000 }, /* CONN_INFRA */ - { 0x7c020000, 0xd0000, 0x10000 }, /* CONN_INFRA, WFDMA */ - { 0x7c060000, 0xe0000, 0x10000 }, /* CONN_INFRA, conn_host_csr_top */ - { 0x80020000, 0xb0000, 0x10000 }, /* WF_TOP_MISC_OFF */ - { 0x81020000, 0xc0000, 0x10000 }, /* WF_TOP_MISC_ON */ - { 0x820c0000, 0x08000, 0x4000 }, /* WF_UMAC_TOP (PLE) */ - { 0x820c8000, 0x0c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */ - { 0x820cc000, 0x0e000, 0x1000 }, /* WF_UMAC_TOP (PP) */ - { 0x820cd000, 0x0f000, 0x1000 }, /* WF_MDP_TOP */ - { 0x820ce000, 0x21c00, 0x0200 }, /* WF_LMAC_TOP (WF_SEC) */ - { 0x820cf000, 0x22000, 0x1000 }, /* WF_LMAC_TOP (WF_PF) */ - { 0x820e0000, 0x20000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_CFG) */ - { 0x820e1000, 0x20400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_TRB) */ - { 0x820e9000, 0x23400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_WTBLOFF) */ - { 0x820ea000, 0x24000, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_ETBF) */ - { 0x820ec000, 0x24600, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_INT) */ - { 0x820f0000, 0xa0000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_CFG) */ - { 0x820f1000, 0xa0600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_TRB) */ - { 0x820f2000, 0xa0800, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_AGG) */ - { 0x820f3000, 0xa0c00, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_ARB) */ - { 0x820f4000, 0xa1000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_TMAC) */ - { 0x820f5000, 0xa1400, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_RMAC) */ - { 0x820f7000, 0xa1e00, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_DMA) */ - { 0x820f9000, 0xa3400, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_WTBLOFF) */ - { 0x820fa000, 0xa4000, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_ETBF) */ - { 0x820fb000, 0xa4200, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_LPON) */ - { 0x820fc000, 0xa4600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_INT) */ - { 0x820fd000, 0xa4800, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_MIB) */ - }; - int i; - - if (addr < 0x100000) - return addr; - - for (i = 0; i < ARRAY_SIZE(fixed_map); i++) { - u32 ofs; - - if (addr < fixed_map[i].phys) - continue; - - ofs = addr - fixed_map[i].phys; - if (ofs > fixed_map[i].size) - continue; - - return fixed_map[i].mapped + ofs; - } - - if ((addr >= 0x18000000 && addr < 0x18c00000) || - (addr >= 0x70000000 && addr < 0x78000000) || - (addr >= 0x7c000000 && addr < 0x7c400000)) - return mt7921_reg_map_l1(dev, addr); - - dev_err(dev->mt76.dev, "Access currently unsupported address %08x\n", - addr); - - return 0; -} - -static u32 mt7921_rr(struct mt76_dev *mdev, u32 offset) -{ - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); - u32 addr = __mt7921_reg_addr(dev, offset); - - return dev->bus_ops->rr(mdev, addr); -} - -static void mt7921_wr(struct mt76_dev *mdev, u32 offset, u32 val) -{ - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); - u32 addr = __mt7921_reg_addr(dev, offset); - - dev->bus_ops->wr(mdev, addr, val); -} - -static u32 mt7921_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) -{ - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); - u32 addr = __mt7921_reg_addr(dev, offset); - - return dev->bus_ops->rmw(mdev, addr, mask, val); -} - static int mt7921_dma_disable(struct mt7921_dev *dev, bool force) { if (force) { @@ -341,23 +237,8 @@ int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev) int mt7921_dma_init(struct mt7921_dev *dev) { - struct mt76_bus_ops *bus_ops; int ret; - dev->phy.dev = dev; - dev->phy.mt76 = &dev->mt76.phy; - dev->mt76.phy.priv = &dev->phy; - dev->bus_ops = dev->mt76.bus; - bus_ops = devm_kmemdup(dev->mt76.dev, dev->bus_ops, sizeof(*bus_ops), - GFP_KERNEL); - if (!bus_ops) - return -ENOMEM; - - bus_ops->rr = mt7921_rr; - bus_ops->wr = mt7921_wr; - bus_ops->rmw = mt7921_rmw; - dev->mt76.bus = bus_ops; - mt76_dma_attach(&dev->mt76); ret = mt7921_dma_disable(dev, true); diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/init.c b/drivers/net/wireless/mediatek/mt76/mt7921/init.c index ad59ef9839dc..91fc41922d95 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/init.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/init.c @@ -165,7 +165,7 @@ out: static int mt7921_init_hardware(struct mt7921_dev *dev) { - int ret, idx, i; + int ret, i; set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); @@ -182,6 +182,13 @@ static int mt7921_init_hardware(struct mt7921_dev *dev) return ret; } + return 0; +} + +static int mt7921_init_wcid(struct mt7921_dev *dev) +{ + int idx; + /* Beacon and mgmt frames should occupy wcid 0 */ idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7921_WTBL_STA - 1); if (idx) @@ -195,6 +202,38 @@ static int mt7921_init_hardware(struct mt7921_dev *dev) return 0; } +static void mt7921_init_work(struct work_struct *work) +{ + struct mt7921_dev *dev = container_of(work, struct mt7921_dev, + init_work); + int ret; + + ret = mt7921_init_hardware(dev); + if (ret) + return; + + mt76_set_stream_caps(&dev->mphy, true); + mt7921_set_stream_he_caps(&dev->phy); + + ret = mt76_register_device(&dev->mt76, true, mt76_rates, + ARRAY_SIZE(mt76_rates)); + if (ret) { + dev_err(dev->mt76.dev, "register device failed\n"); + return; + } + + ret = mt7921_init_debugfs(dev); + if (ret) { + dev_err(dev->mt76.dev, "register debugfs failed\n"); + return; + } + + /* we support chip reset now */ + dev->hw_init_done = true; + + mt76_connac_mcu_set_deep_sleep(&dev->mt76, dev->pm.ds_enable); +} + int mt7921_register_device(struct mt7921_dev *dev) { struct ieee80211_hw *hw = mt76_hw(dev); @@ -222,21 +261,22 @@ int mt7921_register_device(struct mt7921_dev *dev) spin_lock_init(&dev->sta_poll_lock); INIT_WORK(&dev->reset_work, mt7921_mac_reset_work); + INIT_WORK(&dev->init_work, mt7921_init_work); dev->pm.idle_timeout = MT7921_PM_TIMEOUT; dev->pm.stats.last_wake_event = jiffies; dev->pm.stats.last_doze_event = jiffies; - - /* TODO: mt7921s run sleep mode on default */ - if (mt76_is_mmio(&dev->mt76)) { + if (!mt76_is_usb(&dev->mt76)) { + dev->pm.enable_user = true; dev->pm.enable = true; + dev->pm.ds_enable_user = true; dev->pm.ds_enable = true; } - if (mt76_is_sdio(&dev->mt76)) + if (!mt76_is_mmio(&dev->mt76)) hw->extra_tx_headroom += MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE; - ret = mt7921_init_hardware(dev); + ret = mt7921_init_wcid(dev); if (ret) return ret; @@ -264,23 +304,7 @@ int mt7921_register_device(struct mt7921_dev *dev) dev->mphy.hw->wiphy->available_antennas_rx = dev->mphy.chainmask; dev->mphy.hw->wiphy->available_antennas_tx = dev->mphy.chainmask; - mt76_set_stream_caps(&dev->mphy, true); - mt7921_set_stream_he_caps(&dev->phy); - - ret = mt76_register_device(&dev->mt76, true, mt76_rates, - ARRAY_SIZE(mt76_rates)); - if (ret) - return ret; - - ret = mt7921_init_debugfs(dev); - if (ret) - return ret; - - ret = mt76_connac_mcu_set_deep_sleep(&dev->mt76, dev->pm.ds_enable); - if (ret) - return ret; - - dev->hw_init_done = true; + queue_work(system_wq, &dev->init_work); return 0; } diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c index ec10f95a4649..233998ca4857 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/mac.c @@ -116,7 +116,7 @@ void mt7921_mac_sta_poll(struct mt7921_dev *dev) sta = container_of((void *)msta, struct ieee80211_sta, drv_priv); for (i = 0; i < IEEE80211_NUM_ACS; i++) { - u8 q = mt7921_lmac_mapping(dev, i); + u8 q = mt76_connac_lmac_mapping(i); u32 tx_cur = tx_time[q]; u32 rx_cur = rx_time[q]; u8 tid = ac_to_tid[i]; @@ -176,8 +176,8 @@ mt7921_mac_decode_he_radiotap_ru(struct mt76_rx_status *status, u32 ru_h, ru_l; u8 ru, offs = 0; - ru_l = FIELD_GET(MT_PRXV_HE_RU_ALLOC_L, le32_to_cpu(rxv[0])); - ru_h = FIELD_GET(MT_PRXV_HE_RU_ALLOC_H, le32_to_cpu(rxv[1])); + ru_l = le32_get_bits(rxv[0], MT_PRXV_HE_RU_ALLOC_L); + ru_h = le32_get_bits(rxv[1], MT_PRXV_HE_RU_ALLOC_H); ru = (u8)(ru_l | ru_h << 4); status->bw = RATE_INFO_BW_HE_RU; @@ -247,19 +247,19 @@ mt7921_mac_decode_he_mu_radiotap(struct sk_buff *skb, __le32 *rxv) MU_PREP(FLAGS2_SIG_B_SYMS_USERS, le32_get_bits(rxv[2], MT_CRXV_HE_NUM_USER)); - he_mu->ru_ch1[0] = FIELD_GET(MT_CRXV_HE_RU0, le32_to_cpu(rxv[3])); + he_mu->ru_ch1[0] = le32_get_bits(rxv[3], MT_CRXV_HE_RU0); if (status->bw >= RATE_INFO_BW_40) { he_mu->flags1 |= HE_BITS(MU_FLAGS1_CH2_RU_KNOWN); he_mu->ru_ch2[0] = - FIELD_GET(MT_CRXV_HE_RU1, le32_to_cpu(rxv[3])); + le32_get_bits(rxv[3], MT_CRXV_HE_RU1); } if (status->bw >= RATE_INFO_BW_80) { he_mu->ru_ch1[1] = - FIELD_GET(MT_CRXV_HE_RU2, le32_to_cpu(rxv[3])); + le32_get_bits(rxv[3], MT_CRXV_HE_RU2); he_mu->ru_ch2[1] = - FIELD_GET(MT_CRXV_HE_RU3, le32_to_cpu(rxv[3])); + le32_get_bits(rxv[3], MT_CRXV_HE_RU3); } } @@ -304,15 +304,16 @@ mt7921_mac_decode_he_radiotap(struct sk_buff *skb, __le32 *rxv, u32 mode) case MT_PHY_TYPE_HE_SU: he->data1 |= HE_BITS(DATA1_FORMAT_SU) | HE_BITS(DATA1_UL_DL_KNOWN) | - HE_BITS(DATA1_BEAM_CHANGE_KNOWN); + HE_BITS(DATA1_BEAM_CHANGE_KNOWN) | + HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); he->data3 |= HE_PREP(DATA3_BEAM_CHANGE, BEAM_CHNG, rxv[14]) | HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); - he->data4 |= HE_PREP(DATA4_SU_MU_SPTL_REUSE, SR_MASK, rxv[11]); break; case MT_PHY_TYPE_HE_EXT_SU: he->data1 |= HE_BITS(DATA1_FORMAT_EXT_SU) | - HE_BITS(DATA1_UL_DL_KNOWN); + HE_BITS(DATA1_UL_DL_KNOWN) | + HE_BITS(DATA1_BW_RU_ALLOC_KNOWN); he->data3 |= HE_PREP(DATA3_UL_DL, UPLINK, rxv[2]); break; @@ -402,15 +403,15 @@ mt7921_mac_assoc_rssi(struct mt7921_dev *dev, struct sk_buff *skb) static int mt7921_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) { struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; + struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap); struct mt7921_sta *msta = (struct mt7921_sta *)status->wcid; + __le32 *rxd = (__le32 *)skb->data; struct ieee80211_sta *sta; struct ieee80211_vif *vif; struct ieee80211_hdr hdr; - struct ethhdr eth_hdr; - __le32 *rxd = (__le32 *)skb->data; - __le32 qos_ctrl, ht_ctrl; + u16 frame_control; - if (FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, le32_to_cpu(rxd[3])) != + if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) != MT_RXD3_NORMAL_U2M) return -EINVAL; @@ -424,47 +425,52 @@ static int mt7921_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv); /* store the info from RXD and ethhdr to avoid being overridden */ - memcpy(ð_hdr, skb->data + hdr_gap, sizeof(eth_hdr)); - hdr.frame_control = FIELD_GET(MT_RXD6_FRAME_CONTROL, rxd[6]); - hdr.seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, rxd[8]); - qos_ctrl = FIELD_GET(MT_RXD8_QOS_CTL, rxd[8]); - ht_ctrl = FIELD_GET(MT_RXD9_HT_CONTROL, rxd[9]); - + frame_control = le32_get_bits(rxd[6], MT_RXD6_FRAME_CONTROL); + hdr.frame_control = cpu_to_le16(frame_control); + hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_SEQ_CTRL)); hdr.duration_id = 0; + ether_addr_copy(hdr.addr1, vif->addr); ether_addr_copy(hdr.addr2, sta->addr); - switch (le16_to_cpu(hdr.frame_control) & - (IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS)) { + switch (frame_control & (IEEE80211_FCTL_TODS | + IEEE80211_FCTL_FROMDS)) { case 0: ether_addr_copy(hdr.addr3, vif->bss_conf.bssid); break; case IEEE80211_FCTL_FROMDS: - ether_addr_copy(hdr.addr3, eth_hdr.h_source); + ether_addr_copy(hdr.addr3, eth_hdr->h_source); break; case IEEE80211_FCTL_TODS: - ether_addr_copy(hdr.addr3, eth_hdr.h_dest); + ether_addr_copy(hdr.addr3, eth_hdr->h_dest); break; case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS: - ether_addr_copy(hdr.addr3, eth_hdr.h_dest); - ether_addr_copy(hdr.addr4, eth_hdr.h_source); + ether_addr_copy(hdr.addr3, eth_hdr->h_dest); + ether_addr_copy(hdr.addr4, eth_hdr->h_source); break; default: break; } skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2); - if (eth_hdr.h_proto == htons(ETH_P_AARP) || - eth_hdr.h_proto == htons(ETH_P_IPX)) + if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) || + eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX)) ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header); - else if (eth_hdr.h_proto >= htons(ETH_P_802_3_MIN)) + else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN) ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header); else skb_pull(skb, 2); if (ieee80211_has_order(hdr.frame_control)) - memcpy(skb_push(skb, 2), &ht_ctrl, 2); - if (ieee80211_is_data_qos(hdr.frame_control)) - memcpy(skb_push(skb, 2), &qos_ctrl, 2); + memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[9], + IEEE80211_HT_CTL_LEN); + if (ieee80211_is_data_qos(hdr.frame_control)) { + __le16 qos_ctrl; + + qos_ctrl = cpu_to_le16(le32_get_bits(rxd[8], MT_RXD8_QOS_CTL)); + memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl, + IEEE80211_QOS_CTL_LEN); + } + if (ieee80211_has_a4(hdr.frame_control)) memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); else @@ -666,9 +672,6 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb) status->chain_signal[i]); } - if (status->signal == -128) - status->flag |= RX_FLAG_NO_SIGNAL_VAL; - stbc = FIELD_GET(MT_PRXV_STBC, v0); gi = FIELD_GET(MT_PRXV_SGI, v0); cck = false; @@ -912,11 +915,18 @@ mt7921_mac_write_txwi_80211(struct mt7921_dev *dev, __le32 *txwi, val = MT_TXD3_SN_VALID | FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno)); txwi[3] |= cpu_to_le32(val); + txwi[7] &= ~cpu_to_le32(MT_TXD7_HW_AMSDU); } - val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | - FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); - txwi[7] |= cpu_to_le32(val); + if (mt76_is_mmio(&dev->mt76)) { + val = FIELD_PREP(MT_TXD7_TYPE, fc_type) | + FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); + txwi[7] |= cpu_to_le32(val); + } else { + val = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) | + FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype); + txwi[8] |= cpu_to_le32(val); + } } void mt7921_mac_write_txwi(struct mt7921_dev *dev, __le32 *txwi, @@ -950,7 +960,7 @@ void mt7921_mac_write_txwi(struct mt7921_dev *dev, __le32 *txwi, } else { p_fmt = is_mmio ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; q_idx = wmm_idx * MT7921_MAX_WMM_SETS + - mt7921_lmac_mapping(dev, skb_get_queue_mapping(skb)); + mt76_connac_lmac_mapping(skb_get_queue_mapping(skb)); } val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) | @@ -1016,7 +1026,7 @@ void mt7921_tx_check_aggr(struct ieee80211_sta *sta, __le32 *txwi) if (!sta || !(sta->ht_cap.ht_supported || sta->he_cap.has_he)) return; - tid = FIELD_GET(MT_TXD1_TID, le32_to_cpu(txwi[1])); + tid = le32_get_bits(txwi[1], MT_TXD1_TID); if (tid >= 6) /* skip VO queue */ return; @@ -1092,7 +1102,6 @@ mt7921_mac_add_txs_skb(struct mt7921_dev *dev, struct mt76_wcid *wcid, int pid, break; case MT_PHY_TYPE_HT: case MT_PHY_TYPE_HT_GF: - rate.mcs += (rate.nss - 1) * 8; if (rate.mcs > 31) goto out; @@ -1156,18 +1165,13 @@ void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data) struct mt76_wcid *wcid; __le32 *txs_data = data; u16 wcidx; - u32 txs; u8 pid; - txs = le32_to_cpu(txs_data[0]); - if (FIELD_GET(MT_TXS0_TXS_FORMAT, txs) > 1) + if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1) return; - txs = le32_to_cpu(txs_data[2]); - wcidx = FIELD_GET(MT_TXS2_WCID, txs); - - txs = le32_to_cpu(txs_data[3]); - pid = FIELD_GET(MT_TXS3_PID, txs); + wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); + pid = le32_get_bits(txs_data[3], MT_TXS3_PID); if (pid < MT_PACKET_ID_FIRST) return; @@ -1195,6 +1199,7 @@ void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data) out: rcu_read_unlock(); } +EXPORT_SYMBOL_GPL(mt7921_mac_add_txs); void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, struct sk_buff *skb) @@ -1205,8 +1210,8 @@ void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, enum rx_pkt_type type; u16 flag; - type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); - flag = FIELD_GET(MT_RXD0_PKT_FLAG, le32_to_cpu(rxd[0])); + type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); + flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG); if (type == PKT_TYPE_RX_EVENT && flag == 0x1) type = PKT_TYPE_NORMAL_MCU; @@ -1548,7 +1553,16 @@ void mt7921_pm_power_save_work(struct work_struct *work) delta = dev->pm.idle_timeout; if (test_bit(MT76_HW_SCANNING, &mphy->state) || - test_bit(MT76_HW_SCHED_SCANNING, &mphy->state)) + test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) || + dev->fw_assert) + goto out; + + if (mutex_is_locked(&dev->mt76.mutex)) + /* if mt76 mutex is held we should not put the device + * to sleep since we are currently accessing device + * register map. We need to wait for the next power_save + * trigger. + */ goto out; if (time_is_after_jiffies(dev->pm.last_activity + delta)) { @@ -1610,3 +1624,94 @@ void mt7921_coredump_work(struct work_struct *work) mt7921_reset(&dev->mt76); } + +/* usb_sdio */ +static void +mt7921_usb_sdio_write_txwi(struct mt7921_dev *dev, struct mt76_wcid *wcid, + enum mt76_txq_id qid, struct ieee80211_sta *sta, + struct ieee80211_key_conf *key, int pid, + struct sk_buff *skb) +{ + __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE); + + memset(txwi, 0, MT_SDIO_TXD_SIZE); + mt7921_mac_write_txwi(dev, txwi, skb, wcid, key, pid, false); + skb_push(skb, MT_SDIO_TXD_SIZE); +} + +int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, + enum mt76_txq_id qid, struct mt76_wcid *wcid, + struct ieee80211_sta *sta, + struct mt76_tx_info *tx_info) +{ + struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); + struct ieee80211_key_conf *key = info->control.hw_key; + struct sk_buff *skb = tx_info->skb; + int err, pad, pktid, type; + + if (unlikely(tx_info->skb->len <= ETH_HLEN)) + return -EINVAL; + + if (!wcid) + wcid = &dev->mt76.global_wcid; + + if (sta) { + struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; + + if (time_after(jiffies, msta->last_txs + HZ / 4)) { + info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; + msta->last_txs = jiffies; + } + } + + pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb); + mt7921_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb); + + type = mt76_is_sdio(mdev) ? MT7921_SDIO_DATA : 0; + mt7921_skb_add_usb_sdio_hdr(dev, skb, type); + pad = round_up(skb->len, 4) - skb->len; + if (mt76_is_usb(mdev)) + pad += 4; + + err = mt76_skb_adjust_pad(skb, pad); + if (err) + /* Release pktid in case of error. */ + idr_remove(&wcid->pktid, pktid); + + return err; +} +EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_prepare_skb); + +void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, + struct mt76_queue_entry *e) +{ + __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE); + unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE; + struct ieee80211_sta *sta; + struct mt76_wcid *wcid; + u16 idx; + + idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); + wcid = rcu_dereference(mdev->wcid[idx]); + sta = wcid_to_sta(wcid); + + if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE))) + mt7921_tx_check_aggr(sta, txwi); + + skb_pull(e->skb, headroom); + mt76_tx_complete_skb(mdev, e->wcid, e->skb); +} +EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb); + +bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update) +{ + struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); + + mt7921_mutex_acquire(dev); + mt7921_mac_sta_poll(dev); + mt7921_mutex_release(dev); + + return false; +} +EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data); diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mac.h b/drivers/net/wireless/mediatek/mt76/mt7921/mac.h index 544a1c33126a..79447e2d0143 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/mac.h +++ b/drivers/net/wireless/mediatek/mt76/mt7921/mac.h @@ -202,6 +202,7 @@ enum tx_mcu_port_q_idx { #define MT_SDIO_TXD_SIZE (MT_TXD_SIZE + 8 * 4) #define MT_SDIO_TAIL_SIZE 8 #define MT_SDIO_HDR_SIZE 4 +#define MT_USB_TAIL_SIZE 4 #define MT_TXD0_Q_IDX GENMASK(31, 25) #define MT_TXD0_PKT_FMT GENMASK(24, 23) @@ -284,6 +285,9 @@ enum tx_mcu_port_q_idx { #define MT_TXD7_HW_AMSDU BIT(10) #define MT_TXD7_TX_TIME GENMASK(9, 0) +#define MT_TXD8_L_TYPE GENMASK(5, 4) +#define MT_TXD8_L_SUB_TYPE GENMASK(3, 0) + #define MT_TX_RATE_STBC BIT(13) #define MT_TX_RATE_NSS GENMASK(12, 10) #define MT_TX_RATE_MODE GENMASK(9, 6) diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/main.c b/drivers/net/wireless/mediatek/mt76/mt7921/main.c index 7a8d2596c226..fdaf2451bc1d 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/main.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/main.c @@ -264,7 +264,7 @@ static int mt7921_start(struct ieee80211_hw *hw) return err; } -static void mt7921_stop(struct ieee80211_hw *hw) +void mt7921_stop(struct ieee80211_hw *hw) { struct mt7921_dev *dev = mt7921_hw_dev(hw); struct mt7921_phy *phy = mt7921_hw_phy(hw); @@ -273,6 +273,7 @@ static void mt7921_stop(struct ieee80211_hw *hw) cancel_delayed_work_sync(&dev->pm.ps_work); cancel_work_sync(&dev->pm.wake_work); + cancel_work_sync(&dev->reset_work); mt76_connac_free_pending_tx_skbs(&dev->pm, NULL); mt7921_mutex_acquire(dev); @@ -280,6 +281,7 @@ static void mt7921_stop(struct ieee80211_hw *hw) mt76_connac_mcu_set_mac_enable(&dev->mt76, 0, false, false); mt7921_mutex_release(dev); } +EXPORT_SYMBOL_GPL(mt7921_stop); static int mt7921_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif) @@ -452,19 +454,64 @@ static int mt7921_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, mt76_wcid_key_setup(&dev->mt76, wcid, cmd == SET_KEY ? key : NULL); - err = mt7921_mcu_add_key(dev, vif, msta, key, cmd); + err = mt76_connac_mcu_add_key(&dev->mt76, vif, &msta->bip, + key, MCU_UNI_CMD(STA_REC_UPDATE), + &msta->wcid, cmd); if (err) goto out; if (key->cipher == WLAN_CIPHER_SUITE_WEP104 || key->cipher == WLAN_CIPHER_SUITE_WEP40) - err = mt7921_mcu_add_key(dev, vif, mvif->wep_sta, key, cmd); + err = mt76_connac_mcu_add_key(&dev->mt76, vif, + &mvif->wep_sta->bip, + key, MCU_UNI_CMD(STA_REC_UPDATE), + &mvif->wep_sta->wcid, cmd); out: mt7921_mutex_release(dev); return err; } +static void +mt7921_pm_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) +{ + struct mt7921_dev *dev = priv; + + mt7921_mcu_set_beacon_filter(dev, vif, dev->pm.enable); +} + +static void +mt7921_sniffer_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif) +{ + struct mt7921_dev *dev = priv; + struct ieee80211_hw *hw = mt76_hw(dev); + struct mt76_connac_pm *pm = &dev->pm; + bool monitor = !!(hw->conf.flags & IEEE80211_CONF_MONITOR); + + mt7921_mcu_set_sniffer(dev, vif, monitor); + pm->enable = !monitor; + pm->ds_enable = !monitor; + + mt76_connac_mcu_set_deep_sleep(&dev->mt76, pm->ds_enable); + + if (monitor) + mt7921_mcu_set_beacon_filter(dev, vif, false); +} + +void mt7921_set_runtime_pm(struct mt7921_dev *dev) +{ + struct ieee80211_hw *hw = mt76_hw(dev); + struct mt76_connac_pm *pm = &dev->pm; + bool monitor = !!(hw->conf.flags & IEEE80211_CONF_MONITOR); + + pm->enable = pm->enable_user && !monitor; + ieee80211_iterate_active_interfaces(hw, + IEEE80211_IFACE_ITER_RESUME_ALL, + mt7921_pm_interface_iter, dev); + pm->ds_enable = pm->ds_enable_user && !monitor; + mt76_connac_mcu_set_deep_sleep(&dev->mt76, pm->ds_enable); +} + static int mt7921_config(struct ieee80211_hw *hw, u32 changed) { struct mt7921_dev *dev = mt7921_hw_dev(hw); @@ -488,16 +535,10 @@ static int mt7921_config(struct ieee80211_hw *hw, u32 changed) } if (changed & IEEE80211_CONF_CHANGE_MONITOR) { - bool enabled = !!(hw->conf.flags & IEEE80211_CONF_MONITOR); - - if (!enabled) - phy->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC; - else - phy->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC; - - mt76_rmw_field(dev, MT_DMA_DCR0(0), MT_DMA_DCR0_RXD_G5_EN, - enabled); - mt76_wr(dev, MT_WF_RFCR(0), phy->rxfilter); + ieee80211_iterate_active_interfaces(hw, + IEEE80211_IFACE_ITER_RESUME_ALL, + mt7921_sniffer_interface_iter, dev); + dev->mt76.rxfilter = mt76_rr(dev, MT_WF_RFCR(0)); } out: @@ -510,11 +551,10 @@ static int mt7921_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, const struct ieee80211_tx_queue_params *params) { - struct mt7921_dev *dev = mt7921_hw_dev(hw); struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; /* no need to update right away, we'll get BSS_CHANGED_QOS */ - queue = mt7921_lmac_mapping(dev, queue); + queue = mt76_connac_lmac_mapping(queue); mvif->queue_params[queue] = *params; return 0; diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c index ef1e1ef91611..da2be050ed7c 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/mcu.c @@ -67,25 +67,6 @@ struct mt7921_fw_region { #define MT_STA_BFER BIT(0) #define MT_STA_BFEE BIT(1) -#define FW_FEATURE_SET_ENCRYPT BIT(0) -#define FW_FEATURE_SET_KEY_IDX GENMASK(2, 1) -#define FW_FEATURE_ENCRY_MODE BIT(4) -#define FW_FEATURE_OVERRIDE_ADDR BIT(5) - -#define DL_MODE_ENCRYPT BIT(0) -#define DL_MODE_KEY_IDX GENMASK(2, 1) -#define DL_MODE_RESET_SEC_IV BIT(3) -#define DL_MODE_WORKING_PDA_CR4 BIT(4) -#define DL_CONFIG_ENCRY_MODE_SEL BIT(6) -#define DL_MODE_NEED_RSP BIT(31) - -#define FW_START_OVERRIDE BIT(0) -#define FW_START_WORKING_PDA_CR4 BIT(2) - -#define PATCH_SEC_NOT_SUPPORT GENMASK(31, 0) -#define PATCH_SEC_TYPE_MASK GENMASK(15, 0) -#define PATCH_SEC_TYPE_INFO 0x2 - #define PATCH_SEC_ENC_TYPE_MASK GENMASK(31, 24) #define PATCH_SEC_ENC_TYPE_PLAIN 0x00 #define PATCH_SEC_ENC_TYPE_AES 0x01 @@ -93,52 +74,6 @@ struct mt7921_fw_region { #define PATCH_SEC_ENC_SCRAMBLE_INFO_MASK GENMASK(15, 0) #define PATCH_SEC_ENC_AES_KEY_MASK GENMASK(7, 0) -static enum mcu_cipher_type -mt7921_mcu_get_cipher(int cipher) -{ - switch (cipher) { - case WLAN_CIPHER_SUITE_WEP40: - return MCU_CIPHER_WEP40; - case WLAN_CIPHER_SUITE_WEP104: - return MCU_CIPHER_WEP104; - case WLAN_CIPHER_SUITE_TKIP: - return MCU_CIPHER_TKIP; - case WLAN_CIPHER_SUITE_AES_CMAC: - return MCU_CIPHER_BIP_CMAC_128; - case WLAN_CIPHER_SUITE_CCMP: - return MCU_CIPHER_AES_CCMP; - case WLAN_CIPHER_SUITE_CCMP_256: - return MCU_CIPHER_CCMP_256; - case WLAN_CIPHER_SUITE_GCMP: - return MCU_CIPHER_GCMP; - case WLAN_CIPHER_SUITE_GCMP_256: - return MCU_CIPHER_GCMP_256; - case WLAN_CIPHER_SUITE_SMS4: - return MCU_CIPHER_WAPI; - default: - return MCU_CIPHER_NONE; - } -} - -static u8 mt7921_mcu_chan_bw(struct cfg80211_chan_def *chandef) -{ - static const u8 width_to_bw[] = { - [NL80211_CHAN_WIDTH_40] = CMD_CBW_40MHZ, - [NL80211_CHAN_WIDTH_80] = CMD_CBW_80MHZ, - [NL80211_CHAN_WIDTH_80P80] = CMD_CBW_8080MHZ, - [NL80211_CHAN_WIDTH_160] = CMD_CBW_160MHZ, - [NL80211_CHAN_WIDTH_5] = CMD_CBW_5MHZ, - [NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ, - [NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ, - [NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ, - }; - - if (chandef->width >= ARRAY_SIZE(width_to_bw)) - return 0; - - return width_to_bw[chandef->width]; -} - static int mt7921_mcu_parse_eeprom(struct mt76_dev *dev, struct sk_buff *skb) { @@ -465,95 +400,6 @@ void mt7921_mcu_rx_event(struct mt7921_dev *dev, struct sk_buff *skb) } /** starec & wtbl **/ -static int -mt7921_mcu_sta_key_tlv(struct mt7921_sta *msta, struct sk_buff *skb, - struct ieee80211_key_conf *key, enum set_key_cmd cmd) -{ - struct mt7921_sta_key_conf *bip = &msta->bip; - struct sta_rec_sec *sec; - struct tlv *tlv; - u32 len = sizeof(*sec); - - tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); - - sec = (struct sta_rec_sec *)tlv; - sec->add = cmd; - - if (cmd == SET_KEY) { - struct sec_key *sec_key; - u8 cipher; - - cipher = mt7921_mcu_get_cipher(key->cipher); - if (cipher == MCU_CIPHER_NONE) - return -EOPNOTSUPP; - - sec_key = &sec->key[0]; - sec_key->cipher_len = sizeof(*sec_key); - - if (cipher == MCU_CIPHER_BIP_CMAC_128) { - sec_key->cipher_id = MCU_CIPHER_AES_CCMP; - sec_key->key_id = bip->keyidx; - sec_key->key_len = 16; - memcpy(sec_key->key, bip->key, 16); - - sec_key = &sec->key[1]; - sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; - sec_key->cipher_len = sizeof(*sec_key); - sec_key->key_len = 16; - memcpy(sec_key->key, key->key, 16); - - sec->n_cipher = 2; - } else { - sec_key->cipher_id = cipher; - sec_key->key_id = key->keyidx; - sec_key->key_len = key->keylen; - memcpy(sec_key->key, key->key, key->keylen); - - if (cipher == MCU_CIPHER_TKIP) { - /* Rx/Tx MIC keys are swapped */ - memcpy(sec_key->key + 16, key->key + 24, 8); - memcpy(sec_key->key + 24, key->key + 16, 8); - } - - /* store key_conf for BIP batch update */ - if (cipher == MCU_CIPHER_AES_CCMP) { - memcpy(bip->key, key->key, key->keylen); - bip->keyidx = key->keyidx; - } - - len -= sizeof(*sec_key); - sec->n_cipher = 1; - } - } else { - len -= sizeof(sec->key); - sec->n_cipher = 0; - } - sec->len = cpu_to_le16(len); - - return 0; -} - -int mt7921_mcu_add_key(struct mt7921_dev *dev, struct ieee80211_vif *vif, - struct mt7921_sta *msta, struct ieee80211_key_conf *key, - enum set_key_cmd cmd) -{ - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; - struct sk_buff *skb; - int ret; - - skb = mt76_connac_mcu_alloc_sta_req(&dev->mt76, &mvif->mt76, - &msta->wcid); - if (IS_ERR(skb)) - return PTR_ERR(skb); - - ret = mt7921_mcu_sta_key_tlv(msta, skb, key, cmd); - if (ret) - return ret; - - return mt76_mcu_skb_send_msg(&dev->mt76, skb, - MCU_UNI_CMD(STA_REC_UPDATE), true); -} - int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev, struct ieee80211_ampdu_params *params, bool enable) @@ -564,6 +410,7 @@ int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev, msta->wcid.amsdu = false; return mt76_connac_mcu_sta_ba(&dev->mt76, &msta->vif->mt76, params, + MCU_UNI_CMD(STA_REC_UPDATE), enable, true); } @@ -574,23 +421,10 @@ int mt7921_mcu_uni_rx_ba(struct mt7921_dev *dev, struct mt7921_sta *msta = (struct mt7921_sta *)params->sta->drv_priv; return mt76_connac_mcu_sta_ba(&dev->mt76, &msta->vif->mt76, params, + MCU_UNI_CMD(STA_REC_UPDATE), enable, false); } -int mt7921_mcu_restart(struct mt76_dev *dev) -{ - struct { - u8 power_mode; - u8 rsv[3]; - } req = { - .power_mode = 1, - }; - - return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req, - sizeof(req), false); -} -EXPORT_SYMBOL_GPL(mt7921_mcu_restart); - static u32 mt7921_get_data_mode(struct mt7921_dev *dev, u32 info) { u32 mode = DL_MODE_NEED_RSP; @@ -707,12 +541,8 @@ static int mt7921_load_patch(struct mt7921_dev *dev) if (mt76_is_sdio(&dev->mt76)) { /* activate again */ ret = __mt7921_mcu_fw_pmctrl(dev); - if (ret) - return ret; - - ret = __mt7921_mcu_drv_pmctrl(dev); - if (ret) - return ret; + if (!ret) + ret = __mt7921_mcu_drv_pmctrl(dev); } out: @@ -730,22 +560,6 @@ out: return ret; } -static u32 mt7921_mcu_gen_dl_mode(u8 feature_set, bool is_wa) -{ - u32 ret = 0; - - ret |= (feature_set & FW_FEATURE_SET_ENCRYPT) ? - (DL_MODE_ENCRYPT | DL_MODE_RESET_SEC_IV) : 0; - ret |= (feature_set & FW_FEATURE_ENCRY_MODE) ? - DL_CONFIG_ENCRY_MODE_SEL : 0; - ret |= FIELD_PREP(DL_MODE_KEY_IDX, - FIELD_GET(FW_FEATURE_SET_KEY_IDX, feature_set)); - ret |= DL_MODE_NEED_RSP; - ret |= is_wa ? DL_MODE_WORKING_PDA_CR4 : 0; - - return ret; -} - static int mt7921_mcu_send_ram_firmware(struct mt7921_dev *dev, const struct mt7921_fw_trailer *hdr, @@ -763,7 +577,8 @@ mt7921_mcu_send_ram_firmware(struct mt7921_dev *dev, region = (const struct mt7921_fw_region *)((const u8 *)hdr - (hdr->n_region - i) * sizeof(*region)); - mode = mt7921_mcu_gen_dl_mode(region->feature_set, is_wa); + mode = mt76_connac_mcu_gen_dl_mode(&dev->mt76, + region->feature_set, is_wa); len = le32_to_cpu(region->len); addr = le32_to_cpu(region->addr); @@ -920,33 +735,26 @@ EXPORT_SYMBOL_GPL(mt7921_mcu_exit); int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif) { -#define WMM_AIFS_SET BIT(0) -#define WMM_CW_MIN_SET BIT(1) -#define WMM_CW_MAX_SET BIT(2) -#define WMM_TXOP_SET BIT(3) -#define WMM_PARAM_SET GENMASK(3, 0) -#define TX_CMD_MODE 1 + struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; struct edca { - u8 queue; - u8 set; - u8 aifs; - u8 cw_min; + __le16 cw_min; __le16 cw_max; __le16 txop; - }; + __le16 aifs; + u8 guardtime; + u8 acm; + } __packed; struct mt7921_mcu_tx { - u8 total; - u8 action; - u8 valid; - u8 mode; - struct edca edca[IEEE80211_NUM_ACS]; + u8 bss_idx; + u8 qos; + u8 wmm_idx; + u8 pad; } __packed req = { - .valid = true, - .mode = TX_CMD_MODE, - .total = IEEE80211_NUM_ACS, + .bss_idx = mvif->mt76.idx, + .qos = vif->bss_conf.qos, + .wmm_idx = mvif->mt76.wmm_idx, }; - struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; struct mu_edca { u8 cw_min; u8 cw_max; @@ -970,30 +778,29 @@ int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif) .qos = vif->bss_conf.qos, .wmm_idx = mvif->mt76.wmm_idx, }; + static const int to_aci[] = { 1, 0, 2, 3 }; int ac, ret; for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { struct ieee80211_tx_queue_params *q = &mvif->queue_params[ac]; - struct edca *e = &req.edca[ac]; + struct edca *e = &req.edca[to_aci[ac]]; - e->set = WMM_PARAM_SET; - e->queue = ac + mvif->mt76.wmm_idx * MT7921_MAX_WMM_SETS; - e->aifs = q->aifs; + e->aifs = cpu_to_le16(q->aifs); e->txop = cpu_to_le16(q->txop); if (q->cw_min) - e->cw_min = fls(q->cw_min); + e->cw_min = cpu_to_le16(q->cw_min); else - e->cw_min = 5; + e->cw_min = cpu_to_le16(5); if (q->cw_max) - e->cw_max = cpu_to_le16(fls(q->cw_max)); + e->cw_max = cpu_to_le16(q->cw_max); else e->cw_max = cpu_to_le16(10); } - ret = mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(EDCA_UPDATE), - &req, sizeof(req), true); + ret = mt76_mcu_send_msg(&dev->mt76, MCU_CE_CMD(SET_EDCA_PARMS), &req, + sizeof(req), false); if (ret) return ret; @@ -1003,7 +810,6 @@ int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif) for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) { struct ieee80211_he_mu_edca_param_ac_rec *q; struct mu_edca *e; - int to_aci[] = {1, 0, 2, 3}; if (!mvif->queue_params[ac].mu_edca) break; @@ -1046,7 +852,7 @@ int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd) } __packed req = { .control_ch = chandef->chan->hw_value, .center_ch = ieee80211_frequency_to_channel(freq1), - .bw = mt7921_mcu_chan_bw(chandef), + .bw = mt76_connac_chan_bw(chandef), .tx_streams_num = hweight8(phy->mt76->antenna_mask), .rx_streams = phy->mt76->antenna_mask, .band_idx = phy != &dev->phy, @@ -1057,10 +863,13 @@ int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd) else req.channel_band = chandef->chan->band; - if (dev->mt76.hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) + if (cmd == MCU_EXT_CMD(SET_RX_PATH) || + dev->mt76.hw->conf.flags & IEEE80211_CONF_MONITOR) + req.switch_reason = CH_SWITCH_NORMAL; + else if (dev->mt76.hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD; - else if ((chandef->chan->flags & IEEE80211_CHAN_RADAR) && - chandef->chan->dfs_state != NL80211_DFS_AVAILABLE) + else if (!cfg80211_reg_can_beacon(dev->mt76.hw->wiphy, chandef, + NL80211_IFTYPE_AP)) req.switch_reason = CH_SWITCH_DFS; else req.switch_reason = CH_SWITCH_NORMAL; @@ -1093,30 +902,6 @@ int mt7921_mcu_set_eeprom(struct mt7921_dev *dev) } EXPORT_SYMBOL_GPL(mt7921_mcu_set_eeprom); -int mt7921_mcu_get_eeprom(struct mt7921_dev *dev, u32 offset) -{ - struct mt7921_mcu_eeprom_info req = { - .addr = cpu_to_le32(round_down(offset, 16)), - }; - struct mt7921_mcu_eeprom_info *res; - struct sk_buff *skb; - int ret; - u8 *buf; - - ret = mt76_mcu_send_and_get_msg(&dev->mt76, - MCU_EXT_QUERY(EFUSE_ACCESS), - &req, sizeof(req), true, &skb); - if (ret) - return ret; - - res = (struct mt7921_mcu_eeprom_info *)skb->data; - buf = dev->mt76.eeprom.data + le32_to_cpu(res->addr); - memcpy(buf, res->data, 16); - dev_kfree_skb(skb); - - return 0; -} - int mt7921_mcu_uni_bss_ps(struct mt7921_dev *dev, struct ieee80211_vif *vif) { struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv; @@ -1351,3 +1136,33 @@ int mt7921_get_txpwr_info(struct mt7921_dev *dev, struct mt7921_txpwr *txpwr) return 0; } + +int mt7921_mcu_set_sniffer(struct mt7921_dev *dev, struct ieee80211_vif *vif, + bool enable) +{ + struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv; + struct { + struct { + u8 band_idx; + u8 pad[3]; + } __packed hdr; + struct sniffer_enable_tlv { + __le16 tag; + __le16 len; + u8 enable; + u8 pad[3]; + } __packed enable; + } req = { + .hdr = { + .band_idx = mvif->band_idx, + }, + .enable = { + .tag = cpu_to_le16(0), + .len = cpu_to_le16(sizeof(struct sniffer_enable_tlv)), + .enable = enable, + }, + }; + + return mt76_mcu_send_msg(&dev->mt76, MCU_UNI_CMD(SNIFFER), &req, sizeof(req), + true); +} diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h index 96647801850a..7690364bc079 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h +++ b/drivers/net/wireless/mediatek/mt76/mt7921/mt7921.h @@ -30,6 +30,7 @@ #define MT7921_DRV_OWN_RETRY_COUNT 10 #define MT7921_MCU_INIT_RETRY_COUNT 10 +#define MT7921_WFSYS_INIT_RETRY_COUNT 2 #define MT7921_FIRMWARE_WM "mediatek/WIFI_RAM_CODE_MT7961_1.bin" #define MT7921_ROM_PATCH "mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin" @@ -89,11 +90,6 @@ enum mt7921_rxq_id { MT7921_RXQ_MCU_WM = 0, }; -struct mt7921_sta_key_conf { - s8 keyidx; - u8 key[16]; -}; - struct mt7921_sta { struct mt76_wcid wcid; /* must be first */ @@ -106,7 +102,7 @@ struct mt7921_sta { unsigned long ampdu_state; struct mt76_sta_stats stats; - struct mt7921_sta_key_conf bip; + struct mt76_connac_sta_key_conf bip; }; DECLARE_EWMA(rssi, 10, 8); @@ -209,6 +205,8 @@ struct mt7921_dev { struct list_head sta_poll_list; spinlock_t sta_poll_lock; + struct work_struct init_work; + u8 fw_debug; struct mt76_connac_pm pm; @@ -277,12 +275,6 @@ mt7921_hw_dev(struct ieee80211_hw *hw) #define mt7921_mutex_release(dev) \ mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm) -static inline u8 mt7921_lmac_mapping(struct mt7921_dev *dev, u8 ac) -{ - /* LMAC uses the reverse order of mac80211 AC indexes */ - return 3 - ac; -} - extern const struct ieee80211_ops mt7921_ops; extern struct pci_driver mt7921_pci_driver; @@ -296,16 +288,12 @@ int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force); int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev); void mt7921_dma_cleanup(struct mt7921_dev *dev); int mt7921_run_firmware(struct mt7921_dev *dev); -int mt7921_mcu_add_key(struct mt7921_dev *dev, struct ieee80211_vif *vif, - struct mt7921_sta *msta, struct ieee80211_key_conf *key, - enum set_key_cmd cmd); int mt7921_mcu_sta_update(struct mt7921_dev *dev, struct ieee80211_sta *sta, struct ieee80211_vif *vif, bool enable, enum mt76_sta_info_state state); int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd); int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif); int mt7921_mcu_set_eeprom(struct mt7921_dev *dev); -int mt7921_mcu_get_eeprom(struct mt7921_dev *dev, u32 offset); int mt7921_mcu_get_rx_rate(struct mt7921_phy *phy, struct ieee80211_vif *vif, struct ieee80211_sta *sta, struct rate_info *rate); int mt7921_mcu_fw_log_2_host(struct mt7921_dev *dev, u8 ctrl); @@ -367,17 +355,20 @@ static inline void mt7921_mcu_tx_cleanup(struct mt7921_dev *dev) mt76_queue_tx_cleanup(dev, dev->mt76.q_mcu[MT_MCUQ_WA], false); } -static inline void mt7921_skb_add_sdio_hdr(struct sk_buff *skb, - enum mt7921_sdio_pkt_type type) +static inline void +mt7921_skb_add_usb_sdio_hdr(struct mt7921_dev *dev, struct sk_buff *skb, + int type) { - u32 hdr; + u32 hdr, len; - hdr = FIELD_PREP(MT7921_SDIO_HDR_TX_BYTES, skb->len + sizeof(hdr)) | + len = mt76_is_usb(&dev->mt76) ? skb->len : skb->len + sizeof(hdr); + hdr = FIELD_PREP(MT7921_SDIO_HDR_TX_BYTES, len) | FIELD_PREP(MT7921_SDIO_HDR_PKT_TYPE, type); put_unaligned_le32(hdr, skb_push(skb, sizeof(hdr))); } +void mt7921_stop(struct ieee80211_hw *hw); int mt7921_mac_init(struct mt7921_dev *dev); bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask); void mt7921_mac_reset_counters(struct mt7921_phy *phy); @@ -399,7 +390,6 @@ int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, void mt7921_tx_worker(struct mt76_worker *w); void mt7921e_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e); -int mt7921_init_tx_queues(struct mt7921_phy *phy, int idx, int n_desc); void mt7921_tx_token_put(struct mt7921_dev *dev); void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, struct sk_buff *skb); @@ -424,7 +414,6 @@ int mt7921_mcu_drv_pmctrl(struct mt7921_dev *dev); int mt7921_mcu_fw_pmctrl(struct mt7921_dev *dev); void mt7921_pm_wake_work(struct work_struct *work); void mt7921_pm_power_save_work(struct work_struct *work); -bool mt7921_wait_for_mcu_init(struct mt7921_dev *dev); void mt7921_coredump_work(struct work_struct *work); int mt7921_wfsys_reset(struct mt7921_dev *dev); int mt7921_get_txpwr_info(struct mt7921_dev *dev, struct mt7921_txpwr *txpwr); @@ -442,8 +431,8 @@ int mt7921_mcu_fill_message(struct mt76_dev *mdev, struct sk_buff *skb, int cmd, int *wait_seq); int mt7921_mcu_parse_response(struct mt76_dev *mdev, int cmd, struct sk_buff *skb, int seq); -int mt7921_mcu_restart(struct mt76_dev *dev); +bool mt7921e_rx_check(struct mt76_dev *mdev, void *data, int len); void mt7921e_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, struct sk_buff *skb); int mt7921e_driver_own(struct mt7921_dev *dev); @@ -452,17 +441,33 @@ int mt7921e_mcu_init(struct mt7921_dev *dev); int mt7921s_wfsys_reset(struct mt7921_dev *dev); int mt7921s_mac_reset(struct mt7921_dev *dev); int mt7921s_init_reset(struct mt7921_dev *dev); +int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev); int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev); int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev); int mt7921s_mcu_init(struct mt7921_dev *dev); int mt7921s_mcu_drv_pmctrl(struct mt7921_dev *dev); int mt7921s_mcu_fw_pmctrl(struct mt7921_dev *dev); -int mt7921s_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - enum mt76_txq_id qid, struct mt76_wcid *wcid, - struct ieee80211_sta *sta, - struct mt76_tx_info *tx_info); -void mt7921s_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e); -bool mt7921s_tx_status_data(struct mt76_dev *mdev, u8 *update); void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data); +void mt7921_set_runtime_pm(struct mt7921_dev *dev); +int mt7921_mcu_set_sniffer(struct mt7921_dev *dev, struct ieee80211_vif *vif, + bool enable); + +int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, + enum mt76_txq_id qid, struct mt76_wcid *wcid, + struct ieee80211_sta *sta, + struct mt76_tx_info *tx_info); +void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, + struct mt76_queue_entry *e); +bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update); + +/* usb */ +#define MT_USB_TYPE_VENDOR (USB_TYPE_VENDOR | 0x1f) +#define MT_USB_TYPE_UHW_VENDOR (USB_TYPE_VENDOR | 0x1e) + +int mt7921u_mcu_power_on(struct mt7921_dev *dev); +int mt7921u_wfsys_reset(struct mt7921_dev *dev); +int mt7921u_dma_init(struct mt7921_dev *dev); +int mt7921u_init_reset(struct mt7921_dev *dev); +int mt7921u_mac_reset(struct mt7921_dev *dev); #endif diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c index 9dae2f5972bf..1a01d025bbe5 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/pci.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/pci.c @@ -105,6 +105,7 @@ static void mt7921e_unregister_device(struct mt7921_dev *dev) int i; struct mt76_connac_pm *pm = &dev->pm; + cancel_work_sync(&dev->init_work); mt76_unregister_device(&dev->mt76); mt76_for_each_q_rx(&dev->mt76, i) napi_disable(&dev->mt76.napi[i]); @@ -121,6 +122,110 @@ static void mt7921e_unregister_device(struct mt7921_dev *dev) mt76_free_device(&dev->mt76); } +static u32 __mt7921_reg_addr(struct mt7921_dev *dev, u32 addr) +{ + static const struct { + u32 phys; + u32 mapped; + u32 size; + } fixed_map[] = { + { 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */ + { 0x820ed000, 0x24800, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_MIB) */ + { 0x820e4000, 0x21000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_TMAC) */ + { 0x820e7000, 0x21e00, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_DMA) */ + { 0x820eb000, 0x24200, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_LPON) */ + { 0x820e2000, 0x20800, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_AGG) */ + { 0x820e3000, 0x20c00, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_ARB) */ + { 0x820e5000, 0x21400, 0x0800 }, /* WF_LMAC_TOP BN0 (WF_RMAC) */ + { 0x00400000, 0x80000, 0x10000 }, /* WF_MCU_SYSRAM */ + { 0x00410000, 0x90000, 0x10000 }, /* WF_MCU_SYSRAM (configure register) */ + { 0x40000000, 0x70000, 0x10000 }, /* WF_UMAC_SYSRAM */ + { 0x54000000, 0x02000, 0x1000 }, /* WFDMA PCIE0 MCU DMA0 */ + { 0x55000000, 0x03000, 0x1000 }, /* WFDMA PCIE0 MCU DMA1 */ + { 0x58000000, 0x06000, 0x1000 }, /* WFDMA PCIE1 MCU DMA0 (MEM_DMA) */ + { 0x59000000, 0x07000, 0x1000 }, /* WFDMA PCIE1 MCU DMA1 */ + { 0x7c000000, 0xf0000, 0x10000 }, /* CONN_INFRA */ + { 0x7c020000, 0xd0000, 0x10000 }, /* CONN_INFRA, WFDMA */ + { 0x7c060000, 0xe0000, 0x10000 }, /* CONN_INFRA, conn_host_csr_top */ + { 0x80020000, 0xb0000, 0x10000 }, /* WF_TOP_MISC_OFF */ + { 0x81020000, 0xc0000, 0x10000 }, /* WF_TOP_MISC_ON */ + { 0x820c0000, 0x08000, 0x4000 }, /* WF_UMAC_TOP (PLE) */ + { 0x820c8000, 0x0c000, 0x2000 }, /* WF_UMAC_TOP (PSE) */ + { 0x820cc000, 0x0e000, 0x1000 }, /* WF_UMAC_TOP (PP) */ + { 0x820cd000, 0x0f000, 0x1000 }, /* WF_MDP_TOP */ + { 0x820ce000, 0x21c00, 0x0200 }, /* WF_LMAC_TOP (WF_SEC) */ + { 0x820cf000, 0x22000, 0x1000 }, /* WF_LMAC_TOP (WF_PF) */ + { 0x820e0000, 0x20000, 0x0400 }, /* WF_LMAC_TOP BN0 (WF_CFG) */ + { 0x820e1000, 0x20400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_TRB) */ + { 0x820e9000, 0x23400, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_WTBLOFF) */ + { 0x820ea000, 0x24000, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_ETBF) */ + { 0x820ec000, 0x24600, 0x0200 }, /* WF_LMAC_TOP BN0 (WF_INT) */ + { 0x820f0000, 0xa0000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_CFG) */ + { 0x820f1000, 0xa0600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_TRB) */ + { 0x820f2000, 0xa0800, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_AGG) */ + { 0x820f3000, 0xa0c00, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_ARB) */ + { 0x820f4000, 0xa1000, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_TMAC) */ + { 0x820f5000, 0xa1400, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_RMAC) */ + { 0x820f7000, 0xa1e00, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_DMA) */ + { 0x820f9000, 0xa3400, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_WTBLOFF) */ + { 0x820fa000, 0xa4000, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_ETBF) */ + { 0x820fb000, 0xa4200, 0x0400 }, /* WF_LMAC_TOP BN1 (WF_LPON) */ + { 0x820fc000, 0xa4600, 0x0200 }, /* WF_LMAC_TOP BN1 (WF_INT) */ + { 0x820fd000, 0xa4800, 0x0800 }, /* WF_LMAC_TOP BN1 (WF_MIB) */ + }; + int i; + + if (addr < 0x100000) + return addr; + + for (i = 0; i < ARRAY_SIZE(fixed_map); i++) { + u32 ofs; + + if (addr < fixed_map[i].phys) + continue; + + ofs = addr - fixed_map[i].phys; + if (ofs > fixed_map[i].size) + continue; + + return fixed_map[i].mapped + ofs; + } + + if ((addr >= 0x18000000 && addr < 0x18c00000) || + (addr >= 0x70000000 && addr < 0x78000000) || + (addr >= 0x7c000000 && addr < 0x7c400000)) + return mt7921_reg_map_l1(dev, addr); + + dev_err(dev->mt76.dev, "Access currently unsupported address %08x\n", + addr); + + return 0; +} + +static u32 mt7921_rr(struct mt76_dev *mdev, u32 offset) +{ + struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); + u32 addr = __mt7921_reg_addr(dev, offset); + + return dev->bus_ops->rr(mdev, addr); +} + +static void mt7921_wr(struct mt76_dev *mdev, u32 offset, u32 val) +{ + struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); + u32 addr = __mt7921_reg_addr(dev, offset); + + dev->bus_ops->wr(mdev, addr, val); +} + +static u32 mt7921_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val) +{ + struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); + u32 addr = __mt7921_reg_addr(dev, offset); + + return dev->bus_ops->rmw(mdev, addr, mask, val); +} + static int mt7921_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { @@ -134,6 +239,7 @@ static int mt7921_pci_probe(struct pci_dev *pdev, .token_size = MT7921_TOKEN_SIZE, .tx_prepare_skb = mt7921e_tx_prepare_skb, .tx_complete_skb = mt7921e_tx_complete_skb, + .rx_check = mt7921e_rx_check, .rx_skb = mt7921e_queue_rx_skb, .rx_poll_complete = mt7921_rx_poll_complete, .sta_ps = mt7921_sta_ps, @@ -151,6 +257,7 @@ static int mt7921_pci_probe(struct pci_dev *pdev, .fw_own = mt7921e_mcu_fw_pmctrl, }; + struct mt76_bus_ops *bus_ops; struct mt7921_dev *dev; struct mt76_dev *mdev; int ret; @@ -188,6 +295,25 @@ static int mt7921_pci_probe(struct pci_dev *pdev, mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]); tasklet_init(&dev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev); + + dev->phy.dev = dev; + dev->phy.mt76 = &dev->mt76.phy; + dev->mt76.phy.priv = &dev->phy; + dev->bus_ops = dev->mt76.bus; + bus_ops = devm_kmemdup(dev->mt76.dev, dev->bus_ops, sizeof(*bus_ops), + GFP_KERNEL); + if (!bus_ops) + return -ENOMEM; + + bus_ops->rr = mt7921_rr; + bus_ops->wr = mt7921_wr; + bus_ops->rmw = mt7921_rmw; + dev->mt76.bus = bus_ops; + + ret = __mt7921e_mcu_drv_pmctrl(dev); + if (ret) + return ret; + mdev->rev = (mt7921_l1_rr(dev, MT_HW_CHIPID) << 16) | (mt7921_l1_rr(dev, MT_HW_REV) & 0xff); dev_info(mdev->dev, "ASIC revision: %04x\n", mdev->rev); diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c b/drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c index 85286cc9add1..5ca14dbbdd26 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/pci_mac.c @@ -137,7 +137,7 @@ mt7921_txwi_free(struct mt7921_dev *dev, struct mt76_txwi_cache *t, wcid_idx = wcid->idx; } else { - wcid_idx = FIELD_GET(MT_TXD1_WLAN_IDX, le32_to_cpu(txwi[1])); + wcid_idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); } __mt76_tx_complete_skb(mdev, wcid_idx, t->skb, free_list); @@ -148,14 +148,15 @@ out: } static void -mt7921_mac_tx_free(struct mt7921_dev *dev, struct sk_buff *skb) +mt7921e_mac_tx_free(struct mt7921_dev *dev, void *data, int len) { - struct mt7921_tx_free *free = (struct mt7921_tx_free *)skb->data; + struct mt7921_tx_free *free = (struct mt7921_tx_free *)data; struct mt76_dev *mdev = &dev->mt76; struct mt76_txwi_cache *txwi; struct ieee80211_sta *sta = NULL; + struct sk_buff *skb, *tmp; + void *end = data + len; LIST_HEAD(free_list); - struct sk_buff *tmp; bool wake = false; u8 i, count; @@ -163,11 +164,10 @@ mt7921_mac_tx_free(struct mt7921_dev *dev, struct sk_buff *skb) mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false); - /* TODO: MT_TX_FREE_LATENCY is msdu time from the TXD is queued into PLE, - * to the time ack is received or dropped by hw (air + hw queue time). - * Should avoid accessing WTBL to get Tx airtime, and use it instead. - */ - count = FIELD_GET(MT_TX_FREE_MSDU_CNT, le16_to_cpu(free->ctrl)); + count = le16_get_bits(free->ctrl, MT_TX_FREE_MSDU_CNT); + if (WARN_ON_ONCE((void *)&free->info[count] > end)) + return; + for (i = 0; i < count; i++) { u32 msdu, info = le32_to_cpu(free->info[i]); u8 stat; @@ -208,8 +208,6 @@ mt7921_mac_tx_free(struct mt7921_dev *dev, struct sk_buff *skb) if (wake) mt76_set_tx_blocked(&dev->mt76, false); - napi_consume_skb(skb, 1); - list_for_each_entry_safe(skb, tmp, &free_list, list) { skb_list_del_init(skb); napi_consume_skb(skb, 1); @@ -222,6 +220,28 @@ mt7921_mac_tx_free(struct mt7921_dev *dev, struct sk_buff *skb) mt76_worker_schedule(&dev->mt76.tx_worker); } +bool mt7921e_rx_check(struct mt76_dev *mdev, void *data, int len) +{ + struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); + __le32 *rxd = (__le32 *)data; + __le32 *end = (__le32 *)&rxd[len / 4]; + enum rx_pkt_type type; + + type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); + + switch (type) { + case PKT_TYPE_TXRX_NOTIFY: + mt7921e_mac_tx_free(dev, data, len); + return false; + case PKT_TYPE_TXS: + for (rxd += 2; rxd + 8 <= end; rxd += 8) + mt7921_mac_add_txs(dev, rxd); + return false; + default: + return true; + } +} + void mt7921e_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, struct sk_buff *skb) { @@ -229,11 +249,12 @@ void mt7921e_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, __le32 *rxd = (__le32 *)skb->data; enum rx_pkt_type type; - type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); + type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); switch (type) { case PKT_TYPE_TXRX_NOTIFY: - mt7921_mac_tx_free(dev, skb); + mt7921e_mac_tx_free(dev, skb->data, skb->len); + napi_consume_skb(skb, 1); break; default: mt7921_queue_rx_skb(mdev, q, skb); @@ -314,6 +335,7 @@ int mt7921e_mac_reset(struct mt7921_dev *dev) } local_bh_enable(); + dev->fw_assert = false; clear_bit(MT76_MCU_RESET, &dev->mphy.state); mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c b/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c index a020352122a1..36669e5aeef3 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/pci_mcu.c @@ -42,7 +42,7 @@ int mt7921e_mcu_init(struct mt7921_dev *dev) .headroom = sizeof(struct mt7921_mcu_txd), .mcu_skb_send_msg = mt7921_mcu_send_message, .mcu_parse_response = mt7921_mcu_parse_response, - .mcu_restart = mt7921_mcu_restart, + .mcu_restart = mt76_connac_mcu_restart, }; int err; @@ -59,10 +59,8 @@ int mt7921e_mcu_init(struct mt7921_dev *dev) return err; } -int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) +int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) { - struct mt76_phy *mphy = &dev->mt76.phy; - struct mt76_connac_pm *pm = &dev->pm; int i, err = 0; for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) { @@ -75,9 +73,21 @@ int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) if (i == MT7921_DRV_OWN_RETRY_COUNT) { dev_err(dev->mt76.dev, "driver own failed\n"); err = -EIO; - goto out; } + return err; +} + +int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev) +{ + struct mt76_phy *mphy = &dev->mt76.phy; + struct mt76_connac_pm *pm = &dev->pm; + int err; + + err = __mt7921e_mcu_drv_pmctrl(dev); + if (err < 0) + goto out; + mt7921_wpdma_reinit_cond(dev); clear_bit(MT76_STATE_PM, &mphy->state); diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/regs.h b/drivers/net/wireless/mediatek/mt76/mt7921/regs.h index cbd38122c510..6712ff60c722 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt7921/regs.h @@ -17,13 +17,12 @@ #define MT_PLE_BASE 0x820c0000 #define MT_PLE(ofs) (MT_PLE_BASE + (ofs)) -#define MT_PLE_FL_Q0_CTRL MT_PLE(0x1b0) -#define MT_PLE_FL_Q1_CTRL MT_PLE(0x1b4) -#define MT_PLE_FL_Q2_CTRL MT_PLE(0x1b8) -#define MT_PLE_FL_Q3_CTRL MT_PLE(0x1bc) +#define MT_PLE_FL_Q0_CTRL MT_PLE(0x3e0) +#define MT_PLE_FL_Q1_CTRL MT_PLE(0x3e4) +#define MT_PLE_FL_Q2_CTRL MT_PLE(0x3e8) +#define MT_PLE_FL_Q3_CTRL MT_PLE(0x3ec) -#define MT_PLE_AC_QEMPTY(ac, n) MT_PLE(0x300 + 0x10 * (ac) + \ - ((n) << 2)) +#define MT_PLE_AC_QEMPTY(_n) MT_PLE(0x500 + 0x40 * (_n)) #define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2)) #define MT_MDP_BASE 0x820cd000 @@ -354,6 +353,7 @@ #define MT_WFDMA0_GLO_CFG_RX_DMA_EN BIT(2) #define MT_WFDMA0_GLO_CFG_RX_DMA_BUSY BIT(3) #define MT_WFDMA0_GLO_CFG_TX_WB_DDONE BIT(6) +#define MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL BIT(9) #define MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN BIT(12) #define MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN BIT(15) #define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 BIT(21) @@ -378,6 +378,9 @@ #define MT_WFDMA0_TX_RING16_EXT_CTRL MT_WFDMA0(0x640) #define MT_WFDMA0_TX_RING17_EXT_CTRL MT_WFDMA0(0x644) +#define MT_WPDMA0_MAX_CNT_MASK GENMASK(7, 0) +#define MT_WPDMA0_BASE_PTR_MASK GENMASK(31, 16) + #define MT_WFDMA0_RX_RING0_EXT_CTRL MT_WFDMA0(0x680) #define MT_WFDMA0_RX_RING1_EXT_CTRL MT_WFDMA0(0x684) #define MT_WFDMA0_RX_RING2_EXT_CTRL MT_WFDMA0(0x688) @@ -426,6 +429,10 @@ #define MT_WFDMA_DUMMY_CR MT_MCU_WPDMA0(0x120) #define MT_WFDMA_NEED_REINIT BIT(1) +#define MT_CBTOP_RGU(ofs) (0x70002000 + (ofs)) +#define MT_CBTOP_RGU_WF_SUBSYS_RST MT_CBTOP_RGU(0x600) +#define MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH BIT(0) + #define MT_HW_BOUND 0x70010020 #define MT_HW_CHIPID 0x70010200 #define MT_HW_REV 0x70010204 @@ -434,12 +441,14 @@ #define MT_PCIE_MAC(ofs) (MT_PCIE_MAC_BASE + (ofs)) #define MT_PCIE_MAC_INT_ENABLE MT_PCIE_MAC(0x188) -#define MT_DMA_SHDL(ofs) (0xd6000 + (ofs)) +#define MT_DMA_SHDL(ofs) (0x7c026000 + (ofs)) #define MT_DMASHDL_SW_CONTROL MT_DMA_SHDL(0x004) #define MT_DMASHDL_DMASHDL_BYPASS BIT(28) #define MT_DMASHDL_OPTIONAL MT_DMA_SHDL(0x008) #define MT_DMASHDL_PAGE MT_DMA_SHDL(0x00c) +#define MT_DMASHDL_GROUP_SEQ_ORDER BIT(16) #define MT_DMASHDL_REFILL MT_DMA_SHDL(0x010) +#define MT_DMASHDL_REFILL_MASK GENMASK(31, 16) #define MT_DMASHDL_PKT_MAX_SIZE MT_DMA_SHDL(0x01c) #define MT_DMASHDL_PKT_MAX_SIZE_PLE GENMASK(11, 0) #define MT_DMASHDL_PKT_MAX_SIZE_PSE GENMASK(27, 16) @@ -454,6 +463,46 @@ #define MT_DMASHDL_SCHED_SET(_n) MT_DMA_SHDL(0x070 + ((_n) << 2)) +#define MT_WFDMA_HOST_CONFIG 0x7c027030 +#define MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN BIT(6) + +#define MT_UMAC(ofs) (0x74000000 + (ofs)) +#define MT_UDMA_TX_QSEL MT_UMAC(0x008) +#define MT_FW_DL_EN BIT(3) + +#define MT_UDMA_WLCFG_1 MT_UMAC(0x00c) +#define MT_WL_RX_AGG_PKT_LMT GENMASK(7, 0) +#define MT_WL_TX_TMOUT_LMT GENMASK(27, 8) + +#define MT_UDMA_WLCFG_0 MT_UMAC(0x18) +#define MT_WL_RX_AGG_TO GENMASK(7, 0) +#define MT_WL_RX_AGG_LMT GENMASK(15, 8) +#define MT_WL_TX_TMOUT_FUNC_EN BIT(16) +#define MT_WL_TX_DPH_CHK_EN BIT(17) +#define MT_WL_RX_MPSZ_PAD0 BIT(18) +#define MT_WL_RX_FLUSH BIT(19) +#define MT_TICK_1US_EN BIT(20) +#define MT_WL_RX_AGG_EN BIT(21) +#define MT_WL_RX_EN BIT(22) +#define MT_WL_TX_EN BIT(23) +#define MT_WL_RX_BUSY BIT(30) +#define MT_WL_TX_BUSY BIT(31) + +#define MT_UDMA_CONN_INFRA_STATUS MT_UMAC(0xa20) +#define MT_UDMA_CONN_WFSYS_INIT_DONE BIT(22) +#define MT_UDMA_CONN_INFRA_STATUS_SEL MT_UMAC(0xa24) + +#define MT_SSUSB_EPCTL_CSR(ofs) (0x74011800 + (ofs)) +#define MT_SSUSB_EPCTL_CSR_EP_RST_OPT MT_SSUSB_EPCTL_CSR(0x090) + +#define MT_UWFDMA0(ofs) (0x7c024000 + (ofs)) +#define MT_UWFDMA0_GLO_CFG MT_UWFDMA0(0x208) +#define MT_UWFDMA0_GLO_CFG_EXT0 MT_UWFDMA0(0x2b0) +#define MT_UWFDMA0_TX_RING_EXT_CTRL(_n) MT_UWFDMA0(0x600 + ((_n) << 2)) + +#define MT_CONN_STATUS 0x7c053c10 +#define MT_WIFI_PATCH_DL_STATE BIT(0) + #define MT_CONN_ON_LPCTL 0x7c060010 #define PCIE_LPCR_HOST_OWN_SYNC BIT(2) #define PCIE_LPCR_HOST_CLR_OWN BIT(1) @@ -464,6 +513,7 @@ #define WFSYS_SW_INIT_DONE BIT(4) #define MT_CONN_ON_MISC 0x7c0600f0 +#define MT_TOP_MISC2_FW_PWR_ON BIT(0) #define MT_TOP_MISC2_FW_N9_RDY GENMASK(1, 0) #endif diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/sdio.c b/drivers/net/wireless/mediatek/mt76/mt7921/sdio.c index 65d693902c22..af26d59fa2f0 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/sdio.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/sdio.c @@ -41,6 +41,7 @@ static void mt7921s_unregister_device(struct mt7921_dev *dev) { struct mt76_connac_pm *pm = &dev->pm; + cancel_work_sync(&dev->init_work); mt76_unregister_device(&dev->mt76); cancel_delayed_work_sync(&pm->ps_work); cancel_work_sync(&pm->wake_work); @@ -58,7 +59,10 @@ static int mt7921s_parse_intr(struct mt76_dev *dev, struct mt76s_intr *intr) struct mt7921_sdio_intr *irq_data = sdio->intr_data; int i, err; + sdio_claim_host(sdio->func); err = sdio_readsb(sdio->func, irq_data, MCR_WHISR, sizeof(*irq_data)); + sdio_release_host(sdio->func); + if (err < 0) return err; @@ -88,9 +92,9 @@ static int mt7921s_probe(struct sdio_func *func, .survey_flags = SURVEY_INFO_TIME_TX | SURVEY_INFO_TIME_RX | SURVEY_INFO_TIME_BSS_RX, - .tx_prepare_skb = mt7921s_tx_prepare_skb, - .tx_complete_skb = mt7921s_tx_complete_skb, - .tx_status_data = mt7921s_tx_status_data, + .tx_prepare_skb = mt7921_usb_sdio_tx_prepare_skb, + .tx_complete_skb = mt7921_usb_sdio_tx_complete_skb, + .tx_status_data = mt7921_usb_sdio_tx_status_data, .rx_skb = mt7921_queue_rx_skb, .sta_ps = mt7921_sta_ps, .sta_add = mt7921_mac_sta_add, @@ -118,7 +122,7 @@ static int mt7921s_probe(struct sdio_func *func, struct mt7921_dev *dev; struct mt76_dev *mdev; - int ret, i; + int ret; mdev = mt76_alloc_device(&func->dev, sizeof(*dev), &mt7921_ops, &drv_ops); @@ -151,16 +155,6 @@ static int mt7921s_probe(struct sdio_func *func, goto error; } - for (i = 0; i < ARRAY_SIZE(mdev->sdio.xmit_buf); i++) { - mdev->sdio.xmit_buf[i] = devm_kmalloc(mdev->dev, - MT76S_XMIT_BUF_SZ, - GFP_KERNEL); - if (!mdev->sdio.xmit_buf[i]) { - ret = -ENOMEM; - goto error; - } - } - ret = mt76s_alloc_rx_queue(mdev, MT_RXQ_MAIN); if (ret) goto error; diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c b/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c index ccaf8134cec7..1b3adb3d91e8 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mac.c @@ -60,7 +60,11 @@ int mt7921s_wfsys_reset(struct mt7921_dev *dev) sdio_release_host(sdio->func); + clear_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); + /* activate mt7921s again */ + mt7921s_mcu_drv_pmctrl(dev); + mt76_clear(dev, MT_CONN_STATUS, MT_WIFI_PATCH_DL_STATE); mt7921s_mcu_fw_pmctrl(dev); mt7921s_mcu_drv_pmctrl(dev); @@ -81,7 +85,6 @@ int mt7921s_init_reset(struct mt7921_dev *dev) mt7921s_wfsys_reset(dev); mt76_worker_enable(&dev->mt76.sdio.txrx_worker); - clear_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); clear_bit(MT76_MCU_RESET, &dev->mphy.state); mt7921s_enable_irq(&dev->mt76); @@ -114,7 +117,6 @@ int mt7921s_mac_reset(struct mt7921_dev *dev) mt76_worker_enable(&dev->mt76.sdio.net_worker); dev->fw_assert = false; - clear_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); clear_bit(MT76_MCU_RESET, &dev->mphy.state); mt7921s_enable_irq(&dev->mt76); @@ -138,86 +140,3 @@ out: return err; } - -static void -mt7921s_write_txwi(struct mt7921_dev *dev, struct mt76_wcid *wcid, - enum mt76_txq_id qid, struct ieee80211_sta *sta, - struct ieee80211_key_conf *key, int pid, - struct sk_buff *skb) -{ - __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE); - - memset(txwi, 0, MT_SDIO_TXD_SIZE); - mt7921_mac_write_txwi(dev, txwi, skb, wcid, key, pid, false); - skb_push(skb, MT_SDIO_TXD_SIZE); -} - -int mt7921s_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, - enum mt76_txq_id qid, struct mt76_wcid *wcid, - struct ieee80211_sta *sta, - struct mt76_tx_info *tx_info) -{ - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); - struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); - struct ieee80211_key_conf *key = info->control.hw_key; - struct sk_buff *skb = tx_info->skb; - int err, pad, pktid; - - if (unlikely(tx_info->skb->len <= ETH_HLEN)) - return -EINVAL; - - if (!wcid) - wcid = &dev->mt76.global_wcid; - - if (sta) { - struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv; - - if (time_after(jiffies, msta->last_txs + HZ / 4)) { - info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; - msta->last_txs = jiffies; - } - } - - pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb); - mt7921s_write_txwi(dev, wcid, qid, sta, key, pktid, skb); - - mt7921_skb_add_sdio_hdr(skb, MT7921_SDIO_DATA); - pad = round_up(skb->len, 4) - skb->len; - - err = mt76_skb_adjust_pad(skb, pad); - if (err) - /* Release pktid in case of error. */ - idr_remove(&wcid->pktid, pktid); - - return err; -} - -void mt7921s_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e) -{ - __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE); - unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE; - struct ieee80211_sta *sta; - struct mt76_wcid *wcid; - u16 idx; - - idx = FIELD_GET(MT_TXD1_WLAN_IDX, le32_to_cpu(txwi[1])); - wcid = rcu_dereference(mdev->wcid[idx]); - sta = wcid_to_sta(wcid); - - if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE))) - mt7921_tx_check_aggr(sta, txwi); - - skb_pull(e->skb, headroom); - mt76_tx_complete_skb(mdev, e->wcid, e->skb); -} - -bool mt7921s_tx_status_data(struct mt76_dev *mdev, u8 *update) -{ - struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); - - mt7921_mutex_acquire(dev); - mt7921_mac_sta_poll(dev); - mt7921_mutex_release(dev); - - return false; -} diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mcu.c b/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mcu.c index d20f2ff01be1..54a5c712a3c3 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt7921/sdio_mcu.c @@ -36,7 +36,7 @@ mt7921s_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, if (cmd == MCU_CMD(FW_SCATTER)) type = MT7921_SDIO_FWDL; - mt7921_skb_add_sdio_hdr(skb, type); + mt7921_skb_add_usb_sdio_hdr(dev, skb, type); pad = round_up(skb->len, 4) - skb->len; __skb_put_zero(skb, pad); @@ -49,6 +49,26 @@ mt7921s_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, return ret; } +static u32 mt7921s_read_rm3r(struct mt7921_dev *dev) +{ + struct mt76_sdio *sdio = &dev->mt76.sdio; + + return sdio_readl(sdio->func, MCR_D2HRM3R, NULL); +} + +static u32 mt7921s_clear_rm3r_drv_own(struct mt7921_dev *dev) +{ + struct mt76_sdio *sdio = &dev->mt76.sdio; + u32 val; + + val = sdio_readl(sdio->func, MCR_D2HRM3R, NULL); + if (val) + sdio_writel(sdio->func, H2D_SW_INT_CLEAR_MAILBOX_ACK, + MCR_WSICR, NULL); + + return val; +} + int mt7921s_mcu_init(struct mt7921_dev *dev) { static const struct mt76_mcu_ops mt7921s_mcu_ops = { @@ -88,6 +108,12 @@ int mt7921s_mcu_drv_pmctrl(struct mt7921_dev *dev) err = readx_poll_timeout(mt76s_read_pcr, &dev->mt76, status, status & WHLPCR_IS_DRIVER_OWN, 2000, 1000000); + + if (!err && test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) + err = readx_poll_timeout(mt7921s_read_rm3r, dev, status, + status & D2HRM3R_IS_DRIVER_OWN, + 2000, 1000000); + sdio_release_host(func); if (err < 0) { @@ -115,12 +141,24 @@ int mt7921s_mcu_fw_pmctrl(struct mt7921_dev *dev) sdio_claim_host(func); + if (test_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state)) { + err = readx_poll_timeout(mt7921s_clear_rm3r_drv_own, + dev, status, + !(status & D2HRM3R_IS_DRIVER_OWN), + 2000, 1000000); + if (err < 0) { + dev_err(dev->mt76.dev, "mailbox ACK not cleared\n"); + goto err; + } + } + sdio_writel(func, WHLPCR_FW_OWN_REQ_SET, MCR_WHLPCR, NULL); err = readx_poll_timeout(mt76s_read_pcr, &dev->mt76, status, !(status & WHLPCR_IS_DRIVER_OWN), 2000, 1000000); sdio_release_host(func); +err: if (err < 0) { dev_err(dev->mt76.dev, "firmware own failed\n"); clear_bit(MT76_STATE_PM, &mphy->state); diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/usb.c b/drivers/net/wireless/mediatek/mt76/mt7921/usb.c new file mode 100644 index 000000000000..b7771e9f1fcd --- /dev/null +++ b/drivers/net/wireless/mediatek/mt76/mt7921/usb.c @@ -0,0 +1,306 @@ +// SPDX-License-Identifier: ISC +/* Copyright (C) 2022 MediaTek Inc. + * + * Author: Lorenzo Bianconi <lorenzo@kernel.org> + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/usb.h> + +#include "mt7921.h" +#include "mcu.h" +#include "mac.h" + +static const struct usb_device_id mt7921u_device_table[] = { + { USB_DEVICE_AND_INTERFACE_INFO(0x0e8d, 0x7961, 0xff, 0xff, 0xff) }, + { }, +}; + +static u32 mt7921u_rr(struct mt76_dev *dev, u32 addr) +{ + u32 ret; + + mutex_lock(&dev->usb.usb_ctrl_mtx); + ret = ___mt76u_rr(dev, MT_VEND_READ_EXT, + USB_DIR_IN | MT_USB_TYPE_VENDOR, addr); + mutex_unlock(&dev->usb.usb_ctrl_mtx); + + return ret; +} + +static void mt7921u_wr(struct mt76_dev *dev, u32 addr, u32 val) +{ + mutex_lock(&dev->usb.usb_ctrl_mtx); + ___mt76u_wr(dev, MT_VEND_WRITE_EXT, + USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val); + mutex_unlock(&dev->usb.usb_ctrl_mtx); +} + +static u32 mt7921u_rmw(struct mt76_dev *dev, u32 addr, + u32 mask, u32 val) +{ + mutex_lock(&dev->usb.usb_ctrl_mtx); + val |= ___mt76u_rr(dev, MT_VEND_READ_EXT, + USB_DIR_IN | MT_USB_TYPE_VENDOR, addr) & ~mask; + ___mt76u_wr(dev, MT_VEND_WRITE_EXT, + USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val); + mutex_unlock(&dev->usb.usb_ctrl_mtx); + + return val; +} + +static void mt7921u_copy(struct mt76_dev *dev, u32 offset, + const void *data, int len) +{ + struct mt76_usb *usb = &dev->usb; + int ret, i = 0, batch_len; + const u8 *val = data; + + len = round_up(len, 4); + + mutex_lock(&usb->usb_ctrl_mtx); + while (i < len) { + batch_len = min_t(int, usb->data_len, len - i); + memcpy(usb->data, val + i, batch_len); + ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT, + USB_DIR_OUT | MT_USB_TYPE_VENDOR, + (offset + i) >> 16, offset + i, + usb->data, batch_len); + if (ret < 0) + break; + + i += batch_len; + } + mutex_unlock(&usb->usb_ctrl_mtx); +} + +int mt7921u_mcu_power_on(struct mt7921_dev *dev) +{ + int ret; + + ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON, + USB_DIR_OUT | MT_USB_TYPE_VENDOR, + 0x0, 0x1, NULL, 0); + if (ret) + return ret; + + if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON, + MT_TOP_MISC2_FW_PWR_ON, 500)) { + dev_err(dev->mt76.dev, "Timeout for power on\n"); + ret = -EIO; + } + + return ret; +} + +static int +mt7921u_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb, + int cmd, int *seq) +{ + struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76); + u32 pad, ep; + int ret; + + ret = mt7921_mcu_fill_message(mdev, skb, cmd, seq); + if (ret) + return ret; + + if (cmd != MCU_CMD(FW_SCATTER)) + ep = MT_EP_OUT_INBAND_CMD; + else + ep = MT_EP_OUT_AC_BE; + + mt7921_skb_add_usb_sdio_hdr(dev, skb, 0); + pad = round_up(skb->len, 4) + 4 - skb->len; + __skb_put_zero(skb, pad); + + ret = mt76u_bulk_msg(&dev->mt76, skb->data, skb->len, NULL, + 1000, ep); + dev_kfree_skb(skb); + + return ret; +} + +static int mt7921u_mcu_init(struct mt7921_dev *dev) +{ + static const struct mt76_mcu_ops mcu_ops = { + .headroom = MT_SDIO_HDR_SIZE + sizeof(struct mt7921_mcu_txd), + .tailroom = MT_USB_TAIL_SIZE, + .mcu_skb_send_msg = mt7921u_mcu_send_message, + .mcu_parse_response = mt7921_mcu_parse_response, + .mcu_restart = mt76_connac_mcu_restart, + }; + int ret; + + dev->mt76.mcu_ops = &mcu_ops; + + mt76_set(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN); + ret = mt7921_run_firmware(dev); + if (ret) + return ret; + + set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state); + mt76_clear(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN); + + return 0; +} + +static void mt7921u_stop(struct ieee80211_hw *hw) +{ + struct mt7921_dev *dev = mt7921_hw_dev(hw); + + mt76u_stop_tx(&dev->mt76); + mt7921_stop(hw); +} + +static void mt7921u_cleanup(struct mt7921_dev *dev) +{ + clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state); + mt7921u_wfsys_reset(dev); + mt7921_mcu_exit(dev); + mt76u_queues_deinit(&dev->mt76); +} + +static int mt7921u_probe(struct usb_interface *usb_intf, + const struct usb_device_id *id) +{ + static const struct mt76_driver_ops drv_ops = { + .txwi_size = MT_SDIO_TXD_SIZE, + .drv_flags = MT_DRV_RX_DMA_HDR | MT_DRV_HW_MGMT_TXQ, + .survey_flags = SURVEY_INFO_TIME_TX | + SURVEY_INFO_TIME_RX | + SURVEY_INFO_TIME_BSS_RX, + .tx_prepare_skb = mt7921_usb_sdio_tx_prepare_skb, + .tx_complete_skb = mt7921_usb_sdio_tx_complete_skb, + .tx_status_data = mt7921_usb_sdio_tx_status_data, + .rx_skb = mt7921_queue_rx_skb, + .sta_ps = mt7921_sta_ps, + .sta_add = mt7921_mac_sta_add, + .sta_assoc = mt7921_mac_sta_assoc, + .sta_remove = mt7921_mac_sta_remove, + .update_survey = mt7921_update_channel, + }; + static const struct mt7921_hif_ops hif_ops = { + .mcu_init = mt7921u_mcu_init, + .init_reset = mt7921u_init_reset, + .reset = mt7921u_mac_reset, + }; + static struct mt76_bus_ops bus_ops = { + .rr = mt7921u_rr, + .wr = mt7921u_wr, + .rmw = mt7921u_rmw, + .read_copy = mt76u_read_copy, + .write_copy = mt7921u_copy, + .type = MT76_BUS_USB, + }; + struct usb_device *udev = interface_to_usbdev(usb_intf); + struct ieee80211_ops *ops; + struct ieee80211_hw *hw; + struct mt7921_dev *dev; + struct mt76_dev *mdev; + int ret; + + ops = devm_kmemdup(&usb_intf->dev, &mt7921_ops, sizeof(mt7921_ops), + GFP_KERNEL); + if (!ops) + return -ENOMEM; + + ops->stop = mt7921u_stop; + + mdev = mt76_alloc_device(&usb_intf->dev, sizeof(*dev), ops, &drv_ops); + if (!mdev) + return -ENOMEM; + + dev = container_of(mdev, struct mt7921_dev, mt76); + dev->hif_ops = &hif_ops; + + udev = usb_get_dev(udev); + usb_reset_device(udev); + + usb_set_intfdata(usb_intf, dev); + + ret = __mt76u_init(mdev, usb_intf, &bus_ops); + if (ret < 0) + goto error; + + mdev->rev = (mt76_rr(dev, MT_HW_CHIPID) << 16) | + (mt76_rr(dev, MT_HW_REV) & 0xff); + dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev); + + if (mt76_get_field(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY)) { + ret = mt7921u_wfsys_reset(dev); + if (ret) + goto error; + } + + ret = mt7921u_mcu_power_on(dev); + if (ret) + goto error; + + ret = mt76u_alloc_mcu_queue(&dev->mt76); + if (ret) + goto error; + + ret = mt76u_alloc_queues(&dev->mt76); + if (ret) + goto error; + + ret = mt7921u_dma_init(dev); + if (ret) + return ret; + + hw = mt76_hw(dev); + /* check hw sg support in order to enable AMSDU */ + hw->max_tx_fragments = mdev->usb.sg_en ? MT_HW_TXP_MAX_BUF_NUM : 1; + + ret = mt7921_register_device(dev); + if (ret) + goto error; + + return 0; + +error: + mt76u_queues_deinit(&dev->mt76); + + usb_set_intfdata(usb_intf, NULL); + usb_put_dev(interface_to_usbdev(usb_intf)); + + mt76_free_device(&dev->mt76); + + return ret; +} + +static void mt7921u_disconnect(struct usb_interface *usb_intf) +{ + struct mt7921_dev *dev = usb_get_intfdata(usb_intf); + + cancel_work_sync(&dev->init_work); + if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state)) + return; + + mt76_unregister_device(&dev->mt76); + mt7921u_cleanup(dev); + + usb_set_intfdata(usb_intf, NULL); + usb_put_dev(interface_to_usbdev(usb_intf)); + + mt76_free_device(&dev->mt76); +} + +MODULE_DEVICE_TABLE(usb, mt7921u_device_table); +MODULE_FIRMWARE(MT7921_FIRMWARE_WM); +MODULE_FIRMWARE(MT7921_ROM_PATCH); + +static struct usb_driver mt7921u_driver = { + .name = KBUILD_MODNAME, + .id_table = mt7921u_device_table, + .probe = mt7921u_probe, + .disconnect = mt7921u_disconnect, + .soft_unbind = 1, + .disable_hub_initiated_lpm = 1, +}; +module_usb_driver(mt7921u_driver); + +MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/mediatek/mt76/mt7921/usb_mac.c b/drivers/net/wireless/mediatek/mt76/mt7921/usb_mac.c new file mode 100644 index 000000000000..99bcbd858b65 --- /dev/null +++ b/drivers/net/wireless/mediatek/mt76/mt7921/usb_mac.c @@ -0,0 +1,252 @@ +// SPDX-License-Identifier: ISC +/* Copyright (C) 2022 MediaTek Inc. + * + * Author: Lorenzo Bianconi <lorenzo@kernel.org> + */ + +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/usb.h> + +#include "mt7921.h" +#include "mcu.h" +#include "mac.h" + +static u32 mt7921u_uhw_rr(struct mt76_dev *dev, u32 addr) +{ + u32 ret; + + mutex_lock(&dev->usb.usb_ctrl_mtx); + ret = ___mt76u_rr(dev, MT_VEND_DEV_MODE, + USB_DIR_IN | MT_USB_TYPE_UHW_VENDOR, addr); + mutex_unlock(&dev->usb.usb_ctrl_mtx); + + return ret; +} + +static void mt7921u_uhw_wr(struct mt76_dev *dev, u32 addr, u32 val) +{ + mutex_lock(&dev->usb.usb_ctrl_mtx); + ___mt76u_wr(dev, MT_VEND_WRITE, + USB_DIR_OUT | MT_USB_TYPE_UHW_VENDOR, addr, val); + mutex_unlock(&dev->usb.usb_ctrl_mtx); +} + +static void mt7921u_dma_prefetch(struct mt7921_dev *dev) +{ + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0), + MT_WPDMA0_MAX_CNT_MASK, 4); + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0), + MT_WPDMA0_BASE_PTR_MASK, 0x80); + + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1), + MT_WPDMA0_MAX_CNT_MASK, 4); + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1), + MT_WPDMA0_BASE_PTR_MASK, 0xc0); + + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2), + MT_WPDMA0_MAX_CNT_MASK, 4); + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2), + MT_WPDMA0_BASE_PTR_MASK, 0x100); + + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3), + MT_WPDMA0_MAX_CNT_MASK, 4); + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3), + MT_WPDMA0_BASE_PTR_MASK, 0x140); + + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4), + MT_WPDMA0_MAX_CNT_MASK, 4); + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4), + MT_WPDMA0_BASE_PTR_MASK, 0x180); + + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16), + MT_WPDMA0_MAX_CNT_MASK, 4); + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16), + MT_WPDMA0_BASE_PTR_MASK, 0x280); + + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17), + MT_WPDMA0_MAX_CNT_MASK, 4); + mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17), + MT_WPDMA0_BASE_PTR_MASK, 0x2c0); +} + +static void mt7921u_wfdma_init(struct mt7921_dev *dev) +{ + mt7921u_dma_prefetch(dev); + + mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO); + mt76_set(dev, MT_UWFDMA0_GLO_CFG, + MT_WFDMA0_GLO_CFG_OMIT_TX_INFO | + MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 | + MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL | + MT_WFDMA0_GLO_CFG_TX_DMA_EN | + MT_WFDMA0_GLO_CFG_RX_DMA_EN); + + /* disable dmashdl */ + mt76_clear(dev, MT_UWFDMA0_GLO_CFG_EXT0, + MT_WFDMA0_CSR_TX_DMASHDL_ENABLE); + mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS); + + mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT); +} + +static int mt7921u_dma_rx_evt_ep4(struct mt7921_dev *dev) +{ + if (!mt76_poll(dev, MT_UWFDMA0_GLO_CFG, + MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000)) + return -ETIMEDOUT; + + mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN); + mt76_set(dev, MT_WFDMA_HOST_CONFIG, + MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN); + mt76_set(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN); + + return 0; +} + +static void mt7921u_epctl_rst_opt(struct mt7921_dev *dev, bool reset) +{ + u32 val; + + /* usb endpoint reset opt + * bits[4,9]: out blk ep 4-9 + * bits[20,21]: in blk ep 4-5 + * bits[22]: in int ep 6 + */ + val = mt7921u_uhw_rr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT); + if (reset) + val |= GENMASK(9, 4) | GENMASK(22, 20); + else + val &= ~(GENMASK(9, 4) | GENMASK(22, 20)); + mt7921u_uhw_wr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT, val); +} + +int mt7921u_dma_init(struct mt7921_dev *dev) +{ + int err; + + mt7921u_wfdma_init(dev); + + mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH); + + mt76_set(dev, MT_UDMA_WLCFG_0, + MT_WL_RX_EN | MT_WL_TX_EN | + MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN); + mt76_clear(dev, MT_UDMA_WLCFG_0, + MT_WL_RX_AGG_TO | MT_WL_RX_AGG_LMT); + mt76_clear(dev, MT_UDMA_WLCFG_1, MT_WL_RX_AGG_PKT_LMT); + + err = mt7921u_dma_rx_evt_ep4(dev); + if (err) + return err; + + mt7921u_epctl_rst_opt(dev, false); + + return 0; +} + +int mt7921u_wfsys_reset(struct mt7921_dev *dev) +{ + u32 val; + int i; + + mt7921u_epctl_rst_opt(dev, false); + + val = mt7921u_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST); + val |= MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH; + mt7921u_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val); + + usleep_range(10, 20); + + val = mt7921u_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST); + val &= ~MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH; + mt7921u_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val); + + mt7921u_uhw_wr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS_SEL, 0); + for (i = 0; i < MT7921_WFSYS_INIT_RETRY_COUNT; i++) { + val = mt7921u_uhw_rr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS); + if (val & MT_UDMA_CONN_WFSYS_INIT_DONE) + break; + + msleep(100); + } + + if (i == MT7921_WFSYS_INIT_RETRY_COUNT) + return -ETIMEDOUT; + + return 0; +} + +int mt7921u_init_reset(struct mt7921_dev *dev) +{ + set_bit(MT76_RESET, &dev->mphy.state); + + wake_up(&dev->mt76.mcu.wait); + mt7921_mcu_exit(dev); + + mt76u_stop_rx(&dev->mt76); + mt76u_stop_tx(&dev->mt76); + + mt7921u_wfsys_reset(dev); + + clear_bit(MT76_RESET, &dev->mphy.state); + + return mt76u_resume_rx(&dev->mt76); +} + +int mt7921u_mac_reset(struct mt7921_dev *dev) +{ + int err; + + mt76_txq_schedule_all(&dev->mphy); + mt76_worker_disable(&dev->mt76.tx_worker); + + set_bit(MT76_RESET, &dev->mphy.state); + set_bit(MT76_MCU_RESET, &dev->mphy.state); + + wake_up(&dev->mt76.mcu.wait); + mt7921_mcu_exit(dev); + + mt76u_stop_rx(&dev->mt76); + mt76u_stop_tx(&dev->mt76); + + mt7921u_wfsys_reset(dev); + + clear_bit(MT76_MCU_RESET, &dev->mphy.state); + err = mt76u_resume_rx(&dev->mt76); + if (err) + goto out; + + err = mt7921u_mcu_power_on(dev); + if (err) + goto out; + + err = mt7921u_dma_init(dev); + if (err) + goto out; + + mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE); + mt76_set(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN); + + err = mt7921_run_firmware(dev); + if (err) + goto out; + + mt76_clear(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN); + + err = mt7921_mcu_set_eeprom(dev); + if (err) + goto out; + + err = mt7921_mac_init(dev); + if (err) + goto out; + + err = __mt7921_start(&dev->phy); +out: + clear_bit(MT76_RESET, &dev->mphy.state); + + mt76_worker_enable(&dev->mt76.tx_worker); + + return err; +} diff --git a/drivers/net/wireless/mediatek/mt76/sdio.c b/drivers/net/wireless/mediatek/mt76/sdio.c index 54f72d215948..def7f325f5c5 100644 --- a/drivers/net/wireless/mediatek/mt76/sdio.c +++ b/drivers/net/wireless/mediatek/mt76/sdio.c @@ -12,6 +12,8 @@ #include <linux/kernel.h> #include <linux/module.h> #include <linux/mmc/sdio_func.h> +#include <linux/mmc/card.h> +#include <linux/mmc/host.h> #include <linux/sched.h> #include <linux/kthread.h> @@ -627,6 +629,7 @@ int mt76s_init(struct mt76_dev *dev, struct sdio_func *func, const struct mt76_bus_ops *bus_ops) { struct mt76_sdio *sdio = &dev->sdio; + u32 host_max_cap; int err; err = mt76_worker_setup(dev->hw, &sdio->status_worker, @@ -648,7 +651,16 @@ int mt76s_init(struct mt76_dev *dev, struct sdio_func *func, dev->bus = bus_ops; dev->sdio.func = func; - return 0; + host_max_cap = min_t(u32, func->card->host->max_req_size, + func->cur_blksize * + func->card->host->max_blk_count); + dev->sdio.xmit_buf_sz = min_t(u32, host_max_cap, MT76S_XMIT_BUF_SZ); + dev->sdio.xmit_buf = devm_kmalloc(dev->dev, dev->sdio.xmit_buf_sz, + GFP_KERNEL); + if (!dev->sdio.xmit_buf) + err = -ENOMEM; + + return err; } EXPORT_SYMBOL_GPL(mt76s_init); diff --git a/drivers/net/wireless/mediatek/mt76/sdio.h b/drivers/net/wireless/mediatek/mt76/sdio.h index 99db4ad93b7c..27d5d2077eba 100644 --- a/drivers/net/wireless/mediatek/mt76/sdio.h +++ b/drivers/net/wireless/mediatek/mt76/sdio.h @@ -65,6 +65,7 @@ #define MCR_H2DSM0R 0x0070 #define H2D_SW_INT_READ BIT(16) #define H2D_SW_INT_WRITE BIT(17) +#define H2D_SW_INT_CLEAR_MAILBOX_ACK BIT(22) #define MCR_H2DSM1R 0x0074 #define MCR_D2HRM0R 0x0078 @@ -109,6 +110,7 @@ #define MCR_H2DSM2R 0x0160 /* supported in CONNAC2 */ #define MCR_H2DSM3R 0x0164 /* supported in CONNAC2 */ #define MCR_D2HRM3R 0x0174 /* supported in CONNAC2 */ +#define D2HRM3R_IS_DRIVER_OWN BIT(0) #define MCR_WTQCR8 0x0190 /* supported in CONNAC2 */ #define MCR_WTQCR9 0x0194 /* supported in CONNAC2 */ #define MCR_WTQCR10 0x0198 /* supported in CONNAC2 */ diff --git a/drivers/net/wireless/mediatek/mt76/sdio_txrx.c b/drivers/net/wireless/mediatek/mt76/sdio_txrx.c index 801590a0a334..a2601aa9e7b1 100644 --- a/drivers/net/wireless/mediatek/mt76/sdio_txrx.c +++ b/drivers/net/wireless/mediatek/mt76/sdio_txrx.c @@ -102,7 +102,10 @@ mt76s_rx_run_queue(struct mt76_dev *dev, enum mt76_rxq_id qid, buf = page_address(page); + sdio_claim_host(sdio->func); err = sdio_readsb(sdio->func, buf, MCR_WRDR(qid), len); + sdio_release_host(sdio->func); + if (err < 0) { dev_err(dev->dev, "sdio read data failed:%d\n", err); put_page(page); @@ -115,7 +118,7 @@ mt76s_rx_run_queue(struct mt76_dev *dev, enum mt76_rxq_id qid, __le32 *rxd = (__le32 *)buf; /* parse rxd to get the actual packet length */ - len = FIELD_GET(GENMASK(15, 0), le32_to_cpu(rxd[0])); + len = le32_get_bits(rxd[0], GENMASK(15, 0)); e->skb = mt76s_build_rx_skb(buf, len, round_up(len + 4, 4)); if (!e->skb) break; @@ -214,7 +217,10 @@ static int __mt76s_xmit_queue(struct mt76_dev *dev, u8 *data, int len) if (len > sdio->func->cur_blksize) len = roundup(len, sdio->func->cur_blksize); + sdio_claim_host(sdio->func); err = sdio_writesb(sdio->func, MCR_WTDR1, data, len); + sdio_release_host(sdio->func); + if (err) dev_err(dev->dev, "sdio write failed: %d\n", err); @@ -223,12 +229,11 @@ static int __mt76s_xmit_queue(struct mt76_dev *dev, u8 *data, int len) static int mt76s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q) { - int qid, err, nframes = 0, len = 0, pse_sz = 0, ple_sz = 0; + int err, nframes = 0, len = 0, pse_sz = 0, ple_sz = 0; bool mcu = q == dev->q_mcu[MT_MCUQ_WM]; struct mt76_sdio *sdio = &dev->sdio; u8 pad; - qid = mcu ? ARRAY_SIZE(sdio->xmit_buf) - 1 : q->qid; while (q->first != q->head) { struct mt76_queue_entry *e = &q->entry[q->first]; struct sk_buff *iter; @@ -249,27 +254,25 @@ static int mt76s_tx_run_queue(struct mt76_dev *dev, struct mt76_queue *q) } pad = roundup(e->skb->len, 4) - e->skb->len; - if (len + e->skb->len + pad + 4 > MT76S_XMIT_BUF_SZ) + if (len + e->skb->len + pad + 4 > dev->sdio.xmit_buf_sz) break; if (mt76s_tx_pick_quota(sdio, mcu, e->buf_sz, &pse_sz, &ple_sz)) break; - memcpy(sdio->xmit_buf[qid] + len, e->skb->data, - skb_headlen(e->skb)); + memcpy(sdio->xmit_buf + len, e->skb->data, skb_headlen(e->skb)); len += skb_headlen(e->skb); nframes++; skb_walk_frags(e->skb, iter) { - memcpy(sdio->xmit_buf[qid] + len, iter->data, - iter->len); + memcpy(sdio->xmit_buf + len, iter->data, iter->len); len += iter->len; nframes++; } if (unlikely(pad)) { - memset(sdio->xmit_buf[qid] + len, 0, pad); + memset(sdio->xmit_buf + len, 0, pad); len += pad; } next: @@ -278,8 +281,8 @@ next: } if (nframes) { - memset(sdio->xmit_buf[qid] + len, 0, 4); - err = __mt76s_xmit_queue(dev, sdio->xmit_buf[qid], len + 4); + memset(sdio->xmit_buf + len, 0, 4); + err = __mt76s_xmit_queue(dev, sdio->xmit_buf, len + 4); if (err) return err; } @@ -298,6 +301,7 @@ void mt76s_txrx_worker(struct mt76_sdio *sdio) /* disable interrupt */ sdio_claim_host(sdio->func); sdio_writel(sdio->func, WHLPCR_INT_EN_CLR, MCR_WHLPCR, NULL); + sdio_release_host(sdio->func); do { nframes = 0; @@ -327,6 +331,7 @@ void mt76s_txrx_worker(struct mt76_sdio *sdio) } while (nframes > 0); /* enable interrupt */ + sdio_claim_host(sdio->func); sdio_writel(sdio->func, WHLPCR_INT_EN_SET, MCR_WHLPCR, NULL); sdio_release_host(sdio->func); } @@ -341,6 +346,7 @@ void mt76s_sdio_irq(struct sdio_func *func) test_bit(MT76_MCU_RESET, &dev->phy.state)) return; + sdio_writel(sdio->func, WHLPCR_INT_EN_CLR, MCR_WHLPCR, NULL); mt76_worker_schedule(&sdio->txrx_worker); } EXPORT_SYMBOL_GPL(mt76s_sdio_irq); diff --git a/drivers/net/wireless/mediatek/mt76/testmode.c b/drivers/net/wireless/mediatek/mt76/testmode.c index 1a01ad7a4c16..382b45639f26 100644 --- a/drivers/net/wireless/mediatek/mt76/testmode.c +++ b/drivers/net/wireless/mediatek/mt76/testmode.c @@ -409,7 +409,6 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct mt76_dev *dev = phy->dev; struct mt76_testmode_data *td = &phy->test; struct nlattr *tb[NUM_MT76_TM_ATTRS]; - bool ext_phy = phy != &dev->phy; u32 state; int err; int i; @@ -447,8 +446,8 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_LDPC], &td->tx_rate_ldpc, 0, 1) || mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_STBC], &td->tx_rate_stbc, 0, 1) || mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_LTF], &td->tx_ltf, 0, 2) || - mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_ANTENNA], &td->tx_antenna_mask, - 1 << (ext_phy * 2), phy->antenna_mask << (ext_phy * 2)) || + mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_ANTENNA], + &td->tx_antenna_mask, 0, 0xff) || mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_SPE_IDX], &td->tx_spe_idx, 0, 27) || mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_DUTY_CYCLE], &td->tx_duty_cycle, 0, 99) || diff --git a/drivers/net/wireless/mediatek/mt76/usb.c b/drivers/net/wireless/mediatek/mt76/usb.c index 0a7006c8959b..a85e192c9d59 100644 --- a/drivers/net/wireless/mediatek/mt76/usb.c +++ b/drivers/net/wireless/mediatek/mt76/usb.c @@ -15,9 +15,8 @@ static bool disable_usb_sg; module_param_named(disable_usb_sg, disable_usb_sg, bool, 0644); MODULE_PARM_DESC(disable_usb_sg, "Disable usb scatter-gather support"); -static int __mt76u_vendor_request(struct mt76_dev *dev, u8 req, - u8 req_type, u16 val, u16 offset, - void *buf, size_t len) +int __mt76u_vendor_request(struct mt76_dev *dev, u8 req, u8 req_type, + u16 val, u16 offset, void *buf, size_t len) { struct usb_interface *uintf = to_usb_interface(dev->dev); struct usb_device *udev = interface_to_usbdev(uintf); @@ -45,6 +44,7 @@ static int __mt76u_vendor_request(struct mt76_dev *dev, u8 req, req, offset, ret); return ret; } +EXPORT_SYMBOL_GPL(__mt76u_vendor_request); int mt76u_vendor_request(struct mt76_dev *dev, u8 req, u8 req_type, u16 val, u16 offset, @@ -62,22 +62,21 @@ int mt76u_vendor_request(struct mt76_dev *dev, u8 req, } EXPORT_SYMBOL_GPL(mt76u_vendor_request); -static u32 ___mt76u_rr(struct mt76_dev *dev, u8 req, u32 addr) +u32 ___mt76u_rr(struct mt76_dev *dev, u8 req, u8 req_type, u32 addr) { struct mt76_usb *usb = &dev->usb; u32 data = ~0; int ret; - ret = __mt76u_vendor_request(dev, req, - USB_DIR_IN | USB_TYPE_VENDOR, - addr >> 16, addr, usb->data, - sizeof(__le32)); + ret = __mt76u_vendor_request(dev, req, req_type, addr >> 16, + addr, usb->data, sizeof(__le32)); if (ret == sizeof(__le32)) data = get_unaligned_le32(usb->data); trace_usb_reg_rr(dev, addr, data); return data; } +EXPORT_SYMBOL_GPL(___mt76u_rr); static u32 __mt76u_rr(struct mt76_dev *dev, u32 addr) { @@ -95,7 +94,8 @@ static u32 __mt76u_rr(struct mt76_dev *dev, u32 addr) break; } - return ___mt76u_rr(dev, req, addr & ~MT_VEND_TYPE_MASK); + return ___mt76u_rr(dev, req, USB_DIR_IN | USB_TYPE_VENDOR, + addr & ~MT_VEND_TYPE_MASK); } static u32 mt76u_rr(struct mt76_dev *dev, u32 addr) @@ -109,29 +109,17 @@ static u32 mt76u_rr(struct mt76_dev *dev, u32 addr) return ret; } -static u32 mt76u_rr_ext(struct mt76_dev *dev, u32 addr) -{ - u32 ret; - - mutex_lock(&dev->usb.usb_ctrl_mtx); - ret = ___mt76u_rr(dev, MT_VEND_READ_EXT, addr); - mutex_unlock(&dev->usb.usb_ctrl_mtx); - - return ret; -} - -static void ___mt76u_wr(struct mt76_dev *dev, u8 req, - u32 addr, u32 val) +void ___mt76u_wr(struct mt76_dev *dev, u8 req, u8 req_type, + u32 addr, u32 val) { struct mt76_usb *usb = &dev->usb; put_unaligned_le32(val, usb->data); - __mt76u_vendor_request(dev, req, - USB_DIR_OUT | USB_TYPE_VENDOR, - addr >> 16, addr, usb->data, - sizeof(__le32)); + __mt76u_vendor_request(dev, req, req_type, addr >> 16, + addr, usb->data, sizeof(__le32)); trace_usb_reg_wr(dev, addr, val); } +EXPORT_SYMBOL_GPL(___mt76u_wr); static void __mt76u_wr(struct mt76_dev *dev, u32 addr, u32 val) { @@ -145,7 +133,8 @@ static void __mt76u_wr(struct mt76_dev *dev, u32 addr, u32 val) req = MT_VEND_MULTI_WRITE; break; } - ___mt76u_wr(dev, req, addr & ~MT_VEND_TYPE_MASK, val); + ___mt76u_wr(dev, req, USB_DIR_OUT | USB_TYPE_VENDOR, + addr & ~MT_VEND_TYPE_MASK, val); } static void mt76u_wr(struct mt76_dev *dev, u32 addr, u32 val) @@ -155,13 +144,6 @@ static void mt76u_wr(struct mt76_dev *dev, u32 addr, u32 val) mutex_unlock(&dev->usb.usb_ctrl_mtx); } -static void mt76u_wr_ext(struct mt76_dev *dev, u32 addr, u32 val) -{ - mutex_lock(&dev->usb.usb_ctrl_mtx); - ___mt76u_wr(dev, MT_VEND_WRITE_EXT, addr, val); - mutex_unlock(&dev->usb.usb_ctrl_mtx); -} - static u32 mt76u_rmw(struct mt76_dev *dev, u32 addr, u32 mask, u32 val) { @@ -173,17 +155,6 @@ static u32 mt76u_rmw(struct mt76_dev *dev, u32 addr, return val; } -static u32 mt76u_rmw_ext(struct mt76_dev *dev, u32 addr, - u32 mask, u32 val) -{ - mutex_lock(&dev->usb.usb_ctrl_mtx); - val |= ___mt76u_rr(dev, MT_VEND_READ_EXT, addr) & ~mask; - ___mt76u_wr(dev, MT_VEND_WRITE_EXT, addr, val); - mutex_unlock(&dev->usb.usb_ctrl_mtx); - - return val; -} - static void mt76u_copy(struct mt76_dev *dev, u32 offset, const void *data, int len) { @@ -216,33 +187,8 @@ static void mt76u_copy(struct mt76_dev *dev, u32 offset, mutex_unlock(&usb->usb_ctrl_mtx); } -static void mt76u_copy_ext(struct mt76_dev *dev, u32 offset, - const void *data, int len) -{ - struct mt76_usb *usb = &dev->usb; - int ret, i = 0, batch_len; - const u8 *val = data; - - len = round_up(len, 4); - mutex_lock(&usb->usb_ctrl_mtx); - while (i < len) { - batch_len = min_t(int, usb->data_len, len - i); - memcpy(usb->data, val + i, batch_len); - ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT, - USB_DIR_OUT | USB_TYPE_VENDOR, - (offset + i) >> 16, offset + i, - usb->data, batch_len); - if (ret < 0) - break; - - i += batch_len; - } - mutex_unlock(&usb->usb_ctrl_mtx); -} - -static void -mt76u_read_copy_ext(struct mt76_dev *dev, u32 offset, - void *data, int len) +void mt76u_read_copy(struct mt76_dev *dev, u32 offset, + void *data, int len) { struct mt76_usb *usb = &dev->usb; int i = 0, batch_len, ret; @@ -264,6 +210,7 @@ mt76u_read_copy_ext(struct mt76_dev *dev, u32 offset, } mutex_unlock(&usb->usb_ctrl_mtx); } +EXPORT_SYMBOL_GPL(mt76u_read_copy); void mt76u_single_wr(struct mt76_dev *dev, const u8 req, const u16 offset, const u32 val) @@ -1112,24 +1059,13 @@ static const struct mt76_queue_ops usb_queue_ops = { .kick = mt76u_tx_kick, }; -int mt76u_init(struct mt76_dev *dev, - struct usb_interface *intf, bool ext) +int __mt76u_init(struct mt76_dev *dev, struct usb_interface *intf, + struct mt76_bus_ops *ops) { - static struct mt76_bus_ops mt76u_ops = { - .read_copy = mt76u_read_copy_ext, - .wr_rp = mt76u_wr_rp, - .rd_rp = mt76u_rd_rp, - .type = MT76_BUS_USB, - }; struct usb_device *udev = interface_to_usbdev(intf); struct mt76_usb *usb = &dev->usb; int err; - mt76u_ops.rr = ext ? mt76u_rr_ext : mt76u_rr; - mt76u_ops.wr = ext ? mt76u_wr_ext : mt76u_wr; - mt76u_ops.rmw = ext ? mt76u_rmw_ext : mt76u_rmw; - mt76u_ops.write_copy = ext ? mt76u_copy_ext : mt76u_copy; - INIT_WORK(&usb->stat_work, mt76u_tx_status_data); usb->data_len = usb_maxpacket(udev, usb_sndctrlpipe(udev, 0), 1); @@ -1141,7 +1077,7 @@ int mt76u_init(struct mt76_dev *dev, return -ENOMEM; mutex_init(&usb->usb_ctrl_mtx); - dev->bus = &mt76u_ops; + dev->bus = ops; dev->queue_ops = &usb_queue_ops; dev_set_drvdata(&udev->dev, dev); @@ -1167,6 +1103,23 @@ int mt76u_init(struct mt76_dev *dev, return 0; } +EXPORT_SYMBOL_GPL(__mt76u_init); + +int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf) +{ + static struct mt76_bus_ops bus_ops = { + .rr = mt76u_rr, + .wr = mt76u_wr, + .rmw = mt76u_rmw, + .read_copy = mt76u_read_copy, + .write_copy = mt76u_copy, + .wr_rp = mt76u_wr_rp, + .rd_rp = mt76u_rd_rp, + .type = MT76_BUS_USB, + }; + + return __mt76u_init(dev, intf, &bus_ops); +} EXPORT_SYMBOL_GPL(mt76u_init); MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>"); diff --git a/drivers/net/wireless/microchip/wilc1000/spi.c b/drivers/net/wireless/microchip/wilc1000/spi.c index d2db52289399..18420e954402 100644 --- a/drivers/net/wireless/microchip/wilc1000/spi.c +++ b/drivers/net/wireless/microchip/wilc1000/spi.c @@ -725,10 +725,7 @@ static int wilc_spi_dma_rw(struct wilc *wilc, u8 cmd, u32 adr, u8 *b, u32 sz) int nbytes; u8 rsp; - if (sz <= DATA_PKT_SZ) - nbytes = sz; - else - nbytes = DATA_PKT_SZ; + nbytes = min_t(u32, sz, DATA_PKT_SZ); /* * Data Response header diff --git a/drivers/net/wireless/ray_cs.c b/drivers/net/wireless/ray_cs.c index 2987ad9271f6..87e98ab068ed 100644 --- a/drivers/net/wireless/ray_cs.c +++ b/drivers/net/wireless/ray_cs.c @@ -382,6 +382,8 @@ static int ray_config(struct pcmcia_device *link) goto failed; local->sram = ioremap(link->resource[2]->start, resource_size(link->resource[2])); + if (!local->sram) + goto failed; /*** Set up 16k window for shared memory (receive buffer) ***************/ link->resource[3]->flags |= @@ -396,6 +398,8 @@ static int ray_config(struct pcmcia_device *link) goto failed; local->rmem = ioremap(link->resource[3]->start, resource_size(link->resource[3])); + if (!local->rmem) + goto failed; /*** Set up window for attribute memory ***********************************/ link->resource[4]->flags |= @@ -410,6 +414,8 @@ static int ray_config(struct pcmcia_device *link) goto failed; local->amem = ioremap(link->resource[4]->start, resource_size(link->resource[4])); + if (!local->amem) + goto failed; dev_dbg(&link->dev, "ray_config sram=%p\n", local->sram); dev_dbg(&link->dev, "ray_config rmem=%p\n", local->rmem); diff --git a/drivers/net/wireless/realtek/rtlwifi/cam.c b/drivers/net/wireless/realtek/rtlwifi/cam.c index 7a0355dc6bab..32970ea4b4e7 100644 --- a/drivers/net/wireless/realtek/rtlwifi/cam.c +++ b/drivers/net/wireless/realtek/rtlwifi/cam.c @@ -208,7 +208,7 @@ void rtl_cam_empty_entry(struct ieee80211_hw *hw, u8 uc_index) u32 ul_command; u32 ul_content; - u32 ul_encalgo = rtlpriv->cfg->maps[SEC_CAM_AES]; + u32 ul_encalgo; u8 entry_i; switch (rtlpriv->sec.pairwise_enc_algorithm) { diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.c index 04735da11168..da54e51badd3 100644 --- a/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.c +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.c @@ -396,36 +396,6 @@ void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t) } } -static void _rtl92ce_phy_set_rf_sleep(struct ieee80211_hw *hw) -{ - u32 u4b_tmp; - u8 delay = 5; - struct rtl_priv *rtlpriv = rtl_priv(hw); - - rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF); - rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00); - rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); - u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK); - while (u4b_tmp != 0 && delay > 0) { - rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x0); - rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00); - rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40); - u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK); - delay--; - } - if (delay == 0) { - rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x00); - rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); - rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3); - rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); - rtl_dbg(rtlpriv, COMP_POWER, DBG_TRACE, - "Switch RF timeout !!!\n"); - return; - } - rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); - rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x22); -} - static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw, enum rf_pwrstate rfpwr_state) { @@ -519,7 +489,7 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw, jiffies_to_msecs(jiffies - ppsc->last_awake_jiffies)); ppsc->last_sleep_jiffies = jiffies; - _rtl92ce_phy_set_rf_sleep(hw); + _rtl92c_phy_set_rf_sleep(hw); break; } default: diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c b/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c index b53daf1b29f7..876c14d46c2f 100644 --- a/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/sw.c @@ -334,6 +334,7 @@ static const struct usb_device_id rtl8192c_usb_ids[] = { {RTL_USB_DEVICE(0x04f2, 0xaff7, rtl92cu_hal_cfg)}, /*Xavi*/ {RTL_USB_DEVICE(0x04f2, 0xaff9, rtl92cu_hal_cfg)}, /*Xavi*/ {RTL_USB_DEVICE(0x04f2, 0xaffa, rtl92cu_hal_cfg)}, /*Xavi*/ + {RTL_USB_DEVICE(0x0846, 0x9042, rtl92cu_hal_cfg)}, /*On Netwrks N150MA*/ /****** 8188CUS Slim Combo ********/ {RTL_USB_DEVICE(0x04f2, 0xaff8, rtl92cu_hal_cfg)}, /*Xavi*/ diff --git a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c index f6bff0ebd6b0..f3fe16798c59 100644 --- a/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c +++ b/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/dm.c @@ -872,7 +872,7 @@ static void rtl8821ae_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw) else falsealm_cnt->cnt_all = falsealm_cnt->cnt_ofdm_fail; - /*reset OFDM FA coutner*/ + /*reset OFDM FA counter*/ rtl_set_bbreg(hw, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 1); rtl_set_bbreg(hw, ODM_REG_OFDM_FA_RST_11AC, BIT(17), 0); /* reset CCK FA counter*/ @@ -1464,7 +1464,7 @@ void rtl8812ae_dm_txpower_tracking_callback_thermalmeter( const u8 *delta_swing_table_idx_tup_b; const u8 *delta_swing_table_idx_tdown_b; - /*2. Initilization ( 7 steps in total )*/ + /*2. Initialization ( 7 steps in total )*/ rtl8812ae_get_delta_swing_table(hw, &delta_swing_table_idx_tup_a, &delta_swing_table_idx_tdown_a, @@ -2502,7 +2502,7 @@ static void rtl8821ae_dm_check_edca_turbo(struct ieee80211_hw *hw) rtlpriv->dm.dbginfo.num_non_be_pkt = 0; /*=============================== - * list paramter for different platform + * list parameter for different platform *=============================== */ pb_is_cur_rdl_state = &rtlpriv->dm.is_cur_rdlstate; diff --git a/drivers/net/wireless/realtek/rtw88/coex.c b/drivers/net/wireless/realtek/rtw88/coex.c index 2551e228b581..cac053f485c3 100644 --- a/drivers/net/wireless/realtek/rtw88/coex.c +++ b/drivers/net/wireless/realtek/rtw88/coex.c @@ -211,6 +211,10 @@ static void rtw_coex_wl_ccklock_detect(struct rtw_dev *rtwdev) bool is_cck_lock_rate = false; + if (coex_stat->wl_coex_mode != COEX_WLINK_2G1PORT && + coex_stat->wl_coex_mode != COEX_WLINK_2GFREE) + return; + if (coex_dm->bt_status == COEX_BTSTATUS_INQ_PAGE || coex_stat->bt_setup_link) { coex_stat->wl_cck_lock = false; @@ -460,6 +464,29 @@ static void rtw_coex_gnt_workaround(struct rtw_dev *rtwdev, bool force, u8 mode) rtw_coex_set_gnt_fix(rtwdev); } +static void rtw_coex_monitor_bt_ctr(struct rtw_dev *rtwdev) +{ + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + u32 tmp; + + tmp = rtw_read32(rtwdev, REG_BT_ACT_STATISTICS); + coex_stat->hi_pri_tx = FIELD_GET(MASKLWORD, tmp); + coex_stat->hi_pri_rx = FIELD_GET(MASKHWORD, tmp); + + tmp = rtw_read32(rtwdev, REG_BT_ACT_STATISTICS_1); + coex_stat->lo_pri_tx = FIELD_GET(MASKLWORD, tmp); + coex_stat->lo_pri_rx = FIELD_GET(MASKHWORD, tmp); + + rtw_write8(rtwdev, REG_BT_COEX_ENH_INTR_CTRL, + BIT_R_GRANTALL_WLMASK | BIT_STATIS_BT_EN); + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], Hi-Pri Rx/Tx: %d/%d, Lo-Pri Rx/Tx: %d/%d\n", + coex_stat->hi_pri_rx, coex_stat->hi_pri_tx, + coex_stat->lo_pri_rx, coex_stat->lo_pri_tx); +} + static void rtw_coex_monitor_bt_enable(struct rtw_dev *rtwdev) { struct rtw_chip_info *chip = rtwdev->chip; @@ -780,7 +807,9 @@ static void rtw_coex_update_bt_link_info(struct rtw_dev *rtwdev) static void rtw_coex_update_wl_ch_info(struct rtw_dev *rtwdev, u8 type) { struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_efuse *efuse = &rtwdev->efuse; struct rtw_coex_dm *coex_dm = &rtwdev->coex.dm; + struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat; u8 link = 0; u8 center_chan = 0; u8 bw; @@ -791,7 +820,9 @@ static void rtw_coex_update_wl_ch_info(struct rtw_dev *rtwdev, u8 type) if (type != COEX_MEDIA_DISCONNECT) center_chan = rtwdev->hal.current_channel; - if (center_chan == 0) { + if (center_chan == 0 || + (efuse->share_ant && center_chan <= 14 && + coex_stat->wl_coex_mode != COEX_WLINK_2GFREE)) { link = 0; center_chan = 0; bw = 0; @@ -930,6 +961,23 @@ static void rtw_coex_set_gnt_wl(struct rtw_dev *rtwdev, u8 state) rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0300, state); } +static void rtw_coex_mimo_ps(struct rtw_dev *rtwdev, bool force, bool state) +{ + struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat; + + if (!force && state == coex_stat->wl_mimo_ps) + return; + + coex_stat->wl_mimo_ps = state; + + rtw_set_txrx_1ss(rtwdev, state); + + rtw_coex_update_wl_ch_info(rtwdev, (u8)coex_stat->wl_connected); + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], %s(): state = %d\n", __func__, state); +} + static void rtw_btc_wltoggle_table_a(struct rtw_dev *rtwdev, bool force, u8 table_case) { @@ -1106,7 +1154,8 @@ static void rtw_coex_set_tdma(struct rtw_dev *rtwdev, u8 byte1, u8 byte2, ps_type = COEX_PS_WIFI_NATIVE; rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0); - } else if (byte1 & BIT(4) && !(byte1 & BIT(5))) { + } else if ((byte1 & BIT(4) && !(byte1 & BIT(5))) || + coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): Force LPS (byte1 = 0x%x)\n", __func__, byte1); @@ -1802,6 +1851,54 @@ static void rtw_coex_action_bt_inquiry(struct rtw_dev *rtwdev) rtw_coex_tdma(rtwdev, false, tdma_case | slot_type); } +static void rtw_coex_action_bt_game_hid(struct rtw_dev *rtwdev) +{ + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_efuse *efuse = &rtwdev->efuse; + struct rtw_coex_dm *coex_dm = &coex->dm; + struct rtw_chip_info *chip = rtwdev->chip; + u8 table_case, tdma_case; + + rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); + rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); + + if (efuse->share_ant) { + coex_stat->wl_coex_mode = COEX_WLINK_2GFREE; + if (coex_stat->bt_whck_test) + table_case = 2; + else if (coex_stat->wl_linkscan_proc || coex_stat->bt_hid_exist) + table_case = 33; + else if (coex_stat->bt_setup_link || coex_stat->bt_inq_page) + table_case = 0; + else if (coex_stat->bt_a2dp_exist) + table_case = 34; + else + table_case = 33; + + tdma_case = 0; + } else { + if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[1])) + tdma_case = 112; + else + tdma_case = 113; + + table_case = 121; + } + + if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { + if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX) + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_tx[6]); + else + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[5]); + } else { + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + } + + rtw_coex_table(rtwdev, false, table_case); + rtw_coex_tdma(rtwdev, false, tdma_case); +} + static void rtw_coex_action_bt_hfp(struct rtw_dev *rtwdev) { struct rtw_coex *coex = &rtwdev->coex; @@ -1816,13 +1913,8 @@ static void rtw_coex_action_bt_hfp(struct rtw_dev *rtwdev) if (efuse->share_ant) { /* Shared-Ant */ - if (coex_stat->bt_multi_link) { - table_case = 10; - tdma_case = 17; - } else { - table_case = 10; - tdma_case = 5; - } + table_case = 10; + tdma_case = 5; } else { /* Non-Shared-Ant */ if (coex_stat->bt_multi_link) { @@ -2224,8 +2316,10 @@ static void rtw_coex_action_bt_a2dp_pan_hid(struct rtw_dev *rtwdev) static void rtw_coex_action_wl_under5g(struct rtw_dev *rtwdev) { + struct rtw_coex *coex = &rtwdev->coex; struct rtw_efuse *efuse = &rtwdev->efuse; struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex_stat *coex_stat = &coex->stat; u8 table_case, tdma_case; rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); @@ -2235,6 +2329,9 @@ static void rtw_coex_action_wl_under5g(struct rtw_dev *rtwdev) rtw_coex_write_scbd(rtwdev, COEX_SCBD_FIX2M, false); + if (coex_stat->bt_game_hid_exist && coex_stat->wl_linkscan_proc) + coex_stat->wl_coex_mode = COEX_WLINK_2GFREE; + if (efuse->share_ant) { /* Shared-Ant */ table_case = 0; @@ -2278,6 +2375,7 @@ static void rtw_coex_action_wl_native_lps(struct rtw_dev *rtwdev) struct rtw_coex *coex = &rtwdev->coex; struct rtw_efuse *efuse = &rtwdev->efuse; struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex_stat *coex_stat = &coex->stat; u8 table_case, tdma_case; if (coex->under_5g) @@ -2286,7 +2384,6 @@ static void rtw_coex_action_wl_native_lps(struct rtw_dev *rtwdev) rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s()\n", __func__); rtw_coex_set_ant_path(rtwdev, false, COEX_SET_ANT_2G); - rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); if (efuse->share_ant) { /* Shared-Ant */ @@ -2298,6 +2395,16 @@ static void rtw_coex_action_wl_native_lps(struct rtw_dev *rtwdev) tdma_case = 100; } + if (coex_stat->bt_game_hid_exist) { + coex_stat->wl_coex_mode = COEX_WLINK_2GFREE; + if (coex_stat->wl_tput_dir == COEX_WL_TPUT_TX) + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_tx[6]); + else + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[5]); + } else { + rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); + } + rtw_coex_table(rtwdev, false, table_case); rtw_coex_tdma(rtwdev, false, tdma_case); } @@ -2422,6 +2529,7 @@ static void rtw_coex_action_wl_connected(struct rtw_dev *rtwdev) static void rtw_coex_run_coex(struct rtw_dev *rtwdev, u8 reason) { struct rtw_coex *coex = &rtwdev->coex; + struct rtw_chip_info *chip = rtwdev->chip; struct rtw_coex_dm *coex_dm = &coex->dm; struct rtw_coex_stat *coex_stat = &coex->stat; bool rf4ce_en = false; @@ -2494,6 +2602,11 @@ static void rtw_coex_run_coex(struct rtw_dev *rtwdev, u8 reason) goto exit; } + if (coex_stat->bt_game_hid_exist && coex_stat->wl_connected) { + rtw_coex_action_bt_game_hid(rtwdev); + goto exit; + } + if (coex_stat->bt_whck_test) { rtw_coex_action_bt_whql_test(rtwdev); goto exit; @@ -2530,6 +2643,18 @@ static void rtw_coex_run_coex(struct rtw_dev *rtwdev, u8 reason) } exit: + + if (chip->wl_mimo_ps_support) { + if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { + if (coex_dm->reason == COEX_RSN_2GMEDIA) + rtw_coex_mimo_ps(rtwdev, true, true); + else + rtw_coex_mimo_ps(rtwdev, false, true); + } else { + rtw_coex_mimo_ps(rtwdev, false, false); + } + } + rtw_coex_gnt_workaround(rtwdev, false, coex_stat->wl_coex_mode); rtw_coex_limited_wl(rtwdev); } @@ -3139,6 +3264,135 @@ void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) rtw_coex_run_coex(rtwdev, COEX_RSN_BTINFO); } +#define COEX_BT_HIDINFO_MTK 0x46 +static const u8 coex_bt_hidinfo_ps[] = {0x57, 0x69, 0x72}; +static const u8 coex_bt_hidinfo_xb[] = {0x58, 0x62, 0x6f}; + +void rtw_coex_bt_hid_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) +{ + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_coex_hid *hidinfo; + struct rtw_coex_hid_info_a *hida; + struct rtw_coex_hid_handle_list *hl, *bhl; + u8 sub_id = buf[2], gamehid_cnt = 0, handle, i; + bool cur_game_hid_exist, complete; + + if (!chip->wl_mimo_ps_support && + (sub_id == COEX_BT_HIDINFO_LIST || sub_id == COEX_BT_HIDINFO_A)) + return; + + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], HID info notify, sub_id = 0x%x\n", sub_id); + + switch (sub_id) { + case COEX_BT_HIDINFO_LIST: + hl = &coex_stat->hid_handle_list; + bhl = (struct rtw_coex_hid_handle_list *)buf; + if (!memcmp(hl, bhl, sizeof(*hl))) + return; + coex_stat->hid_handle_list = *bhl; + memset(&coex_stat->hid_info, 0, sizeof(coex_stat->hid_info)); + for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { + hidinfo = &coex_stat->hid_info[i]; + if (hl->handle[i] != COEX_BT_HIDINFO_NOTCON && + hl->handle[i] != 0) + hidinfo->hid_handle = hl->handle[i]; + } + break; + case COEX_BT_HIDINFO_A: + hida = (struct rtw_coex_hid_info_a *)buf; + handle = hida->handle; + for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { + hidinfo = &coex_stat->hid_info[i]; + if (hidinfo->hid_handle == handle) { + hidinfo->hid_vendor = hida->vendor; + memcpy(hidinfo->hid_name, hida->name, + sizeof(hidinfo->hid_name)); + hidinfo->hid_info_completed = true; + break; + } + } + break; + } + for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { + hidinfo = &coex_stat->hid_info[i]; + complete = hidinfo->hid_info_completed; + handle = hidinfo->hid_handle; + if (!complete || handle == COEX_BT_HIDINFO_NOTCON || + handle == 0 || handle >= COEX_BT_BLE_HANDLE_THRS) { + hidinfo->is_game_hid = false; + continue; + } + + if (hidinfo->hid_vendor == COEX_BT_HIDINFO_MTK) { + if ((memcmp(hidinfo->hid_name, + coex_bt_hidinfo_ps, + COEX_BT_HIDINFO_NAME)) == 0) + hidinfo->is_game_hid = true; + else if ((memcmp(hidinfo->hid_name, + coex_bt_hidinfo_xb, + COEX_BT_HIDINFO_NAME)) == 0) + hidinfo->is_game_hid = true; + else + hidinfo->is_game_hid = false; + } else { + hidinfo->is_game_hid = false; + } + if (hidinfo->is_game_hid) + gamehid_cnt++; + } + + if (gamehid_cnt > 0) + cur_game_hid_exist = true; + else + cur_game_hid_exist = false; + + if (cur_game_hid_exist != coex_stat->bt_game_hid_exist) { + coex_stat->bt_game_hid_exist = cur_game_hid_exist; + rtw_dbg(rtwdev, RTW_DBG_COEX, + "[BTCoex], HID info changed!bt_game_hid_exist = %d!\n", + coex_stat->bt_game_hid_exist); + rtw_coex_run_coex(rtwdev, COEX_RSN_BTSTATUS); + } +} + +void rtw_coex_query_bt_hid_list(struct rtw_dev *rtwdev) +{ + struct rtw_coex *coex = &rtwdev->coex; + struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_coex_stat *coex_stat = &coex->stat; + struct rtw_coex_hid *hidinfo; + u8 i, handle; + bool complete; + + if (!chip->wl_mimo_ps_support || coex_stat->wl_under_ips || + (coex_stat->wl_under_lps && !coex_stat->wl_force_lps_ctrl)) + return; + + if (!coex_stat->bt_hid_exist && + !((coex_stat->bt_info_lb2 & COEX_INFO_CONNECTION) && + (coex_stat->hi_pri_tx + coex_stat->hi_pri_rx > + COEX_BT_GAMEHID_CNT))) + return; + + rtw_fw_coex_query_hid_info(rtwdev, COEX_BT_HIDINFO_LIST, 0); + + for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { + hidinfo = &coex_stat->hid_info[i]; + complete = hidinfo->hid_info_completed; + handle = hidinfo->hid_handle; + if (handle == 0 || handle == COEX_BT_HIDINFO_NOTCON || + handle >= COEX_BT_BLE_HANDLE_THRS || complete) + continue; + + rtw_fw_coex_query_hid_info(rtwdev, + COEX_BT_HIDINFO_A, + handle); + } +} + void rtw_coex_wl_fwdbginfo_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length) { struct rtw_coex *coex = &rtwdev->coex; @@ -3175,6 +3429,17 @@ void rtw_coex_wl_status_change_notify(struct rtw_dev *rtwdev, u32 type) rtw_coex_run_coex(rtwdev, COEX_RSN_WLSTATUS); } +void rtw_coex_wl_status_check(struct rtw_dev *rtwdev) +{ + struct rtw_coex_stat *coex_stat = &rtwdev->coex.stat; + + if ((coex_stat->wl_under_lps && !coex_stat->wl_force_lps_ctrl) || + coex_stat->wl_under_ips) + return; + + rtw_coex_monitor_bt_ctr(rtwdev); +} + void rtw_coex_bt_relink_work(struct work_struct *work) { struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, @@ -3637,6 +3902,7 @@ static const char *rtw_coex_get_wl_coex_mode(u8 coex_wl_link_mode) switch (coex_wl_link_mode) { case_WLINK(2G1PORT); case_WLINK(5G); + case_WLINK(2GFREE); default: return "Unknown"; } @@ -3658,7 +3924,6 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) u16 score_board_WB, score_board_BW; u32 wl_reg_6c0, wl_reg_6c4, wl_reg_6c8, wl_reg_778, wl_reg_6cc; u32 lte_coex, bt_coex; - u32 bt_hi_pri, bt_lo_pri; int i; score_board_BW = rtw_coex_read_scbd(rtwdev); @@ -3669,17 +3934,6 @@ void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m) wl_reg_6cc = rtw_read32(rtwdev, REG_BT_COEX_TABLE_H); wl_reg_778 = rtw_read8(rtwdev, REG_BT_STAT_CTRL); - bt_hi_pri = rtw_read32(rtwdev, REG_BT_ACT_STATISTICS); - bt_lo_pri = rtw_read32(rtwdev, REG_BT_ACT_STATISTICS_1); - rtw_write8(rtwdev, REG_BT_COEX_ENH_INTR_CTRL, - BIT_R_GRANTALL_WLMASK | BIT_STATIS_BT_EN); - - coex_stat->hi_pri_tx = FIELD_GET(MASKLWORD, bt_hi_pri); - coex_stat->hi_pri_rx = FIELD_GET(MASKHWORD, bt_hi_pri); - - coex_stat->lo_pri_tx = FIELD_GET(MASKLWORD, bt_lo_pri); - coex_stat->lo_pri_rx = FIELD_GET(MASKHWORD, bt_lo_pri); - sys_lte = rtw_read8(rtwdev, 0x73); lte_coex = rtw_coex_read_indirect_reg(rtwdev, 0x38); bt_coex = rtw_coex_read_indirect_reg(rtwdev, 0x54); diff --git a/drivers/net/wireless/realtek/rtw88/coex.h b/drivers/net/wireless/realtek/rtw88/coex.h index fc61a0cab3e4..07fa7aa34d4b 100644 --- a/drivers/net/wireless/realtek/rtw88/coex.h +++ b/drivers/net/wireless/realtek/rtw88/coex.h @@ -11,6 +11,7 @@ #define COEX_MIN_DELAY 10 /* delay unit in ms */ #define COEX_RFK_TIMEOUT 600 /* RFK timeout in ms */ +#define COEX_BT_GAMEHID_CNT 800 #define COEX_RF_OFF 0x0 #define COEX_RF_ON 0x1 @@ -172,6 +173,7 @@ enum coex_bt_profile { enum coex_wl_link_mode { COEX_WLINK_2G1PORT = 0x0, COEX_WLINK_5G = 0x3, + COEX_WLINK_2GFREE = 0x7, COEX_WLINK_MAX }; @@ -401,9 +403,12 @@ void rtw_coex_scan_notify(struct rtw_dev *rtwdev, u8 type); void rtw_coex_connect_notify(struct rtw_dev *rtwdev, u8 type); void rtw_coex_media_status_notify(struct rtw_dev *rtwdev, u8 type); void rtw_coex_bt_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length); +void rtw_coex_bt_hid_info_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length); void rtw_coex_wl_fwdbginfo_notify(struct rtw_dev *rtwdev, u8 *buf, u8 length); void rtw_coex_switchband_notify(struct rtw_dev *rtwdev, u8 type); void rtw_coex_wl_status_change_notify(struct rtw_dev *rtwdev, u32 type); +void rtw_coex_wl_status_check(struct rtw_dev *rtwdev); +void rtw_coex_query_bt_hid_list(struct rtw_dev *rtwdev); void rtw_coex_display_coex_info(struct rtw_dev *rtwdev, struct seq_file *m); static inline bool rtw_coex_disabled(struct rtw_dev *rtwdev) diff --git a/drivers/net/wireless/realtek/rtw88/debug.c b/drivers/net/wireless/realtek/rtw88/debug.c index e429428232c1..1a52ff585fbc 100644 --- a/drivers/net/wireless/realtek/rtw88/debug.c +++ b/drivers/net/wireless/realtek/rtw88/debug.c @@ -390,7 +390,7 @@ static ssize_t rtw_debugfs_set_h2c(struct file *filp, ¶m[0], ¶m[1], ¶m[2], ¶m[3], ¶m[4], ¶m[5], ¶m[6], ¶m[7]); if (num != 8) { - rtw_info(rtwdev, "invalid H2C command format for debug\n"); + rtw_warn(rtwdev, "invalid H2C command format for debug\n"); return -EINVAL; } @@ -715,8 +715,10 @@ static int rtw_debugfs_get_phy_info(struct seq_file *m, void *v) seq_printf(m, "Current CH(fc) = %u\n", rtwdev->hal.current_channel); seq_printf(m, "Current BW = %u\n", rtwdev->hal.current_band_width); seq_printf(m, "Current IGI = 0x%x\n", dm_info->igi_history[0]); - seq_printf(m, "TP {Tx, Rx} = {%u, %u}Mbps\n\n", + seq_printf(m, "TP {Tx, Rx} = {%u, %u}Mbps\n", stats->tx_throughput, stats->rx_throughput); + seq_printf(m, "1SS for TX and RX = %c\n\n", rtwdev->hal.txrx_1ss ? + 'Y' : 'N'); seq_puts(m, "==========[Tx Phy Info]========\n"); seq_puts(m, "[Tx Rate] = "); diff --git a/drivers/net/wireless/realtek/rtw88/debug.h b/drivers/net/wireless/realtek/rtw88/debug.h index 61f8369fe2d6..066792dd96af 100644 --- a/drivers/net/wireless/realtek/rtw88/debug.h +++ b/drivers/net/wireless/realtek/rtw88/debug.h @@ -23,6 +23,7 @@ enum rtw_debug_mask { RTW_DBG_PATH_DIV = 0x00004000, RTW_DBG_ADAPTIVITY = 0x00008000, RTW_DBG_HW_SCAN = 0x00010000, + RTW_DBG_STATE = 0x00020000, RTW_DBG_ALL = 0xffffffff }; diff --git a/drivers/net/wireless/realtek/rtw88/fw.c b/drivers/net/wireless/realtek/rtw88/fw.c index 2f7c036f9022..aa2aeb5fb2cc 100644 --- a/drivers/net/wireless/realtek/rtw88/fw.c +++ b/drivers/net/wireless/realtek/rtw88/fw.c @@ -233,6 +233,9 @@ void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb) case C2H_BT_INFO: rtw_coex_bt_info_notify(rtwdev, c2h->payload, len); break; + case C2H_BT_HID_INFO: + rtw_coex_bt_hid_info_notify(rtwdev, c2h->payload, len); + break; case C2H_WLAN_INFO: rtw_coex_wl_fwdbginfo_notify(rtwdev, c2h->payload, len); break; @@ -538,6 +541,18 @@ void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev, rtw_fw_send_h2c_command(rtwdev, h2c_pkt); } +void rtw_fw_coex_query_hid_info(struct rtw_dev *rtwdev, u8 sub_id, u8 data) +{ + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + + SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_QUERY_BT_HID_INFO); + + SET_COEX_QUERY_HID_INFO_SUBID(h2c_pkt, sub_id); + SET_COEX_QUERY_HID_INFO_DATA1(h2c_pkt, data); + + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); +} + void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data) { u8 h2c_pkt[H2C_PKT_SIZE] = {0}; @@ -1784,9 +1799,9 @@ void rtw_fw_scan_notify(struct rtw_dev *rtwdev, bool start) rtw_fw_send_h2c_command(rtwdev, h2c_pkt); } -static void rtw_append_probe_req_ie(struct rtw_dev *rtwdev, struct sk_buff *skb, - struct sk_buff_head *list, - struct rtw_vif *rtwvif) +static int rtw_append_probe_req_ie(struct rtw_dev *rtwdev, struct sk_buff *skb, + struct sk_buff_head *list, u8 *bands, + struct rtw_vif *rtwvif) { struct ieee80211_scan_ies *ies = rtwvif->scan_ies; struct rtw_chip_info *chip = rtwdev->chip; @@ -1797,19 +1812,24 @@ static void rtw_append_probe_req_ie(struct rtw_dev *rtwdev, struct sk_buff *skb, if (!(BIT(idx) & chip->band)) continue; new = skb_copy(skb, GFP_KERNEL); + if (!new) + return -ENOMEM; skb_put_data(new, ies->ies[idx], ies->len[idx]); skb_put_data(new, ies->common_ies, ies->common_ie_len); skb_queue_tail(list, new); + (*bands)++; } + + return 0; } -static int _rtw_hw_scan_update_probe_req(struct rtw_dev *rtwdev, u8 num_ssids, +static int _rtw_hw_scan_update_probe_req(struct rtw_dev *rtwdev, u8 num_probes, struct sk_buff_head *probe_req_list) { struct rtw_chip_info *chip = rtwdev->chip; struct sk_buff *skb, *tmp; u8 page_offset = 1, *buf, page_size = chip->page_size; - u8 pages = page_offset + num_ssids * RTW_PROBE_PG_CNT; + u8 pages = page_offset + num_probes * RTW_PROBE_PG_CNT; u16 pg_addr = rtwdev->fifo.rsvd_h2c_info_addr, loc; u16 buf_offset = page_size * page_offset; u8 tx_desc_sz = chip->tx_pkt_desc_sz; @@ -1848,6 +1868,8 @@ static int _rtw_hw_scan_update_probe_req(struct rtw_dev *rtwdev, u8 num_ssids, rtwdev->scan_info.probe_pg_size = page_offset; out: kfree(buf); + skb_queue_walk_safe(probe_req_list, skb, tmp) + kfree_skb(skb); return ret; } @@ -1857,8 +1879,9 @@ static int rtw_hw_scan_update_probe_req(struct rtw_dev *rtwdev, { struct cfg80211_scan_request *req = rtwvif->scan_req; struct sk_buff_head list; - struct sk_buff *skb; - u8 num = req->n_ssids, i; + struct sk_buff *skb, *tmp; + u8 num = req->n_ssids, i, bands = 0; + int ret; skb_queue_head_init(&list); for (i = 0; i < num; i++) { @@ -1866,11 +1889,25 @@ static int rtw_hw_scan_update_probe_req(struct rtw_dev *rtwdev, req->ssids[i].ssid, req->ssids[i].ssid_len, req->ie_len); - rtw_append_probe_req_ie(rtwdev, skb, &list, rtwvif); + if (!skb) { + ret = -ENOMEM; + goto out; + } + ret = rtw_append_probe_req_ie(rtwdev, skb, &list, &bands, + rtwvif); + if (ret) + goto out; + kfree_skb(skb); } - return _rtw_hw_scan_update_probe_req(rtwdev, num, &list); + return _rtw_hw_scan_update_probe_req(rtwdev, num * bands, &list); + +out: + skb_queue_walk_safe(&list, skb, tmp) + kfree_skb(skb); + + return ret; } static int rtw_add_chan_info(struct rtw_dev *rtwdev, struct rtw_chan_info *info, @@ -2022,7 +2059,7 @@ void rtw_hw_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, rtwdev->hal.rcr |= BIT_CBSSID_BCN; rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr); - rtw_core_scan_complete(rtwdev, vif); + rtw_core_scan_complete(rtwdev, vif, true); ieee80211_wake_queues(rtwdev->hw); ieee80211_scan_completed(rtwdev->hw, &info); @@ -2109,7 +2146,7 @@ void rtw_hw_scan_status_report(struct rtw_dev *rtwdev, struct sk_buff *skb) rtw_hw_scan_complete(rtwdev, vif, aborted); if (aborted) - rtw_info(rtwdev, "HW scan aborted with code: %d\n", rc); + rtw_dbg(rtwdev, RTW_DBG_HW_SCAN, "HW scan aborted with code: %d\n", rc); } void rtw_store_op_chan(struct rtw_dev *rtwdev) diff --git a/drivers/net/wireless/realtek/rtw88/fw.h b/drivers/net/wireless/realtek/rtw88/fw.h index 654c3c2e5721..b59d2cbad5d7 100644 --- a/drivers/net/wireless/realtek/rtw88/fw.h +++ b/drivers/net/wireless/realtek/rtw88/fw.h @@ -47,6 +47,7 @@ enum rtw_c2h_cmd_id { C2H_CCX_TX_RPT = 0x03, C2H_BT_INFO = 0x09, C2H_BT_MP_INFO = 0x0b, + C2H_BT_HID_INFO = 0x45, C2H_RA_RPT = 0x0c, C2H_HW_FEATURE_REPORT = 0x19, C2H_WLAN_INFO = 0x27, @@ -529,6 +530,7 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) #define H2C_CMD_QUERY_BT_MP_INFO 0x67 #define H2C_CMD_BT_WIFI_CONTROL 0x69 #define H2C_CMD_WIFI_CALIBRATION 0x6d +#define H2C_CMD_QUERY_BT_HID_INFO 0x73 #define H2C_CMD_KEEP_ALIVE 0x03 #define H2C_CMD_DISCONNECT_DECISION 0x04 @@ -681,6 +683,11 @@ static inline void rtw_h2c_pkt_set_header(u8 *h2c_pkt, u8 sub_id) #define SET_BT_WIFI_CONTROL_DATA5(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x01, value, GENMASK(23, 16)) +#define SET_COEX_QUERY_HID_INFO_SUBID(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(15, 8)) +#define SET_COEX_QUERY_HID_INFO_DATA1(h2c_pkt, value) \ + le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) + #define SET_KEEP_ALIVE_ENABLE(h2c_pkt, value) \ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) #define SET_KEEP_ALIVE_ADOPT(h2c_pkt, value) \ @@ -780,6 +787,8 @@ void rtw_fw_force_bt_tx_power(struct rtw_dev *rtwdev, u8 bt_pwr_dec_lvl); void rtw_fw_bt_ignore_wlan_action(struct rtw_dev *rtwdev, bool enable); void rtw_fw_coex_tdma_type(struct rtw_dev *rtwdev, u8 para1, u8 para2, u8 para3, u8 para4, u8 para5); +void rtw_fw_coex_query_hid_info(struct rtw_dev *rtwdev, u8 sub_id, u8 data); + void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data); void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); diff --git a/drivers/net/wireless/realtek/rtw88/mac80211.c b/drivers/net/wireless/realtek/rtw88/mac80211.c index ae7d97de5fdf..5cdc54c9a9aa 100644 --- a/drivers/net/wireless/realtek/rtw88/mac80211.c +++ b/drivers/net/wireless/realtek/rtw88/mac80211.c @@ -72,6 +72,9 @@ static int rtw_ops_config(struct ieee80211_hw *hw, u32 changed) struct rtw_dev *rtwdev = hw->priv; int ret = 0; + /* let previous ips work finish to ensure we don't leave ips twice */ + cancel_work_sync(&rtwdev->ips_work); + mutex_lock(&rtwdev->mutex); rtw_leave_lps_deep(rtwdev); @@ -205,7 +208,7 @@ static int rtw_ops_add_interface(struct ieee80211_hw *hw, mutex_unlock(&rtwdev->mutex); - rtw_info(rtwdev, "start vif %pM on port %d\n", vif->addr, rtwvif->port); + rtw_dbg(rtwdev, RTW_DBG_STATE, "start vif %pM on port %d\n", vif->addr, rtwvif->port); return 0; } @@ -216,7 +219,7 @@ static void rtw_ops_remove_interface(struct ieee80211_hw *hw, struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; u32 config = 0; - rtw_info(rtwdev, "stop vif %pM on port %d\n", vif->addr, rtwvif->port); + rtw_dbg(rtwdev, RTW_DBG_STATE, "stop vif %pM on port %d\n", vif->addr, rtwvif->port); mutex_lock(&rtwdev->mutex); @@ -242,8 +245,8 @@ static int rtw_ops_change_interface(struct ieee80211_hw *hw, { struct rtw_dev *rtwdev = hw->priv; - rtw_info(rtwdev, "change vif %pM (%d)->(%d), p2p (%d)->(%d)\n", - vif->addr, vif->type, type, vif->p2p, p2p); + rtw_dbg(rtwdev, RTW_DBG_STATE, "change vif %pM (%d)->(%d), p2p (%d)->(%d)\n", + vif->addr, vif->type, type, vif->p2p, p2p); rtw_ops_remove_interface(hw, vif); @@ -614,7 +617,7 @@ static void rtw_ops_sw_scan_complete(struct ieee80211_hw *hw, struct rtw_dev *rtwdev = hw->priv; mutex_lock(&rtwdev->mutex); - rtw_core_scan_complete(rtwdev, vif); + rtw_core_scan_complete(rtwdev, vif, false); mutex_unlock(&rtwdev->mutex); } diff --git a/drivers/net/wireless/realtek/rtw88/main.c b/drivers/net/wireless/realtek/rtw88/main.c index 38252113c4a8..8b9899e41b0b 100644 --- a/drivers/net/wireless/realtek/rtw88/main.c +++ b/drivers/net/wireless/realtek/rtw88/main.c @@ -207,6 +207,9 @@ static void rtw_watch_dog_work(struct work_struct *work) else clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags); + rtw_coex_wl_status_check(rtwdev); + rtw_coex_query_bt_hid_list(rtwdev); + if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags)) rtw_coex_wl_status_change_notify(rtwdev, 0); @@ -272,6 +275,15 @@ static void rtw_c2h_work(struct work_struct *work) } } +static void rtw_ips_work(struct work_struct *work) +{ + struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ips_work); + + mutex_lock(&rtwdev->mutex); + rtw_enter_ips(rtwdev); + mutex_unlock(&rtwdev->mutex); +} + static u8 rtw_acquire_macid(struct rtw_dev *rtwdev) { unsigned long mac_id; @@ -305,8 +317,8 @@ int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, rtwdev->sta_cnt++; rtwdev->beacon_loss = false; - rtw_info(rtwdev, "sta %pM joined with macid %d\n", - sta->addr, si->mac_id); + rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM joined with macid %d\n", + sta->addr, si->mac_id); return 0; } @@ -327,8 +339,8 @@ void rtw_sta_remove(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, kfree(si->mask); rtwdev->sta_cnt--; - rtw_info(rtwdev, "sta %pM with macid %d left\n", - sta->addr, si->mac_id); + rtw_dbg(rtwdev, RTW_DBG_STATE, "sta %pM with macid %d left\n", + sta->addr, si->mac_id); } struct rtw_fwcd_hdr { @@ -1011,37 +1023,52 @@ static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num) #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \ RA_MASK_VHT_RATES_2SS | \ RA_MASK_VHT_RATES_3SS) +#define RA_MASK_CCK_IN_BG 0x00005 #define RA_MASK_CCK_IN_HT 0x00005 #define RA_MASK_CCK_IN_VHT 0x00005 #define RA_MASK_OFDM_IN_VHT 0x00010 #define RA_MASK_OFDM_IN_HT_2G 0x00010 #define RA_MASK_OFDM_IN_HT_5G 0x00030 -static u64 rtw_update_rate_mask(struct rtw_dev *rtwdev, - struct rtw_sta_info *si, - u64 ra_mask, bool is_vht_enable, - u8 wireless_set) +static u64 rtw_rate_mask_rssi(struct rtw_sta_info *si, u8 wireless_set) +{ + u8 rssi_level = si->rssi_level; + + if (wireless_set == WIRELESS_CCK) + return 0xffffffffffffffffULL; + + if (rssi_level == 0) + return 0xffffffffffffffffULL; + else if (rssi_level == 1) + return 0xfffffffffffffff0ULL; + else if (rssi_level == 2) + return 0xffffffffffffefe0ULL; + else if (rssi_level == 3) + return 0xffffffffffffcfc0ULL; + else if (rssi_level == 4) + return 0xffffffffffff8f80ULL; + else + return 0xffffffffffff0f00ULL; +} + +static u64 rtw_rate_mask_recover(u64 ra_mask, u64 ra_mask_bak) +{ + if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0) + ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); + + if (ra_mask == 0) + ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); + + return ra_mask; +} + +static u64 rtw_rate_mask_cfg(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + u64 ra_mask, bool is_vht_enable) { struct rtw_hal *hal = &rtwdev->hal; const struct cfg80211_bitrate_mask *mask = si->mask; u64 cfg_mask = GENMASK_ULL(63, 0); - u8 rssi_level, band; - - if (wireless_set != WIRELESS_CCK) { - rssi_level = si->rssi_level; - if (rssi_level == 0) - ra_mask &= 0xffffffffffffffffULL; - else if (rssi_level == 1) - ra_mask &= 0xfffffffffffffff0ULL; - else if (rssi_level == 2) - ra_mask &= 0xffffffffffffefe0ULL; - else if (rssi_level == 3) - ra_mask &= 0xffffffffffffcfc0ULL; - else if (rssi_level == 4) - ra_mask &= 0xffffffffffff8f80ULL; - else if (rssi_level >= 5) - ra_mask &= 0xffffffffffff0f00ULL; - } + u8 band; if (!si->use_cfg_mask) return ra_mask; @@ -1091,6 +1118,7 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) u8 ldpc_en = 0; u8 tx_num = 1; u64 ra_mask = 0; + u64 ra_mask_bak = 0; bool is_vht_enable = false; bool is_support_sgi = false; @@ -1110,11 +1138,12 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) ldpc_en = HT_LDPC_EN; } - if (efuse->hw_cap.nss == 1) + if (efuse->hw_cap.nss == 1 || rtwdev->hal.txrx_1ss) ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS; if (hal->current_band_type == RTW_BAND_5G) { ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4; + ra_mask_bak = ra_mask; if (sta->vht_cap.vht_supported) { ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT; wireless_set = WIRELESS_OFDM | WIRELESS_VHT; @@ -1127,6 +1156,7 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) dm_info->rrsr_val_init = RRSR_INIT_5G; } else if (hal->current_band_type == RTW_BAND_2G) { ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ]; + ra_mask_bak = ra_mask; if (sta->vht_cap.vht_supported) { ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT | RA_MASK_OFDM_IN_VHT; @@ -1140,11 +1170,13 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) } else if (sta->supp_rates[0] <= 0xf) { wireless_set = WIRELESS_CCK; } else { + ra_mask &= RA_MASK_OFDM_RATES | RA_MASK_CCK_IN_BG; wireless_set = WIRELESS_CCK | WIRELESS_OFDM; } dm_info->rrsr_val_init = RRSR_INIT_2G; } else { rtw_err(rtwdev, "Unknown band type\n"); + ra_mask_bak = ra_mask; wireless_set = 0; } @@ -1176,8 +1208,9 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) rate_id = get_rate_id(wireless_set, bw_mode, tx_num); - ra_mask = rtw_update_rate_mask(rtwdev, si, ra_mask, is_vht_enable, - wireless_set); + ra_mask &= rtw_rate_mask_rssi(si, wireless_set); + ra_mask = rtw_rate_mask_recover(ra_mask, ra_mask_bak); + ra_mask = rtw_rate_mask_cfg(rtwdev, si, ra_mask, is_vht_enable); si->bw_mode = bw_mode; si->stbc_en = stbc_en; @@ -1339,7 +1372,8 @@ void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, set_bit(RTW_FLAG_SCANNING, rtwdev->flags); } -void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) +void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + bool hw_scan) { struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; u32 config = 0; @@ -1354,6 +1388,9 @@ void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) rtw_vif_port_config(rtwdev, rtwvif, config); rtw_coex_scan_notify(rtwdev, COEX_SCAN_FINISH); + + if (rtwvif->net_type == RTW_NET_NO_LINK && hw_scan) + ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work); } int rtw_core_start(struct rtw_dev *rtwdev) @@ -1536,6 +1573,37 @@ static void rtw_unset_supported_band(struct ieee80211_hw *hw, kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); } +static void rtw_vif_smps_iter(void *data, u8 *mac, + struct ieee80211_vif *vif) +{ + struct rtw_dev *rtwdev = (struct rtw_dev *)data; + + if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc) + return; + + if (rtwdev->hal.txrx_1ss) + ieee80211_request_smps(vif, IEEE80211_SMPS_STATIC); + else + ieee80211_request_smps(vif, IEEE80211_SMPS_OFF); +} + +void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool txrx_1ss) +{ + struct rtw_chip_info *chip = rtwdev->chip; + struct rtw_hal *hal = &rtwdev->hal; + + if (!chip->ops->config_txrx_mode || rtwdev->hal.txrx_1ss == txrx_1ss) + return; + + rtwdev->hal.txrx_1ss = txrx_1ss; + if (txrx_1ss) + chip->ops->config_txrx_mode(rtwdev, BB_PATH_A, BB_PATH_A, false); + else + chip->ops->config_txrx_mode(rtwdev, hal->antenna_tx, + hal->antenna_rx, false); + rtw_iterate_vifs_atomic(rtwdev, rtw_vif_smps_iter, rtwdev); +} + static void __update_firmware_feature(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) { @@ -1919,6 +1987,7 @@ int rtw_core_init(struct rtw_dev *rtwdev) INIT_DELAYED_WORK(&coex->wl_ccklock_work, rtw_coex_wl_ccklock_work); INIT_WORK(&rtwdev->tx_work, rtw_tx_work); INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work); + INIT_WORK(&rtwdev->ips_work, rtw_ips_work); INIT_WORK(&rtwdev->fw_recovery_work, rtw_fw_recovery_work); INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work); skb_queue_head_init(&rtwdev->c2h_queue); diff --git a/drivers/net/wireless/realtek/rtw88/main.h b/drivers/net/wireless/realtek/rtw88/main.h index dc1cd9bd4b8a..17815af9dd4e 100644 --- a/drivers/net/wireless/realtek/rtw88/main.h +++ b/drivers/net/wireless/realtek/rtw88/main.h @@ -874,6 +874,8 @@ struct rtw_chip_ops { enum rtw_bb_path tx_path_1ss, enum rtw_bb_path tx_path_cck, bool is_tx2_path); + void (*config_txrx_mode)(struct rtw_dev *rtwdev, u8 tx_path, + u8 rx_path, bool is_tx2_path); /* for coex */ void (*coex_set_init)(struct rtw_dev *rtwdev); @@ -1240,6 +1242,7 @@ struct rtw_chip_info { bool scbd_support; bool new_scbd10_def; /* true: fix 2M(8822c) */ bool ble_hid_profile_support; + bool wl_mimo_ps_support; u8 pstdma_type; /* 0: LPSoff, 1:LPSon */ u8 bt_rssi_type; u8 ant_isolation; @@ -1352,6 +1355,42 @@ struct rtw_coex_dm { #define COEX_BTINFO_LENGTH_MAX 10 #define COEX_BTINFO_LENGTH 7 +#define COEX_BT_HIDINFO_LIST 0x0 +#define COEX_BT_HIDINFO_A 0x1 +#define COEX_BT_HIDINFO_NAME 3 + +#define COEX_BT_HIDINFO_LENGTH 6 +#define COEX_BT_HIDINFO_HANDLE_NUM 4 +#define COEX_BT_HIDINFO_C2H_HANDLE 0 +#define COEX_BT_HIDINFO_C2H_VENDOR 1 +#define COEX_BT_BLE_HANDLE_THRS 0x10 +#define COEX_BT_HIDINFO_NOTCON 0xff + +struct rtw_coex_hid { + u8 hid_handle; + u8 hid_vendor; + u8 hid_name[COEX_BT_HIDINFO_NAME]; + bool hid_info_completed; + bool is_game_hid; +}; + +struct rtw_coex_hid_handle_list { + u8 cmd_id; + u8 len; + u8 subid; + u8 handle_cnt; + u8 handle[COEX_BT_HIDINFO_HANDLE_NUM]; +} __packed; + +struct rtw_coex_hid_info_a { + u8 cmd_id; + u8 len; + u8 subid; + u8 handle; + u8 vendor; + u8 name[COEX_BT_HIDINFO_NAME]; +} __packed; + struct rtw_coex_stat { bool bt_disabled; bool bt_disabled_pre; @@ -1382,6 +1421,8 @@ struct rtw_coex_stat { bool bt_slave; bool bt_418_hid_exist; bool bt_ble_hid_exist; + bool bt_game_hid_exist; + bool bt_hid_handle_cnt; bool bt_mailbox_reply; bool wl_under_lps; @@ -1402,6 +1443,7 @@ struct rtw_coex_stat { bool wl_connecting; bool wl_slot_toggle; bool wl_slot_toggle_change; /* if toggle to no-toggle */ + bool wl_mimo_ps; u32 bt_supported_version; u32 bt_supported_feature; @@ -1459,6 +1501,9 @@ struct rtw_coex_stat { u32 darfrc; u32 darfrch; + + struct rtw_coex_hid hid_info[COEX_BT_HIDINFO_HANDLE_NUM]; + struct rtw_coex_hid_handle_list hid_handle_list; }; struct rtw_coex { @@ -1867,6 +1912,7 @@ struct rtw_hal { u32 antenna_tx; u32 antenna_rx; u8 bfee_sts_cap; + bool txrx_1ss; /* protect tx power section */ struct mutex tx_power_mutex; @@ -1960,6 +2006,7 @@ struct rtw_dev { /* c2h cmd queue & handler work */ struct sk_buff_head c2h_queue; struct work_struct c2h_work; + struct work_struct ips_work; struct work_struct fw_recovery_work; /* used to protect txqs list */ @@ -2101,7 +2148,8 @@ void rtw_tx_report_purge_timer(struct timer_list *t); void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); void rtw_core_scan_start(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif, const u8 *mac_addr, bool hw_scan); -void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif); +void rtw_core_scan_complete(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + bool hw_scan); int rtw_core_start(struct rtw_dev *rtwdev); void rtw_core_stop(struct rtw_dev *rtwdev); int rtw_chip_info_setup(struct rtw_dev *rtwdev); @@ -2121,5 +2169,5 @@ void rtw_core_fw_scan_notify(struct rtw_dev *rtwdev, bool start); int rtw_dump_fw(struct rtw_dev *rtwdev, const u32 ocp_src, u32 size, u32 fwcd_item); int rtw_dump_reg(struct rtw_dev *rtwdev, const u32 addr, const u32 size); - +void rtw_set_txrx_1ss(struct rtw_dev *rtwdev, bool config_1ss); #endif diff --git a/drivers/net/wireless/realtek/rtw88/rtw8723d.c b/drivers/net/wireless/realtek/rtw88/rtw8723d.c index 3fdbaf7302c5..ad2b323a0423 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8723d.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.c @@ -2753,6 +2753,7 @@ struct rtw_chip_info rtw8723d_hw_spec = { .scbd_support = true, .new_scbd10_def = true, .ble_hid_profile_support = false, + .wl_mimo_ps_support = false, .pstdma_type = COEX_PSTDMA_FORCE_LPSOFF, .bt_rssi_type = COEX_BTRSSI_RATIO, .ant_isolation = 15, diff --git a/drivers/net/wireless/realtek/rtw88/rtw8821c.c b/drivers/net/wireless/realtek/rtw88/rtw8821c.c index db078df63f85..99eee128ae94 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c @@ -499,7 +499,7 @@ static s8 get_cck_rx_pwr(struct rtw_dev *rtwdev, u8 lna_idx, u8 vga_idx) } if (lna_idx >= lna_gain_table_size) { - rtw_info(rtwdev, "incorrect lna index (%d)\n", lna_idx); + rtw_warn(rtwdev, "incorrect lna index (%d)\n", lna_idx); return -120; } @@ -1514,6 +1514,7 @@ static const struct rtw_rfe_def rtw8821c_rfe_defs[] = { [0] = RTW_DEF_RFE(8821c, 0, 0), [2] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), [4] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), + [6] = RTW_DEF_RFE(8821c, 0, 0), }; static struct rtw_hw_reg rtw8821c_dig[] = { @@ -1924,6 +1925,7 @@ struct rtw_chip_info rtw8821c_hw_spec = { .scbd_support = true, .new_scbd10_def = false, .ble_hid_profile_support = false, + .wl_mimo_ps_support = false, .pstdma_type = COEX_PSTDMA_FORCE_LPSOFF, .bt_rssi_type = COEX_BTRSSI_RATIO, .ant_isolation = 15, diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822b.c b/drivers/net/wireless/realtek/rtw88/rtw8822b.c index dd4fbb82750d..eee7bf035403 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822b.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.c @@ -1012,12 +1012,12 @@ static int rtw8822b_set_antenna(struct rtw_dev *rtwdev, antenna_tx, antenna_rx); if (!rtw8822b_check_rf_path(antenna_tx)) { - rtw_info(rtwdev, "unsupported tx path 0x%x\n", antenna_tx); + rtw_warn(rtwdev, "unsupported tx path 0x%x\n", antenna_tx); return -EINVAL; } if (!rtw8822b_check_rf_path(antenna_rx)) { - rtw_info(rtwdev, "unsupported rx path 0x%x\n", antenna_rx); + rtw_warn(rtwdev, "unsupported rx path 0x%x\n", antenna_rx); return -EINVAL; } @@ -2554,6 +2554,7 @@ struct rtw_chip_info rtw8822b_hw_spec = { .scbd_support = true, .new_scbd10_def = false, .ble_hid_profile_support = false, + .wl_mimo_ps_support = false, .pstdma_type = COEX_PSTDMA_FORCE_LPSOFF, .bt_rssi_type = COEX_BTRSSI_RATIO, .ant_isolation = 15, diff --git a/drivers/net/wireless/realtek/rtw88/rtw8822c.c b/drivers/net/wireless/realtek/rtw88/rtw8822c.c index 35c46e5209de..cd74607a61a2 100644 --- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c +++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c @@ -2798,7 +2798,7 @@ static int rtw8822c_set_antenna(struct rtw_dev *rtwdev, case BB_PATH_AB: break; default: - rtw_info(rtwdev, "unsupported tx path 0x%x\n", antenna_tx); + rtw_warn(rtwdev, "unsupported tx path 0x%x\n", antenna_tx); return -EINVAL; } @@ -2808,7 +2808,7 @@ static int rtw8822c_set_antenna(struct rtw_dev *rtwdev, case BB_PATH_AB: break; default: - rtw_info(rtwdev, "unsupported rx path 0x%x\n", antenna_rx); + rtw_warn(rtwdev, "unsupported rx path 0x%x\n", antenna_rx); return -EINVAL; } @@ -2996,19 +2996,34 @@ static void rtw8822c_coex_cfg_gnt_fix(struct rtw_dev *rtwdev) * enable "DAC off if GNT_WL = 0" for non-shared-antenna * disable 0x1c30[22] = 0, * enable: 0x1c30[22] = 1, 0x1c38[12] = 0, 0x1c38[28] = 1 - * - * disable WL-S1 BB chage RF mode if GNT_BT + */ + if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { + rtw_write8_mask(rtwdev, REG_ANAPAR + 2, + BIT_ANAPAR_BTPS >> 16, 0); + } else { + rtw_write8_mask(rtwdev, REG_ANAPAR + 2, + BIT_ANAPAR_BTPS >> 16, 1); + rtw_write8_mask(rtwdev, REG_RSTB_SEL + 1, + BIT_DAC_OFF_ENABLE, 0); + rtw_write8_mask(rtwdev, REG_RSTB_SEL + 3, + BIT_DAC_OFF_ENABLE, 1); + } + + /* disable WL-S1 BB chage RF mode if GNT_BT * since RF TRx mask can do it */ - rtw_write8_mask(rtwdev, REG_ANAPAR + 2, BIT_ANAPAR_BTPS >> 16, 1); - rtw_write8_mask(rtwdev, REG_RSTB_SEL + 1, BIT_DAC_OFF_ENABLE, 0); - rtw_write8_mask(rtwdev, REG_RSTB_SEL + 3, BIT_DAC_OFF_ENABLE, 1); - rtw_write8_mask(rtwdev, REG_IGN_GNTBT4, BIT_PI_IGNORE_GNT_BT, 1); + rtw_write8_mask(rtwdev, REG_IGN_GNTBT4, + BIT_PI_IGNORE_GNT_BT, 1); /* disable WL-S0 BB chage RF mode if wifi is at 5G, * or antenna path is separated */ - if (coex_stat->wl_coex_mode == COEX_WLINK_5G || + if (coex_stat->wl_coex_mode == COEX_WLINK_2GFREE) { + rtw_write8_mask(rtwdev, REG_IGN_GNT_BT1, + BIT_PI_IGNORE_GNT_BT, 1); + rtw_write8_mask(rtwdev, REG_NOMASK_TXBT, + BIT_NOMASK_TXBT_ENABLE, 1); + } else if (coex_stat->wl_coex_mode == COEX_WLINK_5G || coex->under_5g || !efuse->share_ant) { if (coex_stat->kt_ver >= 3) { rtw_write8_mask(rtwdev, REG_IGN_GNT_BT1, @@ -4962,6 +4977,7 @@ static struct rtw_chip_ops rtw8822c_ops = { .cfo_init = rtw8822c_cfo_init, .cfo_track = rtw8822c_cfo_track, .config_tx_path = rtw8822c_config_tx_path, + .config_txrx_mode = rtw8822c_config_trx_mode, .coex_set_init = rtw8822c_coex_cfg_init, .coex_set_ant_switch = NULL, @@ -5007,6 +5023,8 @@ static const struct coex_table_para table_sant_8822c[] = { {0x66556aaa, 0x6a5a6aaa}, /*case-30*/ {0xffffffff, 0x5aaa5aaa}, {0x56555555, 0x5a5a5aaa}, + {0xdaffdaff, 0xdaffdaff}, + {0xddffddff, 0xddffddff}, }; /* Non-Shared-Antenna Coex Table */ @@ -5107,7 +5125,8 @@ static const struct coex_rf_para rf_para_tx_8822c[] = { {8, 17, true, 4}, {7, 18, true, 4}, {6, 19, true, 4}, - {5, 20, true, 4} + {5, 20, true, 4}, + {0, 21, true, 4} /* for gamg hid */ }; static const struct coex_rf_para rf_para_rx_8822c[] = { @@ -5116,7 +5135,8 @@ static const struct coex_rf_para rf_para_rx_8822c[] = { {3, 24, true, 5}, {2, 26, true, 5}, {1, 27, true, 5}, - {0, 28, true, 5} + {0, 28, true, 5}, + {0, 28, true, 5} /* for gamg hid */ }; static_assert(ARRAY_SIZE(rf_para_tx_8822c) == ARRAY_SIZE(rf_para_rx_8822c)); @@ -5354,11 +5374,12 @@ struct rtw_chip_info rtw8822c_hw_spec = { .wowlan_stub = &rtw_wowlan_stub_8822c, .max_sched_scan_ssids = 4, #endif - .coex_para_ver = 0x2103181c, - .bt_desired_ver = 0x1c, + .coex_para_ver = 0x22020720, + .bt_desired_ver = 0x20, .scbd_support = true, .new_scbd10_def = true, .ble_hid_profile_support = true, + .wl_mimo_ps_support = true, .pstdma_type = COEX_PSTDMA_FORCE_LPSOFF, .bt_rssi_type = COEX_BTRSSI_DBM, .ant_isolation = 15, diff --git a/drivers/net/wireless/realtek/rtw88/sar.c b/drivers/net/wireless/realtek/rtw88/sar.c index 3383726c4d90..c472f1502b82 100644 --- a/drivers/net/wireless/realtek/rtw88/sar.c +++ b/drivers/net/wireless/realtek/rtw88/sar.c @@ -91,10 +91,10 @@ int rtw_set_sar_specs(struct rtw_dev *rtwdev, return -EINVAL; power = sar->sub_specs[i].power; - rtw_info(rtwdev, "On freq %u to %u, set SAR %d in 1/%lu dBm\n", - rtw_common_sar_freq_ranges[idx].start_freq, - rtw_common_sar_freq_ranges[idx].end_freq, - power, BIT(RTW_COMMON_SAR_FCT)); + rtw_dbg(rtwdev, RTW_DBG_REGD, "On freq %u to %u, set SAR %d in 1/%lu dBm\n", + rtw_common_sar_freq_ranges[idx].start_freq, + rtw_common_sar_freq_ranges[idx].end_freq, + power, BIT(RTW_COMMON_SAR_FCT)); for (j = 0; j < RTW_RF_PATH_MAX; j++) { for (k = 0; k < RTW_RATE_SECTION_MAX; k++) { diff --git a/drivers/net/wireless/realtek/rtw88/tx.c b/drivers/net/wireless/realtek/rtw88/tx.c index efcc1b0371a8..94d1089f4022 100644 --- a/drivers/net/wireless/realtek/rtw88/tx.c +++ b/drivers/net/wireless/realtek/rtw88/tx.c @@ -353,7 +353,7 @@ static void rtw_tx_data_pkt_info_update(struct rtw_dev *rtwdev, bw = si->bw_mode; rate_id = si->rate_id; - stbc = si->stbc_en; + stbc = rtwdev->hal.txrx_1ss ? false : si->stbc_en; ldpc = si->ldpc_en; out: diff --git a/drivers/net/wireless/realtek/rtw89/Kconfig b/drivers/net/wireless/realtek/rtw89/Kconfig index 37e5def24d9f..dd02b6a6790e 100644 --- a/drivers/net/wireless/realtek/rtw89/Kconfig +++ b/drivers/net/wireless/realtek/rtw89/Kconfig @@ -16,11 +16,15 @@ config RTW89_CORE config RTW89_PCI tristate +config RTW89_8852A + tristate + config RTW89_8852AE tristate "Realtek 8852AE PCI wireless network adapter" depends on PCI select RTW89_CORE select RTW89_PCI + select RTW89_8852A help Select this option will enable support for 8852AE chipset diff --git a/drivers/net/wireless/realtek/rtw89/Makefile b/drivers/net/wireless/realtek/rtw89/Makefile index 077e8fe23f60..012ae60c0b81 100644 --- a/drivers/net/wireless/realtek/rtw89/Makefile +++ b/drivers/net/wireless/realtek/rtw89/Makefile @@ -6,10 +6,6 @@ rtw89_core-y += core.o \ mac.o \ phy.o \ fw.o \ - rtw8852a.o \ - rtw8852a_table.o \ - rtw8852a_rfk.o \ - rtw8852a_rfk_table.o \ cam.o \ efuse.o \ regd.o \ @@ -18,6 +14,15 @@ rtw89_core-y += core.o \ ps.o \ ser.o +obj-$(CONFIG_RTW89_8852A) += rtw89_8852a.o +rtw89_8852a-objs := rtw8852a.o \ + rtw8852a_table.o \ + rtw8852a_rfk.o \ + rtw8852a_rfk_table.o + +obj-$(CONFIG_RTW89_8852AE) += rtw89_8852ae.o +rtw89_8852ae-objs := rtw8852ae.o + rtw89_core-$(CONFIG_RTW89_DEBUG) += debug.o obj-$(CONFIG_RTW89_PCI) += rtw89_pci.o diff --git a/drivers/net/wireless/realtek/rtw89/cam.c b/drivers/net/wireless/realtek/rtw89/cam.c index bd34e4bbe107..305dbbebff6b 100644 --- a/drivers/net/wireless/realtek/rtw89/cam.c +++ b/drivers/net/wireless/realtek/rtw89/cam.c @@ -231,7 +231,7 @@ static int rtw89_cam_attach_sec_cam(struct rtw89_dev *rtwdev, } rtwvif = (struct rtw89_vif *)vif->drv_priv; - addr_cam = &rtwvif->addr_cam; + addr_cam = rtw89_get_addr_cam_of(rtwvif, rtwsta); ret = rtw89_cam_get_addr_cam_key_idx(addr_cam, sec_cam, key, &key_idx); if (ret) { rtw89_err(rtwdev, "failed to get addr cam key idx %d, %d\n", @@ -387,7 +387,7 @@ int rtw89_cam_sec_key_del(struct rtw89_dev *rtwdev, } rtwvif = (struct rtw89_vif *)vif->drv_priv; - addr_cam = &rtwvif->addr_cam; + addr_cam = rtw89_get_addr_cam_of(rtwvif, rtwsta); sec_cam = addr_cam->sec_entries[key_idx]; if (!sec_cam) return -EINVAL; @@ -427,15 +427,23 @@ static void rtw89_cam_reset_key_iter(struct ieee80211_hw *hw, rtw89_cam_deinit(rtwdev, rtwvif); } +void rtw89_cam_deinit_addr_cam(struct rtw89_dev *rtwdev, + struct rtw89_addr_cam_entry *addr_cam) +{ + struct rtw89_cam_info *cam_info = &rtwdev->cam_info; + + addr_cam->valid = false; + clear_bit(addr_cam->addr_cam_idx, cam_info->addr_cam_map); +} + void rtw89_cam_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) { struct rtw89_cam_info *cam_info = &rtwdev->cam_info; struct rtw89_addr_cam_entry *addr_cam = &rtwvif->addr_cam; struct rtw89_bssid_cam_entry *bssid_cam = &rtwvif->bssid_cam; - addr_cam->valid = false; + rtw89_cam_deinit_addr_cam(rtwdev, addr_cam); bssid_cam->valid = false; - clear_bit(addr_cam->addr_cam_idx, cam_info->addr_cam_map); clear_bit(bssid_cam->bssid_cam_idx, cam_info->bssid_cam_map); } @@ -464,10 +472,10 @@ static int rtw89_cam_get_avail_addr_cam(struct rtw89_dev *rtwdev, return 0; } -static int rtw89_cam_init_addr_cam(struct rtw89_dev *rtwdev, - struct rtw89_vif *rtwvif) +int rtw89_cam_init_addr_cam(struct rtw89_dev *rtwdev, + struct rtw89_addr_cam_entry *addr_cam, + const struct rtw89_bssid_cam_entry *bssid_cam) { - struct rtw89_addr_cam_entry *addr_cam = &rtwvif->addr_cam; u8 addr_cam_idx; int i; int ret; @@ -484,14 +492,17 @@ static int rtw89_cam_init_addr_cam(struct rtw89_dev *rtwdev, addr_cam->valid = true; addr_cam->addr_mask = 0; addr_cam->mask_sel = RTW89_NO_MSK; + addr_cam->sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL; bitmap_zero(addr_cam->sec_cam_map, RTW89_SEC_CAM_IN_ADDR_CAM); - ether_addr_copy(addr_cam->sma, rtwvif->mac_addr); for (i = 0; i < RTW89_SEC_CAM_IN_ADDR_CAM; i++) { addr_cam->sec_ent_keyid[i] = 0; addr_cam->sec_ent[i] = 0; } + /* associate addr cam with bssid cam */ + addr_cam->bssid_cam_idx = bssid_cam->bssid_cam_idx; + return 0; } @@ -549,21 +560,18 @@ int rtw89_cam_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) struct rtw89_bssid_cam_entry *bssid_cam = &rtwvif->bssid_cam; int ret; - ret = rtw89_cam_init_addr_cam(rtwdev, rtwvif); + ret = rtw89_cam_init_bssid_cam(rtwdev, rtwvif); if (ret) { - rtw89_err(rtwdev, "failed to init addr cam\n"); + rtw89_err(rtwdev, "failed to init bssid cam\n"); return ret; } - ret = rtw89_cam_init_bssid_cam(rtwdev, rtwvif); + ret = rtw89_cam_init_addr_cam(rtwdev, addr_cam, bssid_cam); if (ret) { - rtw89_err(rtwdev, "failed to init bssid cam\n"); + rtw89_err(rtwdev, "failed to init addr cam\n"); return ret; } - /* associate addr cam with bssid cam */ - addr_cam->bssid_cam_idx = bssid_cam->bssid_cam_idx; - return 0; } @@ -609,7 +617,7 @@ void rtw89_cam_fill_addr_cam_info(struct rtw89_dev *rtwdev, u8 *cmd) { struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); - struct rtw89_addr_cam_entry *addr_cam = &rtwvif->addr_cam; + struct rtw89_addr_cam_entry *addr_cam = rtw89_get_addr_cam_of(rtwvif, rtwsta); struct ieee80211_sta *sta = rtwsta_to_sta_safe(rtwsta); const u8 *sma = scan_mac_addr ? scan_mac_addr : rtwvif->mac_addr; u8 sma_hash, tma_hash, addr_msk_start; diff --git a/drivers/net/wireless/realtek/rtw89/cam.h b/drivers/net/wireless/realtek/rtw89/cam.h index 33a3ad582b81..3a6a786530d1 100644 --- a/drivers/net/wireless/realtek/rtw89/cam.h +++ b/drivers/net/wireless/realtek/rtw89/cam.h @@ -346,6 +346,11 @@ static inline void FWCMD_SET_ADDR_BSSID_BSSID5(void *cmd, u32 value) int rtw89_cam_init(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); void rtw89_cam_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); +int rtw89_cam_init_addr_cam(struct rtw89_dev *rtwdev, + struct rtw89_addr_cam_entry *addr_cam, + const struct rtw89_bssid_cam_entry *bssid_cam); +void rtw89_cam_deinit_addr_cam(struct rtw89_dev *rtwdev, + struct rtw89_addr_cam_entry *addr_cam); void rtw89_cam_fill_addr_cam_info(struct rtw89_dev *rtwdev, struct rtw89_vif *vif, struct rtw89_sta *rtwsta, diff --git a/drivers/net/wireless/realtek/rtw89/coex.c b/drivers/net/wireless/realtek/rtw89/coex.c index 9f7d4f8d0c56..684583955511 100644 --- a/drivers/net/wireless/realtek/rtw89/coex.c +++ b/drivers/net/wireless/realtek/rtw89/coex.c @@ -594,7 +594,7 @@ static void _reset_btc_var(struct rtw89_dev *rtwdev, u8 type) memset(&btc->dm, 0, sizeof(btc->dm)); memset(bt_linfo->rssi_state, 0, sizeof(bt_linfo->rssi_state)); - for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) + for (i = 0; i < RTW89_PORT_NUM; i++) memset(wl_linfo[i].rssi_state, 0, sizeof(wl_linfo[i].rssi_state)); @@ -1478,7 +1478,7 @@ static void _set_gnt_wl(struct rtw89_dev *rtwdev, u8 phy_map, u8 state) } } - rtw89_mac_cfg_gnt(rtwdev, &dm->gnt); + rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt); } #define BTC_TDMA_WLROLE_MAX 2 @@ -1698,7 +1698,7 @@ static void _set_bt_afh_info(struct rtw89_dev *rtwdev) wl_rinfo->link_mode == BTC_WLINK_2G_SCC) { en = true; /* get p2p channel */ - for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) { + for (i = 0; i < RTW89_PORT_NUM; i++) { if (wl_rinfo->active_role[i].role == RTW89_WIFI_ROLE_P2P_GO || wl_rinfo->active_role[i].role == @@ -1711,7 +1711,7 @@ static void _set_bt_afh_info(struct rtw89_dev *rtwdev) } else { en = true; /* get 2g channel */ - for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) { + for (i = 0; i < RTW89_PORT_NUM; i++) { if (wl_rinfo->active_role[i].connected && wl_rinfo->active_role[i].band == RTW89_BAND_2G) { ch = wl_rinfo->active_role[i].ch; @@ -2233,7 +2233,7 @@ static void _set_gnt_bt(struct rtw89_dev *rtwdev, u8 phy_map, u8 state) } } - rtw89_mac_cfg_gnt(rtwdev, &dm->gnt); + rtw89_chip_mac_cfg_gnt(rtwdev, &dm->gnt); } static void _set_bt_plut(struct rtw89_dev *rtwdev, u8 phy_map, @@ -2300,7 +2300,7 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec, switch (type) { case BTC_ANT_WPOWERON: - rtw89_mac_cfg_ctrl_path(rtwdev, false); + rtw89_chip_cfg_ctrl_path(rtwdev, false); break; case BTC_ANT_WINIT: if (bt->enable.now) { @@ -2310,21 +2310,21 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec, _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO); } - rtw89_mac_cfg_ctrl_path(rtwdev, true); + rtw89_chip_cfg_ctrl_path(rtwdev, true); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_BT, BTC_PLT_BT); break; case BTC_ANT_WONLY: _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO); - rtw89_mac_cfg_ctrl_path(rtwdev, true); + rtw89_chip_cfg_ctrl_path(rtwdev, true); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); break; case BTC_ANT_WOFF: - rtw89_mac_cfg_ctrl_path(rtwdev, false); + rtw89_chip_cfg_ctrl_path(rtwdev, false); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); break; case BTC_ANT_W2G: - rtw89_mac_cfg_ctrl_path(rtwdev, true); + rtw89_chip_cfg_ctrl_path(rtwdev, true); if (rtwdev->dbcc_en) { for (i = 0; i < RTW89_PHY_MAX; i++) { b2g = (wl_dinfo->real_band[i] == RTW89_BAND_2G); @@ -2352,32 +2352,32 @@ static void _set_ant(struct rtw89_dev *rtwdev, bool force_exec, } break; case BTC_ANT_W5G: - rtw89_mac_cfg_ctrl_path(rtwdev, true); + rtw89_chip_cfg_ctrl_path(rtwdev, true); _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); _set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); break; case BTC_ANT_W25G: - rtw89_mac_cfg_ctrl_path(rtwdev, true); + rtw89_chip_cfg_ctrl_path(rtwdev, true); _set_gnt_wl(rtwdev, phy_map, BTC_GNT_HW); _set_gnt_bt(rtwdev, phy_map, BTC_GNT_HW); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_GNT_WL, BTC_PLT_GNT_WL); break; case BTC_ANT_FREERUN: - rtw89_mac_cfg_ctrl_path(rtwdev, true); + rtw89_chip_cfg_ctrl_path(rtwdev, true); _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI); _set_bt_plut(rtwdev, BTC_PHY_ALL, BTC_PLT_NONE, BTC_PLT_NONE); break; case BTC_ANT_WRFK: - rtw89_mac_cfg_ctrl_path(rtwdev, true); + rtw89_chip_cfg_ctrl_path(rtwdev, true); _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_HI); _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_LO); _set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE); break; case BTC_ANT_BRFK: - rtw89_mac_cfg_ctrl_path(rtwdev, false); + rtw89_chip_cfg_ctrl_path(rtwdev, false); _set_gnt_wl(rtwdev, phy_map, BTC_GNT_SW_LO); _set_gnt_bt(rtwdev, phy_map, BTC_GNT_SW_HI); _set_bt_plut(rtwdev, phy_map, BTC_PLT_NONE, BTC_PLT_NONE); @@ -3287,7 +3287,7 @@ static void _update_wl_info(struct rtw89_dev *rtwdev) memset(wl_rinfo, 0, sizeof(*wl_rinfo)); - for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) { + for (i = 0; i < RTW89_PORT_NUM; i++) { /* check if role active? */ if (!wl_linfo[i].active) continue; @@ -4370,6 +4370,7 @@ void rtw89_btc_ntfy_wl_rfk(struct rtw89_dev *rtwdev, u8 phy_map, rtwdev->is_bt_iqk_timeout = true; } } +EXPORT_SYMBOL(rtw89_btc_ntfy_wl_rfk); struct rtw89_btc_wl_sta_iter_data { struct rtw89_dev *rtwdev; @@ -4622,12 +4623,12 @@ static void _show_cx_info(struct rtw89_dev *rtwdev, struct seq_file *m) ver_hotfix = FIELD_GET(GENMASK(15, 8), chip->wlcx_desired); seq_printf(m, "(%s, desired:%d.%d.%d), ", (wl->ver_info.fw_coex >= chip->wlcx_desired ? - "Match" : "Mis-Match"), ver_main, ver_sub, ver_hotfix); + "Match" : "Mismatch"), ver_main, ver_sub, ver_hotfix); seq_printf(m, "BT_FW_coex:%d(%s, desired:%d)\n", bt->ver_info.fw_coex, (bt->ver_info.fw_coex >= chip->btcx_desired ? - "Match" : "Mis-Match"), chip->btcx_desired); + "Match" : "Mismatch"), chip->btcx_desired); if (bt->enable.now && bt->ver_info.fw == 0) rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_VER_INFO, true); @@ -4676,7 +4677,7 @@ static void _show_wl_role_info(struct rtw89_dev *rtwdev, struct seq_file *m) wl_dinfo->real_band[RTW89_PHY_1]); } - for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++) { + for (i = 0; i < RTW89_PORT_NUM; i++) { plink = &btc->cx.wl.link_info[i]; if (!plink->active) @@ -5074,7 +5075,7 @@ static void _show_dm_info(struct rtw89_dev *rtwdev, struct seq_file *m) seq_printf(m, "leak_ap:%d, fw_offload:%s%s\n", dm->leak_ap, (BTC_CX_FW_OFFLOAD ? "Y" : "N"), (dm->wl_fw_cx_offload == BTC_CX_FW_OFFLOAD ? - "" : "(Mis-Match!!)")); + "" : "(Mismatch!!)")); if (dm->rf_trx_para.wl_tx_power == 0xff) seq_printf(m, diff --git a/drivers/net/wireless/realtek/rtw89/core.c b/drivers/net/wireless/realtek/rtw89/core.c index a0737eea9f81..bcefc968576e 100644 --- a/drivers/net/wireless/realtek/rtw89/core.c +++ b/drivers/net/wireless/realtek/rtw89/core.c @@ -4,6 +4,7 @@ #include <linux/ip.h> #include <linux/udp.h> +#include "cam.h" #include "coex.h" #include "core.h" #include "efuse.h" @@ -21,50 +22,122 @@ static bool rtw89_disable_ps_mode; module_param_named(disable_ps_mode, rtw89_disable_ps_mode, bool, 0644); MODULE_PARM_DESC(disable_ps_mode, "Set Y to disable low power mode"); +#define RTW89_DEF_CHAN(_freq, _hw_val, _flags, _band) \ + { .center_freq = _freq, .hw_value = _hw_val, .flags = _flags, .band = _band, } +#define RTW89_DEF_CHAN_2G(_freq, _hw_val) \ + RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_2GHZ) +#define RTW89_DEF_CHAN_5G(_freq, _hw_val) \ + RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_5GHZ) +#define RTW89_DEF_CHAN_5G_NO_HT40MINUS(_freq, _hw_val) \ + RTW89_DEF_CHAN(_freq, _hw_val, IEEE80211_CHAN_NO_HT40MINUS, NL80211_BAND_5GHZ) +#define RTW89_DEF_CHAN_6G(_freq, _hw_val) \ + RTW89_DEF_CHAN(_freq, _hw_val, 0, NL80211_BAND_6GHZ) + static struct ieee80211_channel rtw89_channels_2ghz[] = { - { .center_freq = 2412, .hw_value = 1, }, - { .center_freq = 2417, .hw_value = 2, }, - { .center_freq = 2422, .hw_value = 3, }, - { .center_freq = 2427, .hw_value = 4, }, - { .center_freq = 2432, .hw_value = 5, }, - { .center_freq = 2437, .hw_value = 6, }, - { .center_freq = 2442, .hw_value = 7, }, - { .center_freq = 2447, .hw_value = 8, }, - { .center_freq = 2452, .hw_value = 9, }, - { .center_freq = 2457, .hw_value = 10, }, - { .center_freq = 2462, .hw_value = 11, }, - { .center_freq = 2467, .hw_value = 12, }, - { .center_freq = 2472, .hw_value = 13, }, - { .center_freq = 2484, .hw_value = 14, }, + RTW89_DEF_CHAN_2G(2412, 1), + RTW89_DEF_CHAN_2G(2417, 2), + RTW89_DEF_CHAN_2G(2422, 3), + RTW89_DEF_CHAN_2G(2427, 4), + RTW89_DEF_CHAN_2G(2432, 5), + RTW89_DEF_CHAN_2G(2437, 6), + RTW89_DEF_CHAN_2G(2442, 7), + RTW89_DEF_CHAN_2G(2447, 8), + RTW89_DEF_CHAN_2G(2452, 9), + RTW89_DEF_CHAN_2G(2457, 10), + RTW89_DEF_CHAN_2G(2462, 11), + RTW89_DEF_CHAN_2G(2467, 12), + RTW89_DEF_CHAN_2G(2472, 13), + RTW89_DEF_CHAN_2G(2484, 14), }; static struct ieee80211_channel rtw89_channels_5ghz[] = { - {.center_freq = 5180, .hw_value = 36,}, - {.center_freq = 5200, .hw_value = 40,}, - {.center_freq = 5220, .hw_value = 44,}, - {.center_freq = 5240, .hw_value = 48,}, - {.center_freq = 5260, .hw_value = 52,}, - {.center_freq = 5280, .hw_value = 56,}, - {.center_freq = 5300, .hw_value = 60,}, - {.center_freq = 5320, .hw_value = 64,}, - {.center_freq = 5500, .hw_value = 100,}, - {.center_freq = 5520, .hw_value = 104,}, - {.center_freq = 5540, .hw_value = 108,}, - {.center_freq = 5560, .hw_value = 112,}, - {.center_freq = 5580, .hw_value = 116,}, - {.center_freq = 5600, .hw_value = 120,}, - {.center_freq = 5620, .hw_value = 124,}, - {.center_freq = 5640, .hw_value = 128,}, - {.center_freq = 5660, .hw_value = 132,}, - {.center_freq = 5680, .hw_value = 136,}, - {.center_freq = 5700, .hw_value = 140,}, - {.center_freq = 5720, .hw_value = 144,}, - {.center_freq = 5745, .hw_value = 149,}, - {.center_freq = 5765, .hw_value = 153,}, - {.center_freq = 5785, .hw_value = 157,}, - {.center_freq = 5805, .hw_value = 161,}, - {.center_freq = 5825, .hw_value = 165, - .flags = IEEE80211_CHAN_NO_HT40MINUS}, + RTW89_DEF_CHAN_5G(5180, 36), + RTW89_DEF_CHAN_5G(5200, 40), + RTW89_DEF_CHAN_5G(5220, 44), + RTW89_DEF_CHAN_5G(5240, 48), + RTW89_DEF_CHAN_5G(5260, 52), + RTW89_DEF_CHAN_5G(5280, 56), + RTW89_DEF_CHAN_5G(5300, 60), + RTW89_DEF_CHAN_5G(5320, 64), + RTW89_DEF_CHAN_5G(5500, 100), + RTW89_DEF_CHAN_5G(5520, 104), + RTW89_DEF_CHAN_5G(5540, 108), + RTW89_DEF_CHAN_5G(5560, 112), + RTW89_DEF_CHAN_5G(5580, 116), + RTW89_DEF_CHAN_5G(5600, 120), + RTW89_DEF_CHAN_5G(5620, 124), + RTW89_DEF_CHAN_5G(5640, 128), + RTW89_DEF_CHAN_5G(5660, 132), + RTW89_DEF_CHAN_5G(5680, 136), + RTW89_DEF_CHAN_5G(5700, 140), + RTW89_DEF_CHAN_5G(5720, 144), + RTW89_DEF_CHAN_5G(5745, 149), + RTW89_DEF_CHAN_5G(5765, 153), + RTW89_DEF_CHAN_5G(5785, 157), + RTW89_DEF_CHAN_5G(5805, 161), + RTW89_DEF_CHAN_5G_NO_HT40MINUS(5825, 165), +}; + +static struct ieee80211_channel rtw89_channels_6ghz[] = { + RTW89_DEF_CHAN_6G(5955, 1), + RTW89_DEF_CHAN_6G(5975, 5), + RTW89_DEF_CHAN_6G(5995, 9), + RTW89_DEF_CHAN_6G(6015, 13), + RTW89_DEF_CHAN_6G(6035, 17), + RTW89_DEF_CHAN_6G(6055, 21), + RTW89_DEF_CHAN_6G(6075, 25), + RTW89_DEF_CHAN_6G(6095, 29), + RTW89_DEF_CHAN_6G(6115, 33), + RTW89_DEF_CHAN_6G(6135, 37), + RTW89_DEF_CHAN_6G(6155, 41), + RTW89_DEF_CHAN_6G(6175, 45), + RTW89_DEF_CHAN_6G(6195, 49), + RTW89_DEF_CHAN_6G(6215, 53), + RTW89_DEF_CHAN_6G(6235, 57), + RTW89_DEF_CHAN_6G(6255, 61), + RTW89_DEF_CHAN_6G(6275, 65), + RTW89_DEF_CHAN_6G(6295, 69), + RTW89_DEF_CHAN_6G(6315, 73), + RTW89_DEF_CHAN_6G(6335, 77), + RTW89_DEF_CHAN_6G(6355, 81), + RTW89_DEF_CHAN_6G(6375, 85), + RTW89_DEF_CHAN_6G(6395, 89), + RTW89_DEF_CHAN_6G(6415, 93), + RTW89_DEF_CHAN_6G(6435, 97), + RTW89_DEF_CHAN_6G(6455, 101), + RTW89_DEF_CHAN_6G(6475, 105), + RTW89_DEF_CHAN_6G(6495, 109), + RTW89_DEF_CHAN_6G(6515, 113), + RTW89_DEF_CHAN_6G(6535, 117), + RTW89_DEF_CHAN_6G(6555, 121), + RTW89_DEF_CHAN_6G(6575, 125), + RTW89_DEF_CHAN_6G(6595, 129), + RTW89_DEF_CHAN_6G(6615, 133), + RTW89_DEF_CHAN_6G(6635, 137), + RTW89_DEF_CHAN_6G(6655, 141), + RTW89_DEF_CHAN_6G(6675, 145), + RTW89_DEF_CHAN_6G(6695, 149), + RTW89_DEF_CHAN_6G(6715, 153), + RTW89_DEF_CHAN_6G(6735, 157), + RTW89_DEF_CHAN_6G(6755, 161), + RTW89_DEF_CHAN_6G(6775, 165), + RTW89_DEF_CHAN_6G(6795, 169), + RTW89_DEF_CHAN_6G(6815, 173), + RTW89_DEF_CHAN_6G(6835, 177), + RTW89_DEF_CHAN_6G(6855, 181), + RTW89_DEF_CHAN_6G(6875, 185), + RTW89_DEF_CHAN_6G(6895, 189), + RTW89_DEF_CHAN_6G(6915, 193), + RTW89_DEF_CHAN_6G(6935, 197), + RTW89_DEF_CHAN_6G(6955, 201), + RTW89_DEF_CHAN_6G(6975, 205), + RTW89_DEF_CHAN_6G(6995, 209), + RTW89_DEF_CHAN_6G(7015, 213), + RTW89_DEF_CHAN_6G(7035, 217), + RTW89_DEF_CHAN_6G(7055, 221), + RTW89_DEF_CHAN_6G(7075, 225), + RTW89_DEF_CHAN_6G(7095, 229), + RTW89_DEF_CHAN_6G(7115, 233), }; static struct ieee80211_rate rtw89_bitrates[] = { @@ -118,6 +191,16 @@ static struct ieee80211_supported_band rtw89_sband_5ghz = { .vht_cap = {0}, }; +static struct ieee80211_supported_band rtw89_sband_6ghz = { + .band = NL80211_BAND_6GHZ, + .channels = rtw89_channels_6ghz, + .n_channels = ARRAY_SIZE(rtw89_channels_6ghz), + + /* 6G has no CCK rates, 1M/2M/5.5M/11M */ + .bitrates = rtw89_bitrates + 4, + .n_bitrates = ARRAY_SIZE(rtw89_bitrates) - 4, +}; + static void rtw89_traffic_stats_accu(struct rtw89_dev *rtwdev, struct rtw89_traffic_stats *stats, struct sk_buff *skb, bool tx) @@ -149,6 +232,9 @@ static void rtw89_get_channel_params(struct cfg80211_chan_def *chandef, u8 center_chan; u8 bandwidth = RTW89_CHANNEL_WIDTH_20; u8 primary_chan_idx = 0; + u32 offset; + u8 band; + u8 subband; center_chan = channel->hw_value; primary_freq = channel->center_freq; @@ -171,23 +257,16 @@ static void rtw89_get_channel_params(struct cfg80211_chan_def *chandef, } break; case NL80211_CHAN_WIDTH_80: - bandwidth = RTW89_CHANNEL_WIDTH_80; + case NL80211_CHAN_WIDTH_160: + bandwidth = nl_to_rtw89_bandwidth(width); if (primary_freq > center_freq) { - if (primary_freq - center_freq == 10) { - primary_chan_idx = RTW89_SC_20_UPPER; - center_chan -= 2; - } else { - primary_chan_idx = RTW89_SC_20_UPMOST; - center_chan -= 6; - } + offset = (primary_freq - center_freq - 10) / 20; + primary_chan_idx = RTW89_SC_20_UPPER + offset * 2; + center_chan -= 2 + offset * 4; } else { - if (center_freq - primary_freq == 10) { - primary_chan_idx = RTW89_SC_20_LOWER; - center_chan += 2; - } else { - primary_chan_idx = RTW89_SC_20_LOWEST; - center_chan += 6; - } + offset = (center_freq - primary_freq - 10) / 20; + primary_chan_idx = RTW89_SC_20_LOWER + offset * 2; + center_chan += 2 + offset * 4; } break; default: @@ -195,10 +274,81 @@ static void rtw89_get_channel_params(struct cfg80211_chan_def *chandef, break; } + switch (channel->band) { + default: + case NL80211_BAND_2GHZ: + band = RTW89_BAND_2G; + break; + case NL80211_BAND_5GHZ: + band = RTW89_BAND_5G; + break; + case NL80211_BAND_6GHZ: + band = RTW89_BAND_6G; + break; + } + + switch (band) { + default: + case RTW89_BAND_2G: + switch (center_chan) { + default: + case 1 ... 14: + subband = RTW89_CH_2G; + break; + } + break; + case RTW89_BAND_5G: + switch (center_chan) { + default: + case 36 ... 64: + subband = RTW89_CH_5G_BAND_1; + break; + case 100 ... 144: + subband = RTW89_CH_5G_BAND_3; + break; + case 149 ... 177: + subband = RTW89_CH_5G_BAND_4; + break; + } + break; + case RTW89_BAND_6G: + switch (center_chan) { + default: + case 1 ... 29: + subband = RTW89_CH_6G_BAND_IDX0; + break; + case 33 ... 61: + subband = RTW89_CH_6G_BAND_IDX1; + break; + case 65 ... 93: + subband = RTW89_CH_6G_BAND_IDX2; + break; + case 97 ... 125: + subband = RTW89_CH_6G_BAND_IDX3; + break; + case 129 ... 157: + subband = RTW89_CH_6G_BAND_IDX4; + break; + case 161 ... 189: + subband = RTW89_CH_6G_BAND_IDX5; + break; + case 193 ... 221: + subband = RTW89_CH_6G_BAND_IDX6; + break; + case 225 ... 253: + subband = RTW89_CH_6G_BAND_IDX7; + break; + } + break; + } + chan_param->center_chan = center_chan; + chan_param->center_freq = center_freq; chan_param->primary_chan = channel->hw_value; chan_param->bandwidth = bandwidth; chan_param->pri_ch_idx = primary_chan_idx; + chan_param->band_type = band; + chan_param->subband_type = subband; } void rtw89_set_channel(struct rtw89_dev *rtwdev) @@ -209,7 +359,6 @@ void rtw89_set_channel(struct rtw89_dev *rtwdev) struct rtw89_channel_params ch_param; struct rtw89_channel_help_params bak; u8 center_chan, bandwidth; - u8 band_type; bool band_changed; rtw89_get_channel_params(&hw->conf.chandef, &ch_param); @@ -218,30 +367,17 @@ void rtw89_set_channel(struct rtw89_dev *rtwdev) center_chan = ch_param.center_chan; bandwidth = ch_param.bandwidth; - band_type = center_chan > 14 ? RTW89_BAND_5G : RTW89_BAND_2G; - band_changed = hal->current_band_type != band_type || + band_changed = hal->current_band_type != ch_param.band_type || hal->current_channel == 0; hal->current_band_width = bandwidth; hal->current_channel = center_chan; + hal->current_freq = ch_param.center_freq; hal->prev_primary_channel = hal->current_primary_channel; + hal->prev_band_type = hal->current_band_type; hal->current_primary_channel = ch_param.primary_chan; - hal->current_band_type = band_type; - - switch (center_chan) { - case 1 ... 14: - hal->current_subband = RTW89_CH_2G; - break; - case 36 ... 64: - hal->current_subband = RTW89_CH_5G_BAND_1; - break; - case 100 ... 144: - hal->current_subband = RTW89_CH_5G_BAND_3; - break; - case 149 ... 177: - hal->current_subband = RTW89_CH_5G_BAND_4; - break; - } + hal->current_band_type = ch_param.band_type; + hal->current_subband = ch_param.subband_type; rtw89_chip_set_channel_prepare(rtwdev, &bak); @@ -300,9 +436,11 @@ rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req) { struct ieee80211_vif *vif = tx_req->vif; + struct ieee80211_sta *sta = tx_req->sta; struct ieee80211_tx_info *info; struct ieee80211_key_conf *key; struct rtw89_vif *rtwvif; + struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta); struct rtw89_addr_cam_entry *addr_cam; struct rtw89_sec_cam_entry *sec_cam; struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; @@ -315,7 +453,7 @@ rtw89_core_tx_update_sec_key(struct rtw89_dev *rtwdev, } rtwvif = (struct rtw89_vif *)vif->drv_priv; - addr_cam = &rtwvif->addr_cam; + addr_cam = rtw89_get_addr_cam_of(rtwvif, rtwsta); info = IEEE80211_SKB_CB(skb); key = info->control.hw_key; @@ -377,14 +515,19 @@ static void rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req) { + struct ieee80211_vif *vif = tx_req->vif; + struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; u8 qsel, ch_dma; - qsel = RTW89_TX_QSEL_B0_MGMT; + qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : RTW89_TX_QSEL_B0_MGMT; ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); - desc_info->qsel = RTW89_TX_QSEL_B0_MGMT; + desc_info->qsel = qsel; desc_info->ch_dma = ch_dma; + desc_info->port = desc_info->hiq ? rtwvif->port : 0; + desc_info->hw_ssn_sel = RTW89_MGMT_HW_SSN_SEL; + desc_info->hw_seq_mode = RTW89_MGMT_HW_SEQ_MODE; /* fixed data rate for mgmt frames */ desc_info->en_wd_info = true; @@ -520,6 +663,21 @@ desc_bk: desc_info->bk = true; } +static u8 rtw89_core_tx_get_mac_id(struct rtw89_dev *rtwdev, + struct rtw89_core_tx_request *tx_req) +{ + struct ieee80211_vif *vif = tx_req->vif; + struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; + struct ieee80211_sta *sta = tx_req->sta; + struct rtw89_sta *rtwsta; + + if (!sta) + return rtwvif->mac_id; + + rtwsta = (struct rtw89_sta *)sta->drv_priv; + return rtwsta->mac_id; +} + static void rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req) @@ -535,12 +693,14 @@ rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev, tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK; tid_indicate = rtw89_core_get_tid_indicate(rtwdev, tid); - qsel = rtw89_core_get_qsel(rtwdev, tid); + qsel = desc_info->hiq ? RTW89_TX_QSEL_B0_HI : rtw89_core_get_qsel(rtwdev, tid); ch_dma = rtw89_core_get_ch_dma(rtwdev, qsel); desc_info->ch_dma = ch_dma; desc_info->tid_indicate = tid_indicate; desc_info->qsel = qsel; + desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req); + desc_info->port = desc_info->hiq ? rtwvif->port : 0; /* enable wd_info for AMPDU */ desc_info->en_wd_info = true; @@ -596,11 +756,28 @@ rtw89_core_tx_btc_spec_pkt_notify(struct rtw89_dev *rtwdev, } static void +rtw89_core_tx_wake(struct rtw89_dev *rtwdev, + struct rtw89_core_tx_request *tx_req) +{ + if (!rtwdev->fw.tx_wake) + return; + + if (!test_bit(RTW89_FLAG_LOW_POWER_MODE, rtwdev->flags)) + return; + + if (tx_req->tx_type != RTW89_CORE_TX_TYPE_MGMT) + return; + + rtw89_mac_notify_wake(rtwdev); +} + +static void rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev, struct rtw89_core_tx_request *tx_req) { struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; struct sk_buff *skb = tx_req->skb; + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); struct ieee80211_hdr *hdr = (void *)skb->data; enum rtw89_core_tx_type tx_type; enum btc_pkt_type pkt_type; @@ -619,6 +796,7 @@ rtw89_core_tx_update_desc_info(struct rtw89_dev *rtwdev, desc_info->pkt_size = skb->len; desc_info->is_bmc = is_bmc; desc_info->wd_page = true; + desc_info->hiq = info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM; switch (tx_req->tx_type) { case RTW89_CORE_TX_TYPE_MGMT: @@ -691,6 +869,8 @@ int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, rtw89_traffic_stats_accu(rtwdev, &rtwdev->stats, skb, true); rtw89_traffic_stats_accu(rtwdev, &rtwvif->stats, skb, true); rtw89_core_tx_update_desc_info(rtwdev, &tx_req); + rtw89_core_tx_wake(rtwdev, &tx_req); + ret = rtw89_hci_tx_write(rtwdev, &tx_req); if (ret) { rtw89_err(rtwdev, "failed to transmit skb to HCI\n"); @@ -710,7 +890,9 @@ static __le32 rtw89_build_txwd_body0(struct rtw89_tx_desc_info *desc_info) FIELD_PREP(RTW89_TXWD_BODY0_CHANNEL_DMA, desc_info->ch_dma) | FIELD_PREP(RTW89_TXWD_BODY0_HDR_LLC_LEN, desc_info->hdr_llc_len) | FIELD_PREP(RTW89_TXWD_BODY0_WD_PAGE, desc_info->wd_page) | - FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl); + FIELD_PREP(RTW89_TXWD_BODY0_FW_DL, desc_info->fw_dl) | + FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_SEL, desc_info->hw_ssn_sel) | + FIELD_PREP(RTW89_TXWD_BODY0_HW_SSN_MODE, desc_info->hw_seq_mode); return cpu_to_le32(dword); } @@ -719,7 +901,8 @@ static __le32 rtw89_build_txwd_body2(struct rtw89_tx_desc_info *desc_info) { u32 dword = FIELD_PREP(RTW89_TXWD_BODY2_TID_INDICATE, desc_info->tid_indicate) | FIELD_PREP(RTW89_TXWD_BODY2_QSEL, desc_info->qsel) | - FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size); + FIELD_PREP(RTW89_TXWD_BODY2_TXPKT_SIZE, desc_info->pkt_size) | + FIELD_PREP(RTW89_TXWD_BODY2_MACID, desc_info->mac_id); return cpu_to_le32(dword); } @@ -737,7 +920,8 @@ static __le32 rtw89_build_txwd_info0(struct rtw89_tx_desc_info *desc_info) { u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_USE_RATE, desc_info->use_rate) | FIELD_PREP(RTW89_TXWD_INFO0_DATA_RATE, desc_info->data_rate) | - FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb); + FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) | + FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port); return cpu_to_le32(dword); } @@ -996,13 +1180,7 @@ static bool rtw89_core_rx_ppdu_match(struct rtw89_dev *rtwdev, rtw89_warn(rtwdev, "invalid RX rate mode %d\n", data_rate_mode); } - if (desc_info->bw == RTW89_CHANNEL_WIDTH_80) - bw = RATE_INFO_BW_80; - else if (desc_info->bw == RTW89_CHANNEL_WIDTH_40) - bw = RATE_INFO_BW_40; - else - bw = RATE_INFO_BW_20; - + bw = rtw89_hw_to_rate_info_bw(desc_info->bw); gi_ltf = rtw89_rxdesc_to_nl_he_gi(rtwdev, desc_info, false); ret = rtwdev->ppdu_sts.curr_rx_ppdu_cnt[band] == desc_info->ppdu_cnt && status->rate_idx == rate_idx && @@ -1083,10 +1261,31 @@ static void rtw89_core_hw_to_sband_rate(struct ieee80211_rx_status *rx_status) if (rx_status->band == NL80211_BAND_2GHZ || rx_status->encoding != RX_ENC_LEGACY) return; + + /* Some control frames' freq(ACKs in this case) are reported wrong due + * to FW notify timing, set to lowest rate to prevent overflow. + */ + if (rx_status->rate_idx < RTW89_HW_RATE_OFDM6) { + rx_status->rate_idx = 0; + return; + } + /* No 4 CCK rates for non-2G */ rx_status->rate_idx -= 4; } +static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev, + struct rtw89_rx_phy_ppdu *phy_ppdu, + struct rtw89_rx_desc_info *desc_info, + struct sk_buff *skb_ppdu, + struct ieee80211_rx_status *rx_status) +{ + rtw89_core_hw_to_sband_rate(rx_status); + rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu); + ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi); + rtwdev->napi_budget_countdown--; +} + static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev, struct rtw89_rx_phy_ppdu *phy_ppdu, struct rtw89_rx_desc_info *desc_info, @@ -1106,10 +1305,7 @@ static void rtw89_core_rx_pending_skb(struct rtw89_dev *rtwdev, if (rtw89_core_rx_ppdu_match(rtwdev, desc_info, rx_status)) rtw89_chip_query_ppdu(rtwdev, phy_ppdu, rx_status); rtw89_correct_cck_chan(rtwdev, rx_status); - rtw89_core_hw_to_sband_rate(rx_status); - rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu); - ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi); - rtwdev->napi_budget_countdown--; + rtw89_core_rx_to_mac80211(rtwdev, phy_ppdu, desc_info, skb_ppdu, rx_status); } } @@ -1250,6 +1446,7 @@ static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev, struct ieee80211_rx_status *rx_status) { struct ieee80211_hw *hw = rtwdev->hw; + struct rtw89_hal *hal = &rtwdev->hal; u16 data_rate; u8 data_rate_mode; @@ -1257,6 +1454,13 @@ static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev, rx_status->freq = hw->conf.chandef.chan->center_freq; rx_status->band = hw->conf.chandef.chan->band; + if (rtwdev->scanning && rtwdev->fw.scan_offload) { + rx_status->freq = + ieee80211_channel_to_frequency(hal->current_channel, + hal->current_band_type); + rx_status->band = rtwdev->hal.current_band_type; + } + if (desc_info->icv_err || desc_info->crc32_err) rx_status->flag |= RX_FLAG_FAILED_FCS_CRC; @@ -1264,12 +1468,7 @@ static void rtw89_core_update_rx_status(struct rtw89_dev *rtwdev, !(desc_info->sw_dec || desc_info->icv_err)) rx_status->flag |= RX_FLAG_DECRYPTED; - if (desc_info->bw == RTW89_CHANNEL_WIDTH_80) - rx_status->bw = RATE_INFO_BW_80; - else if (desc_info->bw == RTW89_CHANNEL_WIDTH_40) - rx_status->bw = RATE_INFO_BW_40; - else - rx_status->bw = RATE_INFO_BW_20; + rx_status->bw = rtw89_hw_to_rate_info_bw(desc_info->bw); data_rate = desc_info->data_rate; data_rate_mode = GET_DATA_RATE_MODE(data_rate); @@ -1334,10 +1533,7 @@ static void rtw89_core_flush_ppdu_rx_queue(struct rtw89_dev *rtwdev, skb_queue_walk_safe(&ppdu_sts->rx_queue[band], skb_ppdu, tmp) { skb_unlink(skb_ppdu, &ppdu_sts->rx_queue[band]); rx_status = IEEE80211_SKB_RXCB(skb_ppdu); - rtw89_core_hw_to_sband_rate(rx_status); - rtw89_core_rx_stats(rtwdev, NULL, desc_info, skb_ppdu); - ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, &rtwdev->napi); - rtwdev->napi_budget_countdown--; + rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb_ppdu, rx_status); } } @@ -1364,14 +1560,10 @@ void rtw89_core_rx(struct rtw89_dev *rtwdev, memset(rx_status, 0, sizeof(*rx_status)); rtw89_core_update_rx_status(rtwdev, desc_info, rx_status); if (desc_info->long_rxdesc && - BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP) { + BIT(desc_info->frame_type) & PPDU_FILTER_BITMAP) skb_queue_tail(&ppdu_sts->rx_queue[band], skb); - } else { - rtw89_core_hw_to_sband_rate(rx_status); - rtw89_core_rx_stats(rtwdev, NULL, desc_info, skb); - ieee80211_rx_napi(rtwdev->hw, NULL, skb, &rtwdev->napi); - rtwdev->napi_budget_countdown--; - } + else + rtw89_core_rx_to_mac80211(rtwdev, NULL, desc_info, skb, rx_status); } EXPORT_SYMBOL(rtw89_core_rx); @@ -1509,11 +1701,12 @@ static void rtw89_core_txq_push(struct rtw89_dev *rtwdev, unsigned long i; int ret; + rcu_read_lock(); for (i = 0; i < frame_cnt; i++) { skb = ieee80211_tx_dequeue_ni(rtwdev->hw, txq); if (!skb) { rtw89_debug(rtwdev, RTW89_DBG_TXRX, "dequeue a NULL skb\n"); - return; + goto out; } rtw89_core_txq_check_agg(rtwdev, rtwtxq, skb); ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, NULL); @@ -1523,6 +1716,8 @@ static void rtw89_core_txq_push(struct rtw89_dev *rtwdev, break; } } +out: + rcu_read_unlock(); } static u32 rtw89_check_and_reclaim_tx_resource(struct rtw89_dev *rtwdev, u8 tid) @@ -1598,6 +1793,16 @@ static void rtw89_core_txq_schedule(struct rtw89_dev *rtwdev, u8 ac, bool *reinv ieee80211_txq_schedule_end(hw, ac); } +static void rtw89_ips_work(struct work_struct *work) +{ + struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, + ips_work); + + mutex_lock(&rtwdev->mutex); + rtw89_enter_ips(rtwdev); + mutex_unlock(&rtwdev->mutex); +} + static void rtw89_core_txq_work(struct work_struct *w) { struct rtw89_dev *rtwdev = container_of(w, struct rtw89_dev, txq_work); @@ -1770,6 +1975,51 @@ void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits) bitmap_zero(addr, nbits); } +int rtw89_core_acquire_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx) +{ + struct rtw89_ba_cam_entry *entry; + u8 idx; + + idx = rtw89_core_acquire_bit_map(rtwsta->ba_cam_map, RTW89_BA_CAM_NUM); + if (idx == RTW89_BA_CAM_NUM) { + /* allocate a static BA CAM to tid=0, so replace the existing + * one if BA CAM is full. Hardware will process the original tid + * automatically. + */ + if (tid != 0) + return -ENOSPC; + + idx = 0; + } + + entry = &rtwsta->ba_cam_entry[idx]; + entry->tid = tid; + *cam_idx = idx; + + return 0; +} + +int rtw89_core_release_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx) +{ + struct rtw89_ba_cam_entry *entry; + int i; + + for (i = 0; i < RTW89_BA_CAM_NUM; i++) { + if (!test_bit(i, rtwsta->ba_cam_map)) + continue; + + entry = &rtwsta->ba_cam_entry[i]; + if (entry->tid != tid) + continue; + + rtw89_core_release_bit_map(rtwsta->ba_cam_map, i); + *cam_idx = i; + return 0; + } + + return -ENOENT; +} + #define RTW89_TYPE_MAPPING(_type) \ case NL80211_IFTYPE_ ## _type: \ rtwvif->wifi_role = RTW89_WIFI_ROLE_ ## _type; \ @@ -1838,6 +2088,9 @@ int rtw89_core_sta_add(struct rtw89_dev *rtwdev, rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, BTC_ROLE_MSTS_STA_CONN_START); rtw89_chip_rfk_channel(rtwdev); + } else if (vif->type == NL80211_IFTYPE_AP) { + rtwsta->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map, + RTW89_MAX_MAC_ID_NUM); } return 0; @@ -1866,8 +2119,11 @@ int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev, rtw89_mac_bf_monitor_calc(rtwdev, sta, true); rtw89_mac_bf_disassoc(rtwdev, vif, sta); rtw89_core_free_sta_pending_ba(rtwdev, sta); + if (vif->type == NL80211_IFTYPE_AP) + rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta->addr_cam); - rtw89_vif_type_mapping(vif, false); + if (vif->type == NL80211_IFTYPE_STATION) + rtw89_vif_type_mapping(vif, false); ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta); if (ret) { @@ -1875,14 +2131,22 @@ int rtw89_core_sta_disconnect(struct rtw89_dev *rtwdev, return ret; } - ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, 1); + ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, true); if (ret) { rtw89_warn(rtwdev, "failed to send h2c join info\n"); return ret; } + if (vif->type == NL80211_IFTYPE_AP) { + ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, RTW89_ROLE_REMOVE); + if (ret) { + rtw89_warn(rtwdev, "failed to send h2c role info\n"); + return ret; + } + } + /* update cam aid mac_id net_type */ - rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); + ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); if (ret) { rtw89_warn(rtwdev, "failed to send h2c cam\n"); return ret; @@ -1899,7 +2163,25 @@ int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; int ret; - rtw89_vif_type_mapping(vif, true); + if (vif->type == NL80211_IFTYPE_AP) { + ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta->mac_id, false); + if (ret) { + rtw89_warn(rtwdev, "failed to send h2c macid pause\n"); + return ret; + } + + ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, RTW89_ROLE_CREATE); + if (ret) { + rtw89_warn(rtwdev, "failed to send h2c role info\n"); + return ret; + } + + ret = rtw89_cam_init_addr_cam(rtwdev, &rtwsta->addr_cam, &rtwvif->bssid_cam); + if (ret) { + rtw89_warn(rtwdev, "failed to send h2c init addr cam\n"); + return ret; + } + } ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta); if (ret) { @@ -1907,7 +2189,7 @@ int rtw89_core_sta_assoc(struct rtw89_dev *rtwdev, return ret; } - ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, 0); + ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, false); if (ret) { rtw89_warn(rtwdev, "failed to send h2c join info\n"); return ret; @@ -1950,6 +2232,8 @@ int rtw89_core_sta_remove(struct rtw89_dev *rtwdev, if (vif->type == NL80211_IFTYPE_STATION) rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, BTC_ROLE_MSTS_STA_DIS_CONN); + else if (vif->type == NL80211_IFTYPE_AP) + rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id); return 0; } @@ -1986,9 +2270,14 @@ static void rtw89_init_ht_cap(struct rtw89_dev *rtwdev, static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev, struct ieee80211_sta_vht_cap *vht_cap) { - static const __le16 highest[RF_PATH_MAX] = { + static const __le16 highest_bw80[RF_PATH_MAX] = { cpu_to_le16(433), cpu_to_le16(867), cpu_to_le16(1300), cpu_to_le16(1733), }; + static const __le16 highest_bw160[RF_PATH_MAX] = { + cpu_to_le16(867), cpu_to_le16(1733), cpu_to_le16(2600), cpu_to_le16(3467), + }; + const struct rtw89_chip_info *chip = rtwdev->chip; + const __le16 *highest = chip->support_bw160 ? highest_bw160 : highest_bw80; struct rtw89_hal *hal = &rtwdev->hal; u16 tx_mcs_map = 0, rx_mcs_map = 0; u8 sts_cap = 3; @@ -2017,6 +2306,9 @@ static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev, vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE | IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE; vht_cap->cap |= sts_cap << IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT; + if (chip->support_bw160) + vht_cap->cap |= IEEE80211_VHT_CAP_SUPP_CHAN_WIDTH_160MHZ | + IEEE80211_VHT_CAP_SHORT_GI_160; vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(rx_mcs_map); vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(tx_mcs_map); vht_cap->vht_mcs.rx_highest = highest[hal->rx_nss - 1]; @@ -2087,8 +2379,15 @@ static void rtw89_init_he_cap(struct rtw89_dev *rtwdev, IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU; if (i == NL80211_IFTYPE_STATION) mac_cap_info[5] = IEEE80211_HE_MAC_CAP5_HT_VHT_TRIG_FRAME_RX; - phy_cap_info[0] = IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G | - IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G; + if (band == NL80211_BAND_2GHZ) { + phy_cap_info[0] = + IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_IN_2G; + } else { + phy_cap_info[0] = + IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_40MHZ_80MHZ_IN_5G; + if (chip->support_bw160) + phy_cap_info[0] |= IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_160MHZ_IN_5G; + } phy_cap_info[1] = IEEE80211_HE_PHY_CAP1_DEVICE_CLASS_A | IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD | IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US; @@ -2117,6 +2416,9 @@ static void rtw89_init_he_cap(struct rtw89_dev *rtwdev, phy_cap_info[8] = IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI | IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI | IEEE80211_HE_PHY_CAP8_DCM_MAX_RU_996; + if (chip->support_bw160) + phy_cap_info[8] |= IEEE80211_HE_PHY_CAP8_20MHZ_IN_160MHZ_HE_PPDU | + IEEE80211_HE_PHY_CAP8_80MHZ_IN_160MHZ_HE_PPDU; phy_cap_info[9] = IEEE80211_HE_PHY_CAP9_LONGER_THAN_16_SIGB_OFDM_SYM | IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU | IEEE80211_HE_PHY_CAP9_RX_FULL_BW_SU_USING_MU_WITH_COMP_SIGB | @@ -2127,6 +2429,22 @@ static void rtw89_init_he_cap(struct rtw89_dev *rtwdev, phy_cap_info[9] |= IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU; he_cap->he_mcs_nss_supp.rx_mcs_80 = cpu_to_le16(mcs_map); he_cap->he_mcs_nss_supp.tx_mcs_80 = cpu_to_le16(mcs_map); + if (chip->support_bw160) { + he_cap->he_mcs_nss_supp.rx_mcs_160 = cpu_to_le16(mcs_map); + he_cap->he_mcs_nss_supp.tx_mcs_160 = cpu_to_le16(mcs_map); + } + + if (band == NL80211_BAND_6GHZ) { + __le16 capa; + + capa = le16_encode_bits(IEEE80211_HT_MPDU_DENSITY_NONE, + IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) | + le16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K, + IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) | + le16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454, + IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN); + iftype_data[idx].he_6ghz_capa.capa = capa; + } idx++; } @@ -2139,34 +2457,52 @@ static int rtw89_core_set_supported_band(struct rtw89_dev *rtwdev) { struct ieee80211_hw *hw = rtwdev->hw; struct ieee80211_supported_band *sband_2ghz = NULL, *sband_5ghz = NULL; + struct ieee80211_supported_band *sband_6ghz = NULL; u32 size = sizeof(struct ieee80211_supported_band); + u8 support_bands = rtwdev->chip->support_bands; - sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL); - if (!sband_2ghz) - goto err; - rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap); - rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz); - hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz; + if (support_bands & BIT(NL80211_BAND_2GHZ)) { + sband_2ghz = kmemdup(&rtw89_sband_2ghz, size, GFP_KERNEL); + if (!sband_2ghz) + goto err; + rtw89_init_ht_cap(rtwdev, &sband_2ghz->ht_cap); + rtw89_init_he_cap(rtwdev, NL80211_BAND_2GHZ, sband_2ghz); + hw->wiphy->bands[NL80211_BAND_2GHZ] = sband_2ghz; + } - sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL); - if (!sband_5ghz) - goto err; - rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap); - rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap); - rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz); - hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz; + if (support_bands & BIT(NL80211_BAND_5GHZ)) { + sband_5ghz = kmemdup(&rtw89_sband_5ghz, size, GFP_KERNEL); + if (!sband_5ghz) + goto err; + rtw89_init_ht_cap(rtwdev, &sband_5ghz->ht_cap); + rtw89_init_vht_cap(rtwdev, &sband_5ghz->vht_cap); + rtw89_init_he_cap(rtwdev, NL80211_BAND_5GHZ, sband_5ghz); + hw->wiphy->bands[NL80211_BAND_5GHZ] = sband_5ghz; + } + + if (support_bands & BIT(NL80211_BAND_6GHZ)) { + sband_6ghz = kmemdup(&rtw89_sband_6ghz, size, GFP_KERNEL); + if (!sband_6ghz) + goto err; + rtw89_init_he_cap(rtwdev, NL80211_BAND_6GHZ, sband_6ghz); + hw->wiphy->bands[NL80211_BAND_6GHZ] = sband_6ghz; + } return 0; err: hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL; hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL; + hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL; if (sband_2ghz) kfree(sband_2ghz->iftype_data); if (sband_5ghz) kfree(sband_5ghz->iftype_data); + if (sband_6ghz) + kfree(sband_6ghz->iftype_data); kfree(sband_2ghz); kfree(sband_5ghz); + kfree(sband_6ghz); return -ENOMEM; } @@ -2176,10 +2512,14 @@ static void rtw89_core_clr_supported_band(struct rtw89_dev *rtwdev) kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data); kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data); + if (hw->wiphy->bands[NL80211_BAND_6GHZ]) + kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data); kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]); + kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]); hw->wiphy->bands[NL80211_BAND_2GHZ] = NULL; hw->wiphy->bands[NL80211_BAND_5GHZ] = NULL; + hw->wiphy->bands[NL80211_BAND_6GHZ] = NULL; } static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev) @@ -2192,6 +2532,21 @@ static void rtw89_core_ppdu_sts_init(struct rtw89_dev *rtwdev) rtwdev->ppdu_sts.curr_rx_ppdu_cnt[i] = U8_MAX; } +void rtw89_core_update_beacon_work(struct work_struct *work) +{ + struct rtw89_dev *rtwdev; + struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif, + update_beacon_work); + + if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE) + return; + + rtwdev = rtwvif->rtwdev; + mutex_lock(&rtwdev->mutex); + rtw89_fw_h2c_update_beacon(rtwdev, rtwvif); + mutex_unlock(&rtwdev->mutex); +} + int rtw89_core_start(struct rtw89_dev *rtwdev) { int ret; @@ -2278,10 +2633,16 @@ int rtw89_core_init(struct rtw89_dev *rtwdev) { struct rtw89_btc *btc = &rtwdev->btc; int ret; + u8 band; INIT_LIST_HEAD(&rtwdev->ba_list); INIT_LIST_HEAD(&rtwdev->rtwvifs_list); INIT_LIST_HEAD(&rtwdev->early_h2c_list); + for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { + if (!(rtwdev->chip->support_bands & BIT(band))) + continue; + INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]); + } INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work); INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work); INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work); @@ -2292,11 +2653,13 @@ int rtw89_core_init(struct rtw89_dev *rtwdev) INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work); rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); spin_lock_init(&rtwdev->ba_lock); + spin_lock_init(&rtwdev->rpwm_lock); mutex_init(&rtwdev->mutex); mutex_init(&rtwdev->rf_mutex); rtwdev->total_sta_assoc = 0; INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work); + INIT_WORK(&rtwdev->ips_work, rtw89_ips_work); skb_queue_head_init(&rtwdev->c2h_queue); rtw89_core_ppdu_sts_init(rtwdev); rtw89_traffic_stats_init(rtwdev, &rtwdev->stats); @@ -2332,12 +2695,48 @@ void rtw89_core_deinit(struct rtw89_dev *rtwdev) } EXPORT_SYMBOL(rtw89_core_deinit); +void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, + const u8 *mac_addr, bool hw_scan) +{ + struct rtw89_hal *hal = &rtwdev->hal; + + rtwdev->scanning = true; + rtw89_leave_lps(rtwdev); + if (hw_scan && rtwvif->net_type == RTW89_NET_TYPE_NO_LINK) + rtw89_leave_ips(rtwdev); + + ether_addr_copy(rtwvif->mac_addr, mac_addr); + rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, hal->current_band_type); + rtw89_chip_rfk_scan(rtwdev, true); + rtw89_hci_recalc_int_mit(rtwdev); + + rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, mac_addr); +} + +void rtw89_core_scan_complete(struct rtw89_dev *rtwdev, + struct ieee80211_vif *vif, bool hw_scan) +{ + struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; + + ether_addr_copy(rtwvif->mac_addr, vif->addr); + rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL); + + rtw89_chip_rfk_scan(rtwdev, false); + rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0); + + rtwdev->scanning = false; + rtwdev->dig.bypass_dig = true; + if (hw_scan && rtwvif->net_type == RTW89_NET_TYPE_NO_LINK) + ieee80211_queue_work(rtwdev->hw, &rtwdev->ips_work); +} + static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev) { + const struct rtw89_chip_info *chip = rtwdev->chip; u8 cv; cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK); - if (cv <= CHIP_CBV) { + if (chip->chip_id == RTL8852A && cv <= CHIP_CBV) { if (rtw89_read32(rtwdev, R_AX_GPIO0_7_FUNC_SEL) == RTW89_R32_DEAD) cv = CHIP_CAV; else @@ -2347,6 +2746,13 @@ static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev) rtwdev->hal.cv = cv; } +static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev) +{ + rtwdev->hal.support_cckpd = + !(rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV) && + !(rtwdev->chip->chip_id == RTL8852B && rtwdev->hal.cv <= CHIP_CAV); +} + static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev) { int ret; @@ -2367,6 +2773,8 @@ static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev) if (ret) return ret; + rtw89_core_setup_phycap(rtwdev); + rtw89_mac_pwr_off(rtwdev); return 0; @@ -2438,13 +2846,18 @@ static int rtw89_core_register_hw(struct rtw89_dev *rtwdev) ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU); ieee80211_hw_set(hw, SUPPORTS_PS); ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); + ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); - hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); + hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | + BIT(NL80211_IFTYPE_AP); hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1; hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1; hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; + hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID; + hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN; + wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); ret = rtw89_core_set_supported_band(rtwdev); diff --git a/drivers/net/wireless/realtek/rtw89/core.h b/drivers/net/wireless/realtek/rtw89/core.h index 7c84556ec4ad..771722132c53 100644 --- a/drivers/net/wireless/realtek/rtw89/core.h +++ b/drivers/net/wireless/realtek/rtw89/core.h @@ -13,9 +13,9 @@ #include <net/mac80211.h> struct rtw89_dev; +struct rtw89_pci_info; extern const struct ieee80211_ops rtw89_ops; -extern const struct rtw89_chip_info rtw8852a_chip_info; #define MASKBYTE0 0xff #define MASKBYTE1 0xff00 @@ -33,7 +33,6 @@ extern const struct rtw89_chip_info rtw8852a_chip_info; #define MAX_RSSI 110 #define RSSI_FACTOR 1 #define RTW89_RSSI_RAW_TO_DBM(rssi) ((s8)((rssi) >> RSSI_FACTOR) - MAX_RSSI) -#define RTW89_MAX_HW_PORT_NUM 5 #define RTW89_HTC_MASK_VARIANT GENMASK(1, 0) #define RTW89_HTC_VARIANT_HE 3 @@ -63,6 +62,15 @@ enum rtw89_subband { RTW89_CH_5G_BAND_3 = 3, RTW89_CH_5G_BAND_4 = 4, + RTW89_CH_6G_BAND_IDX0, /* Low */ + RTW89_CH_6G_BAND_IDX1, /* Low */ + RTW89_CH_6G_BAND_IDX2, /* Mid */ + RTW89_CH_6G_BAND_IDX3, /* Mid */ + RTW89_CH_6G_BAND_IDX4, /* High */ + RTW89_CH_6G_BAND_IDX5, /* High */ + RTW89_CH_6G_BAND_IDX6, /* Ultra-high */ + RTW89_CH_6G_BAND_IDX7, /* Ultra-high */ + RTW89_SUBBAND_NR, }; @@ -140,11 +148,11 @@ enum rtw89_wifi_role { }; enum rtw89_upd_mode { - RTW89_VIF_CREATE, - RTW89_VIF_REMOVE, - RTW89_VIF_TYPE_CHANGE, - RTW89_VIF_INFO_CHANGE, - RTW89_VIF_CON_DISCONN + RTW89_ROLE_CREATE, + RTW89_ROLE_REMOVE, + RTW89_ROLE_TYPE_CHANGE, + RTW89_ROLE_INFO_CHANGE, + RTW89_ROLE_CON_DISCONN }; enum rtw89_self_role { @@ -205,6 +213,7 @@ enum rtw89_port { enum rtw89_band { RTW89_BAND_2G = 0, RTW89_BAND_5G = 1, + RTW89_BAND_6G = 2, RTW89_BAND_MAX, }; @@ -363,6 +372,25 @@ enum rtw89_hw_rate { */ #define RTW89_5G_CH_NUM 53 +/* 6G channels, + * 1, 3, 5, 7, 9, 11, 13, 15, + * 17, 19, 21, 23, 25, 27, 29, 33, + * 35, 37, 39, 41, 43, 45, 47, 49, + * 51, 53, 55, 57, 59, 61, 65, 67, + * 69, 71, 73, 75, 77, 79, 81, 83, + * 85, 87, 89, 91, 93, 97, 99, 101, + * 103, 105, 107, 109, 111, 113, 115, 117, + * 119, 121, 123, 125, 129, 131, 133, 135, + * 137, 139, 141, 143, 145, 147, 149, 151, + * 153, 155, 157, 161, 163, 165, 167, 169, + * 171, 173, 175, 177, 179, 181, 183, 185, + * 187, 189, 193, 195, 197, 199, 201, 203, + * 205, 207, 209, 211, 213, 215, 217, 219, + * 221, 225, 227, 229, 231, 233, 235, 237, + * 239, 241, 243, 245, 247, 249, 251, 253, + */ +#define RTW89_6G_CH_NUM 120 + enum rtw89_rate_section { RTW89_RS_CCK, RTW89_RS_OFDM, @@ -421,9 +449,6 @@ enum rtw89_regulation_type { RTW89_REGD_NUM, }; -extern const u8 rtw89_rs_idx_max[RTW89_RS_MAX]; -extern const u8 rtw89_rs_nss_max[RTW89_RS_MAX]; - struct rtw89_txpwr_byrate { s8 cck[RTW89_RATE_CCK_MAX]; s8 ofdm[RTW89_RATE_OFDM_MAX]; @@ -548,7 +573,8 @@ enum rtw89_ps_mode { }; #define RTW89_2G_BW_NUM (RTW89_CHANNEL_WIDTH_40 + 1) -#define RTW89_5G_BW_NUM (RTW89_CHANNEL_WIDTH_80 + 1) +#define RTW89_5G_BW_NUM (RTW89_CHANNEL_WIDTH_160 + 1) +#define RTW89_6G_BW_NUM (RTW89_CHANNEL_WIDTH_160 + 1) #define RTW89_PPE_BW_NUM (RTW89_CHANNEL_WIDTH_80 + 1) enum rtw89_ru_bandwidth { @@ -564,19 +590,26 @@ enum rtw89_sc_offset { RTW89_SC_20_LOWER = 2, RTW89_SC_20_UPMOST = 3, RTW89_SC_20_LOWEST = 4, + RTW89_SC_20_UP2X = 5, + RTW89_SC_20_LOW2X = 6, + RTW89_SC_20_UP3X = 7, + RTW89_SC_20_LOW3X = 8, RTW89_SC_40_UPPER = 9, RTW89_SC_40_LOWER = 10, }; struct rtw89_channel_params { u8 center_chan; + u32 center_freq; u8 primary_chan; u8 bandwidth; u8 pri_ch_idx; + u8 band_type; + u8 subband_type; }; struct rtw89_channel_help_params { - u16 tx_en; + u32 tx_en; }; struct rtw89_port_reg { @@ -670,6 +703,7 @@ struct rtw89_rxdesc_long { struct rtw89_tx_desc_info { u16 pkt_size; u8 wp_offset; + u8 mac_id; u8 qsel; u8 ch_dma; u8 hdr_llc_len; @@ -691,6 +725,12 @@ struct rtw89_tx_desc_info { bool fw_dl; u16 seq; bool a_ctrl_bsr; + u8 hw_ssn_sel; +#define RTW89_MGMT_HW_SSN_SEL 1 + u8 hw_seq_mode; +#define RTW89_MGMT_HW_SEQ_MODE 1 + bool hiq; + u8 port; }; struct rtw89_core_tx_request { @@ -1048,7 +1088,7 @@ struct rtw89_btc_wl_role_info { /* struct size must be n*4 bytes */ u8 connect_cnt; u8 link_mode; union rtw89_btc_wl_role_info_map role_map; - struct rtw89_btc_wl_active_role active_role[RTW89_MAX_HW_PORT_NUM]; + struct rtw89_btc_wl_active_role active_role[RTW89_PORT_NUM]; }; struct rtw89_btc_wl_ver_info { @@ -1151,7 +1191,7 @@ struct rtw89_btc_rf_para { }; struct rtw89_btc_wl_info { - struct rtw89_btc_wl_link_info link_info[RTW89_MAX_HW_PORT_NUM]; + struct rtw89_btc_wl_link_info link_info[RTW89_PORT_NUM]; struct rtw89_btc_wl_rfk_info rfk_info; struct rtw89_btc_wl_ver_info ver_info; struct rtw89_btc_wl_afh_info afh_info; @@ -1831,27 +1871,10 @@ struct rtw89_ra_report { DECLARE_EWMA(rssi, 10, 16); -struct rtw89_sta { - u8 mac_id; - bool disassoc; - struct rtw89_vif *rtwvif; - struct rtw89_ra_info ra; - struct rtw89_ra_report ra_report; - int max_agg_wait; - u8 prev_rssi; - struct ewma_rssi avg_rssi; - struct rtw89_ampdu_params ampdu_params[IEEE80211_NUM_TIDS]; - struct ieee80211_rx_status rx_status; - u16 rx_hw_rate; - __le32 htc_template; +#define RTW89_BA_CAM_NUM 2 - bool use_cfg_mask; - struct cfg80211_bitrate_mask mask; - - bool cctl_tx_time; - u32 ampdu_max_time:4; - bool cctl_tx_retry_limit; - u32 data_tx_cnt_lmt:6; +struct rtw89_ba_cam_entry { + u8 tid; }; #define RTW89_MAX_ADDR_CAM_NUM 128 @@ -1868,7 +1891,6 @@ struct rtw89_addr_cam_entry { u8 wapi : 1; u8 mask_sel : 2; u8 bssid_cam_idx: 6; - u8 sma[ETH_ALEN]; u8 sec_ent_mode; DECLARE_BITMAP(sec_cam_map, RTW89_SEC_CAM_IN_ADDR_CAM); @@ -1898,6 +1920,33 @@ struct rtw89_sec_cam_entry { u8 key[32]; }; +struct rtw89_sta { + u8 mac_id; + bool disassoc; + struct rtw89_vif *rtwvif; + struct rtw89_ra_info ra; + struct rtw89_ra_report ra_report; + int max_agg_wait; + u8 prev_rssi; + struct ewma_rssi avg_rssi; + struct rtw89_ampdu_params ampdu_params[IEEE80211_NUM_TIDS]; + struct ieee80211_rx_status rx_status; + u16 rx_hw_rate; + __le32 htc_template; + struct rtw89_addr_cam_entry addr_cam; /* AP mode only */ + + bool use_cfg_mask; + struct cfg80211_bitrate_mask mask; + + bool cctl_tx_time; + u32 ampdu_max_time:4; + bool cctl_tx_retry_limit; + u32 data_tx_cnt_lmt:6; + + DECLARE_BITMAP(ba_cam_map, RTW89_BA_CAM_NUM); + struct rtw89_ba_cam_entry ba_cam_entry[RTW89_BA_CAM_NUM]; +}; + struct rtw89_efuse { bool valid; u8 xtal_cap; @@ -1915,6 +1964,7 @@ struct rtw89_phy_rate_pattern { struct rtw89_vif { struct list_head list; + struct rtw89_dev *rtwdev; u8 mac_id; u8 port; u8 mac_addr[ETH_ALEN]; @@ -1936,11 +1986,14 @@ struct rtw89_vif { bool wowlan_magic; bool is_hesta; bool last_a_ctrl; + struct work_struct update_beacon_work; struct rtw89_addr_cam_entry addr_cam; struct rtw89_bssid_cam_entry bssid_cam; struct ieee80211_tx_queue_params tx_params[IEEE80211_NUM_ACS]; struct rtw89_traffic_stats stats; struct rtw89_phy_rate_pattern rate_pattern; + struct cfg80211_scan_request *scan_req; + struct ieee80211_scan_ies *scan_ies; }; enum rtw89_lv1_rcvy_step { @@ -2012,7 +2065,15 @@ struct rtw89_chip_ops { struct ieee80211_rx_status *status); void (*bb_ctrl_btc_preagc)(struct rtw89_dev *rtwdev, bool bt_en); void (*set_txpwr_ul_tb_offset)(struct rtw89_dev *rtwdev, - s16 pw_ofst, enum rtw89_mac_idx mac_idx); + s8 pw_ofst, enum rtw89_mac_idx mac_idx); + int (*pwr_on_func)(struct rtw89_dev *rtwdev); + int (*pwr_off_func)(struct rtw89_dev *rtwdev); + int (*cfg_ctrl_path)(struct rtw89_dev *rtwdev, bool wl); + int (*mac_cfg_gnt)(struct rtw89_dev *rtwdev, + const struct rtw89_mac_ax_coex_gnt *gnt_cfg); + int (*stop_sch_tx)(struct rtw89_dev *rtwdev, u8 mac_idx, + u32 *tx_en, enum rtw89_sch_tx_sel sel); + int (*resume_sch_tx)(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en); void (*btc_set_rfe)(struct rtw89_dev *rtwdev); void (*btc_init_cfg)(struct rtw89_dev *rtwdev); @@ -2133,6 +2194,7 @@ struct rtw89_ple_quota { u16 bb_rpt; u16 wd_rel; u16 cpu_io; + u16 tx_rpt; }; struct rtw89_dle_mem { @@ -2173,6 +2235,8 @@ struct rtw89_phy_table { const struct rtw89_reg2_def *regs; u32 n_regs; enum rtw89_rf_path rf_path; + void (*config)(struct rtw89_dev *rtwdev, const struct rtw89_reg2_def *reg, + enum rtw89_rf_path rf_path, void *data); }; struct rtw89_txpwr_table { @@ -2182,6 +2246,21 @@ struct rtw89_txpwr_table { const struct rtw89_txpwr_table *tbl); }; +struct rtw89_page_regs { + u32 hci_fc_ctrl; + u32 ch_page_ctrl; + u32 ach_page_ctrl; + u32 ach_page_info; + u32 pub_page_info3; + u32 pub_page_ctrl1; + u32 pub_page_ctrl2; + u32 pub_page_info1; + u32 pub_page_info2; + u32 wp_page_ctrl1; + u32 wp_page_ctrl2; + u32 wp_page_info1; +}; + struct rtw89_chip_info { enum rtw89_core_chip_id chip_id; const struct rtw89_chip_ops *ops; @@ -2192,6 +2271,8 @@ struct rtw89_chip_info { const struct rtw89_hfc_param_ini *hfc_param_ini; const struct rtw89_dle_mem *dle_mem; u32 rf_base_addr[2]; + u8 support_bands; + bool support_bw160; u8 rf_path_num; u8 tx_nss; u8 rx_nss; @@ -2203,6 +2284,8 @@ struct rtw89_chip_info { u32 physical_efuse_size; u32 logical_efuse_size; u32 limit_efuse_size; + u32 dav_phy_efuse_size; + u32 dav_log_efuse_size; u32 phycap_addr; u32 phycap_size; @@ -2219,10 +2302,15 @@ struct rtw89_chip_info { const s8 (*txpwr_lmt_5g)[RTW89_5G_BW_NUM][RTW89_NTX_NUM] [RTW89_RS_LMT_NUM][RTW89_BF_NUM] [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; + const s8 (*txpwr_lmt_6g)[RTW89_6G_BW_NUM][RTW89_NTX_NUM] + [RTW89_RS_LMT_NUM][RTW89_BF_NUM] + [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; const s8 (*txpwr_lmt_ru_2g)[RTW89_RU_NUM][RTW89_NTX_NUM] [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; const s8 (*txpwr_lmt_ru_5g)[RTW89_RU_NUM][RTW89_NTX_NUM] [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; + const s8 (*txpwr_lmt_ru_6g)[RTW89_RU_NUM][RTW89_NTX_NUM] + [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; u8 txpwr_factor_rf; u8 txpwr_factor_mac; @@ -2245,6 +2333,24 @@ struct rtw89_chip_info { u8 rf_para_dlink_num; const struct rtw89_btc_rf_trx_para *rf_para_dlink; u8 ps_mode_supported; + + u32 hci_func_en_addr; + u32 h2c_ctrl_reg; + const u32 *h2c_regs; + u32 c2h_ctrl_reg; + const u32 *c2h_regs; + const struct rtw89_page_regs *page_regs; + const struct rtw89_reg_def *dcfo_comp; + u8 dcfo_comp_sft; +}; + +union rtw89_bus_info { + const struct rtw89_pci_info *pci; +}; + +struct rtw89_driver_info { + const struct rtw89_chip_info *chip; + union rtw89_bus_info bus; }; enum rtw89_hcifc_mode { @@ -2312,6 +2418,8 @@ struct rtw89_fw_info { struct rtw89_fw_suit wowlan; bool fw_log_enable; bool old_ht_ra_format; + bool scan_offload; + bool tx_wake; }; struct rtw89_cam_info { @@ -2348,19 +2456,23 @@ struct rtw89_hal { u32 rx_fltr; u8 cv; u8 current_channel; + u32 current_freq; u8 prev_primary_channel; u8 current_primary_channel; enum rtw89_subband current_subband; u8 current_band_width; + u8 prev_band_type; u8 current_band_type; u32 sw_amsdu_max_size; u32 antenna_tx; u32 antenna_rx; u8 tx_nss; u8 rx_nss; + bool support_cckpd; }; #define RTW89_MAX_MAC_ID_NUM 128 +#define RTW89_MAX_PKT_OFLD_NUM 255 enum rtw89_flags { RTW89_FLAG_POWERON, @@ -2556,22 +2668,30 @@ struct rtw89_cfo_tracking_info { s32 residual_cfo_acc; u8 phy_cfotrk_state; u8 phy_cfotrk_cnt; + bool divergence_lock_en; + u8 x_cap_lb; + u8 x_cap_ub; + u8 lock_cnt; }; /* 2GL, 2GH, 5GL1, 5GH1, 5GM1, 5GM2, 5GH1, 5GH2 */ #define TSSI_TRIM_CH_GROUP_NUM 8 +#define TSSI_TRIM_CH_GROUP_NUM_6G 16 #define TSSI_CCK_CH_GROUP_NUM 6 #define TSSI_MCS_2G_CH_GROUP_NUM 5 #define TSSI_MCS_5G_CH_GROUP_NUM 14 +#define TSSI_MCS_6G_CH_GROUP_NUM 32 #define TSSI_MCS_CH_GROUP_NUM \ (TSSI_MCS_2G_CH_GROUP_NUM + TSSI_MCS_5G_CH_GROUP_NUM) struct rtw89_tssi_info { u8 thermal[RF_PATH_MAX]; s8 tssi_trim[RF_PATH_MAX][TSSI_TRIM_CH_GROUP_NUM]; + s8 tssi_trim_6g[RF_PATH_MAX][TSSI_TRIM_CH_GROUP_NUM_6G]; s8 tssi_cck[RF_PATH_MAX][TSSI_CCK_CH_GROUP_NUM]; s8 tssi_mcs[RF_PATH_MAX][TSSI_MCS_CH_GROUP_NUM]; + s8 tssi_6g_mcs[RF_PATH_MAX][TSSI_MCS_6G_CH_GROUP_NUM]; s8 extra_ofst[RF_PATH_MAX]; bool tssi_tracking_check[RF_PATH_MAX]; u8 default_txagc_offset[RF_PATH_MAX]; @@ -2769,12 +2889,23 @@ struct rtw89_early_h2c { u16 h2c_len; }; +struct rtw89_hw_scan_info { + struct ieee80211_vif *scanning_vif; + struct list_head pkt_list[NUM_NL80211_BANDS]; + u8 op_pri_ch; + u8 op_chan; + u8 op_bw; + u8 op_band; +}; + struct rtw89_dev { struct ieee80211_hw *hw; struct device *dev; bool dbcc_en; + struct rtw89_hw_scan_info scan_info; const struct rtw89_chip_info *chip; + const struct rtw89_pci_info *pci_info; struct rtw89_hal hal; struct rtw89_mac_info mac; struct rtw89_fw_info fw; @@ -2795,19 +2926,23 @@ struct rtw89_dev { /* txqs to setup ba session */ struct list_head ba_list; struct work_struct ba_work; + /* used to protect rpwm */ + spinlock_t rpwm_lock; struct rtw89_cam_info cam_info; struct sk_buff_head c2h_queue; struct work_struct c2h_work; + struct work_struct ips_work; struct list_head early_h2c_list; struct rtw89_ser ser; - DECLARE_BITMAP(hw_port, RTW89_MAX_HW_PORT_NUM); + DECLARE_BITMAP(hw_port, RTW89_PORT_NUM); DECLARE_BITMAP(mac_id_map, RTW89_MAX_MAC_ID_NUM); DECLARE_BITMAP(flags, NUM_OF_RTW89_FLAGS); + DECLARE_BITMAP(pkt_offload, RTW89_MAX_PKT_OFLD_NUM); struct rtw89_phy_stat phystat; struct rtw89_dack_info dack; @@ -2847,7 +2982,7 @@ struct rtw89_dev { int napi_budget_countdown; /* HCI related data, keep last */ - u8 priv[0] __aligned(sizeof(void *)); + u8 priv[] __aligned(sizeof(void *)); }; static inline int rtw89_hci_tx_write(struct rtw89_dev *rtwdev, @@ -3128,6 +3263,46 @@ static inline struct rtw89_sta *sta_to_rtwsta_safe(struct ieee80211_sta *sta) return sta ? (struct rtw89_sta *)sta->drv_priv : NULL; } +static inline u8 rtw89_hw_to_rate_info_bw(enum rtw89_bandwidth hw_bw) +{ + if (hw_bw == RTW89_CHANNEL_WIDTH_160) + return RATE_INFO_BW_160; + else if (hw_bw == RTW89_CHANNEL_WIDTH_80) + return RATE_INFO_BW_80; + else if (hw_bw == RTW89_CHANNEL_WIDTH_40) + return RATE_INFO_BW_40; + else + return RATE_INFO_BW_20; +} + +static inline +enum rtw89_bandwidth nl_to_rtw89_bandwidth(enum nl80211_chan_width width) +{ + switch (width) { + default: + WARN(1, "Not support bandwidth %d\n", width); + fallthrough; + case NL80211_CHAN_WIDTH_20_NOHT: + case NL80211_CHAN_WIDTH_20: + return RTW89_CHANNEL_WIDTH_20; + case NL80211_CHAN_WIDTH_40: + return RTW89_CHANNEL_WIDTH_40; + case NL80211_CHAN_WIDTH_80: + return RTW89_CHANNEL_WIDTH_80; + case NL80211_CHAN_WIDTH_160: + return RTW89_CHANNEL_WIDTH_160; + } +} + +static inline +struct rtw89_addr_cam_entry *rtw89_get_addr_cam_of(struct rtw89_vif *rtwvif, + struct rtw89_sta *rtwsta) +{ + if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE && rtwsta) + return &rtwsta->addr_cam; + return &rtwvif->addr_cam; +} + static inline void rtw89_chip_set_channel_prepare(struct rtw89_dev *rtwdev, struct rtw89_channel_help_params *p) @@ -3298,6 +3473,39 @@ static inline void rtw89_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) chip->ops->ctrl_btg(rtwdev, btg); } +static inline +void rtw89_chip_mac_cfg_gnt(struct rtw89_dev *rtwdev, + const struct rtw89_mac_ax_coex_gnt *gnt_cfg) +{ + const struct rtw89_chip_info *chip = rtwdev->chip; + + chip->ops->mac_cfg_gnt(rtwdev, gnt_cfg); +} + +static inline void rtw89_chip_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl) +{ + const struct rtw89_chip_info *chip = rtwdev->chip; + + chip->ops->cfg_ctrl_path(rtwdev, wl); +} + +static inline +int rtw89_chip_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, + u32 *tx_en, enum rtw89_sch_tx_sel sel) +{ + const struct rtw89_chip_info *chip = rtwdev->chip; + + return chip->ops->stop_sch_tx(rtwdev, mac_idx, tx_en, sel); +} + +static inline +int rtw89_chip_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en) +{ + const struct rtw89_chip_info *chip = rtwdev->chip; + + return chip->ops->resume_sch_tx(rtwdev, mac_idx, tx_en); +} + static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr) { __le16 fc = hdr->frame_control; @@ -3371,6 +3579,8 @@ void rtw89_set_channel(struct rtw89_dev *rtwdev); u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size); void rtw89_core_release_bit_map(unsigned long *addr, u8 bit); void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits); +int rtw89_core_acquire_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx); +int rtw89_core_release_sta_ba_entry(struct rtw89_sta *rtwsta, u8 tid, u8 *cam_idx); void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc); int rtw89_chip_info_setup(struct rtw89_dev *rtwdev); u16 rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate); @@ -3381,5 +3591,10 @@ void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev, struct rtw89_traffic_stats *stats); int rtw89_core_start(struct rtw89_dev *rtwdev); void rtw89_core_stop(struct rtw89_dev *rtwdev); +void rtw89_core_update_beacon_work(struct work_struct *work); +void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, + const u8 *mac_addr, bool hw_scan); +void rtw89_core_scan_complete(struct rtw89_dev *rtwdev, + struct ieee80211_vif *vif, bool hw_scan); #endif diff --git a/drivers/net/wireless/realtek/rtw89/debug.c b/drivers/net/wireless/realtek/rtw89/debug.c index 22bd1d03e722..b73cc03cecfd 100644 --- a/drivers/net/wireless/realtek/rtw89/debug.c +++ b/drivers/net/wireless/realtek/rtw89/debug.c @@ -2324,16 +2324,17 @@ rtw89_debug_append_rx_rate(struct seq_file *m, struct rtw89_pkt_stat *pkt_stat, static const struct rtw89_rx_rate_cnt_info { enum rtw89_hw_rate first_rate; int len; + int ext; const char *rate_mode; } rtw89_rx_rate_cnt_infos[] = { - {RTW89_HW_RATE_CCK1, 4, "Legacy:"}, - {RTW89_HW_RATE_OFDM6, 8, "OFDM:"}, - {RTW89_HW_RATE_MCS0, 8, "HT 0:"}, - {RTW89_HW_RATE_MCS8, 8, "HT 1:"}, - {RTW89_HW_RATE_VHT_NSS1_MCS0, 10, "VHT 1SS:"}, - {RTW89_HW_RATE_VHT_NSS2_MCS0, 10, "VHT 2SS:"}, - {RTW89_HW_RATE_HE_NSS1_MCS0, 12, "HE 1SS:"}, - {RTW89_HW_RATE_HE_NSS2_MCS0, 12, "HE 2ss:"}, + {RTW89_HW_RATE_CCK1, 4, 0, "Legacy:"}, + {RTW89_HW_RATE_OFDM6, 8, 0, "OFDM:"}, + {RTW89_HW_RATE_MCS0, 8, 0, "HT 0:"}, + {RTW89_HW_RATE_MCS8, 8, 0, "HT 1:"}, + {RTW89_HW_RATE_VHT_NSS1_MCS0, 10, 2, "VHT 1SS:"}, + {RTW89_HW_RATE_VHT_NSS2_MCS0, 10, 2, "VHT 2SS:"}, + {RTW89_HW_RATE_HE_NSS1_MCS0, 12, 0, "HE 1SS:"}, + {RTW89_HW_RATE_HE_NSS2_MCS0, 12, 0, "HE 2ss:"}, }; static int rtw89_debug_priv_phy_info_get(struct seq_file *m, void *v) @@ -2358,6 +2359,11 @@ static int rtw89_debug_priv_phy_info_get(struct seq_file *m, void *v) seq_printf(m, "%10s [", info->rate_mode); rtw89_debug_append_rx_rate(m, pkt_stat, info->first_rate, info->len); + if (info->ext) { + seq_puts(m, "]["); + rtw89_debug_append_rx_rate(m, pkt_stat, + info->first_rate + info->len, info->ext); + } seq_puts(m, "]\n"); } @@ -2366,6 +2372,72 @@ static int rtw89_debug_priv_phy_info_get(struct seq_file *m, void *v) return 0; } +static void rtw89_dump_addr_cam(struct seq_file *m, + struct rtw89_addr_cam_entry *addr_cam) +{ + struct rtw89_sec_cam_entry *sec_entry; + int i; + + seq_printf(m, "\taddr_cam_idx=%u\n", addr_cam->addr_cam_idx); + seq_printf(m, "\t-> bssid_cam_idx=%u\n", addr_cam->bssid_cam_idx); + seq_printf(m, "\tsec_cam_bitmap=%*ph\n", (int)sizeof(addr_cam->sec_cam_map), + addr_cam->sec_cam_map); + for (i = 0; i < RTW89_SEC_CAM_IN_ADDR_CAM; i++) { + sec_entry = addr_cam->sec_entries[i]; + if (!sec_entry) + continue; + seq_printf(m, "\tsec[%d]: sec_cam_idx %u", i, sec_entry->sec_cam_idx); + if (sec_entry->ext_key) + seq_printf(m, ", %u", sec_entry->sec_cam_idx + 1); + seq_puts(m, "\n"); + } +} + +static +void rtw89_vif_ids_get_iter(void *data, u8 *mac, struct ieee80211_vif *vif) +{ + struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; + struct seq_file *m = (struct seq_file *)data; + struct rtw89_bssid_cam_entry *bssid_cam = &rtwvif->bssid_cam; + + seq_printf(m, "VIF [%d] %pM\n", rtwvif->mac_id, rtwvif->mac_addr); + seq_printf(m, "\tbssid_cam_idx=%u\n", bssid_cam->bssid_cam_idx); + rtw89_dump_addr_cam(m, &rtwvif->addr_cam); +} + +static void rtw89_sta_ids_get_iter(void *data, struct ieee80211_sta *sta) +{ + struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; + struct seq_file *m = (struct seq_file *)data; + + seq_printf(m, "STA [%d] %pM\n", rtwsta->mac_id, sta->addr); + rtw89_dump_addr_cam(m, &rtwsta->addr_cam); +} + +static int rtw89_debug_priv_stations_get(struct seq_file *m, void *v) +{ + struct rtw89_debugfs_priv *debugfs_priv = m->private; + struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; + struct rtw89_cam_info *cam_info = &rtwdev->cam_info; + + seq_puts(m, "map:\n"); + seq_printf(m, "\tmac_id: %*ph\n", (int)sizeof(rtwdev->mac_id_map), + rtwdev->mac_id_map); + seq_printf(m, "\taddr_cam: %*ph\n", (int)sizeof(cam_info->addr_cam_map), + cam_info->addr_cam_map); + seq_printf(m, "\tbssid_cam: %*ph\n", (int)sizeof(cam_info->bssid_cam_map), + cam_info->bssid_cam_map); + seq_printf(m, "\tsec_cam: %*ph\n", (int)sizeof(cam_info->sec_cam_map), + cam_info->sec_cam_map); + + ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, + IEEE80211_IFACE_ITER_NORMAL, rtw89_vif_ids_get_iter, m); + + ieee80211_iterate_stations_atomic(rtwdev->hw, rtw89_sta_ids_get_iter, m); + + return 0; +} + static struct rtw89_debugfs_priv rtw89_debug_priv_read_reg = { .cb_read = rtw89_debug_priv_read_reg_get, .cb_write = rtw89_debug_priv_read_reg_select, @@ -2432,6 +2504,10 @@ static struct rtw89_debugfs_priv rtw89_debug_priv_phy_info = { .cb_read = rtw89_debug_priv_phy_info_get, }; +static struct rtw89_debugfs_priv rtw89_debug_priv_stations = { + .cb_read = rtw89_debug_priv_stations_get, +}; + #define rtw89_debugfs_add(name, mode, fopname, parent) \ do { \ rtw89_debug_priv_ ##name.rtwdev = rtwdev; \ @@ -2470,6 +2546,7 @@ void rtw89_debugfs_init(struct rtw89_dev *rtwdev) rtw89_debugfs_add_w(btc_manual); rtw89_debugfs_add_w(fw_log_manual); rtw89_debugfs_add_r(phy_info); + rtw89_debugfs_add_r(stations); } #endif diff --git a/drivers/net/wireless/realtek/rtw89/debug.h b/drivers/net/wireless/realtek/rtw89/debug.h index f14b726c1a9f..1745815f5e00 100644 --- a/drivers/net/wireless/realtek/rtw89/debug.h +++ b/drivers/net/wireless/realtek/rtw89/debug.h @@ -23,6 +23,7 @@ enum rtw89_debug_mask { RTW89_DBG_FW = BIT(12), RTW89_DBG_BTC = BIT(13), RTW89_DBG_BF = BIT(14), + RTW89_DBG_HW_SCAN = BIT(15), }; enum rtw89_debug_mac_reg_sel { diff --git a/drivers/net/wireless/realtek/rtw89/efuse.c b/drivers/net/wireless/realtek/rtw89/efuse.c index c0b80f3da56c..7bd4f8558e03 100644 --- a/drivers/net/wireless/realtek/rtw89/efuse.c +++ b/drivers/net/wireless/realtek/rtw89/efuse.c @@ -4,6 +4,7 @@ #include "debug.h" #include "efuse.h" +#include "mac.h" #include "reg.h" enum rtw89_efuse_bank { @@ -16,6 +17,9 @@ static int rtw89_switch_efuse_bank(struct rtw89_dev *rtwdev, { u8 val; + if (rtwdev->chip->chip_id != RTL8852A) + return 0; + val = rtw89_read32_mask(rtwdev, R_AX_EFUSE_CTRL_1, B_AX_EF_CELL_SEL_MASK); if (bank == val) @@ -32,14 +36,61 @@ static int rtw89_switch_efuse_bank(struct rtw89_dev *rtwdev, return -EBUSY; } -static int rtw89_dump_physical_efuse_map(struct rtw89_dev *rtwdev, u8 *map, - u32 dump_addr, u32 dump_size) +static void rtw89_enable_otp_burst_mode(struct rtw89_dev *rtwdev, bool en) +{ + if (en) + rtw89_write32_set(rtwdev, R_AX_EFUSE_CTRL_1_V1, B_AX_EF_BURST); + else + rtw89_write32_clr(rtwdev, R_AX_EFUSE_CTRL_1_V1, B_AX_EF_BURST); +} + +static void rtw89_enable_efuse_pwr_cut_ddv(struct rtw89_dev *rtwdev) +{ + enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; + struct rtw89_hal *hal = &rtwdev->hal; + + if (chip_id == RTL8852A) + return; + + rtw89_write8_set(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); + rtw89_write16_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14); + + fsleep(1000); + + rtw89_write16_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B15); + rtw89_write16_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_ISO_EB2CORE); + if (chip_id == RTL8852B && hal->cv == CHIP_CAV) + rtw89_enable_otp_burst_mode(rtwdev, true); +} + +static void rtw89_disable_efuse_pwr_cut_ddv(struct rtw89_dev *rtwdev) +{ + enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; + struct rtw89_hal *hal = &rtwdev->hal; + + if (chip_id == RTL8852A) + return; + + if (chip_id == RTL8852B && hal->cv == CHIP_CAV) + rtw89_enable_otp_burst_mode(rtwdev, false); + + rtw89_write16_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_ISO_EB2CORE); + rtw89_write16_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B15); + + fsleep(1000); + + rtw89_write16_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14); + rtw89_write8_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); +} + +static int rtw89_dump_physical_efuse_map_ddv(struct rtw89_dev *rtwdev, u8 *map, + u32 dump_addr, u32 dump_size) { u32 efuse_ctl; u32 addr; int ret; - rtw89_switch_efuse_bank(rtwdev, RTW89_EFUSE_BANK_WIFI); + rtw89_enable_efuse_pwr_cut_ddv(rtwdev); for (addr = dump_addr; addr < dump_addr + dump_size; addr++) { efuse_ctl = u32_encode_bits(addr, B_AX_EF_ADDR_MASK); @@ -54,6 +105,74 @@ static int rtw89_dump_physical_efuse_map(struct rtw89_dev *rtwdev, u8 *map, *map++ = (u8)(efuse_ctl & 0xff); } + rtw89_disable_efuse_pwr_cut_ddv(rtwdev); + + return 0; +} + +static int rtw89_dump_physical_efuse_map_dav(struct rtw89_dev *rtwdev, u8 *map, + u32 dump_addr, u32 dump_size) +{ + u32 addr; + u8 val8; + int err; + int ret; + + for (addr = dump_addr; addr < dump_addr + dump_size; addr++) { + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_CTRL, 0x40, FULL_BIT_MASK); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_LOW_ADDR, + addr & 0xff, XTAL_SI_LOW_ADDR_MASK); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_CTRL, addr >> 8, + XTAL_SI_HIGH_ADDR_MASK); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_CTRL, 0, + XTAL_SI_MODE_SEL_MASK); + if (ret) + return ret; + + ret = read_poll_timeout_atomic(rtw89_mac_read_xtal_si, err, + !err && (val8 & XTAL_SI_RDY), + 1, 10000, false, + rtwdev, XTAL_SI_CTRL, &val8); + if (ret) { + rtw89_warn(rtwdev, "failed to read dav efuse\n"); + return ret; + } + + ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_READ_VAL, &val8); + if (ret) + return ret; + *map++ = val8; + } + + return 0; +} + +static int rtw89_dump_physical_efuse_map(struct rtw89_dev *rtwdev, u8 *map, + u32 dump_addr, u32 dump_size, bool dav) +{ + int ret; + + if (!map || dump_size == 0) + return 0; + + rtw89_switch_efuse_bank(rtwdev, RTW89_EFUSE_BANK_WIFI); + + if (dav) { + ret = rtw89_dump_physical_efuse_map_dav(rtwdev, map, dump_addr, dump_size); + if (ret) + return ret; + } else { + ret = rtw89_dump_physical_efuse_map_ddv(rtwdev, map, dump_addr, dump_size); + if (ret) + return ret; + } + return 0; } @@ -78,6 +197,9 @@ static int rtw89_dump_logical_efuse_map(struct rtw89_dev *rtwdev, u8 *phy_map, u8 word_en; int i; + if (!phy_map) + return 0; + while (phy_idx < physical_size - sec_ctrl_size) { hdr1 = phy_map[phy_idx]; hdr2 = phy_map[phy_idx + 1]; @@ -109,8 +231,13 @@ int rtw89_parse_efuse_map(struct rtw89_dev *rtwdev) { u32 phy_size = rtwdev->chip->physical_efuse_size; u32 log_size = rtwdev->chip->logical_efuse_size; + u32 dav_phy_size = rtwdev->chip->dav_phy_efuse_size; + u32 dav_log_size = rtwdev->chip->dav_log_efuse_size; + u32 full_log_size = log_size + dav_log_size; u8 *phy_map = NULL; u8 *log_map = NULL; + u8 *dav_phy_map = NULL; + u8 *dav_log_map = NULL; int ret; if (rtw89_read16(rtwdev, R_AX_SYS_WL_EFUSE_CTRL) & B_AX_AUTOLOAD_SUS) @@ -119,27 +246,41 @@ int rtw89_parse_efuse_map(struct rtw89_dev *rtwdev) rtw89_warn(rtwdev, "failed to check efuse autoload\n"); phy_map = kmalloc(phy_size, GFP_KERNEL); - log_map = kmalloc(log_size, GFP_KERNEL); + log_map = kmalloc(full_log_size, GFP_KERNEL); + if (dav_phy_size && dav_log_size) { + dav_phy_map = kmalloc(dav_phy_size, GFP_KERNEL); + dav_log_map = log_map + log_size; + } - if (!phy_map || !log_map) { + if (!phy_map || !log_map || (dav_phy_size && !dav_phy_map)) { ret = -ENOMEM; goto out_free; } - ret = rtw89_dump_physical_efuse_map(rtwdev, phy_map, 0, phy_size); + ret = rtw89_dump_physical_efuse_map(rtwdev, phy_map, 0, phy_size, false); if (ret) { rtw89_warn(rtwdev, "failed to dump efuse physical map\n"); goto out_free; } + ret = rtw89_dump_physical_efuse_map(rtwdev, dav_phy_map, 0, dav_phy_size, true); + if (ret) { + rtw89_warn(rtwdev, "failed to dump efuse dav physical map\n"); + goto out_free; + } - memset(log_map, 0xff, log_size); + memset(log_map, 0xff, full_log_size); ret = rtw89_dump_logical_efuse_map(rtwdev, phy_map, log_map); if (ret) { rtw89_warn(rtwdev, "failed to dump efuse logical map\n"); goto out_free; } + ret = rtw89_dump_logical_efuse_map(rtwdev, dav_phy_map, dav_log_map); + if (ret) { + rtw89_warn(rtwdev, "failed to dump efuse dav logical map\n"); + goto out_free; + } - rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "log_map: ", log_map, log_size); + rtw89_hex_dump(rtwdev, RTW89_DBG_FW, "log_map: ", log_map, full_log_size); ret = rtwdev->chip->ops->read_efuse(rtwdev, log_map); if (ret) { @@ -148,6 +289,7 @@ int rtw89_parse_efuse_map(struct rtw89_dev *rtwdev) } out_free: + kfree(dav_phy_map); kfree(log_map); kfree(phy_map); @@ -169,7 +311,7 @@ int rtw89_parse_phycap_map(struct rtw89_dev *rtwdev) return -ENOMEM; ret = rtw89_dump_physical_efuse_map(rtwdev, phycap_map, - phycap_addr, phycap_size); + phycap_addr, phycap_size, false); if (ret) { rtw89_warn(rtwdev, "failed to dump phycap map\n"); goto out_free; diff --git a/drivers/net/wireless/realtek/rtw89/fw.c b/drivers/net/wireless/realtek/rtw89/fw.c index 8a57b75b07c0..6deaf8eec6b4 100644 --- a/drivers/net/wireless/realtek/rtw89/fw.c +++ b/drivers/net/wireless/realtek/rtw89/fw.c @@ -201,6 +201,14 @@ static void rtw89_fw_recognize_features(struct rtw89_dev *rtwdev) if (chip->chip_id == RTL8852A && RTW89_FW_SUIT_VER_CODE(fw_suit) <= RTW89_FW_VER_CODE(0, 13, 29, 0)) rtwdev->fw.old_ht_ra_format = true; + + if (chip->chip_id == RTL8852A && + RTW89_FW_SUIT_VER_CODE(fw_suit) >= RTW89_FW_VER_CODE(0, 13, 35, 0)) + rtwdev->fw.scan_offload = true; + + if (chip->chip_id == RTL8852A && + RTW89_FW_SUIT_VER_CODE(fw_suit) >= RTW89_FW_VER_CODE(0, 13, 35, 0)) + rtwdev->fw.tx_wake = true; } int rtw89_fw_recognize(struct rtw89_dev *rtwdev) @@ -555,11 +563,27 @@ fail: return -EBUSY; } -#define H2C_BA_CAM_LEN 4 -int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, bool valid, u8 macid, - struct ieee80211_ampdu_params *params) +#define H2C_BA_CAM_LEN 8 +int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, + bool valid, struct ieee80211_ampdu_params *params) { + u8 macid = rtwsta->mac_id; struct sk_buff *skb; + u8 entry_idx; + int ret; + + ret = valid ? + rtw89_core_acquire_sta_ba_entry(rtwsta, params->tid, &entry_idx) : + rtw89_core_release_sta_ba_entry(rtwsta, params->tid, &entry_idx); + if (ret) { + /* it still works even if we don't have static BA CAM, because + * hardware can create dynamic BA CAM automatically. + */ + rtw89_debug(rtwdev, RTW89_DBG_TXRX, + "failed to %s entry tid=%d for h2c ba cam\n", + valid ? "alloc" : "free", params->tid); + return 0; + } skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_BA_CAM_LEN); if (!skb) { @@ -568,6 +592,7 @@ int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, bool valid, u8 macid, } skb_put(skb, H2C_BA_CAM_LEN); SET_BA_CAM_MACID(skb->data, macid); + SET_BA_CAM_ENTRY_IDX(skb->data, entry_idx); if (!valid) goto end; SET_BA_CAM_VALID(skb->data, valid); @@ -577,7 +602,7 @@ int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, bool valid, u8 macid, else SET_BA_CAM_BMAP_SIZE(skb->data, 0); /* If init req is set, hw will set the ssn */ - SET_BA_CAM_INIT_REQ(skb->data, 0); + SET_BA_CAM_INIT_REQ(skb->data, 1); SET_BA_CAM_SSN(skb->data, params->ssn); end: @@ -716,12 +741,14 @@ fail: } #define H2C_CMC_TBL_LEN 68 -int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev, u8 macid) +int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif) { struct rtw89_hal *hal = &rtwdev->hal; struct sk_buff *skb; u8 ntx_path = hal->antenna_tx ? hal->antenna_tx : RF_B; u8 map_b = hal->antenna_tx == RF_AB ? 1 : 0; + u8 macid = rtwvif->mac_id; skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN); if (!skb) { @@ -743,6 +770,8 @@ int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev, u8 macid) SET_CMC_TBL_ANTSEL_D(skb->data, 0); SET_CMC_TBL_DOPPLER_CTRL(skb->data, 0); SET_CMC_TBL_TXPWR_TOLERENCE(skb->data, 0); + if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) + SET_CMC_TBL_DATA_DCM(skb->data, 0); rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, @@ -821,13 +850,15 @@ int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta) { struct rtw89_hal *hal = &rtwdev->hal; - struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; + struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta); struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; struct sk_buff *skb; u8 pads[RTW89_PPE_BW_NUM]; + u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id; memset(pads, 0, sizeof(pads)); - __get_sta_he_pkt_padding(rtwdev, sta, pads); + if (sta) + __get_sta_he_pkt_padding(rtwdev, sta, pads); skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_CMC_TBL_LEN); if (!skb) { @@ -835,7 +866,7 @@ int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev, return -ENOMEM; } skb_put(skb, H2C_CMC_TBL_LEN); - SET_CTRL_INFO_MACID(skb->data, rtwsta->mac_id); + SET_CTRL_INFO_MACID(skb->data, mac_id); SET_CTRL_INFO_OPERATION(skb->data, 1); SET_CMC_TBL_DISRTSFB(skb->data, 1); SET_CMC_TBL_DISDATAFB(skb->data, 1); @@ -853,7 +884,10 @@ int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev, SET_CMC_TBL_NOMINAL_PKT_PADDING(skb->data, pads[RTW89_CHANNEL_WIDTH_20]); SET_CMC_TBL_NOMINAL_PKT_PADDING40(skb->data, pads[RTW89_CHANNEL_WIDTH_40]); SET_CMC_TBL_NOMINAL_PKT_PADDING80(skb->data, pads[RTW89_CHANNEL_WIDTH_80]); - SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(skb->data, sta->he_cap.has_he); + if (sta) + SET_CMC_TBL_BSR_QUEUE_SIZE_FORMAT(skb->data, sta->he_cap.has_he); + if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) + SET_CMC_TBL_DATA_DCM(skb->data, 0); rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, @@ -911,28 +945,93 @@ fail: return -EBUSY; } -#define H2C_VIF_MAINTAIN_LEN 4 -int rtw89_fw_h2c_vif_maintain(struct rtw89_dev *rtwdev, - struct rtw89_vif *rtwvif, - enum rtw89_upd_mode upd_mode) +#define H2C_BCN_BASE_LEN 12 +int rtw89_fw_h2c_update_beacon(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif) { + struct rtw89_hal *hal = &rtwdev->hal; + struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); struct sk_buff *skb; + struct sk_buff *skb_beacon; + u16 tim_offset; + int bcn_total_len; + + skb_beacon = ieee80211_beacon_get_tim(rtwdev->hw, vif, &tim_offset, NULL); + if (!skb_beacon) { + rtw89_err(rtwdev, "failed to get beacon skb\n"); + return -ENOMEM; + } - skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_VIF_MAINTAIN_LEN); + bcn_total_len = H2C_BCN_BASE_LEN + skb_beacon->len; + skb = rtw89_fw_h2c_alloc_skb_with_hdr(bcn_total_len); + if (!skb) { + rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); + dev_kfree_skb_any(skb_beacon); + return -ENOMEM; + } + skb_put(skb, H2C_BCN_BASE_LEN); + + SET_BCN_UPD_PORT(skb->data, rtwvif->port); + SET_BCN_UPD_MBSSID(skb->data, 0); + SET_BCN_UPD_BAND(skb->data, rtwvif->mac_idx); + SET_BCN_UPD_GRP_IE_OFST(skb->data, tim_offset); + SET_BCN_UPD_MACID(skb->data, rtwvif->mac_id); + SET_BCN_UPD_SSN_SEL(skb->data, RTW89_MGMT_HW_SSN_SEL); + SET_BCN_UPD_SSN_MODE(skb->data, RTW89_MGMT_HW_SEQ_MODE); + SET_BCN_UPD_RATE(skb->data, hal->current_band_type == RTW89_BAND_2G ? + RTW89_HW_RATE_CCK1 : RTW89_HW_RATE_OFDM6); + + skb_put_data(skb, skb_beacon->data, skb_beacon->len); + dev_kfree_skb_any(skb_beacon); + + rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, + H2C_CAT_MAC, H2C_CL_MAC_FR_EXCHG, + H2C_FUNC_MAC_BCN_UPD, 0, 1, + bcn_total_len); + + if (rtw89_h2c_tx(rtwdev, skb, false)) { + rtw89_err(rtwdev, "failed to send h2c\n"); + dev_kfree_skb_any(skb); + return -EBUSY; + } + + return 0; +} + +#define H2C_ROLE_MAINTAIN_LEN 4 +int rtw89_fw_h2c_role_maintain(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif, + struct rtw89_sta *rtwsta, + enum rtw89_upd_mode upd_mode) +{ + struct sk_buff *skb; + u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id; + u8 self_role; + + if (rtwvif->net_type == RTW89_NET_TYPE_AP_MODE) { + if (rtwsta) + self_role = RTW89_SELF_ROLE_AP_CLIENT; + else + self_role = rtwvif->self_role; + } else { + self_role = rtwvif->self_role; + } + + skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_ROLE_MAINTAIN_LEN); if (!skb) { rtw89_err(rtwdev, "failed to alloc skb for h2c join\n"); return -ENOMEM; } - skb_put(skb, H2C_VIF_MAINTAIN_LEN); - SET_FWROLE_MAINTAIN_MACID(skb->data, rtwvif->mac_id); - SET_FWROLE_MAINTAIN_SELF_ROLE(skb->data, rtwvif->self_role); + skb_put(skb, H2C_ROLE_MAINTAIN_LEN); + SET_FWROLE_MAINTAIN_MACID(skb->data, mac_id); + SET_FWROLE_MAINTAIN_SELF_ROLE(skb->data, self_role); SET_FWROLE_MAINTAIN_UPD_MODE(skb->data, upd_mode); SET_FWROLE_MAINTAIN_WIFI_ROLE(skb->data, rtwvif->wifi_role); rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT, H2C_FUNC_MAC_FWROLE_MAINTAIN, 0, 1, - H2C_VIF_MAINTAIN_LEN); + H2C_ROLE_MAINTAIN_LEN); if (rtw89_h2c_tx(rtwdev, skb, false)) { rtw89_err(rtwdev, "failed to send h2c\n"); @@ -948,9 +1047,17 @@ fail: #define H2C_JOIN_INFO_LEN 4 int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, - u8 dis_conn) + struct rtw89_sta *rtwsta, bool dis_conn) { struct sk_buff *skb; + u8 mac_id = rtwsta ? rtwsta->mac_id : rtwvif->mac_id; + u8 self_role = rtwvif->self_role; + u8 net_type = rtwvif->net_type; + + if (net_type == RTW89_NET_TYPE_AP_MODE && rtwsta) { + self_role = RTW89_SELF_ROLE_AP_CLIENT; + net_type = dis_conn ? RTW89_NET_TYPE_NO_LINK : net_type; + } skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_JOIN_INFO_LEN); if (!skb) { @@ -958,7 +1065,7 @@ int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, return -ENOMEM; } skb_put(skb, H2C_JOIN_INFO_LEN); - SET_JOININFO_MACID(skb->data, rtwvif->mac_id); + SET_JOININFO_MACID(skb->data, mac_id); SET_JOININFO_OP(skb->data, dis_conn); SET_JOININFO_BAND(skb->data, rtwvif->mac_idx); SET_JOININFO_WMM(skb->data, rtwvif->wmm); @@ -968,9 +1075,9 @@ int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, SET_JOININFO_TF_MAC_PAD(skb->data, 0); SET_JOININFO_DL_T_PE(skb->data, 0); SET_JOININFO_PORT_ID(skb->data, rtwvif->port); - SET_JOININFO_NET_TYPE(skb->data, rtwvif->net_type); + SET_JOININFO_NET_TYPE(skb->data, net_type); SET_JOININFO_WIFI_ROLE(skb->data, rtwvif->wifi_role); - SET_JOININFO_SELF_ROLE(skb->data, rtwvif->self_role); + SET_JOININFO_SELF_ROLE(skb->data, self_role); rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, H2C_CAT_MAC, H2C_CL_MAC_MEDIA_RPT, @@ -1212,7 +1319,7 @@ fail: return -EBUSY; } -#define H2C_LEN_CXDRVINFO_ROLE (4 + 12 * RTW89_MAX_HW_PORT_NUM + H2C_LEN_CXDRVHDR) +#define H2C_LEN_CXDRVINFO_ROLE (4 + 12 * RTW89_PORT_NUM + H2C_LEN_CXDRVHDR) int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev) { struct rtw89_btc *btc = &rtwdev->btc; @@ -1251,7 +1358,7 @@ int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev) RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go); RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan); - for (i = 0; i < RTW89_MAX_HW_PORT_NUM; i++, active++) { + for (i = 0; i < RTW89_PORT_NUM; i++, active++) { RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED(cmd, active->connected, i); RTW89_SET_FWCMD_CXROLE_ACT_PID(cmd, active->pid, i); RTW89_SET_FWCMD_CXROLE_ACT_PHY(cmd, active->phy, i); @@ -1368,6 +1475,198 @@ fail: return -EBUSY; } +#define H2C_LEN_PKT_OFLD 4 +int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id) +{ + struct sk_buff *skb; + u8 *cmd; + + skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_PKT_OFLD); + if (!skb) { + rtw89_err(rtwdev, "failed to alloc skb for h2c pkt offload\n"); + return -ENOMEM; + } + skb_put(skb, H2C_LEN_PKT_OFLD); + cmd = skb->data; + + RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX(cmd, id); + RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP(cmd, RTW89_PKT_OFLD_OP_DEL); + + rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, + H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, + H2C_FUNC_PACKET_OFLD, 1, 1, + H2C_LEN_PKT_OFLD); + + if (rtw89_h2c_tx(rtwdev, skb, false)) { + rtw89_err(rtwdev, "failed to send h2c\n"); + goto fail; + } + + return 0; +fail: + dev_kfree_skb_any(skb); + + return -EBUSY; +} + +int rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev *rtwdev, u8 *id, + struct sk_buff *skb_ofld) +{ + struct sk_buff *skb; + u8 *cmd; + u8 alloc_id; + + alloc_id = rtw89_core_acquire_bit_map(rtwdev->pkt_offload, + RTW89_MAX_PKT_OFLD_NUM); + if (alloc_id == RTW89_MAX_PKT_OFLD_NUM) + return -ENOSPC; + + *id = alloc_id; + + skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_PKT_OFLD + skb_ofld->len); + if (!skb) { + rtw89_err(rtwdev, "failed to alloc skb for h2c pkt offload\n"); + return -ENOMEM; + } + skb_put(skb, H2C_LEN_PKT_OFLD); + cmd = skb->data; + + RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX(cmd, alloc_id); + RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP(cmd, RTW89_PKT_OFLD_OP_ADD); + RTW89_SET_FWCMD_PACKET_OFLD_PKT_LENGTH(cmd, skb_ofld->len); + skb_put_data(skb, skb_ofld->data, skb_ofld->len); + + rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, + H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, + H2C_FUNC_PACKET_OFLD, 1, 1, + H2C_LEN_PKT_OFLD + skb_ofld->len); + + if (rtw89_h2c_tx(rtwdev, skb, false)) { + rtw89_err(rtwdev, "failed to send h2c\n"); + goto fail; + } + + return 0; +fail: + dev_kfree_skb_any(skb); + + return -EBUSY; +} + +#define H2C_LEN_SCAN_LIST_OFFLOAD 4 +int rtw89_fw_h2c_scan_list_offload(struct rtw89_dev *rtwdev, int len, + struct list_head *chan_list) +{ + struct rtw89_mac_chinfo *ch_info; + struct sk_buff *skb; + int skb_len = H2C_LEN_SCAN_LIST_OFFLOAD + len * RTW89_MAC_CHINFO_SIZE; + u8 *cmd; + + skb = rtw89_fw_h2c_alloc_skb_with_hdr(skb_len); + if (!skb) { + rtw89_err(rtwdev, "failed to alloc skb for h2c scan list\n"); + return -ENOMEM; + } + skb_put(skb, H2C_LEN_SCAN_LIST_OFFLOAD); + cmd = skb->data; + + RTW89_SET_FWCMD_SCANOFLD_CH_NUM(cmd, len); + /* in unit of 4 bytes */ + RTW89_SET_FWCMD_SCANOFLD_CH_SIZE(cmd, RTW89_MAC_CHINFO_SIZE / 4); + + list_for_each_entry(ch_info, chan_list, list) { + cmd = skb_put(skb, RTW89_MAC_CHINFO_SIZE); + + RTW89_SET_FWCMD_CHINFO_PERIOD(cmd, ch_info->period); + RTW89_SET_FWCMD_CHINFO_DWELL(cmd, ch_info->dwell_time); + RTW89_SET_FWCMD_CHINFO_CENTER_CH(cmd, ch_info->central_ch); + RTW89_SET_FWCMD_CHINFO_PRI_CH(cmd, ch_info->pri_ch); + RTW89_SET_FWCMD_CHINFO_BW(cmd, ch_info->bw); + RTW89_SET_FWCMD_CHINFO_ACTION(cmd, ch_info->notify_action); + RTW89_SET_FWCMD_CHINFO_NUM_PKT(cmd, ch_info->num_pkt); + RTW89_SET_FWCMD_CHINFO_TX(cmd, ch_info->tx_pkt); + RTW89_SET_FWCMD_CHINFO_PAUSE_DATA(cmd, ch_info->pause_data); + RTW89_SET_FWCMD_CHINFO_BAND(cmd, ch_info->ch_band); + RTW89_SET_FWCMD_CHINFO_PKT_ID(cmd, ch_info->probe_id); + RTW89_SET_FWCMD_CHINFO_DFS(cmd, ch_info->dfs_ch); + RTW89_SET_FWCMD_CHINFO_TX_NULL(cmd, ch_info->tx_null); + RTW89_SET_FWCMD_CHINFO_RANDOM(cmd, ch_info->rand_seq_num); + RTW89_SET_FWCMD_CHINFO_PKT0(cmd, ch_info->pkt_id[0]); + RTW89_SET_FWCMD_CHINFO_PKT1(cmd, ch_info->pkt_id[1]); + RTW89_SET_FWCMD_CHINFO_PKT2(cmd, ch_info->pkt_id[2]); + RTW89_SET_FWCMD_CHINFO_PKT3(cmd, ch_info->pkt_id[3]); + RTW89_SET_FWCMD_CHINFO_PKT4(cmd, ch_info->pkt_id[4]); + RTW89_SET_FWCMD_CHINFO_PKT5(cmd, ch_info->pkt_id[5]); + RTW89_SET_FWCMD_CHINFO_PKT6(cmd, ch_info->pkt_id[6]); + RTW89_SET_FWCMD_CHINFO_PKT7(cmd, ch_info->pkt_id[7]); + } + + rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, + H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, + H2C_FUNC_ADD_SCANOFLD_CH, 1, 1, skb_len); + + if (rtw89_h2c_tx(rtwdev, skb, false)) { + rtw89_err(rtwdev, "failed to send h2c\n"); + goto fail; + } + + return 0; +fail: + dev_kfree_skb_any(skb); + + return -EBUSY; +} + +#define H2C_LEN_SCAN_OFFLOAD 20 +int rtw89_fw_h2c_scan_offload(struct rtw89_dev *rtwdev, + struct rtw89_scan_option *option, + struct rtw89_vif *rtwvif) +{ + struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; + struct sk_buff *skb; + u8 *cmd; + + skb = rtw89_fw_h2c_alloc_skb_with_hdr(H2C_LEN_SCAN_OFFLOAD); + if (!skb) { + rtw89_err(rtwdev, "failed to alloc skb for h2c scan offload\n"); + return -ENOMEM; + } + skb_put(skb, H2C_LEN_SCAN_OFFLOAD); + cmd = skb->data; + + RTW89_SET_FWCMD_SCANOFLD_MACID(cmd, rtwvif->mac_id); + RTW89_SET_FWCMD_SCANOFLD_PORT_ID(cmd, rtwvif->port); + RTW89_SET_FWCMD_SCANOFLD_BAND(cmd, RTW89_PHY_0); + RTW89_SET_FWCMD_SCANOFLD_OPERATION(cmd, option->enable); + RTW89_SET_FWCMD_SCANOFLD_NOTIFY_END(cmd, true); + RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_MODE(cmd, option->target_ch_mode); + RTW89_SET_FWCMD_SCANOFLD_START_MODE(cmd, RTW89_SCAN_IMMEDIATE); + RTW89_SET_FWCMD_SCANOFLD_SCAN_TYPE(cmd, RTW89_SCAN_ONCE); + if (option->target_ch_mode) { + RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW(cmd, scan_info->op_bw); + RTW89_SET_FWCMD_SCANOFLD_TARGET_PRI_CH(cmd, + scan_info->op_pri_ch); + RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH(cmd, + scan_info->op_chan); + } + + rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, + H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, + H2C_FUNC_SCANOFLD, 1, 1, + H2C_LEN_SCAN_OFFLOAD); + + if (rtw89_h2c_tx(rtwdev, skb, false)) { + rtw89_err(rtwdev, "failed to send h2c\n"); + goto fail; + } + + return 0; +fail: + dev_kfree_skb_any(skb); + + return -EBUSY; +} + int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev, struct rtw89_fw_h2c_rf_reg_info *info, u16 len, u8 page) @@ -1533,15 +1832,13 @@ void rtw89_fw_c2h_work(struct work_struct *work) static int rtw89_fw_write_h2c_reg(struct rtw89_dev *rtwdev, struct rtw89_mac_h2c_info *info) { - static const u32 h2c_reg[RTW89_H2CREG_MAX] = { - R_AX_H2CREG_DATA0, R_AX_H2CREG_DATA1, - R_AX_H2CREG_DATA2, R_AX_H2CREG_DATA3 - }; + const struct rtw89_chip_info *chip = rtwdev->chip; + const u32 *h2c_reg = chip->h2c_regs; u8 i, val, len; int ret; ret = read_poll_timeout(rtw89_read8, val, val == 0, 1000, 5000, false, - rtwdev, R_AX_H2CREG_CTRL); + rtwdev, chip->h2c_ctrl_reg); if (ret) { rtw89_warn(rtwdev, "FW does not process h2c registers\n"); return ret; @@ -1555,7 +1852,7 @@ static int rtw89_fw_write_h2c_reg(struct rtw89_dev *rtwdev, for (i = 0; i < RTW89_H2CREG_MAX; i++) rtw89_write32(rtwdev, h2c_reg[i], info->h2creg[i]); - rtw89_write8(rtwdev, R_AX_H2CREG_CTRL, B_AX_H2CREG_TRIGGER); + rtw89_write8(rtwdev, chip->h2c_ctrl_reg, B_AX_H2CREG_TRIGGER); return 0; } @@ -1563,10 +1860,8 @@ static int rtw89_fw_write_h2c_reg(struct rtw89_dev *rtwdev, static int rtw89_fw_read_c2h_reg(struct rtw89_dev *rtwdev, struct rtw89_mac_c2h_info *info) { - static const u32 c2h_reg[RTW89_C2HREG_MAX] = { - R_AX_C2HREG_DATA0, R_AX_C2HREG_DATA1, - R_AX_C2HREG_DATA2, R_AX_C2HREG_DATA3 - }; + const struct rtw89_chip_info *chip = rtwdev->chip; + const u32 *c2h_reg = chip->c2h_regs; u32 ret; u8 i, val; @@ -1574,7 +1869,7 @@ static int rtw89_fw_read_c2h_reg(struct rtw89_dev *rtwdev, ret = read_poll_timeout_atomic(rtw89_read8, val, val, 1, RTW89_C2H_TIMEOUT, false, rtwdev, - R_AX_C2HREG_CTRL); + chip->c2h_ctrl_reg); if (ret) { rtw89_warn(rtwdev, "c2h reg timeout\n"); return ret; @@ -1583,7 +1878,7 @@ static int rtw89_fw_read_c2h_reg(struct rtw89_dev *rtwdev, for (i = 0; i < RTW89_C2HREG_MAX; i++) info->c2hreg[i] = rtw89_read32(rtwdev, c2h_reg[i]); - rtw89_write8(rtwdev, R_AX_C2HREG_CTRL, 0); + rtw89_write8(rtwdev, chip->c2h_ctrl_reg, 0); info->id = RTW89_GET_C2H_HDR_FUNC(*info->c2hreg); info->content_len = (RTW89_GET_C2H_HDR_LEN(*info->c2hreg) << 2) - @@ -1640,3 +1935,322 @@ void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev) rtw89_fw_prog_cnt_dump(rtwdev); } + +static void rtw89_release_pkt_list(struct rtw89_dev *rtwdev) +{ + struct list_head *pkt_list = rtwdev->scan_info.pkt_list; + struct rtw89_pktofld_info *info, *tmp; + u8 idx; + + for (idx = RTW89_BAND_2G; idx < NUM_NL80211_BANDS; idx++) { + if (!(rtwdev->chip->support_bands & BIT(idx))) + continue; + + list_for_each_entry_safe(info, tmp, &pkt_list[idx], list) { + rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); + rtw89_core_release_bit_map(rtwdev->pkt_offload, + info->id); + list_del(&info->list); + kfree(info); + } + } +} + +static int rtw89_append_probe_req_ie(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif, + struct sk_buff *skb) +{ + struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; + struct ieee80211_scan_ies *ies = rtwvif->scan_ies; + struct rtw89_pktofld_info *info; + struct sk_buff *new; + int ret = 0; + u8 band; + + for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { + if (!(rtwdev->chip->support_bands & BIT(band))) + continue; + + new = skb_copy(skb, GFP_KERNEL); + if (!new) { + ret = -ENOMEM; + goto out; + } + skb_put_data(new, ies->ies[band], ies->len[band]); + skb_put_data(new, ies->common_ies, ies->common_ie_len); + + info = kzalloc(sizeof(*info), GFP_KERNEL); + if (!info) { + ret = -ENOMEM; + kfree_skb(new); + goto out; + } + + list_add_tail(&info->list, &scan_info->pkt_list[band]); + ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, new); + if (ret) + goto out; + + kfree_skb(new); + } +out: + return ret; +} + +static int rtw89_hw_scan_update_probe_req(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif) +{ + struct cfg80211_scan_request *req = rtwvif->scan_req; + struct sk_buff *skb; + u8 num = req->n_ssids, i; + int ret; + + for (i = 0; i < num; i++) { + skb = ieee80211_probereq_get(rtwdev->hw, rtwvif->mac_addr, + req->ssids[i].ssid, + req->ssids[i].ssid_len, + req->ie_len); + if (!skb) + return -ENOMEM; + + ret = rtw89_append_probe_req_ie(rtwdev, rtwvif, skb); + kfree_skb(skb); + + if (ret) + return ret; + } + + return 0; +} + +static void rtw89_hw_scan_add_chan(struct rtw89_dev *rtwdev, int chan_type, + int ssid_num, + struct rtw89_mac_chinfo *ch_info) +{ + struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; + struct rtw89_pktofld_info *info; + u8 band, probe_count = 0; + + ch_info->notify_action = RTW89_SCANOFLD_DEBUG_MASK; + ch_info->dfs_ch = chan_type == RTW89_CHAN_DFS; + ch_info->bw = RTW89_SCAN_WIDTH; + ch_info->tx_pkt = true; + ch_info->cfg_tx_pwr = false; + ch_info->tx_pwr_idx = 0; + ch_info->tx_null = false; + ch_info->pause_data = false; + + if (ssid_num) { + ch_info->num_pkt = ssid_num; + band = ch_info->ch_band; + + list_for_each_entry(info, &scan_info->pkt_list[band], list) { + ch_info->probe_id = info->id; + ch_info->pkt_id[probe_count] = info->id; + if (++probe_count >= ssid_num) + break; + } + if (probe_count != ssid_num) + rtw89_err(rtwdev, "SSID num differs from list len\n"); + } + + switch (chan_type) { + case RTW89_CHAN_OPERATE: + ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE; + ch_info->central_ch = scan_info->op_chan; + ch_info->pri_ch = scan_info->op_pri_ch; + ch_info->ch_band = scan_info->op_band; + ch_info->bw = scan_info->op_bw; + ch_info->tx_null = true; + ch_info->num_pkt = 0; + break; + case RTW89_CHAN_DFS: + ch_info->period = min_t(u8, ch_info->period, + RTW89_DFS_CHAN_TIME); + ch_info->dwell_time = RTW89_DWELL_TIME; + break; + case RTW89_CHAN_ACTIVE: + break; + default: + rtw89_err(rtwdev, "Channel type out of bound\n"); + } +} + +static int rtw89_hw_scan_add_chan_list(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif) +{ + struct cfg80211_scan_request *req = rtwvif->scan_req; + struct rtw89_mac_chinfo *ch_info, *tmp; + struct ieee80211_channel *channel; + struct list_head chan_list; + bool random_seq = req->flags & NL80211_SCAN_FLAG_RANDOM_SN; + int list_len = req->n_channels, off_chan_time = 0; + enum rtw89_chan_type type; + int ret = 0, i; + + INIT_LIST_HEAD(&chan_list); + for (i = 0; i < req->n_channels; i++) { + channel = req->channels[i]; + ch_info = kzalloc(sizeof(*ch_info), GFP_KERNEL); + if (!ch_info) { + ret = -ENOMEM; + goto out; + } + + ch_info->period = req->duration_mandatory ? + req->duration : RTW89_CHANNEL_TIME; + ch_info->ch_band = channel->band; + ch_info->central_ch = channel->hw_value; + ch_info->pri_ch = channel->hw_value; + ch_info->rand_seq_num = random_seq; + + if (channel->flags & + (IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR)) + type = RTW89_CHAN_DFS; + else + type = RTW89_CHAN_ACTIVE; + rtw89_hw_scan_add_chan(rtwdev, type, req->n_ssids, ch_info); + + if (rtwvif->net_type != RTW89_NET_TYPE_NO_LINK && + off_chan_time + ch_info->period > RTW89_OFF_CHAN_TIME) { + tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); + if (!tmp) { + ret = -ENOMEM; + kfree(ch_info); + goto out; + } + + type = RTW89_CHAN_OPERATE; + tmp->period = req->duration_mandatory ? + req->duration : RTW89_CHANNEL_TIME; + rtw89_hw_scan_add_chan(rtwdev, type, 0, tmp); + list_add_tail(&tmp->list, &chan_list); + off_chan_time = 0; + list_len++; + } + list_add_tail(&ch_info->list, &chan_list); + off_chan_time += ch_info->period; + } + rtw89_fw_h2c_scan_list_offload(rtwdev, list_len, &chan_list); + +out: + list_for_each_entry_safe(ch_info, tmp, &chan_list, list) { + list_del(&ch_info->list); + kfree(ch_info); + } + + return ret; +} + +static int rtw89_hw_scan_prehandle(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif) +{ + int ret; + + ret = rtw89_hw_scan_update_probe_req(rtwdev, rtwvif); + if (ret) { + rtw89_err(rtwdev, "Update probe request failed\n"); + goto out; + } + ret = rtw89_hw_scan_add_chan_list(rtwdev, rtwvif); +out: + return ret; +} + +void rtw89_hw_scan_start(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, + struct ieee80211_scan_request *scan_req) +{ + struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; + struct cfg80211_scan_request *req = &scan_req->req; + u8 mac_addr[ETH_ALEN]; + + rtwdev->scan_info.scanning_vif = vif; + rtwvif->scan_ies = &scan_req->ies; + rtwvif->scan_req = req; + ieee80211_stop_queues(rtwdev->hw); + + if (req->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) + get_random_mask_addr(mac_addr, req->mac_addr, + req->mac_addr_mask); + else + ether_addr_copy(mac_addr, vif->addr); + rtw89_core_scan_start(rtwdev, rtwvif, mac_addr, true); + + rtwdev->hal.rx_fltr &= ~B_AX_A_BCN_CHK_EN; + rtwdev->hal.rx_fltr &= ~B_AX_A_BC; + rtwdev->hal.rx_fltr &= ~B_AX_A_A1_MATCH; + rtw89_write32_mask(rtwdev, + rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0), + B_AX_RX_FLTR_CFG_MASK, + rtwdev->hal.rx_fltr); +} + +void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, + bool aborted) +{ + struct cfg80211_scan_info info = { + .aborted = aborted, + }; + struct rtw89_vif *rtwvif; + + if (!vif) + return; + + rtwdev->hal.rx_fltr |= B_AX_A_BCN_CHK_EN; + rtwdev->hal.rx_fltr |= B_AX_A_BC; + rtwdev->hal.rx_fltr |= B_AX_A_A1_MATCH; + rtw89_write32_mask(rtwdev, + rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0), + B_AX_RX_FLTR_CFG_MASK, + rtwdev->hal.rx_fltr); + + rtw89_core_scan_complete(rtwdev, vif, true); + ieee80211_scan_completed(rtwdev->hw, &info); + ieee80211_wake_queues(rtwdev->hw); + + rtw89_release_pkt_list(rtwdev); + rtwvif = (struct rtw89_vif *)vif->drv_priv; + rtwvif->scan_req = NULL; + rtwvif->scan_ies = NULL; + rtwdev->scan_info.scanning_vif = NULL; +} + +void rtw89_hw_scan_abort(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif) +{ + rtw89_hw_scan_offload(rtwdev, vif, false); + rtw89_hw_scan_complete(rtwdev, vif, true); +} + +int rtw89_hw_scan_offload(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, + bool enable) +{ + struct rtw89_scan_option opt = {0}; + struct rtw89_vif *rtwvif; + int ret = 0; + + rtwvif = vif ? (struct rtw89_vif *)vif->drv_priv : NULL; + if (!rtwvif) + return -EINVAL; + + opt.enable = enable; + opt.target_ch_mode = rtwvif->net_type != RTW89_NET_TYPE_NO_LINK; + if (enable) { + ret = rtw89_hw_scan_prehandle(rtwdev, rtwvif); + if (ret) + goto out; + } + rtw89_fw_h2c_scan_offload(rtwdev, &opt, rtwvif); +out: + return ret; +} + +void rtw89_store_op_chan(struct rtw89_dev *rtwdev) +{ + struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; + struct rtw89_hal *hal = &rtwdev->hal; + + scan_info->op_pri_ch = hal->current_primary_channel; + scan_info->op_chan = hal->current_channel; + scan_info->op_bw = hal->current_band_width; + scan_info->op_band = hal->current_band_type; +} diff --git a/drivers/net/wireless/realtek/rtw89/fw.h b/drivers/net/wireless/realtek/rtw89/fw.h index 2d36dc27222f..ed8609b204e0 100644 --- a/drivers/net/wireless/realtek/rtw89/fw.h +++ b/drivers/net/wireless/realtek/rtw89/fw.h @@ -123,6 +123,27 @@ enum rtw89_fw_log_comp { RTW89_FW_LOG_COMP_MCC = 20, }; +enum rtw89_pkt_offload_op { + RTW89_PKT_OFLD_OP_ADD, + RTW89_PKT_OFLD_OP_DEL, + RTW89_PKT_OFLD_OP_READ, +}; + +enum rtw89_scanofld_notify_reason { + RTW89_SCAN_DWELL_NOTIFY, + RTW89_SCAN_PRE_TX_NOTIFY, + RTW89_SCAN_POST_TX_NOTIFY, + RTW89_SCAN_ENTER_CH_NOTIFY, + RTW89_SCAN_LEAVE_CH_NOTIFY, + RTW89_SCAN_END_SCAN_NOTIFY, +}; + +enum rtw89_chan_type { + RTW89_CHAN_OPERATE = 0, + RTW89_CHAN_ACTIVE, + RTW89_CHAN_DFS, +}; + #define FWDL_SECTION_MAX_NUM 10 #define FWDL_SECTION_CHKSUM_LEN 8 #define FWDL_SECTION_PER_PKT_LEN 2020 @@ -156,6 +177,50 @@ struct rtw89_h2creg_sch_tx_en { u16 rsvd:15; } __packed; +#define RTW89_CHANNEL_TIME 45 +#define RTW89_DFS_CHAN_TIME 105 +#define RTW89_OFF_CHAN_TIME 100 +#define RTW89_DWELL_TIME 20 +#define RTW89_SCAN_WIDTH 0 +#define RTW89_SCANOFLD_MAX_SSID 8 +#define RTW89_SCANOFLD_MAX_IE_LEN 512 +#define RTW89_SCANOFLD_PKT_NONE 0xFF +#define RTW89_SCANOFLD_DEBUG_MASK 0x1F +#define RTW89_MAC_CHINFO_SIZE 20 + +struct rtw89_mac_chinfo { + u8 period; + u8 dwell_time; + u8 central_ch; + u8 pri_ch; + u8 bw:3; + u8 notify_action:5; + u8 num_pkt:4; + u8 tx_pkt:1; + u8 pause_data:1; + u8 ch_band:2; + u8 probe_id; + u8 dfs_ch:1; + u8 tx_null:1; + u8 rand_seq_num:1; + u8 cfg_tx_pwr:1; + u8 rsvd0: 4; + u8 pkt_id[RTW89_SCANOFLD_MAX_SSID]; + u16 tx_pwr_idx; + u8 rsvd1; + struct list_head list; +}; + +struct rtw89_scan_option { + bool enable; + bool target_ch_mode; +}; + +struct rtw89_pktofld_info { + struct list_head list; + u8 id; +}; + static inline void RTW89_SET_FWCMD_RA_IS_DIS(void *cmd, u32 val) { le32p_replace_bits((__le32 *)(cmd) + 0x00, val, BIT(0)); @@ -1056,6 +1121,106 @@ static inline void SET_CMC_TBL_CSI_BW(void *table, u32 val) GENMASK(31, 30)); } +static inline void SET_BCN_UPD_PORT(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)); +} + +static inline void SET_BCN_UPD_MBSSID(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); +} + +static inline void SET_BCN_UPD_BAND(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16)); +} + +static inline void SET_BCN_UPD_GRP_IE_OFST(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)h2c, (val - 24) | BIT(7), GENMASK(31, 24)); +} + +static inline void SET_BCN_UPD_MACID(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0)); +} + +static inline void SET_BCN_UPD_SSN_SEL(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(9, 8)); +} + +static inline void SET_BCN_UPD_SSN_MODE(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(11, 10)); +} + +static inline void SET_BCN_UPD_RATE(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(20, 12)); +} + +static inline void SET_BCN_UPD_TXPWR(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(23, 21)); +} + +static inline void SET_BCN_UPD_TXINFO_CTRL_EN(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(0)); +} + +static inline void SET_BCN_UPD_NTX_PATH_EN(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(4, 1)); +} + +static inline void SET_BCN_UPD_PATH_MAP_A(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(6, 5)); +} + +static inline void SET_BCN_UPD_PATH_MAP_B(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(8, 7)); +} + +static inline void SET_BCN_UPD_PATH_MAP_C(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(10, 9)); +} + +static inline void SET_BCN_UPD_PATH_MAP_D(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(12, 11)); +} + +static inline void SET_BCN_UPD_PATH_ANTSEL_A(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(13)); +} + +static inline void SET_BCN_UPD_PATH_ANTSEL_B(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(14)); +} + +static inline void SET_BCN_UPD_PATH_ANTSEL_C(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(15)); +} + +static inline void SET_BCN_UPD_PATH_ANTSEL_D(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, BIT(16)); +} + +static inline void SET_BCN_UPD_CSA_OFST(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)(h2c) + 2, val, GENMASK(31, 17)); +} + static inline void SET_FWROLE_MAINTAIN_MACID(void *h2c, u32 val) { le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)); @@ -1226,6 +1391,26 @@ static inline void SET_BA_CAM_SSN(void *h2c, u32 val) le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 20)); } +static inline void SET_BA_CAM_UID(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(7, 0)); +} + +static inline void SET_BA_CAM_STD_EN(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)h2c + 1, val, BIT(8)); +} + +static inline void SET_BA_CAM_BAND(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)h2c + 1, val, BIT(9)); +} + +static inline void SET_BA_CAM_ENTRY_IDX_V1(void *h2c, u32 val) +{ + le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(31, 28)); +} + static inline void SET_LPS_PARM_MACID(void *h2c, u32 val) { le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 0)); @@ -1316,6 +1501,14 @@ enum rtw89_btc_cxdrvinfo { CXDRVINFO_MAX, }; +enum rtw89_scan_mode { + RTW89_SCAN_IMMEDIATE, +}; + +enum rtw89_scan_type { + RTW89_SCAN_ONCE, +}; + static inline void RTW89_SET_FWCMD_CXHDR_TYPE(void *cmd, u8 val) { u8p_replace_bits((u8 *)(cmd) + 0, val, GENMASK(7, 0)); @@ -1586,6 +1779,242 @@ static inline void RTW89_SET_FWCMD_CXRFK_TYPE(void *cmd, u32 val) le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(17, 10)); } +static inline void RTW89_SET_FWCMD_PACKET_OFLD_PKT_IDX(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0)); +} + +static inline void RTW89_SET_FWCMD_PACKET_OFLD_PKT_OP(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(10, 8)); +} + +static inline void RTW89_SET_FWCMD_PACKET_OFLD_PKT_LENGTH(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(31, 16)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_CH_NUM(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_CH_SIZE(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PERIOD(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_DWELL(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_CENTER_CH(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(23, 16)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PRI_CH(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(31, 24)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_BW(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(2, 0)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_ACTION(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(7, 3)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_NUM_PKT(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(11, 8)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_TX(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(12)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PAUSE_DATA(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(13)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_BAND(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(15, 14)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PKT_ID(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(23, 16)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_DFS(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(24)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_TX_NULL(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(25)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_RANDOM(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(26)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_CFG_TX(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(27)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PKT0(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(7, 0)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PKT1(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(15, 8)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PKT2(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(23, 16)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PKT3(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(31, 24)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PKT4(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(7, 0)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PKT5(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(15, 8)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PKT6(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(23, 16)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_PKT7(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(31, 24)); +} + +static inline void RTW89_SET_FWCMD_CHINFO_POWER_IDX(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(15, 0)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_MACID(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_NORM_CY(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_PORT_ID(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(18, 16)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_BAND(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, BIT(19)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_OPERATION(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(21, 20)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BAND(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(23, 22)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_NOTIFY_END(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(0)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_MODE(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(1)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_START_MODE(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(2)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_SCAN_TYPE(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(4, 3)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(7, 5)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_PRI_CH(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(15, 8)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH(void *cmd, + u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(23, 16)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_PROBE_REQ_PKT_ID(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(31, 24)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_NORM_PD(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(15, 0)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_SLOW_PD(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(23, 16)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_TSF_HIGH(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(31, 0)); +} + +static inline void RTW89_SET_FWCMD_SCANOFLD_TSF_SLOW(void *cmd, u32 val) +{ + le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(31, 0)); +} + #define RTW89_C2H_HEADER_LEN 8 #define RTW89_GET_C2H_CATEGORY(c2h) \ @@ -1642,6 +2071,26 @@ static inline void RTW89_SET_FWCMD_CXRFK_TYPE(void *cmd, u32 val) #define RTW89_MK_HT_RATE(nss, mcs) (FIELD_PREP(GENMASK(4, 3), nss) | \ FIELD_PREP(GENMASK(2, 0), mcs)) +#define RTW89_GET_MAC_C2H_PKTOFLD_ID(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0)) +#define RTW89_GET_MAC_C2H_PKTOFLD_OP(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(10, 8)) +#define RTW89_GET_MAC_C2H_PKTOFLD_LEN(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 16)) + +#define RTW89_GET_MAC_C2H_SCANOFLD_PRI_CH(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0)) +#define RTW89_GET_MAC_C2H_SCANOFLD_RSP(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(19, 16)) +#define RTW89_GET_MAC_C2H_SCANOFLD_STATUS(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 20)) +#define RTW89_GET_MAC_C2H_SCANOFLD_TX_FAIL(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(3, 0)) +#define RTW89_GET_MAC_C2H_SCANOFLD_AIR_DENSITY(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(7, 4)) +#define RTW89_GET_MAC_C2H_SCANOFLD_BAND(c2h) \ + le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(25, 24)) + #define RTW89_FW_HDR_SIZE 32 #define RTW89_FW_SECTION_HDR_SIZE 16 @@ -1709,6 +2158,7 @@ struct rtw89_fw_h2c_rf_reg_info { /* CLASS 5 - Frame Exchange */ #define H2C_CL_MAC_FR_EXCHG 0x5 #define H2C_FUNC_MAC_CCTLINFO_UD 0x2 +#define H2C_FUNC_MAC_BCN_UPD 0x5 /* CLASS 6 - Address CAM */ #define H2C_CL_MAC_ADDR_CAM_UPDATE 0x6 @@ -1721,9 +2171,12 @@ struct rtw89_fw_h2c_rf_reg_info { /* CLASS 9 - FW offload */ #define H2C_CL_MAC_FW_OFLD 0x9 +#define H2C_FUNC_PACKET_OFLD 0x1 #define H2C_FUNC_MAC_MACID_PAUSE 0x8 #define H2C_FUNC_USR_EDCA 0xF #define H2C_FUNC_OFLD_CFG 0x14 +#define H2C_FUNC_ADD_SCANOFLD_CH 0x16 +#define H2C_FUNC_SCANOFLD 0x17 /* CLASS 10 - Security CAM */ #define H2C_CL_MAC_SEC_CAM 0xa @@ -1750,21 +2203,25 @@ int rtw89_wait_firmware_completion(struct rtw89_dev *rtwdev); void rtw89_h2c_pkt_set_hdr(struct rtw89_dev *rtwdev, struct sk_buff *skb, u8 type, u8 cat, u8 class, u8 func, bool rack, bool dack, u32 len); -int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev, u8 macid); +int rtw89_fw_h2c_default_cmac_tbl(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif); int rtw89_fw_h2c_assoc_cmac_tbl(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, struct ieee80211_sta *sta); int rtw89_fw_h2c_txtime_cmac_tbl(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta); +int rtw89_fw_h2c_update_beacon(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif); int rtw89_fw_h2c_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *vif, struct rtw89_sta *rtwsta, const u8 *scan_mac_addr); void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h); void rtw89_fw_c2h_work(struct work_struct *work); -int rtw89_fw_h2c_vif_maintain(struct rtw89_dev *rtwdev, - struct rtw89_vif *rtwvif, - enum rtw89_upd_mode upd_mode); +int rtw89_fw_h2c_role_maintain(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif, + struct rtw89_sta *rtwsta, + enum rtw89_upd_mode upd_mode); int rtw89_fw_h2c_join_info(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, - u8 dis_conn); + struct rtw89_sta *rtwsta, bool dis_conn); int rtw89_fw_h2c_macid_pause(struct rtw89_dev *rtwdev, u8 sh, u8 grp, bool pause); int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, @@ -1775,6 +2232,14 @@ int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev); int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev); int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev); int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev); +int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id); +int rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev *rtwdev, u8 *id, + struct sk_buff *skb_ofld); +int rtw89_fw_h2c_scan_list_offload(struct rtw89_dev *rtwdev, int len, + struct list_head *chan_list); +int rtw89_fw_h2c_scan_offload(struct rtw89_dev *rtwdev, + struct rtw89_scan_option *opt, + struct rtw89_vif *vif); int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev, struct rtw89_fw_h2c_rf_reg_info *info, u16 len, u8 page); @@ -1785,8 +2250,9 @@ int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len); void rtw89_fw_send_all_early_h2c(struct rtw89_dev *rtwdev); void rtw89_fw_free_all_early_h2c(struct rtw89_dev *rtwdev); int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid); -int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, bool valid, u8 macid, - struct ieee80211_ampdu_params *params); +int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, + bool valid, struct ieee80211_ampdu_params *params); + int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev, struct rtw89_lps_parm *lps_param); struct sk_buff *rtw89_fw_h2c_alloc_skb_with_hdr(u32 len); @@ -1796,5 +2262,16 @@ int rtw89_fw_msg_reg(struct rtw89_dev *rtwdev, struct rtw89_mac_c2h_info *c2h_info); int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable); void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev); +void rtw89_store_op_chan(struct rtw89_dev *rtwdev); +void rtw89_hw_scan_start(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, + struct ieee80211_scan_request *req); +void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, + bool aborted); +int rtw89_hw_scan_offload(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, + bool enable); +void rtw89_hw_scan_status_report(struct rtw89_dev *rtwdev, struct sk_buff *skb); +void rtw89_hw_scan_chan_switch(struct rtw89_dev *rtwdev, struct sk_buff *skb); +void rtw89_hw_scan_abort(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif); +void rtw89_store_op_chan(struct rtw89_dev *rtwdev); #endif diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c index b98c47e9ecfe..5e554bd9f036 100644 --- a/drivers/net/wireless/realtek/rtw89/mac.c +++ b/drivers/net/wireless/realtek/rtw89/mac.c @@ -172,6 +172,7 @@ static void rtw89_mac_dump_qta_lost(struct rtw89_dev *rtwdev) qempty.dle_type = DLE_CTRL_TYPE_PLE; qempty.grpsel = 0; + qempty.qempty = ~(u32)0; ret = dle_dfi_qempty(rtwdev, &qempty); if (ret) rtw89_warn(rtwdev, "%s: query DLE fail\n", __func__); @@ -481,9 +482,10 @@ int rtw89_mac_set_err_status(struct rtw89_dev *rtwdev, u32 err) } EXPORT_SYMBOL(rtw89_mac_set_err_status); -const struct rtw89_hfc_prec_cfg rtw_hfc_preccfg_pcie = { +const struct rtw89_hfc_prec_cfg rtw89_hfc_preccfg_pcie = { 2, 40, 0, 0, 1, 0, 0, 0 }; +EXPORT_SYMBOL(rtw89_hfc_preccfg_pcie); static int hfc_reset_param(struct rtw89_dev *rtwdev) { @@ -567,6 +569,8 @@ static int hfc_pub_cfg_chk(struct rtw89_dev *rtwdev) static int hfc_ch_ctrl(struct rtw89_dev *rtwdev, u8 ch) { + const struct rtw89_chip_info *chip = rtwdev->chip; + const struct rtw89_page_regs *regs = chip->page_regs; struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg; int ret = 0; @@ -586,13 +590,15 @@ static int hfc_ch_ctrl(struct rtw89_dev *rtwdev, u8 ch) val = u32_encode_bits(cfg[ch].min, B_AX_MIN_PG_MASK) | u32_encode_bits(cfg[ch].max, B_AX_MAX_PG_MASK) | (cfg[ch].grp ? B_AX_GRP : 0); - rtw89_write32(rtwdev, R_AX_ACH0_PAGE_CTRL + ch * 4, val); + rtw89_write32(rtwdev, regs->ach_page_ctrl + ch * 4, val); return 0; } static int hfc_upd_ch_info(struct rtw89_dev *rtwdev, u8 ch) { + const struct rtw89_chip_info *chip = rtwdev->chip; + const struct rtw89_page_regs *regs = chip->page_regs; struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; struct rtw89_hfc_ch_info *info = param->ch_info; const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg; @@ -606,7 +612,7 @@ static int hfc_upd_ch_info(struct rtw89_dev *rtwdev, u8 ch) if (ch > RTW89_DMA_H2C) return -EINVAL; - val = rtw89_read32(rtwdev, R_AX_ACH0_PAGE_INFO + ch * 4); + val = rtw89_read32(rtwdev, regs->ach_page_info + ch * 4); info[ch].aval = u32_get_bits(val, B_AX_AVAL_PG_MASK); if (ch < RTW89_DMA_H2C) info[ch].used = u32_get_bits(val, B_AX_USE_PG_MASK); @@ -618,6 +624,8 @@ static int hfc_upd_ch_info(struct rtw89_dev *rtwdev, u8 ch) static int hfc_pub_ctrl(struct rtw89_dev *rtwdev) { + const struct rtw89_chip_info *chip = rtwdev->chip; + const struct rtw89_page_regs *regs = chip->page_regs; const struct rtw89_hfc_pub_cfg *cfg = &rtwdev->mac.hfc_param.pub_cfg; u32 val; int ret; @@ -632,16 +640,18 @@ static int hfc_pub_ctrl(struct rtw89_dev *rtwdev) val = u32_encode_bits(cfg->grp0, B_AX_PUBPG_G0_MASK) | u32_encode_bits(cfg->grp1, B_AX_PUBPG_G1_MASK); - rtw89_write32(rtwdev, R_AX_PUB_PAGE_CTRL1, val); + rtw89_write32(rtwdev, regs->pub_page_ctrl1, val); val = u32_encode_bits(cfg->wp_thrd, B_AX_WP_THRD_MASK); - rtw89_write32(rtwdev, R_AX_WP_PAGE_CTRL2, val); + rtw89_write32(rtwdev, regs->wp_page_ctrl2, val); return 0; } static int hfc_upd_mix_info(struct rtw89_dev *rtwdev) { + const struct rtw89_chip_info *chip = rtwdev->chip; + const struct rtw89_page_regs *regs = chip->page_regs; struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; @@ -653,20 +663,20 @@ static int hfc_upd_mix_info(struct rtw89_dev *rtwdev) if (ret) return ret; - val = rtw89_read32(rtwdev, R_AX_PUB_PAGE_INFO1); + val = rtw89_read32(rtwdev, regs->pub_page_info1); info->g0_used = u32_get_bits(val, B_AX_G0_USE_PG_MASK); info->g1_used = u32_get_bits(val, B_AX_G1_USE_PG_MASK); - val = rtw89_read32(rtwdev, R_AX_PUB_PAGE_INFO3); + val = rtw89_read32(rtwdev, regs->pub_page_info3); info->g0_aval = u32_get_bits(val, B_AX_G0_AVAL_PG_MASK); info->g1_aval = u32_get_bits(val, B_AX_G1_AVAL_PG_MASK); info->pub_aval = - u32_get_bits(rtw89_read32(rtwdev, R_AX_PUB_PAGE_INFO2), + u32_get_bits(rtw89_read32(rtwdev, regs->pub_page_info2), B_AX_PUB_AVAL_PG_MASK); info->wp_aval = - u32_get_bits(rtw89_read32(rtwdev, R_AX_WP_PAGE_INFO1), + u32_get_bits(rtw89_read32(rtwdev, regs->wp_page_info1), B_AX_WP_AVAL_PG_MASK); - val = rtw89_read32(rtwdev, R_AX_HCI_FC_CTRL); + val = rtw89_read32(rtwdev, regs->hci_fc_ctrl); param->en = val & B_AX_HCI_FC_EN ? 1 : 0; param->h2c_en = val & B_AX_HCI_FC_CH12_EN ? 1 : 0; param->mode = u32_get_bits(val, B_AX_HCI_FC_MODE_MASK); @@ -679,21 +689,21 @@ static int hfc_upd_mix_info(struct rtw89_dev *rtwdev) prec_cfg->wp_ch811_full_cond = u32_get_bits(val, B_AX_HCI_FC_WP_CH811_FULL_COND_MASK); - val = rtw89_read32(rtwdev, R_AX_CH_PAGE_CTRL); + val = rtw89_read32(rtwdev, regs->ch_page_ctrl); prec_cfg->ch011_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH011_MASK); prec_cfg->h2c_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH12_MASK); - val = rtw89_read32(rtwdev, R_AX_PUB_PAGE_CTRL2); + val = rtw89_read32(rtwdev, regs->pub_page_ctrl2); pub_cfg->pub_max = u32_get_bits(val, B_AX_PUBPG_ALL_MASK); - val = rtw89_read32(rtwdev, R_AX_WP_PAGE_CTRL1); + val = rtw89_read32(rtwdev, regs->wp_page_ctrl1); prec_cfg->wp_ch07_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH07_MASK); prec_cfg->wp_ch811_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH811_MASK); - val = rtw89_read32(rtwdev, R_AX_WP_PAGE_CTRL2); + val = rtw89_read32(rtwdev, regs->wp_page_ctrl2); pub_cfg->wp_thrd = u32_get_bits(val, B_AX_WP_THRD_MASK); - val = rtw89_read32(rtwdev, R_AX_PUB_PAGE_CTRL1); + val = rtw89_read32(rtwdev, regs->pub_page_ctrl1); pub_cfg->grp0 = u32_get_bits(val, B_AX_PUBPG_G0_MASK); pub_cfg->grp1 = u32_get_bits(val, B_AX_PUBPG_G1_MASK); @@ -706,20 +716,24 @@ static int hfc_upd_mix_info(struct rtw89_dev *rtwdev) static void hfc_h2c_cfg(struct rtw89_dev *rtwdev) { + const struct rtw89_chip_info *chip = rtwdev->chip; + const struct rtw89_page_regs *regs = chip->page_regs; struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; u32 val; val = u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK); - rtw89_write32(rtwdev, R_AX_CH_PAGE_CTRL, val); + rtw89_write32(rtwdev, regs->ch_page_ctrl, val); - rtw89_write32_mask(rtwdev, R_AX_HCI_FC_CTRL, + rtw89_write32_mask(rtwdev, regs->hci_fc_ctrl, B_AX_HCI_FC_CH12_FULL_COND_MASK, prec_cfg->h2c_full_cond); } static void hfc_mix_cfg(struct rtw89_dev *rtwdev) { + const struct rtw89_chip_info *chip = rtwdev->chip; + const struct rtw89_page_regs *regs = chip->page_regs; struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; @@ -727,18 +741,18 @@ static void hfc_mix_cfg(struct rtw89_dev *rtwdev) val = u32_encode_bits(prec_cfg->ch011_prec, B_AX_PREC_PAGE_CH011_MASK) | u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK); - rtw89_write32(rtwdev, R_AX_CH_PAGE_CTRL, val); + rtw89_write32(rtwdev, regs->ch_page_ctrl, val); val = u32_encode_bits(pub_cfg->pub_max, B_AX_PUBPG_ALL_MASK); - rtw89_write32(rtwdev, R_AX_PUB_PAGE_CTRL2, val); + rtw89_write32(rtwdev, regs->pub_page_ctrl2, val); val = u32_encode_bits(prec_cfg->wp_ch07_prec, B_AX_PREC_PAGE_WP_CH07_MASK) | u32_encode_bits(prec_cfg->wp_ch811_prec, B_AX_PREC_PAGE_WP_CH811_MASK); - rtw89_write32(rtwdev, R_AX_WP_PAGE_CTRL1, val); + rtw89_write32(rtwdev, regs->wp_page_ctrl1, val); - val = u32_replace_bits(rtw89_read32(rtwdev, R_AX_HCI_FC_CTRL), + val = u32_replace_bits(rtw89_read32(rtwdev, regs->hci_fc_ctrl), param->mode, B_AX_HCI_FC_MODE_MASK); val = u32_replace_bits(val, prec_cfg->ch011_full_cond, B_AX_HCI_FC_WD_FULL_COND_MASK); @@ -748,21 +762,23 @@ static void hfc_mix_cfg(struct rtw89_dev *rtwdev) B_AX_HCI_FC_WP_CH07_FULL_COND_MASK); val = u32_replace_bits(val, prec_cfg->wp_ch811_full_cond, B_AX_HCI_FC_WP_CH811_FULL_COND_MASK); - rtw89_write32(rtwdev, R_AX_HCI_FC_CTRL, val); + rtw89_write32(rtwdev, regs->hci_fc_ctrl, val); } static void hfc_func_en(struct rtw89_dev *rtwdev, bool en, bool h2c_en) { + const struct rtw89_chip_info *chip = rtwdev->chip; + const struct rtw89_page_regs *regs = chip->page_regs; struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; u32 val; - val = rtw89_read32(rtwdev, R_AX_HCI_FC_CTRL); + val = rtw89_read32(rtwdev, regs->hci_fc_ctrl); param->en = en; param->h2c_en = h2c_en; val = en ? (val | B_AX_HCI_FC_EN) : (val & ~B_AX_HCI_FC_EN); val = h2c_en ? (val | B_AX_HCI_FC_CH12_EN) : (val & ~B_AX_HCI_FC_CH12_EN); - rtw89_write32(rtwdev, R_AX_HCI_FC_CTRL, val); + rtw89_write32(rtwdev, regs->hci_fc_ctrl, val); } static int hfc_init(struct rtw89_dev *rtwdev, bool reset, bool en, bool h2c_en) @@ -915,23 +931,31 @@ rtw89_mac_get_req_pwr_state(struct rtw89_dev *rtwdev) } static void rtw89_mac_send_rpwm(struct rtw89_dev *rtwdev, - enum rtw89_rpwm_req_pwr_state req_pwr_state) + enum rtw89_rpwm_req_pwr_state req_pwr_state, + bool notify_wake) { u16 request; + spin_lock_bh(&rtwdev->rpwm_lock); + request = rtw89_read16(rtwdev, R_AX_RPWM); request ^= request | PS_RPWM_TOGGLE; - - rtwdev->mac.rpwm_seq_num = (rtwdev->mac.rpwm_seq_num + 1) & - RPWM_SEQ_NUM_MAX; - request |= FIELD_PREP(PS_RPWM_SEQ_NUM, rtwdev->mac.rpwm_seq_num); - request |= req_pwr_state; - if (req_pwr_state < RTW89_MAC_RPWM_REQ_PWR_STATE_CLK_GATED) - request |= PS_RPWM_ACK; + if (notify_wake) { + request |= PS_RPWM_NOTIFY_WAKE; + } else { + rtwdev->mac.rpwm_seq_num = (rtwdev->mac.rpwm_seq_num + 1) & + RPWM_SEQ_NUM_MAX; + request |= FIELD_PREP(PS_RPWM_SEQ_NUM, + rtwdev->mac.rpwm_seq_num); + if (req_pwr_state < RTW89_MAC_RPWM_REQ_PWR_STATE_CLK_GATED) + request |= PS_RPWM_ACK; + } rtw89_write16(rtwdev, rtwdev->hci.rpwm_addr, request); + + spin_unlock_bh(&rtwdev->rpwm_lock); } static int rtw89_mac_check_cpwm_state(struct rtw89_dev *rtwdev, @@ -991,7 +1015,7 @@ void rtw89_mac_power_mode_change(struct rtw89_dev *rtwdev, bool enter) else state = RTW89_MAC_RPWM_REQ_PWR_STATE_ACTIVE; - rtw89_mac_send_rpwm(rtwdev, state); + rtw89_mac_send_rpwm(rtwdev, state, false); ret = read_poll_timeout_atomic(rtw89_mac_check_cpwm_state, ret, !ret, 1000, 15000, false, rtwdev, state); if (ret) @@ -999,19 +1023,31 @@ void rtw89_mac_power_mode_change(struct rtw89_dev *rtwdev, bool enter) enter ? "entering" : "leaving"); } +void rtw89_mac_notify_wake(struct rtw89_dev *rtwdev) +{ + enum rtw89_rpwm_req_pwr_state state; + + state = rtw89_mac_get_req_pwr_state(rtwdev); + rtw89_mac_send_rpwm(rtwdev, state, true); +} + static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on) { #define PWR_ACT 1 const struct rtw89_chip_info *chip = rtwdev->chip; const struct rtw89_pwr_cfg * const *cfg_seq; + int (*cfg_func)(struct rtw89_dev *rtwdev); struct rtw89_hal *hal = &rtwdev->hal; int ret; u8 val; - if (on) + if (on) { cfg_seq = chip->pwr_on_seq; - else + cfg_func = chip->ops->pwr_on_func; + } else { cfg_seq = chip->pwr_off_seq; + cfg_func = chip->ops->pwr_off_func; + } if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags)) __rtw89_leave_ps_mode(rtwdev); @@ -1022,7 +1058,7 @@ static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on) return -EBUSY; } - ret = rtw89_mac_pwr_seq(rtwdev, cfg_seq); + ret = cfg_func ? cfg_func(rtwdev) : rtw89_mac_pwr_seq(rtwdev, cfg_seq); if (ret) return ret; @@ -1092,18 +1128,31 @@ static int cmac_func_en(struct rtw89_dev *rtwdev, u8 mac_idx, bool en) static int dmac_func_en(struct rtw89_dev *rtwdev) { + enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; u32 val32; - val32 = (B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN | B_AX_MAC_SEC_EN | - B_AX_DISPATCHER_EN | B_AX_DLE_CPUIO_EN | B_AX_PKT_IN_EN | - B_AX_DMAC_TBL_EN | B_AX_PKT_BUF_EN | B_AX_STA_SCH_EN | - B_AX_TXPKT_CTRL_EN | B_AX_WD_RLS_EN | B_AX_MPDU_PROC_EN); + if (chip_id == RTL8852C) + val32 = (B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN | + B_AX_MAC_SEC_EN | B_AX_DISPATCHER_EN | + B_AX_DLE_CPUIO_EN | B_AX_PKT_IN_EN | + B_AX_DMAC_TBL_EN | B_AX_PKT_BUF_EN | + B_AX_STA_SCH_EN | B_AX_TXPKT_CTRL_EN | + B_AX_WD_RLS_EN | B_AX_MPDU_PROC_EN | + B_AX_DMAC_CRPRT | B_AX_H_AXIDMA_EN); + else + val32 = (B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN | + B_AX_MAC_SEC_EN | B_AX_DISPATCHER_EN | + B_AX_DLE_CPUIO_EN | B_AX_PKT_IN_EN | + B_AX_DMAC_TBL_EN | B_AX_PKT_BUF_EN | + B_AX_STA_SCH_EN | B_AX_TXPKT_CTRL_EN | + B_AX_WD_RLS_EN | B_AX_MPDU_PROC_EN | + B_AX_DMAC_CRPRT); rtw89_write32(rtwdev, R_AX_DMAC_FUNC_EN, val32); val32 = (B_AX_MAC_SEC_CLK_EN | B_AX_DISPATCHER_CLK_EN | B_AX_DLE_CPUIO_CLK_EN | B_AX_PKT_IN_CLK_EN | B_AX_STA_SCH_CLK_EN | B_AX_TXPKT_CTRL_CLK_EN | - B_AX_WD_RLS_CLK_EN); + B_AX_WD_RLS_CLK_EN | B_AX_BBRPT_CLK_EN); rtw89_write32(rtwdev, R_AX_DMAC_CLK_EN, val32); return 0; @@ -1111,7 +1160,11 @@ static int dmac_func_en(struct rtw89_dev *rtwdev) static int chip_func_en(struct rtw89_dev *rtwdev) { - rtw89_write32_set(rtwdev, R_AX_SPSLDO_ON_CTRL0, B_AX_OCP_L1_MASK); + enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; + + if (chip_id == RTL8852A) + rtw89_write32_set(rtwdev, R_AX_SPSLDO_ON_CTRL0, + B_AX_OCP_L1_MASK); return 0; } @@ -1136,49 +1189,118 @@ static int rtw89_mac_sys_init(struct rtw89_dev *rtwdev) } /* PCIE 64 */ -const struct rtw89_dle_size wde_size0 = { +const struct rtw89_dle_size rtw89_wde_size0 = { RTW89_WDE_PG_64, 4095, 1, }; +EXPORT_SYMBOL(rtw89_wde_size0); /* DLFW */ -const struct rtw89_dle_size wde_size4 = { +const struct rtw89_dle_size rtw89_wde_size4 = { RTW89_WDE_PG_64, 0, 4096, }; +EXPORT_SYMBOL(rtw89_wde_size4); + +/* 8852C DLFW */ +const struct rtw89_dle_size rtw89_wde_size18 = { + RTW89_WDE_PG_64, 0, 2048, +}; +EXPORT_SYMBOL(rtw89_wde_size18); + +/* 8852C PCIE SCC */ +const struct rtw89_dle_size rtw89_wde_size19 = { + RTW89_WDE_PG_64, 3328, 0, +}; +EXPORT_SYMBOL(rtw89_wde_size19); /* PCIE */ -const struct rtw89_dle_size ple_size0 = { +const struct rtw89_dle_size rtw89_ple_size0 = { RTW89_PLE_PG_128, 1520, 16, }; +EXPORT_SYMBOL(rtw89_ple_size0); /* DLFW */ -const struct rtw89_dle_size ple_size4 = { +const struct rtw89_dle_size rtw89_ple_size4 = { RTW89_PLE_PG_128, 64, 1472, }; +EXPORT_SYMBOL(rtw89_ple_size4); + +/* 8852C DLFW */ +const struct rtw89_dle_size rtw89_ple_size18 = { + RTW89_PLE_PG_128, 2544, 16, +}; +EXPORT_SYMBOL(rtw89_ple_size18); + +/* 8852C PCIE SCC */ +const struct rtw89_dle_size rtw89_ple_size19 = { + RTW89_PLE_PG_128, 1904, 16, +}; +EXPORT_SYMBOL(rtw89_ple_size19); /* PCIE 64 */ -const struct rtw89_wde_quota wde_qt0 = { +const struct rtw89_wde_quota rtw89_wde_qt0 = { 3792, 196, 0, 107, }; +EXPORT_SYMBOL(rtw89_wde_qt0); /* DLFW */ -const struct rtw89_wde_quota wde_qt4 = { +const struct rtw89_wde_quota rtw89_wde_qt4 = { 0, 0, 0, 0, }; +EXPORT_SYMBOL(rtw89_wde_qt4); + +/* 8852C DLFW */ +const struct rtw89_wde_quota rtw89_wde_qt17 = { + 0, 0, 0, 0, +}; +EXPORT_SYMBOL(rtw89_wde_qt17); + +/* 8852C PCIE SCC */ +const struct rtw89_wde_quota rtw89_wde_qt18 = { + 3228, 60, 0, 40, +}; +EXPORT_SYMBOL(rtw89_wde_qt18); /* PCIE SCC */ -const struct rtw89_ple_quota ple_qt4 = { +const struct rtw89_ple_quota rtw89_ple_qt4 = { 264, 0, 16, 20, 26, 13, 356, 0, 32, 40, 8, }; +EXPORT_SYMBOL(rtw89_ple_qt4); /* PCIE SCC */ -const struct rtw89_ple_quota ple_qt5 = { +const struct rtw89_ple_quota rtw89_ple_qt5 = { 264, 0, 32, 20, 64, 13, 1101, 0, 64, 128, 120, }; +EXPORT_SYMBOL(rtw89_ple_qt5); /* DLFW */ -const struct rtw89_ple_quota ple_qt13 = { +const struct rtw89_ple_quota rtw89_ple_qt13 = { 0, 0, 16, 48, 0, 0, 0, 0, 0, 0, 0 }; +EXPORT_SYMBOL(rtw89_ple_qt13); + +/* DLFW 52C */ +const struct rtw89_ple_quota rtw89_ple_qt44 = { + 0, 0, 16, 256, 0, 0, 0, 0, 0, 0, 0, 0, +}; +EXPORT_SYMBOL(rtw89_ple_qt44); + +/* DLFW 52C */ +const struct rtw89_ple_quota rtw89_ple_qt45 = { + 0, 0, 32, 256, 0, 0, 0, 0, 0, 0, 0, 0, +}; +EXPORT_SYMBOL(rtw89_ple_qt45); + +/* 8852C PCIE SCC */ +const struct rtw89_ple_quota rtw89_ple_qt46 = { + 525, 0, 16, 20, 13, 13, 178, 0, 32, 62, 8, 16, +}; +EXPORT_SYMBOL(rtw89_ple_qt46); + +/* 8852C PCIE SCC */ +const struct rtw89_ple_quota rtw89_ple_qt47 = { + 525, 0, 32, 20, 1034, 13, 1199, 0, 1053, 62, 160, 1037, +}; +EXPORT_SYMBOL(rtw89_ple_qt47); static const struct rtw89_dle_mem *get_dle_mem_cfg(struct rtw89_dev *rtwdev, enum rtw89_qta_mode mode) @@ -1334,6 +1456,8 @@ static void ple_quota_cfg(struct rtw89_dev *rtwdev, SET_QUOTA(bb_rpt, PLE, 8); SET_QUOTA(wd_rel, PLE, 9); SET_QUOTA(cpu_io, PLE, 10); + if (rtwdev->chip->chip_id == RTL8852C) + SET_QUOTA(tx_rpt, PLE, 11); } #undef SET_QUOTA @@ -1421,6 +1545,43 @@ error: return ret; } +static int preload_init_set(struct rtw89_dev *rtwdev, enum rtw89_mac_idx mac_idx, + enum rtw89_qta_mode mode) +{ + u32 reg, max_preld_size, min_rsvd_size; + + max_preld_size = (mac_idx == RTW89_MAC_0 ? + PRELD_B0_ENT_NUM : PRELD_B1_ENT_NUM) * PRELD_AMSDU_SIZE; + reg = mac_idx == RTW89_MAC_0 ? + R_AX_TXPKTCTL_B0_PRELD_CFG0 : R_AX_TXPKTCTL_B1_PRELD_CFG0; + rtw89_write32_mask(rtwdev, reg, B_AX_B0_PRELD_USEMAXSZ_MASK, max_preld_size); + rtw89_write32_set(rtwdev, reg, B_AX_B0_PRELD_FEN); + + min_rsvd_size = PRELD_AMSDU_SIZE; + reg = mac_idx == RTW89_MAC_0 ? + R_AX_TXPKTCTL_B0_PRELD_CFG1 : R_AX_TXPKTCTL_B1_PRELD_CFG1; + rtw89_write32_mask(rtwdev, reg, B_AX_B0_PRELD_NXT_TXENDWIN_MASK, PRELD_NEXT_WND); + rtw89_write32_mask(rtwdev, reg, B_AX_B0_PRELD_NXT_RSVMINSZ_MASK, min_rsvd_size); + + return 0; +} + +static bool is_qta_poh(struct rtw89_dev *rtwdev) +{ + return rtwdev->hci.type == RTW89_HCI_TYPE_PCIE; +} + +static int preload_init(struct rtw89_dev *rtwdev, enum rtw89_mac_idx mac_idx, + enum rtw89_qta_mode mode) +{ + const struct rtw89_chip_info *chip = rtwdev->chip; + + if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || !is_qta_poh(rtwdev)) + return 0; + + return preload_init_set(rtwdev, mac_idx, mode); +} + static bool dle_is_txq_empty(struct rtw89_dev *rtwdev) { u32 msk32; @@ -1528,6 +1689,12 @@ static int dmac_init(struct rtw89_dev *rtwdev, u8 mac_idx) return ret; } + ret = preload_init(rtwdev, RTW89_MAC_0, rtwdev->mac.qta_mode); + if (ret) { + rtw89_err(rtwdev, "[ERR]preload init %d\n", ret); + return ret; + } + ret = hfc_init(rtwdev, true, true, true); if (ret) { rtw89_err(rtwdev, "[ERR]HCI FC init %d\n", ret); @@ -2079,8 +2246,26 @@ static int rtw89_set_hw_sch_tx_en(struct rtw89_dev *rtwdev, u8 mac_idx, return 0; } +static int rtw89_set_hw_sch_tx_en_v1(struct rtw89_dev *rtwdev, u8 mac_idx, + u32 tx_en, u32 tx_en_mask) +{ + u32 reg = rtw89_mac_reg_by_idx(R_AX_CTN_DRV_TXEN, mac_idx); + u32 val; + int ret; + + ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); + if (ret) + return ret; + + val = rtw89_read32(rtwdev, reg); + val = (val & ~tx_en_mask) | (tx_en & tx_en_mask); + rtw89_write32(rtwdev, reg, val); + + return 0; +} + int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, - u16 *tx_en, enum rtw89_sch_tx_sel sel) + u32 *tx_en, enum rtw89_sch_tx_sel sel) { int ret; @@ -2089,7 +2274,8 @@ int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, switch (sel) { case RTW89_SCH_TX_SEL_ALL: - ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0, 0xffff); + ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0, + B_AX_CTN_TXEN_ALL_MASK); if (ret) return ret; break; @@ -2106,7 +2292,8 @@ int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, return ret; break; case RTW89_SCH_TX_SEL_MACID: - ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0, 0xffff); + ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, 0, + B_AX_CTN_TXEN_ALL_MASK); if (ret) return ret; break; @@ -2116,17 +2303,73 @@ int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, return 0; } +EXPORT_SYMBOL(rtw89_mac_stop_sch_tx); + +int rtw89_mac_stop_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx, + u32 *tx_en, enum rtw89_sch_tx_sel sel) +{ + int ret; + + *tx_en = rtw89_read32(rtwdev, + rtw89_mac_reg_by_idx(R_AX_CTN_DRV_TXEN, mac_idx)); + + switch (sel) { + case RTW89_SCH_TX_SEL_ALL: + ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, 0, + B_AX_CTN_TXEN_ALL_MASK_V1); + if (ret) + return ret; + break; + case RTW89_SCH_TX_SEL_HIQ: + ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, + 0, B_AX_CTN_TXEN_HGQ); + if (ret) + return ret; + break; + case RTW89_SCH_TX_SEL_MG0: + ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, + 0, B_AX_CTN_TXEN_MGQ); + if (ret) + return ret; + break; + case RTW89_SCH_TX_SEL_MACID: + ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, 0, + B_AX_CTN_TXEN_ALL_MASK_V1); + if (ret) + return ret; + break; + default: + return 0; + } + + return 0; +} +EXPORT_SYMBOL(rtw89_mac_stop_sch_tx_v1); + +int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en) +{ + int ret; + + ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, tx_en, B_AX_CTN_TXEN_ALL_MASK); + if (ret) + return ret; + + return 0; +} +EXPORT_SYMBOL(rtw89_mac_resume_sch_tx); -int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u16 tx_en) +int rtw89_mac_resume_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en) { int ret; - ret = rtw89_set_hw_sch_tx_en(rtwdev, mac_idx, tx_en, 0xffff); + ret = rtw89_set_hw_sch_tx_en_v1(rtwdev, mac_idx, tx_en, + B_AX_CTN_TXEN_ALL_MASK_V1); if (ret) return ret; return 0; } +EXPORT_SYMBOL(rtw89_mac_resume_sch_tx_v1); static u16 rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, bool wd) @@ -2290,9 +2533,9 @@ static int band1_enable(struct rtw89_dev *rtwdev) int ret, i; u32 sleep_bak[4] = {0}; u32 pause_bak[4] = {0}; - u16 tx_en; + u32 tx_en; - ret = rtw89_mac_stop_sch_tx(rtwdev, 0, &tx_en, RTW89_SCH_TX_SEL_ALL); + ret = rtw89_chip_stop_sch_tx(rtwdev, 0, &tx_en, RTW89_SCH_TX_SEL_ALL); if (ret) { rtw89_err(rtwdev, "[ERR]stop sch tx %d\n", ret); return ret; @@ -2322,7 +2565,7 @@ static int band1_enable(struct rtw89_dev *rtwdev) rtw89_write32(rtwdev, R_AX_SS_MACID_PAUSE_0 + i * 4, pause_bak[i]); } - ret = rtw89_mac_resume_sch_tx(rtwdev, 0, tx_en); + ret = rtw89_chip_resume_sch_tx(rtwdev, 0, tx_en); if (ret) { rtw89_err(rtwdev, "[ERR]CMAC1 resume sch tx %d\n", ret); return ret; @@ -2516,7 +2759,11 @@ static void rtw89_mac_disable_cpu(struct rtw89_dev *rtwdev) clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); rtw89_write32_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_WCPU_EN); + rtw89_write32_clr(rtwdev, R_AX_WCPU_FW_CTRL, B_AX_WCPU_FWDL_EN | + B_AX_H2C_PATH_RDY | B_AX_FWDL_PATH_RDY); rtw89_write32_clr(rtwdev, R_AX_SYS_CLK_CTRL, B_AX_CPU_CLK_EN); + rtw89_write32_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); + rtw89_write32_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); } static int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, @@ -2586,7 +2833,9 @@ static int rtw89_mac_fw_dl_pre_init(struct rtw89_dev *rtwdev) static void rtw89_mac_hci_func_en(struct rtw89_dev *rtwdev) { - rtw89_write32_set(rtwdev, R_AX_HCI_FUNC_EN, + const struct rtw89_chip_info *chip = rtwdev->chip; + + rtw89_write32_set(rtwdev, chip->hci_func_en_addr, B_AX_HCI_TXDMA_EN | B_AX_HCI_RXDMA_EN); } @@ -2705,7 +2954,7 @@ static void rtw89_mac_cmac_tbl_init(struct rtw89_dev *rtwdev, u8 macid) rtw89_write32(rtwdev, R_AX_INDIR_ACCESS_ENTRY + 28, 0xB8109); } -static int rtw89_set_macid_pause(struct rtw89_dev *rtwdev, u8 macid, bool pause) +int rtw89_mac_set_macid_pause(struct rtw89_dev *rtwdev, u8 macid, bool pause) { u8 sh = FIELD_GET(GENMASK(4, 0), macid); u8 grp = macid >> 5; @@ -2864,6 +3113,36 @@ static void rtw89_mac_port_cfg_bcn_intv(struct rtw89_dev *rtwdev, bcn_int); } +static void rtw89_mac_port_cfg_hiq_win(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif) +{ + static const u32 hiq_win_addr[RTW89_PORT_NUM] = { + R_AX_P0MB_HGQ_WINDOW_CFG_0, R_AX_PORT_HGQ_WINDOW_CFG, + R_AX_PORT_HGQ_WINDOW_CFG + 1, R_AX_PORT_HGQ_WINDOW_CFG + 2, + R_AX_PORT_HGQ_WINDOW_CFG + 3, + }; + u8 win = rtwvif->net_type == RTW89_NET_TYPE_AP_MODE ? 16 : 0; + u8 port = rtwvif->port; + u32 reg; + + reg = rtw89_mac_reg_by_idx(hiq_win_addr[port], rtwvif->mac_idx); + rtw89_write8(rtwdev, reg, win); +} + +static void rtw89_mac_port_cfg_hiq_dtim(struct rtw89_dev *rtwdev, + struct rtw89_vif *rtwvif) +{ + struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); + const struct rtw89_port_reg *p = &rtw_port_base; + u32 addr; + + addr = rtw89_mac_reg_by_idx(R_AX_MD_TSFT_STMP_CTL, rtwvif->mac_idx); + rtw89_write8_set(rtwdev, addr, B_AX_UPD_HGQMD | B_AX_UPD_TIMIE); + + rtw89_write16_port_mask(rtwdev, rtwvif, p->dtim_ctrl, B_AX_DTIM_NUM_MASK, + vif->bss_conf.dtim_period); +} + static void rtw89_mac_port_cfg_bcn_setup_time(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) { @@ -2978,11 +3257,11 @@ int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) rtw89_mac_dmac_tbl_init(rtwdev, rtwvif->mac_id); rtw89_mac_cmac_tbl_init(rtwdev, rtwvif->mac_id); - ret = rtw89_set_macid_pause(rtwdev, rtwvif->mac_id, false); + ret = rtw89_mac_set_macid_pause(rtwdev, rtwvif->mac_id, false); if (ret) return ret; - ret = rtw89_fw_h2c_vif_maintain(rtwdev, rtwvif, RTW89_VIF_CREATE); + ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, NULL, RTW89_ROLE_CREATE); if (ret) return ret; @@ -2994,7 +3273,7 @@ int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) if (ret) return ret; - ret = rtw89_fw_h2c_default_cmac_tbl(rtwdev, rtwvif->mac_id); + ret = rtw89_fw_h2c_default_cmac_tbl(rtwdev, rtwvif); if (ret) return ret; @@ -3005,7 +3284,7 @@ int rtw89_mac_vif_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) { int ret; - ret = rtw89_fw_h2c_vif_maintain(rtwdev, rtwvif, RTW89_VIF_REMOVE); + ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, NULL, RTW89_ROLE_REMOVE); if (ret) return ret; @@ -3034,13 +3313,15 @@ int rtw89_mac_port_update(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) rtw89_mac_port_cfg_rx_sync(rtwdev, rtwvif); rtw89_mac_port_cfg_tx_sw(rtwdev, rtwvif); rtw89_mac_port_cfg_bcn_intv(rtwdev, rtwvif); + rtw89_mac_port_cfg_hiq_win(rtwdev, rtwvif); + rtw89_mac_port_cfg_hiq_dtim(rtwdev, rtwvif); + rtw89_mac_port_cfg_hiq_drop(rtwdev, rtwvif); rtw89_mac_port_cfg_bcn_setup_time(rtwdev, rtwvif); rtw89_mac_port_cfg_bcn_hold_time(rtwdev, rtwvif); rtw89_mac_port_cfg_bcn_mask_area(rtwdev, rtwvif); rtw89_mac_port_cfg_tbtt_early(rtwdev, rtwvif); rtw89_mac_port_cfg_bss_color(rtwdev, rtwvif); rtw89_mac_port_cfg_mbssid(rtwdev, rtwvif); - rtw89_mac_port_cfg_hiq_drop(rtwdev, rtwvif); rtw89_mac_port_cfg_func_en(rtwdev, rtwvif); fsleep(BCN_ERLY_SET_DLY); rtw89_mac_port_cfg_bcn_early(rtwdev, rtwvif); @@ -3084,6 +3365,57 @@ rtw89_mac_c2h_macid_pause(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len { } +static bool rtw89_is_op_chan(struct rtw89_dev *rtwdev, u8 band, u8 channel) +{ + struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; + + return band == scan_info->op_band && channel == scan_info->op_pri_ch; +} + +static void +rtw89_mac_c2h_scanofld_rsp(struct rtw89_dev *rtwdev, struct sk_buff *c2h, + u32 len) +{ + struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif; + struct rtw89_hal *hal = &rtwdev->hal; + u8 reason, status, tx_fail, band; + u16 chan; + + tx_fail = RTW89_GET_MAC_C2H_SCANOFLD_TX_FAIL(c2h->data); + status = RTW89_GET_MAC_C2H_SCANOFLD_STATUS(c2h->data); + chan = RTW89_GET_MAC_C2H_SCANOFLD_PRI_CH(c2h->data); + reason = RTW89_GET_MAC_C2H_SCANOFLD_RSP(c2h->data); + band = RTW89_GET_MAC_C2H_SCANOFLD_BAND(c2h->data); + + if (!(rtwdev->chip->support_bands & BIT(NL80211_BAND_6GHZ))) + band = chan > 14 ? RTW89_BAND_5G : RTW89_BAND_2G; + + rtw89_debug(rtwdev, RTW89_DBG_HW_SCAN, + "band: %d, chan: %d, reason: %d, status: %d, tx_fail: %d\n", + band, chan, reason, status, tx_fail); + + switch (reason) { + case RTW89_SCAN_LEAVE_CH_NOTIFY: + if (rtw89_is_op_chan(rtwdev, band, chan)) + ieee80211_stop_queues(rtwdev->hw); + return; + case RTW89_SCAN_END_SCAN_NOTIFY: + rtw89_hw_scan_complete(rtwdev, vif, false); + break; + case RTW89_SCAN_ENTER_CH_NOTIFY: + if (rtw89_is_op_chan(rtwdev, band, chan)) + ieee80211_wake_queues(rtwdev->hw); + break; + default: + return; + } + + hal->prev_band_type = hal->current_band_type; + hal->prev_primary_channel = hal->current_channel; + hal->current_channel = chan; + hal->current_band_type = band; +} + static void rtw89_mac_c2h_rec_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) { @@ -3114,6 +3446,11 @@ rtw89_mac_c2h_log(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) RTW89_GET_C2H_LOG_SRT_PRT(c2h->data)); } +static void +rtw89_mac_c2h_bcn_cnt(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) +{ +} + static void (* const rtw89_mac_c2h_ofld_handler[])(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) = { @@ -3122,6 +3459,7 @@ void (* const rtw89_mac_c2h_ofld_handler[])(struct rtw89_dev *rtwdev, [RTW89_MAC_C2H_FUNC_PKT_OFLD_RSP] = NULL, [RTW89_MAC_C2H_FUNC_BCN_RESEND] = NULL, [RTW89_MAC_C2H_FUNC_MACID_PAUSE] = rtw89_mac_c2h_macid_pause, + [RTW89_MAC_C2H_FUNC_SCANOFLD_RSP] = rtw89_mac_c2h_scanofld_rsp, }; static @@ -3130,6 +3468,7 @@ void (* const rtw89_mac_c2h_info_handler[])(struct rtw89_dev *rtwdev, [RTW89_MAC_C2H_FUNC_REC_ACK] = rtw89_mac_c2h_rec_ack, [RTW89_MAC_C2H_FUNC_DONE_ACK] = rtw89_mac_c2h_done_ack, [RTW89_MAC_C2H_FUNC_C2H_LOG] = rtw89_mac_c2h_log, + [RTW89_MAC_C2H_FUNC_BCN_CNT] = rtw89_mac_c2h_bcn_cnt, }; void rtw89_mac_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, @@ -3192,6 +3531,7 @@ error: return false; } +EXPORT_SYMBOL(rtw89_mac_get_txpwr_cr); int rtw89_mac_cfg_ppdu_status(struct rtw89_dev *rtwdev, u8 mac_idx, bool enable) { @@ -3216,6 +3556,7 @@ int rtw89_mac_cfg_ppdu_status(struct rtw89_dev *rtwdev, u8 mac_idx, bool enable) return ret; } +EXPORT_SYMBOL(rtw89_mac_cfg_ppdu_status); void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx) { @@ -3349,33 +3690,37 @@ int rtw89_mac_coex_init(struct rtw89_dev *rtwdev, const struct rtw89_mac_ax_coex return 0; } +EXPORT_SYMBOL(rtw89_mac_coex_init); int rtw89_mac_cfg_gnt(struct rtw89_dev *rtwdev, const struct rtw89_mac_ax_coex_gnt *gnt_cfg) { - u32 val, ret; + u32 val = 0, ret; + + if (gnt_cfg->band[0].gnt_bt) + val |= B_AX_GNT_BT_RFC_S0_SW_VAL | B_AX_GNT_BT_BB_S0_SW_VAL; + + if (gnt_cfg->band[0].gnt_bt_sw_en) + val |= B_AX_GNT_BT_RFC_S0_SW_CTRL | B_AX_GNT_BT_BB_S0_SW_CTRL; + + if (gnt_cfg->band[0].gnt_wl) + val |= B_AX_GNT_WL_RFC_S0_SW_VAL | B_AX_GNT_WL_BB_S0_SW_VAL; + + if (gnt_cfg->band[0].gnt_wl_sw_en) + val |= B_AX_GNT_WL_RFC_S0_SW_CTRL | B_AX_GNT_WL_BB_S0_SW_CTRL; + + if (gnt_cfg->band[1].gnt_bt) + val |= B_AX_GNT_BT_RFC_S1_SW_VAL | B_AX_GNT_BT_BB_S1_SW_VAL; + + if (gnt_cfg->band[1].gnt_bt_sw_en) + val |= B_AX_GNT_BT_RFC_S1_SW_CTRL | B_AX_GNT_BT_BB_S1_SW_CTRL; + + if (gnt_cfg->band[1].gnt_wl) + val |= B_AX_GNT_WL_RFC_S1_SW_VAL | B_AX_GNT_WL_BB_S1_SW_VAL; + + if (gnt_cfg->band[1].gnt_wl_sw_en) + val |= B_AX_GNT_WL_RFC_S1_SW_CTRL | B_AX_GNT_WL_BB_S1_SW_CTRL; - ret = rtw89_mac_read_lte(rtwdev, R_AX_LTE_SW_CFG_1, &val); - if (ret) { - rtw89_err(rtwdev, "Read LTE fail!\n"); - return ret; - } - val = (gnt_cfg->band[0].gnt_bt ? - B_AX_GNT_BT_RFC_S0_SW_VAL | B_AX_GNT_BT_BB_S0_SW_VAL : 0) | - (gnt_cfg->band[0].gnt_bt_sw_en ? - B_AX_GNT_BT_RFC_S0_SW_CTRL | B_AX_GNT_BT_BB_S0_SW_CTRL : 0) | - (gnt_cfg->band[0].gnt_wl ? - B_AX_GNT_WL_RFC_S0_SW_VAL | B_AX_GNT_WL_BB_S0_SW_VAL : 0) | - (gnt_cfg->band[0].gnt_wl_sw_en ? - B_AX_GNT_WL_RFC_S0_SW_CTRL | B_AX_GNT_WL_BB_S0_SW_CTRL : 0) | - (gnt_cfg->band[1].gnt_bt ? - B_AX_GNT_BT_RFC_S1_SW_VAL | B_AX_GNT_BT_BB_S1_SW_VAL : 0) | - (gnt_cfg->band[1].gnt_bt_sw_en ? - B_AX_GNT_BT_RFC_S1_SW_CTRL | B_AX_GNT_BT_BB_S1_SW_CTRL : 0) | - (gnt_cfg->band[1].gnt_wl ? - B_AX_GNT_WL_RFC_S1_SW_VAL | B_AX_GNT_WL_BB_S1_SW_VAL : 0) | - (gnt_cfg->band[1].gnt_wl_sw_en ? - B_AX_GNT_WL_RFC_S1_SW_CTRL | B_AX_GNT_WL_BB_S1_SW_CTRL : 0); ret = rtw89_mac_write_lte(rtwdev, R_AX_LTE_SW_CFG_1, val); if (ret) { rtw89_err(rtwdev, "Write LTE fail!\n"); @@ -3384,11 +3729,59 @@ int rtw89_mac_cfg_gnt(struct rtw89_dev *rtwdev, return 0; } +EXPORT_SYMBOL(rtw89_mac_cfg_gnt); + +int rtw89_mac_cfg_gnt_v1(struct rtw89_dev *rtwdev, + const struct rtw89_mac_ax_coex_gnt *gnt_cfg) +{ + u32 val = 0; + + if (gnt_cfg->band[0].gnt_bt) + val |= B_AX_GNT_BT_RFC_S0_VAL | B_AX_GNT_BT_RX_VAL | + B_AX_GNT_BT_TX_VAL; + else + val |= B_AX_WL_ACT_VAL; + + if (gnt_cfg->band[0].gnt_bt_sw_en) + val |= B_AX_GNT_BT_RFC_S0_SWCTRL | B_AX_GNT_BT_RX_SWCTRL | + B_AX_GNT_BT_TX_SWCTRL | B_AX_WL_ACT_SWCTRL; + + if (gnt_cfg->band[0].gnt_wl) + val |= B_AX_GNT_WL_RFC_S0_VAL | B_AX_GNT_WL_RX_VAL | + B_AX_GNT_WL_TX_VAL | B_AX_GNT_WL_BB_VAL; + + if (gnt_cfg->band[0].gnt_wl_sw_en) + val |= B_AX_GNT_WL_RFC_S0_SWCTRL | B_AX_GNT_WL_RX_SWCTRL | + B_AX_GNT_WL_TX_SWCTRL | B_AX_GNT_WL_BB_SWCTRL; + + if (gnt_cfg->band[1].gnt_bt) + val |= B_AX_GNT_BT_RFC_S1_VAL | B_AX_GNT_BT_RX_VAL | + B_AX_GNT_BT_TX_VAL; + else + val |= B_AX_WL_ACT_VAL; + + if (gnt_cfg->band[1].gnt_bt_sw_en) + val |= B_AX_GNT_BT_RFC_S1_SWCTRL | B_AX_GNT_BT_RX_SWCTRL | + B_AX_GNT_BT_TX_SWCTRL | B_AX_WL_ACT_SWCTRL; + + if (gnt_cfg->band[1].gnt_wl) + val |= B_AX_GNT_WL_RFC_S1_VAL | B_AX_GNT_WL_RX_VAL | + B_AX_GNT_WL_TX_VAL | B_AX_GNT_WL_BB_VAL; + + if (gnt_cfg->band[1].gnt_wl_sw_en) + val |= B_AX_GNT_WL_RFC_S1_SWCTRL | B_AX_GNT_WL_RX_SWCTRL | + B_AX_GNT_WL_TX_SWCTRL | B_AX_GNT_WL_BB_SWCTRL; + + rtw89_write32(rtwdev, R_AX_GNT_SW_CTRL, val); + + return 0; +} +EXPORT_SYMBOL(rtw89_mac_cfg_gnt_v1); int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt) { u32 reg; - u8 val; + u16 val; int ret; ret = rtw89_mac_check_mac_en(rtwdev, plt->band, RTW89_CMAC_SEL); @@ -3403,8 +3796,9 @@ int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt) (plt->rx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_RX_PLT_GNT_LTE_RX : 0) | (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_RX_PLT_GNT_BT_TX : 0) | (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_RX_PLT_GNT_BT_RX : 0) | - (plt->rx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_RX_PLT_GNT_WL : 0); - rtw89_write8(rtwdev, reg, val); + (plt->rx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_RX_PLT_GNT_WL : 0) | + B_AX_PLT_EN; + rtw89_write16(rtwdev, reg, val); return 0; } @@ -3442,6 +3836,28 @@ int rtw89_mac_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl) return 0; } +EXPORT_SYMBOL(rtw89_mac_cfg_ctrl_path); + +int rtw89_mac_cfg_ctrl_path_v1(struct rtw89_dev *rtwdev, bool wl) +{ + struct rtw89_btc *btc = &rtwdev->btc; + struct rtw89_btc_dm *dm = &btc->dm; + struct rtw89_mac_ax_gnt *g = dm->gnt.band; + int i; + + if (wl) + return 0; + + for (i = 0; i < RTW89_PHY_MAX; i++) { + g[i].gnt_bt_sw_en = 1; + g[i].gnt_bt = 1; + g[i].gnt_wl_sw_en = 1; + g[i].gnt_wl = 0; + } + + return rtw89_mac_cfg_gnt_v1(rtwdev, &dm->gnt); +} +EXPORT_SYMBOL(rtw89_mac_cfg_ctrl_path_v1); bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev) { @@ -3845,3 +4261,51 @@ int rtw89_mac_set_hw_muedca_ctrl(struct rtw89_dev *rtwdev, return 0; } + +int rtw89_mac_write_xtal_si(struct rtw89_dev *rtwdev, u8 offset, u8 val, u8 mask) +{ + u32 val32; + int ret; + + val32 = FIELD_PREP(B_AX_WL_XTAL_SI_ADDR_MASK, offset) | + FIELD_PREP(B_AX_WL_XTAL_SI_DATA_MASK, val) | + FIELD_PREP(B_AX_WL_XTAL_SI_BITMASK_MASK, mask) | + FIELD_PREP(B_AX_WL_XTAL_SI_MODE_MASK, XTAL_SI_NORMAL_WRITE) | + FIELD_PREP(B_AX_WL_XTAL_SI_CMD_POLL, 1); + rtw89_write32(rtwdev, R_AX_WLAN_XTAL_SI_CTRL, val32); + + ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_WL_XTAL_SI_CMD_POLL), + 50, 50000, false, rtwdev, R_AX_WLAN_XTAL_SI_CTRL); + if (ret) { + rtw89_warn(rtwdev, "xtal si not ready(W): offset=%x val=%x mask=%x\n", + offset, val, mask); + return ret; + } + + return 0; +} +EXPORT_SYMBOL(rtw89_mac_write_xtal_si); + +int rtw89_mac_read_xtal_si(struct rtw89_dev *rtwdev, u8 offset, u8 *val) +{ + u32 val32; + int ret; + + val32 = FIELD_PREP(B_AX_WL_XTAL_SI_ADDR_MASK, offset) | + FIELD_PREP(B_AX_WL_XTAL_SI_DATA_MASK, 0x00) | + FIELD_PREP(B_AX_WL_XTAL_SI_BITMASK_MASK, 0x00) | + FIELD_PREP(B_AX_WL_XTAL_SI_MODE_MASK, XTAL_SI_NORMAL_READ) | + FIELD_PREP(B_AX_WL_XTAL_SI_CMD_POLL, 1); + rtw89_write32(rtwdev, R_AX_WLAN_XTAL_SI_CTRL, val32); + + ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_WL_XTAL_SI_CMD_POLL), + 50, 50000, false, rtwdev, R_AX_WLAN_XTAL_SI_CTRL); + if (ret) { + rtw89_warn(rtwdev, "xtal si not ready(R): offset=%x\n", offset); + return ret; + } + + *val = rtw89_read8(rtwdev, R_AX_WLAN_XTAL_SI_CTRL + 1); + + return 0; +} diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h index b7d13edf7dd1..b797667c78c6 100644 --- a/drivers/net/wireless/realtek/rtw89/mac.h +++ b/drivers/net/wireless/realtek/rtw89/mac.h @@ -301,6 +301,7 @@ enum rtw89_mac_c2h_ofld_func { RTW89_MAC_C2H_FUNC_PKT_OFLD_RSP, RTW89_MAC_C2H_FUNC_BCN_RESEND, RTW89_MAC_C2H_FUNC_MACID_PAUSE, + RTW89_MAC_C2H_FUNC_SCANOFLD_RSP = 0x9, RTW89_MAC_C2H_FUNC_OFLD_MAX, }; @@ -308,6 +309,7 @@ enum rtw89_mac_c2h_info_func { RTW89_MAC_C2H_FUNC_REC_ACK, RTW89_MAC_C2H_FUNC_DONE_ACK, RTW89_MAC_C2H_FUNC_C2H_LOG, + RTW89_MAC_C2H_FUNC_BCN_CNT, RTW89_MAC_C2H_FUNC_INFO_MAX, }; @@ -670,16 +672,26 @@ enum mac_ax_err_info { MAC_AX_SET_ERR_MAX, }; -extern const struct rtw89_hfc_prec_cfg rtw_hfc_preccfg_pcie; -extern const struct rtw89_dle_size wde_size0; -extern const struct rtw89_dle_size wde_size4; -extern const struct rtw89_dle_size ple_size0; -extern const struct rtw89_dle_size ple_size4; -extern const struct rtw89_wde_quota wde_qt0; -extern const struct rtw89_wde_quota wde_qt4; -extern const struct rtw89_ple_quota ple_qt4; -extern const struct rtw89_ple_quota ple_qt5; -extern const struct rtw89_ple_quota ple_qt13; +extern const struct rtw89_hfc_prec_cfg rtw89_hfc_preccfg_pcie; +extern const struct rtw89_dle_size rtw89_wde_size0; +extern const struct rtw89_dle_size rtw89_wde_size4; +extern const struct rtw89_dle_size rtw89_wde_size18; +extern const struct rtw89_dle_size rtw89_wde_size19; +extern const struct rtw89_dle_size rtw89_ple_size0; +extern const struct rtw89_dle_size rtw89_ple_size4; +extern const struct rtw89_dle_size rtw89_ple_size18; +extern const struct rtw89_dle_size rtw89_ple_size19; +extern const struct rtw89_wde_quota rtw89_wde_qt0; +extern const struct rtw89_wde_quota rtw89_wde_qt4; +extern const struct rtw89_wde_quota rtw89_wde_qt17; +extern const struct rtw89_wde_quota rtw89_wde_qt18; +extern const struct rtw89_ple_quota rtw89_ple_qt4; +extern const struct rtw89_ple_quota rtw89_ple_qt5; +extern const struct rtw89_ple_quota rtw89_ple_qt13; +extern const struct rtw89_ple_quota rtw89_ple_qt44; +extern const struct rtw89_ple_quota rtw89_ple_qt45; +extern const struct rtw89_ple_quota rtw89_ple_qt46; +extern const struct rtw89_ple_quota rtw89_ple_qt47; static inline u32 rtw89_mac_reg_by_idx(u32 reg_base, u8 band) { @@ -779,24 +791,31 @@ void rtw89_mac_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, u32 len, u8 class, u8 func); int rtw89_mac_setup_phycap(struct rtw89_dev *rtwdev); int rtw89_mac_stop_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, - u16 *tx_en, enum rtw89_sch_tx_sel sel); -int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u16 tx_en); + u32 *tx_en, enum rtw89_sch_tx_sel sel); +int rtw89_mac_stop_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx, + u32 *tx_en, enum rtw89_sch_tx_sel sel); +int rtw89_mac_resume_sch_tx(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en); +int rtw89_mac_resume_sch_tx_v1(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en); int rtw89_mac_cfg_ppdu_status(struct rtw89_dev *rtwdev, u8 mac_ids, bool enable); void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx); void rtw89_mac_flush_txq(struct rtw89_dev *rtwdev, u32 queues, bool drop); int rtw89_mac_coex_init(struct rtw89_dev *rtwdev, const struct rtw89_mac_ax_coex *coex); int rtw89_mac_cfg_gnt(struct rtw89_dev *rtwdev, const struct rtw89_mac_ax_coex_gnt *gnt_cfg); +int rtw89_mac_cfg_gnt_v1(struct rtw89_dev *rtwdev, + const struct rtw89_mac_ax_coex_gnt *gnt_cfg); int rtw89_mac_cfg_plt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt); u16 rtw89_mac_get_plt_cnt(struct rtw89_dev *rtwdev, u8 band); void rtw89_mac_cfg_sb(struct rtw89_dev *rtwdev, u32 val); u32 rtw89_mac_get_sb(struct rtw89_dev *rtwdev); bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev); int rtw89_mac_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl); +int rtw89_mac_cfg_ctrl_path_v1(struct rtw89_dev *rtwdev, bool wl); bool rtw89_mac_get_txpwr_cr(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u32 reg_base, u32 *cr); void rtw89_mac_power_mode_change(struct rtw89_dev *rtwdev, bool enter); +void rtw89_mac_notify_wake(struct rtw89_dev *rtwdev); void rtw89_mac_bf_assoc(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, struct ieee80211_sta *sta); void rtw89_mac_bf_disassoc(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, @@ -810,6 +829,7 @@ int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); int rtw89_mac_vif_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); int rtw89_mac_set_hw_muedca_ctrl(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, bool en); +int rtw89_mac_set_macid_pause(struct rtw89_dev *rtwdev, u8 macid, bool pause); static inline void rtw89_mac_bf_monitor_track(struct rtw89_dev *rtwdev) { @@ -868,4 +888,44 @@ int rtw89_mac_set_tx_retry_limit(struct rtw89_dev *rtwdev, int rtw89_mac_get_tx_retry_limit(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, u8 *tx_retry); +enum rtw89_mac_xtal_si_offset { + XTAL_SI_XTAL_SC_XI = 0x04, +#define XTAL_SC_XI_MASK GENMASK(7, 0) + XTAL_SI_XTAL_SC_XO = 0x05, +#define XTAL_SC_XO_MASK GENMASK(7, 0) + XTAL_SI_PWR_CUT = 0x10, +#define XTAL_SI_SMALL_PWR_CUT BIT(0) +#define XTAL_SI_BIG_PWR_CUT BIT(1) + XTAL_SI_XTAL_XMD_2 = 0x24, +#define XTAL_SI_LDO_LPS GENMASK(6, 4) + XTAL_SI_XTAL_XMD_4 = 0x26, +#define XTAL_SI_LPS_CAP GENMASK(3, 0) + XTAL_SI_CV = 0x41, + XTAL_SI_LOW_ADDR = 0x62, +#define XTAL_SI_LOW_ADDR_MASK GENMASK(7, 0) + XTAL_SI_CTRL = 0x63, +#define XTAL_SI_MODE_SEL_MASK GENMASK(7, 6) +#define XTAL_SI_RDY BIT(5) +#define XTAL_SI_HIGH_ADDR_MASK GENMASK(2, 0) + XTAL_SI_READ_VAL = 0x7A, + XTAL_SI_WL_RFC_S0 = 0x80, +#define XTAL_SI_RF00 BIT(0) + XTAL_SI_WL_RFC_S1 = 0x81, +#define XTAL_SI_RF10 BIT(0) + XTAL_SI_ANAPAR_WL = 0x90, +#define XTAL_SI_SRAM2RFC BIT(7) +#define XTAL_SI_GND_SHDN_WL BIT(6) +#define XTAL_SI_SHDN_WL BIT(5) +#define XTAL_SI_RFC2RF BIT(4) +#define XTAL_SI_OFF_EI BIT(3) +#define XTAL_SI_OFF_WEI BIT(2) +#define XTAL_SI_PON_EI BIT(1) +#define XTAL_SI_PON_WEI BIT(0) + XTAL_SI_SRAM_CTRL = 0xA1, +#define FULL_BIT_MASK GENMASK(7, 0) +}; + +int rtw89_mac_write_xtal_si(struct rtw89_dev *rtwdev, u8 offset, u8 val, u8 mask); +int rtw89_mac_read_xtal_si(struct rtw89_dev *rtwdev, u8 offset, u8 *val); + #endif diff --git a/drivers/net/wireless/realtek/rtw89/mac80211.c b/drivers/net/wireless/realtek/rtw89/mac80211.c index a322259f4cc4..fca9f82bb462 100644 --- a/drivers/net/wireless/realtek/rtw89/mac80211.c +++ b/drivers/net/wireless/realtek/rtw89/mac80211.c @@ -66,6 +66,9 @@ static int rtw89_ops_config(struct ieee80211_hw *hw, u32 changed) { struct rtw89_dev *rtwdev = hw->priv; + /* let previous ips work finish to ensure we don't leave ips twice */ + cancel_work_sync(&rtwdev->ips_work); + mutex_lock(&rtwdev->mutex); rtw89_leave_ps_mode(rtwdev); @@ -102,14 +105,16 @@ static int rtw89_ops_add_interface(struct ieee80211_hw *hw, int ret = 0; mutex_lock(&rtwdev->mutex); + rtwvif->rtwdev = rtwdev; list_add_tail(&rtwvif->list, &rtwdev->rtwvifs_list); + INIT_WORK(&rtwvif->update_beacon_work, rtw89_core_update_beacon_work); rtw89_leave_ps_mode(rtwdev); rtw89_traffic_stats_init(rtwdev, &rtwvif->stats); rtw89_vif_type_mapping(vif, false); rtwvif->port = rtw89_core_acquire_bit_map(rtwdev->hw_port, - RTW89_MAX_HW_PORT_NUM); - if (rtwvif->port == RTW89_MAX_HW_PORT_NUM) { + RTW89_PORT_NUM); + if (rtwvif->port == RTW89_PORT_NUM) { ret = -ENOSPC; goto out; } @@ -141,6 +146,8 @@ static void rtw89_ops_remove_interface(struct ieee80211_hw *hw, struct rtw89_dev *rtwdev = hw->priv; struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; + cancel_work_sync(&rtwvif->update_beacon_work); + mutex_lock(&rtwdev->mutex); rtw89_leave_ps_mode(rtwdev); rtw89_btc_ntfy_role_info(rtwdev, rtwvif, NULL, BTC_ROLE_STOP); @@ -161,7 +168,7 @@ static void rtw89_ops_configure_filter(struct ieee80211_hw *hw, rtw89_leave_ps_mode(rtwdev); *new_flags &= FIF_ALLMULTI | FIF_OTHER_BSS | FIF_FCSFAIL | - FIF_BCN_PRBRESP_PROMISC; + FIF_BCN_PRBRESP_PROMISC | FIF_PROBE_REQ; if (changed_flags & FIF_ALLMULTI) { if (*new_flags & FIF_ALLMULTI) @@ -192,6 +199,15 @@ static void rtw89_ops_configure_filter(struct ieee80211_hw *hw, rtwdev->hal.rx_fltr |= B_AX_A_A1_MATCH; } } + if (changed_flags & FIF_PROBE_REQ) { + if (*new_flags & FIF_PROBE_REQ) { + rtwdev->hal.rx_fltr &= ~B_AX_A_BC_CAM_MATCH; + rtwdev->hal.rx_fltr &= ~B_AX_A_UC_CAM_MATCH; + } else { + rtwdev->hal.rx_fltr |= B_AX_A_BC_CAM_MATCH; + rtwdev->hal.rx_fltr |= B_AX_A_UC_CAM_MATCH; + } + } rtw89_write32_mask(rtwdev, rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0), @@ -311,6 +327,9 @@ static void rtw89_station_mode_sta_assoc(struct rtw89_dev *rtwdev, rtw89_err(rtwdev, "can't find sta to set sta_assoc state\n"); return; } + + rtw89_vif_type_mapping(vif, true); + rtw89_core_sta_assoc(rtwdev, vif, sta); } @@ -331,6 +350,13 @@ static void rtw89_ops_bss_info_changed(struct ieee80211_hw *hw, rtw89_phy_set_bss_color(rtwdev, vif); rtw89_chip_cfg_txpwr_ul_tb_offset(rtwdev, vif); rtw89_mac_port_update(rtwdev, rtwvif); + rtw89_store_op_chan(rtwdev); + } else { + /* Abort ongoing scan if cancel_scan isn't issued + * when disconnected by peer + */ + if (rtwdev->scanning) + rtw89_hw_scan_abort(rtwdev, vif); } } @@ -340,6 +366,9 @@ static void rtw89_ops_bss_info_changed(struct ieee80211_hw *hw, rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL); } + if (changed & BSS_CHANGED_BEACON) + rtw89_fw_h2c_update_beacon(rtwdev, rtwvif); + if (changed & BSS_CHANGED_ERP_SLOT) rtw89_conf_tx(rtwdev, rtwvif); @@ -352,6 +381,49 @@ static void rtw89_ops_bss_info_changed(struct ieee80211_hw *hw, mutex_unlock(&rtwdev->mutex); } +static int rtw89_ops_start_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +{ + struct rtw89_dev *rtwdev = hw->priv; + struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; + + mutex_lock(&rtwdev->mutex); + ether_addr_copy(rtwvif->bssid, vif->bss_conf.bssid); + rtw89_cam_bssid_changed(rtwdev, rtwvif); + rtw89_mac_port_update(rtwdev, rtwvif); + rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, NULL); + rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, NULL, RTW89_ROLE_TYPE_CHANGE); + rtw89_fw_h2c_join_info(rtwdev, rtwvif, NULL, true); + rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL); + rtw89_chip_rfk_channel(rtwdev); + mutex_unlock(&rtwdev->mutex); + + return 0; +} + +static +void rtw89_ops_stop_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif) +{ + struct rtw89_dev *rtwdev = hw->priv; + struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; + + mutex_lock(&rtwdev->mutex); + rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, NULL); + rtw89_fw_h2c_join_info(rtwdev, rtwvif, NULL, true); + mutex_unlock(&rtwdev->mutex); +} + +static int rtw89_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, + bool set) +{ + struct rtw89_dev *rtwdev = hw->priv; + struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; + struct rtw89_vif *rtwvif = rtwsta->rtwvif; + + ieee80211_queue_work(rtwdev->hw, &rtwvif->update_beacon_work); + + return 0; +} + static int rtw89_ops_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 ac, const struct ieee80211_tx_queue_params *params) @@ -476,7 +548,6 @@ static int rtw89_ops_ampdu_action(struct ieee80211_hw *hw, case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT: mutex_lock(&rtwdev->mutex); clear_bit(RTW89_TXQ_F_AMPDU, &rtwtxq->flags); - rtw89_fw_h2c_ba_cam(rtwdev, false, rtwsta->mac_id, params); mutex_unlock(&rtwdev->mutex); ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid); break; @@ -486,11 +557,17 @@ static int rtw89_ops_ampdu_action(struct ieee80211_hw *hw, rtwsta->ampdu_params[tid].agg_num = params->buf_size; rtwsta->ampdu_params[tid].amsdu = params->amsdu; rtw89_leave_ps_mode(rtwdev); - rtw89_fw_h2c_ba_cam(rtwdev, true, rtwsta->mac_id, params); mutex_unlock(&rtwdev->mutex); break; case IEEE80211_AMPDU_RX_START: + mutex_lock(&rtwdev->mutex); + rtw89_fw_h2c_ba_cam(rtwdev, rtwsta, true, params); + mutex_unlock(&rtwdev->mutex); + break; case IEEE80211_AMPDU_RX_STOP: + mutex_lock(&rtwdev->mutex); + rtw89_fw_h2c_ba_cam(rtwdev, rtwsta, false, params); + mutex_unlock(&rtwdev->mutex); break; default: WARN_ON(1); @@ -617,15 +694,9 @@ static void rtw89_ops_sw_scan_start(struct ieee80211_hw *hw, { struct rtw89_dev *rtwdev = hw->priv; struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - struct rtw89_hal *hal = &rtwdev->hal; mutex_lock(&rtwdev->mutex); - rtwdev->scanning = true; - rtw89_leave_lps(rtwdev); - rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, hal->current_band_type); - rtw89_chip_rfk_scan(rtwdev, true); - rtw89_hci_recalc_int_mit(rtwdev); - rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, mac_addr); + rtw89_core_scan_start(rtwdev, rtwvif, mac_addr, false); mutex_unlock(&rtwdev->mutex); } @@ -633,14 +704,9 @@ static void rtw89_ops_sw_scan_complete(struct ieee80211_hw *hw, struct ieee80211_vif *vif) { struct rtw89_dev *rtwdev = hw->priv; - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; mutex_lock(&rtwdev->mutex); - rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, NULL); - rtw89_chip_rfk_scan(rtwdev, false); - rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0); - rtwdev->scanning = false; - rtwdev->dig.bypass_dig = true; + rtw89_core_scan_complete(rtwdev, vif, false); mutex_unlock(&rtwdev->mutex); } @@ -653,6 +719,46 @@ static void rtw89_ops_reconfig_complete(struct ieee80211_hw *hw, rtw89_ser_recfg_done(rtwdev); } +static int rtw89_ops_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif, + struct ieee80211_scan_request *req) +{ + struct rtw89_dev *rtwdev = hw->priv; + int ret = 0; + + if (!rtwdev->fw.scan_offload) + return 1; + + if (rtwdev->scanning) + return -EBUSY; + + mutex_lock(&rtwdev->mutex); + rtw89_hw_scan_start(rtwdev, vif, req); + ret = rtw89_hw_scan_offload(rtwdev, vif, true); + if (ret) { + rtw89_hw_scan_abort(rtwdev, vif); + rtw89_err(rtwdev, "HW scan failed with status: %d\n", ret); + } + mutex_unlock(&rtwdev->mutex); + + return ret; +} + +static void rtw89_ops_cancel_hw_scan(struct ieee80211_hw *hw, + struct ieee80211_vif *vif) +{ + struct rtw89_dev *rtwdev = hw->priv; + + if (!rtwdev->fw.scan_offload) + return; + + if (!rtwdev->scanning) + return; + + mutex_lock(&rtwdev->mutex); + rtw89_hw_scan_abort(rtwdev, vif); + mutex_unlock(&rtwdev->mutex); +} + const struct ieee80211_ops rtw89_ops = { .tx = rtw89_ops_tx, .wake_tx_queue = rtw89_ops_wake_tx_queue, @@ -663,6 +769,9 @@ const struct ieee80211_ops rtw89_ops = { .remove_interface = rtw89_ops_remove_interface, .configure_filter = rtw89_ops_configure_filter, .bss_info_changed = rtw89_ops_bss_info_changed, + .start_ap = rtw89_ops_start_ap, + .stop_ap = rtw89_ops_stop_ap, + .set_tim = rtw89_ops_set_tim, .conf_tx = rtw89_ops_conf_tx, .sta_state = rtw89_ops_sta_state, .set_key = rtw89_ops_set_key, @@ -676,6 +785,8 @@ const struct ieee80211_ops rtw89_ops = { .sw_scan_start = rtw89_ops_sw_scan_start, .sw_scan_complete = rtw89_ops_sw_scan_complete, .reconfig_complete = rtw89_ops_reconfig_complete, + .hw_scan = rtw89_ops_hw_scan, + .cancel_hw_scan = rtw89_ops_cancel_hw_scan, .set_sar_specs = rtw89_ops_set_sar_specs, }; EXPORT_SYMBOL(rtw89_ops); diff --git a/drivers/net/wireless/realtek/rtw89/pci.c b/drivers/net/wireless/realtek/rtw89/pci.c index 2c94762e4f93..e79bfc335b44 100644 --- a/drivers/net/wireless/realtek/rtw89/pci.c +++ b/drivers/net/wireless/realtek/rtw89/pci.c @@ -62,7 +62,7 @@ static u32 rtw89_pci_txbd_recalc(struct rtw89_dev *rtwdev, struct rtw89_pci_tx_ring *tx_ring) { struct rtw89_pci_dma_ring *bd_ring = &tx_ring->bd_ring; - u32 addr_idx = bd_ring->addr_idx; + u32 addr_idx = bd_ring->addr.idx; u32 cnt, idx; idx = rtw89_read32(rtwdev, addr_idx); @@ -121,7 +121,7 @@ static u32 rtw89_pci_rxbd_recalc(struct rtw89_dev *rtwdev, struct rtw89_pci_rx_ring *rx_ring) { struct rtw89_pci_dma_ring *bd_ring = &rx_ring->bd_ring; - u32 addr_idx = bd_ring->addr_idx; + u32 addr_idx = bd_ring->addr.idx; u32 cnt, idx; idx = rtw89_read32(rtwdev, addr_idx); @@ -304,7 +304,7 @@ static void rtw89_pci_rxbd_deliver(struct rtw89_dev *rtwdev, cnt -= rx_cnt; } - rtw89_write16(rtwdev, bd_ring->addr_idx, bd_ring->wp); + rtw89_write16(rtwdev, bd_ring->addr.idx, bd_ring->wp); } static int rtw89_pci_poll_rxq_dma(struct rtw89_dev *rtwdev, @@ -555,7 +555,7 @@ static void rtw89_pci_release_tx(struct rtw89_dev *rtwdev, cnt -= release_cnt; } - rtw89_write16(rtwdev, bd_ring->addr_idx, bd_ring->wp); + rtw89_write16(rtwdev, bd_ring->addr.idx, bd_ring->wp); } static int rtw89_pci_poll_rpq_dma(struct rtw89_dev *rtwdev, @@ -598,7 +598,7 @@ static void rtw89_pci_isr_rxd_unavail(struct rtw89_dev *rtwdev, rx_ring = &rtwpci->rx_rings[i]; bd_ring = &rx_ring->bd_ring; - reg_idx = rtw89_read32(rtwdev, bd_ring->addr_idx); + reg_idx = rtw89_read32(rtwdev, bd_ring->addr.idx); hw_idx = FIELD_GET(TXBD_HW_IDX_MASK, reg_idx); host_idx = FIELD_GET(TXBD_HOST_IDX_MASK, reg_idx); hw_idx_next = (hw_idx + 1) % bd_ring->len; @@ -697,71 +697,110 @@ exit: return irqret; } -#define case_TXCHADDRS(txch) \ - case RTW89_TXCH_##txch: \ - *addr_num = R_AX_##txch##_TXBD_NUM; \ - *addr_idx = R_AX_##txch##_TXBD_IDX; \ - *addr_bdram = R_AX_##txch##_BDRAM_CTRL; \ - *addr_desa_l = R_AX_##txch##_TXBD_DESA_L; \ - *addr_desa_h = R_AX_##txch##_TXBD_DESA_H; \ - break - -static int rtw89_pci_get_txch_addrs(enum rtw89_tx_channel txch, - u32 *addr_num, - u32 *addr_idx, - u32 *addr_bdram, - u32 *addr_desa_l, - u32 *addr_desa_h) -{ - switch (txch) { - case_TXCHADDRS(ACH0); - case_TXCHADDRS(ACH1); - case_TXCHADDRS(ACH2); - case_TXCHADDRS(ACH3); - case_TXCHADDRS(ACH4); - case_TXCHADDRS(ACH5); - case_TXCHADDRS(ACH6); - case_TXCHADDRS(ACH7); - case_TXCHADDRS(CH8); - case_TXCHADDRS(CH9); - case_TXCHADDRS(CH10); - case_TXCHADDRS(CH11); - case_TXCHADDRS(CH12); - default: +#define DEF_TXCHADDRS_TYPE1(info, txch, v...) \ + [RTW89_TXCH_##txch] = { \ + .num = R_AX_##txch##_TXBD_NUM ##v, \ + .idx = R_AX_##txch##_TXBD_IDX ##v, \ + .bdram = R_AX_##txch##_BDRAM_CTRL ##v, \ + .desa_l = R_AX_##txch##_TXBD_DESA_L ##v, \ + .desa_h = R_AX_##txch##_TXBD_DESA_H ##v, \ + } + +#define DEF_TXCHADDRS(info, txch, v...) \ + [RTW89_TXCH_##txch] = { \ + .num = R_AX_##txch##_TXBD_NUM, \ + .idx = R_AX_##txch##_TXBD_IDX, \ + .bdram = R_AX_##txch##_BDRAM_CTRL ##v, \ + .desa_l = R_AX_##txch##_TXBD_DESA_L ##v, \ + .desa_h = R_AX_##txch##_TXBD_DESA_H ##v, \ + } + +#define DEF_RXCHADDRS(info, rxch, v...) \ + [RTW89_RXCH_##rxch] = { \ + .num = R_AX_##rxch##_RXBD_NUM ##v, \ + .idx = R_AX_##rxch##_RXBD_IDX ##v, \ + .desa_l = R_AX_##rxch##_RXBD_DESA_L ##v, \ + .desa_h = R_AX_##rxch##_RXBD_DESA_H ##v, \ + } + +const struct rtw89_pci_ch_dma_addr_set rtw89_pci_ch_dma_addr_set = { + .tx = { + DEF_TXCHADDRS(info, ACH0), + DEF_TXCHADDRS(info, ACH1), + DEF_TXCHADDRS(info, ACH2), + DEF_TXCHADDRS(info, ACH3), + DEF_TXCHADDRS(info, ACH4), + DEF_TXCHADDRS(info, ACH5), + DEF_TXCHADDRS(info, ACH6), + DEF_TXCHADDRS(info, ACH7), + DEF_TXCHADDRS(info, CH8), + DEF_TXCHADDRS(info, CH9), + DEF_TXCHADDRS_TYPE1(info, CH10), + DEF_TXCHADDRS_TYPE1(info, CH11), + DEF_TXCHADDRS(info, CH12), + }, + .rx = { + DEF_RXCHADDRS(info, RXQ), + DEF_RXCHADDRS(info, RPQ), + }, +}; +EXPORT_SYMBOL(rtw89_pci_ch_dma_addr_set); + +const struct rtw89_pci_ch_dma_addr_set rtw89_pci_ch_dma_addr_set_v1 = { + .tx = { + DEF_TXCHADDRS(info, ACH0, _V1), + DEF_TXCHADDRS(info, ACH1, _V1), + DEF_TXCHADDRS(info, ACH2, _V1), + DEF_TXCHADDRS(info, ACH3, _V1), + DEF_TXCHADDRS(info, ACH4, _V1), + DEF_TXCHADDRS(info, ACH5, _V1), + DEF_TXCHADDRS(info, ACH6, _V1), + DEF_TXCHADDRS(info, ACH7, _V1), + DEF_TXCHADDRS(info, CH8, _V1), + DEF_TXCHADDRS(info, CH9, _V1), + DEF_TXCHADDRS_TYPE1(info, CH10, _V1), + DEF_TXCHADDRS_TYPE1(info, CH11, _V1), + DEF_TXCHADDRS(info, CH12, _V1), + }, + .rx = { + DEF_RXCHADDRS(info, RXQ, _V1), + DEF_RXCHADDRS(info, RPQ, _V1), + }, +}; +EXPORT_SYMBOL(rtw89_pci_ch_dma_addr_set_v1); + +#undef DEF_TXCHADDRS_TYPE1 +#undef DEF_TXCHADDRS +#undef DEF_RXCHADDRS + +static int rtw89_pci_get_txch_addrs(struct rtw89_dev *rtwdev, + enum rtw89_tx_channel txch, + const struct rtw89_pci_ch_dma_addr **addr) +{ + const struct rtw89_pci_info *info = rtwdev->pci_info; + + if (txch >= RTW89_TXCH_NUM) return -EINVAL; - } + + *addr = &info->dma_addr_set->tx[txch]; return 0; } -#undef case_TXCHADDRS - -#define case_RXCHADDRS(rxch) \ - case RTW89_RXCH_##rxch: \ - *addr_num = R_AX_##rxch##_RXBD_NUM; \ - *addr_idx = R_AX_##rxch##_RXBD_IDX; \ - *addr_desa_l = R_AX_##rxch##_RXBD_DESA_L; \ - *addr_desa_h = R_AX_##rxch##_RXBD_DESA_H; \ - break - -static int rtw89_pci_get_rxch_addrs(enum rtw89_rx_channel rxch, - u32 *addr_num, - u32 *addr_idx, - u32 *addr_desa_l, - u32 *addr_desa_h) +static int rtw89_pci_get_rxch_addrs(struct rtw89_dev *rtwdev, + enum rtw89_rx_channel rxch, + const struct rtw89_pci_ch_dma_addr **addr) { - switch (rxch) { - case_RXCHADDRS(RXQ); - case_RXCHADDRS(RPQ); - default: + const struct rtw89_pci_info *info = rtwdev->pci_info; + + if (rxch >= RTW89_RXCH_NUM) return -EINVAL; - } + + *addr = &info->dma_addr_set->rx[rxch]; return 0; } -#undef case_RXCHADDRS - static u32 rtw89_pci_get_avail_txbd_num(struct rtw89_pci_tx_ring *ring) { struct rtw89_pci_dma_ring *bd_ring = &ring->bd_ring; @@ -837,7 +876,7 @@ static void __rtw89_pci_tx_kick_off(struct rtw89_dev *rtwdev, struct rtw89_pci_t struct rtw89_pci_dma_ring *bd_ring = &tx_ring->bd_ring; u32 host_idx, addr; - addr = bd_ring->addr_idx; + addr = bd_ring->addr.idx; host_idx = bd_ring->wp; rtw89_write16(rtwdev, addr, host_idx); } @@ -879,7 +918,7 @@ static void __pci_flush_txch(struct rtw89_dev *rtwdev, u8 txch, bool drop) * just use for loop with udelay here. */ for (i = 0; i < 60; i++) { - cur_idx = rtw89_read32(rtwdev, bd_ring->addr_idx); + cur_idx = rtw89_read32(rtwdev, bd_ring->addr.idx); cur_rp = FIELD_GET(TXBD_HW_IDX_MASK, cur_idx); if (cur_rp == bd_ring->wp) return; @@ -1140,9 +1179,9 @@ static void rtw89_pci_reset_trx_rings(struct rtw89_dev *rtwdev) tx_ring = &rtwpci->tx_rings[i]; bd_ring = &tx_ring->bd_ring; bd_ram = &bd_ram_table[i]; - addr_num = bd_ring->addr_num; - addr_bdram = bd_ring->addr_bdram; - addr_desa_l = bd_ring->addr_desa_l; + addr_num = bd_ring->addr.num; + addr_bdram = bd_ring->addr.bdram; + addr_desa_l = bd_ring->addr.desa_l; bd_ring->wp = 0; bd_ring->rp = 0; @@ -1158,8 +1197,8 @@ static void rtw89_pci_reset_trx_rings(struct rtw89_dev *rtwdev) for (i = 0; i < RTW89_RXCH_NUM; i++) { rx_ring = &rtwpci->rx_rings[i]; bd_ring = &rx_ring->bd_ring; - addr_num = bd_ring->addr_num; - addr_desa_l = bd_ring->addr_desa_l; + addr_num = bd_ring->addr.num; + addr_desa_l = bd_ring->addr.desa_l; bd_ring->wp = 0; bd_ring->rp = 0; rx_ring->diliver_skb = NULL; @@ -1413,79 +1452,52 @@ static int rtw89_write16_mdio_clr(struct rtw89_dev *rtwdev, u8 addr, u16 mask, u return 0; } -static int rtw89_dbi_write8(struct rtw89_dev *rtwdev, u16 addr, u8 data) +static int rtw89_pci_write_config_byte(struct rtw89_dev *rtwdev, u16 addr, + u8 data) { - u16 write_addr; - u16 remainder = addr & ~(B_AX_DBI_ADDR_MSK | B_AX_DBI_WREN_MSK); - u8 flag; - int ret; - - write_addr = addr & B_AX_DBI_ADDR_MSK; - write_addr |= u16_encode_bits(BIT(remainder), B_AX_DBI_WREN_MSK); - rtw89_write8(rtwdev, R_AX_DBI_WDATA + remainder, data); - rtw89_write16(rtwdev, R_AX_DBI_FLAG, write_addr); - rtw89_write8(rtwdev, R_AX_DBI_FLAG + 2, B_AX_DBI_WFLAG >> 16); - - ret = read_poll_timeout_atomic(rtw89_read8, flag, !flag, 10, - 10 * RTW89_PCI_WR_RETRY_CNT, false, - rtwdev, R_AX_DBI_FLAG + 2); - if (ret) - WARN(flag, "failed to write to DBI register, addr=0x%04x\n", - addr); + struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; + struct pci_dev *pdev = rtwpci->pdev; - return ret; + return pci_write_config_byte(pdev, addr, data); } -static int rtw89_dbi_read8(struct rtw89_dev *rtwdev, u16 addr, u8 *value) +static int rtw89_pci_read_config_byte(struct rtw89_dev *rtwdev, u16 addr, + u8 *value) { - u16 read_addr = addr & B_AX_DBI_ADDR_MSK; - u8 flag; - int ret; - - rtw89_write16(rtwdev, R_AX_DBI_FLAG, read_addr); - rtw89_write8(rtwdev, R_AX_DBI_FLAG + 2, B_AX_DBI_RFLAG >> 16); - - ret = read_poll_timeout_atomic(rtw89_read8, flag, !flag, 10, - 10 * RTW89_PCI_WR_RETRY_CNT, false, - rtwdev, R_AX_DBI_FLAG + 2); - - if (!ret) { - read_addr = R_AX_DBI_RDATA + (addr & 3); - *value = rtw89_read8(rtwdev, read_addr); - } else { - WARN(1, "failed to read DBI register, addr=0x%04x\n", addr); - ret = -EIO; - } + struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; + struct pci_dev *pdev = rtwpci->pdev; - return ret; + return pci_read_config_byte(pdev, addr, value); } -static int rtw89_dbi_write8_set(struct rtw89_dev *rtwdev, u16 addr, u8 bit) +static int rtw89_pci_config_byte_set(struct rtw89_dev *rtwdev, u16 addr, + u8 bit) { u8 value; int ret; - ret = rtw89_dbi_read8(rtwdev, addr, &value); + ret = rtw89_pci_read_config_byte(rtwdev, addr, &value); if (ret) return ret; value |= bit; - ret = rtw89_dbi_write8(rtwdev, addr, value); + ret = rtw89_pci_write_config_byte(rtwdev, addr, value); return ret; } -static int rtw89_dbi_write8_clr(struct rtw89_dev *rtwdev, u16 addr, u8 bit) +static int rtw89_pci_config_byte_clr(struct rtw89_dev *rtwdev, u16 addr, + u8 bit) { u8 value; int ret; - ret = rtw89_dbi_read8(rtwdev, addr, &value); + ret = rtw89_pci_read_config_byte(rtwdev, addr, &value); if (ret) return ret; value &= ~bit; - ret = rtw89_dbi_write8(rtwdev, addr, value); + ret = rtw89_pci_write_config_byte(rtwdev, addr, value); return ret; } @@ -1542,9 +1554,10 @@ static int rtw89_pci_auto_refclk_cal(struct rtw89_dev *rtwdev, bool autook_en) rtwdev->chip->chip_id == RTL8852C) return 0; - ret = rtw89_dbi_read8(rtwdev, RTW89_PCIE_PHY_RATE, &val8); + ret = rtw89_pci_read_config_byte(rtwdev, RTW89_PCIE_PHY_RATE, &val8); if (ret) { - rtw89_err(rtwdev, "[ERR]dbi_r8_pcie %X\n", RTW89_PCIE_PHY_RATE); + rtw89_err(rtwdev, "[ERR]pci config read %X\n", + RTW89_PCIE_PHY_RATE); return ret; } @@ -1557,17 +1570,18 @@ static int rtw89_pci_auto_refclk_cal(struct rtw89_dev *rtwdev, bool autook_en) return -EOPNOTSUPP; } /* Disable L1BD */ - ret = rtw89_dbi_read8(rtwdev, RTW89_PCIE_L1_CTRL, &bdr_ori); + ret = rtw89_pci_read_config_byte(rtwdev, RTW89_PCIE_L1_CTRL, &bdr_ori); if (ret) { - rtw89_err(rtwdev, "[ERR]dbi_r8_pcie %X\n", RTW89_PCIE_L1_CTRL); + rtw89_err(rtwdev, "[ERR]pci config read %X\n", RTW89_PCIE_L1_CTRL); return ret; } if (bdr_ori & RTW89_PCIE_BIT_L1) { - ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_L1_CTRL, - bdr_ori & ~RTW89_PCIE_BIT_L1); + ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_L1_CTRL, + bdr_ori & ~RTW89_PCIE_BIT_L1); if (ret) { - rtw89_err(rtwdev, "[ERR]dbi_w8_pcie %X\n", RTW89_PCIE_L1_CTRL); + rtw89_err(rtwdev, "[ERR]pci config write %X\n", + RTW89_PCIE_L1_CTRL); return ret; } l1_flag = true; @@ -1662,14 +1676,17 @@ static int rtw89_pci_auto_refclk_cal(struct rtw89_dev *rtwdev, bool autook_en) } /* CLK delay = 0 */ - ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_CLK_CTRL, PCIE_CLKDLY_HW_0); + ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_CLK_CTRL, + PCIE_CLKDLY_HW_0); end: /* Set L1BD to ori */ if (l1_flag) { - ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_L1_CTRL, bdr_ori); + ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_L1_CTRL, + bdr_ori); if (ret) { - rtw89_err(rtwdev, "[ERR]dbi_w8_pcie %X\n", RTW89_PCIE_L1_CTRL); + rtw89_err(rtwdev, "[ERR]pci config write %X\n", + RTW89_PCIE_L1_CTRL); return ret; } } @@ -2210,14 +2227,10 @@ static int rtw89_pci_alloc_tx_ring(struct rtw89_dev *rtwdev, u32 desc_size, u32 len, enum rtw89_tx_channel txch) { + const struct rtw89_pci_ch_dma_addr *txch_addr; int ring_sz = desc_size * len; u8 *head; dma_addr_t dma; - u32 addr_num; - u32 addr_idx; - u32 addr_bdram; - u32 addr_desa_l; - u32 addr_desa_h; int ret; ret = rtw89_pci_alloc_tx_wd_ring(rtwdev, pdev, tx_ring, txch); @@ -2226,8 +2239,7 @@ static int rtw89_pci_alloc_tx_ring(struct rtw89_dev *rtwdev, goto err; } - ret = rtw89_pci_get_txch_addrs(txch, &addr_num, &addr_idx, &addr_bdram, - &addr_desa_l, &addr_desa_h); + ret = rtw89_pci_get_txch_addrs(rtwdev, txch, &txch_addr); if (ret) { rtw89_err(rtwdev, "failed to get address of txch %d", txch); goto err_free_wd_ring; @@ -2244,11 +2256,7 @@ static int rtw89_pci_alloc_tx_ring(struct rtw89_dev *rtwdev, tx_ring->bd_ring.dma = dma; tx_ring->bd_ring.len = len; tx_ring->bd_ring.desc_size = desc_size; - tx_ring->bd_ring.addr_num = addr_num; - tx_ring->bd_ring.addr_idx = addr_idx; - tx_ring->bd_ring.addr_bdram = addr_bdram; - tx_ring->bd_ring.addr_desa_l = addr_desa_l; - tx_ring->bd_ring.addr_desa_h = addr_desa_h; + tx_ring->bd_ring.addr = *txch_addr; tx_ring->bd_ring.wp = 0; tx_ring->bd_ring.rp = 0; tx_ring->txch = txch; @@ -2300,20 +2308,16 @@ static int rtw89_pci_alloc_rx_ring(struct rtw89_dev *rtwdev, struct rtw89_pci_rx_ring *rx_ring, u32 desc_size, u32 len, u32 rxch) { + const struct rtw89_pci_ch_dma_addr *rxch_addr; struct sk_buff *skb; u8 *head; dma_addr_t dma; - u32 addr_num; - u32 addr_idx; - u32 addr_desa_l; - u32 addr_desa_h; int ring_sz = desc_size * len; int buf_sz = RTW89_PCI_RX_BUF_SIZE; int i, allocated; int ret; - ret = rtw89_pci_get_rxch_addrs(rxch, &addr_num, &addr_idx, - &addr_desa_l, &addr_desa_h); + ret = rtw89_pci_get_rxch_addrs(rtwdev, rxch, &rxch_addr); if (ret) { rtw89_err(rtwdev, "failed to get address of rxch %d", rxch); return ret; @@ -2329,10 +2333,7 @@ static int rtw89_pci_alloc_rx_ring(struct rtw89_dev *rtwdev, rx_ring->bd_ring.dma = dma; rx_ring->bd_ring.len = len; rx_ring->bd_ring.desc_size = desc_size; - rx_ring->bd_ring.addr_num = addr_num; - rx_ring->bd_ring.addr_idx = addr_idx; - rx_ring->bd_ring.addr_desa_l = addr_desa_l; - rx_ring->bd_ring.addr_desa_h = addr_desa_h; + rx_ring->bd_ring.addr = *rxch_addr; rx_ring->bd_ring.wp = 0; rx_ring->bd_ring.rp = 0; rx_ring->buf_sz = buf_sz; @@ -2552,17 +2553,17 @@ static void rtw89_pci_clkreq_set(struct rtw89_dev *rtwdev, bool enable) if (rtw89_pci_disable_clkreq) return; - ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_CLK_CTRL, - PCIE_CLKDLY_HW_30US); + ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_CLK_CTRL, + PCIE_CLKDLY_HW_30US); if (ret) rtw89_err(rtwdev, "failed to set CLKREQ Delay\n"); if (enable) - ret = rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_L1_CTRL, - RTW89_PCIE_BIT_CLK); + ret = rtw89_pci_config_byte_set(rtwdev, RTW89_PCIE_L1_CTRL, + RTW89_PCIE_BIT_CLK); else - ret = rtw89_dbi_write8_clr(rtwdev, RTW89_PCIE_L1_CTRL, - RTW89_PCIE_BIT_CLK); + ret = rtw89_pci_config_byte_clr(rtwdev, RTW89_PCIE_L1_CTRL, + RTW89_PCIE_BIT_CLK); if (ret) rtw89_err(rtwdev, "failed to %s CLKREQ_L1, ret=%d", enable ? "set" : "unset", ret); @@ -2576,7 +2577,7 @@ static void rtw89_pci_aspm_set(struct rtw89_dev *rtwdev, bool enable) if (rtw89_pci_disable_aspm_l1) return; - ret = rtw89_dbi_read8(rtwdev, RTW89_PCIE_ASPM_CTRL, &value); + ret = rtw89_pci_read_config_byte(rtwdev, RTW89_PCIE_ASPM_CTRL, &value); if (ret) rtw89_err(rtwdev, "failed to read ASPM Delay\n"); @@ -2584,16 +2585,16 @@ static void rtw89_pci_aspm_set(struct rtw89_dev *rtwdev, bool enable) value |= FIELD_PREP(RTW89_L1DLY_MASK, PCIE_L1DLY_16US) | FIELD_PREP(RTW89_L0DLY_MASK, PCIE_L0SDLY_4US); - ret = rtw89_dbi_write8(rtwdev, RTW89_PCIE_ASPM_CTRL, value); + ret = rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_ASPM_CTRL, value); if (ret) rtw89_err(rtwdev, "failed to read ASPM Delay\n"); if (enable) - ret = rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_L1_CTRL, - RTW89_PCIE_BIT_L1); + ret = rtw89_pci_config_byte_set(rtwdev, RTW89_PCIE_L1_CTRL, + RTW89_PCIE_BIT_L1); else - ret = rtw89_dbi_write8_clr(rtwdev, RTW89_PCIE_L1_CTRL, - RTW89_PCIE_BIT_L1); + ret = rtw89_pci_config_byte_clr(rtwdev, RTW89_PCIE_L1_CTRL, + RTW89_PCIE_BIT_L1); if (ret) rtw89_err(rtwdev, "failed to %s ASPM L1, ret=%d", enable ? "set" : "unset", ret); @@ -2657,11 +2658,11 @@ static void rtw89_pci_l1ss_set(struct rtw89_dev *rtwdev, bool enable) int ret; if (enable) - ret = rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_TIMER_CTRL, - RTW89_PCIE_BIT_L1SUB); + ret = rtw89_pci_config_byte_set(rtwdev, RTW89_PCIE_TIMER_CTRL, + RTW89_PCIE_BIT_L1SUB); else - ret = rtw89_dbi_write8_clr(rtwdev, RTW89_PCIE_TIMER_CTRL, - RTW89_PCIE_BIT_L1SUB); + ret = rtw89_pci_config_byte_clr(rtwdev, RTW89_PCIE_TIMER_CTRL, + RTW89_PCIE_BIT_L1SUB); if (ret) rtw89_err(rtwdev, "failed to %s L1SS, ret=%d", enable ? "set" : "unset", ret); @@ -2878,10 +2879,10 @@ static void rtw89_pci_l2_hci_ldo(struct rtw89_dev *rtwdev) return; /* Hardware need write the reg twice to ensure the setting work */ - rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_RST_MSTATE, - RTW89_PCIE_BIT_CFG_RST_MSTATE); - rtw89_dbi_write8_set(rtwdev, RTW89_PCIE_RST_MSTATE, - RTW89_PCIE_BIT_CFG_RST_MSTATE); + rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_RST_MSTATE, + RTW89_PCIE_BIT_CFG_RST_MSTATE); + rtw89_pci_write_config_byte(rtwdev, RTW89_PCIE_RST_MSTATE, + RTW89_PCIE_BIT_CFG_RST_MSTATE); } static int __maybe_unused rtw89_pci_resume(struct device *dev) @@ -2932,11 +2933,11 @@ static const struct rtw89_hci_ops rtw89_pci_ops = { .napi_poll = rtw89_pci_napi_poll, }; -static int rtw89_pci_probe(struct pci_dev *pdev, - const struct pci_device_id *id) +int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) { struct ieee80211_hw *hw; struct rtw89_dev *rtwdev; + const struct rtw89_driver_info *info; int driver_data_size; int ret; @@ -2957,13 +2958,9 @@ static int rtw89_pci_probe(struct pci_dev *pdev, SET_IEEE80211_DEV(rtwdev->hw, &pdev->dev); - switch (id->driver_data) { - case RTL8852A: - rtwdev->chip = &rtw8852a_chip_info; - break; - default: - return -ENOENT; - } + info = (const struct rtw89_driver_info *)id->driver_data; + rtwdev->chip = info->chip; + rtwdev->pci_info = info->bus.pci; ret = rtw89_core_init(rtwdev); if (ret) { @@ -3022,8 +3019,9 @@ err_release_hw: return ret; } +EXPORT_SYMBOL(rtw89_pci_probe); -static void rtw89_pci_remove(struct pci_dev *pdev) +void rtw89_pci_remove(struct pci_dev *pdev) { struct ieee80211_hw *hw = pci_get_drvdata(pdev); struct rtw89_dev *rtwdev; @@ -3038,22 +3036,7 @@ static void rtw89_pci_remove(struct pci_dev *pdev) rtw89_core_deinit(rtwdev); ieee80211_free_hw(hw); } - -static const struct pci_device_id rtw89_pci_id_table[] = { - { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8852), .driver_data = RTL8852A }, - { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xa85a), .driver_data = RTL8852A }, - {}, -}; -MODULE_DEVICE_TABLE(pci, rtw89_pci_id_table); - -static struct pci_driver rtw89_pci_driver = { - .name = "rtw89_pci", - .id_table = rtw89_pci_id_table, - .probe = rtw89_pci_probe, - .remove = rtw89_pci_remove, - .driver.pm = &rtw89_pm_ops, -}; -module_pci_driver(rtw89_pci_driver); +EXPORT_SYMBOL(rtw89_pci_remove); MODULE_AUTHOR("Realtek Corporation"); MODULE_DESCRIPTION("Realtek 802.11ax wireless PCI driver"); diff --git a/drivers/net/wireless/realtek/rtw89/pci.h b/drivers/net/wireless/realtek/rtw89/pci.h index 20e6767ea5c4..b84acd0d0582 100644 --- a/drivers/net/wireless/realtek/rtw89/pci.h +++ b/drivers/net/wireless/realtek/rtw89/pci.h @@ -130,6 +130,10 @@ #define R_AX_CH10_TXBD_IDX 0x137C /* Management Queue band 1 */ #define R_AX_CH11_TXBD_IDX 0x1380 /* HI Queue band 1 */ #define R_AX_CH12_TXBD_IDX 0x1080 /* FWCMD Queue */ +#define R_AX_CH10_TXBD_IDX_V1 0x11D0 +#define R_AX_CH11_TXBD_IDX_V1 0x11D4 +#define R_AX_RXQ_RXBD_IDX_V1 0x1218 +#define R_AX_RPQ_RXBD_IDX_V1 0x121C #define TXBD_HW_IDX_MASK GENMASK(27, 16) #define TXBD_HOST_IDX_MASK GENMASK(11, 0) @@ -163,6 +167,36 @@ #define R_AX_RXQ_RXBD_DESA_H 0x1104 #define R_AX_RPQ_RXBD_DESA_L 0x1108 #define R_AX_RPQ_RXBD_DESA_H 0x110C +#define R_AX_RXQ_RXBD_DESA_L_V1 0x1220 +#define R_AX_RXQ_RXBD_DESA_H_V1 0x1224 +#define R_AX_RPQ_RXBD_DESA_L_V1 0x1228 +#define R_AX_RPQ_RXBD_DESA_H_V1 0x122C +#define R_AX_ACH0_TXBD_DESA_L_V1 0x1230 +#define R_AX_ACH0_TXBD_DESA_H_V1 0x1234 +#define R_AX_ACH1_TXBD_DESA_L_V1 0x1238 +#define R_AX_ACH1_TXBD_DESA_H_V1 0x123C +#define R_AX_ACH2_TXBD_DESA_L_V1 0x1240 +#define R_AX_ACH2_TXBD_DESA_H_V1 0x1244 +#define R_AX_ACH3_TXBD_DESA_L_V1 0x1248 +#define R_AX_ACH3_TXBD_DESA_H_V1 0x124C +#define R_AX_ACH4_TXBD_DESA_L_V1 0x1250 +#define R_AX_ACH4_TXBD_DESA_H_V1 0x1254 +#define R_AX_ACH5_TXBD_DESA_L_V1 0x1258 +#define R_AX_ACH5_TXBD_DESA_H_V1 0x125C +#define R_AX_ACH6_TXBD_DESA_L_V1 0x1260 +#define R_AX_ACH6_TXBD_DESA_H_V1 0x1264 +#define R_AX_ACH7_TXBD_DESA_L_V1 0x1268 +#define R_AX_ACH7_TXBD_DESA_H_V1 0x126C +#define R_AX_CH8_TXBD_DESA_L_V1 0x1270 +#define R_AX_CH8_TXBD_DESA_H_V1 0x1274 +#define R_AX_CH9_TXBD_DESA_L_V1 0x1278 +#define R_AX_CH9_TXBD_DESA_H_V1 0x127C +#define R_AX_CH12_TXBD_DESA_L_V1 0x1280 +#define R_AX_CH12_TXBD_DESA_H_V1 0x1284 +#define R_AX_CH10_TXBD_DESA_L_V1 0x1458 +#define R_AX_CH10_TXBD_DESA_H_V1 0x145C +#define R_AX_CH11_TXBD_DESA_L_V1 0x1460 +#define R_AX_CH11_TXBD_DESA_H_V1 0x1464 #define B_AX_DESC_NUM_MSK GENMASK(11, 0) #define R_AX_RXQ_RXBD_NUM 0x1020 @@ -180,6 +214,10 @@ #define R_AX_CH10_TXBD_NUM 0x1338 #define R_AX_CH11_TXBD_NUM 0x133A #define R_AX_CH12_TXBD_NUM 0x1038 +#define R_AX_RXQ_RXBD_NUM_V1 0x1210 +#define R_AX_RPQ_RXBD_NUM_V1 0x1212 +#define R_AX_CH10_TXBD_NUM_V1 0x1438 +#define R_AX_CH11_TXBD_NUM_V1 0x143A #define R_AX_ACH0_BDRAM_CTRL 0x1200 #define R_AX_ACH1_BDRAM_CTRL 0x1204 @@ -194,6 +232,19 @@ #define R_AX_CH10_BDRAM_CTRL 0x1320 #define R_AX_CH11_BDRAM_CTRL 0x1324 #define R_AX_CH12_BDRAM_CTRL 0x1228 +#define R_AX_ACH0_BDRAM_CTRL_V1 0x1300 +#define R_AX_ACH1_BDRAM_CTRL_V1 0x1304 +#define R_AX_ACH2_BDRAM_CTRL_V1 0x1308 +#define R_AX_ACH3_BDRAM_CTRL_V1 0x130C +#define R_AX_ACH4_BDRAM_CTRL_V1 0x1310 +#define R_AX_ACH5_BDRAM_CTRL_V1 0x1314 +#define R_AX_ACH6_BDRAM_CTRL_V1 0x1318 +#define R_AX_ACH7_BDRAM_CTRL_V1 0x131C +#define R_AX_CH8_BDRAM_CTRL_V1 0x1320 +#define R_AX_CH9_BDRAM_CTRL_V1 0x1324 +#define R_AX_CH12_BDRAM_CTRL_V1 0x1328 +#define R_AX_CH10_BDRAM_CTRL_V1 0x1420 +#define R_AX_CH11_BDRAM_CTRL_V1 0x1424 #define BDRAM_SIDX_MASK GENMASK(7, 0) #define BDRAM_MAX_MASK GENMASK(15, 8) #define BDRAM_MIN_MASK GENMASK(23, 16) @@ -382,6 +433,23 @@ enum rtw89_pcie_clkdly_hw { PCIE_CLKDLY_HW_200US = 0x5, }; +struct rtw89_pci_ch_dma_addr { + u32 num; + u32 idx; + u32 bdram; + u32 desa_l; + u32 desa_h; +}; + +struct rtw89_pci_ch_dma_addr_set { + struct rtw89_pci_ch_dma_addr tx[RTW89_TXCH_NUM]; + struct rtw89_pci_ch_dma_addr rx[RTW89_RXCH_NUM]; +}; + +struct rtw89_pci_info { + const struct rtw89_pci_ch_dma_addr_set *dma_addr_set; +}; + struct rtw89_pci_bd_ram { u8 start_idx; u8 max_num; @@ -469,11 +537,7 @@ struct rtw89_pci_dma_ring { u8 desc_size; dma_addr_t dma; - u32 addr_num; - u32 addr_idx; - u32 addr_bdram; - u32 addr_desa_l; - u32 addr_desa_h; + struct rtw89_pci_ch_dma_addr addr; u32 len; u32 wp; /* host idx */ @@ -626,5 +690,12 @@ static inline bool rtw89_pci_ltr_is_err_reg_val(u32 val) } extern const struct dev_pm_ops rtw89_pm_ops; +extern const struct rtw89_pci_ch_dma_addr_set rtw89_pci_ch_dma_addr_set; +extern const struct rtw89_pci_ch_dma_addr_set rtw89_pci_ch_dma_addr_set_v1; + +struct pci_device_id; + +int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id); +void rtw89_pci_remove(struct pci_dev *pdev); #endif diff --git a/drivers/net/wireless/realtek/rtw89/phy.c b/drivers/net/wireless/realtek/rtw89/phy.c index 147009888de0..ac211d897311 100644 --- a/drivers/net/wireless/realtek/rtw89/phy.c +++ b/drivers/net/wireless/realtek/rtw89/phy.c @@ -4,6 +4,7 @@ #include "debug.h" #include "fw.h" +#include "mac.h" #include "phy.h" #include "ps.h" #include "reg.h" @@ -117,17 +118,28 @@ static u64 rtw89_phy_ra_mask_rssi(struct rtw89_dev *rtwdev, u8 rssi, else if (rssi_lv == 1) return 0xfffffffffffffff0ULL; else if (rssi_lv == 2) - return 0xffffffffffffffe0ULL; + return 0xffffffffffffefe0ULL; else if (rssi_lv == 3) - return 0xffffffffffffffc0ULL; + return 0xffffffffffffcfc0ULL; else if (rssi_lv == 4) - return 0xffffffffffffff80ULL; + return 0xffffffffffff8f80ULL; else if (rssi_lv >= 5) - return 0xffffffffffffff00ULL; + return 0xffffffffffff0f00ULL; return 0xffffffffffffffffULL; } +static u64 rtw89_phy_ra_mask_recover(u64 ra_mask, u64 ra_mask_bak) +{ + if ((ra_mask & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)) == 0) + ra_mask |= (ra_mask_bak & ~(RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); + + if (ra_mask == 0) + ra_mask |= (ra_mask_bak & (RA_MASK_CCK_RATES | RA_MASK_OFDM_RATES)); + + return ra_mask; +} + static u64 rtw89_phy_ra_mask_cfg(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta) { struct rtw89_hal *hal = &rtwdev->hal; @@ -150,6 +162,11 @@ static u64 rtw89_phy_ra_mask_cfg(struct rtw89_dev *rtwdev, struct rtw89_sta *rtw cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy, RA_MASK_OFDM_RATES); break; + case RTW89_BAND_6G: + band = NL80211_BAND_6GHZ; + cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_6GHZ].legacy, + RA_MASK_OFDM_RATES); + break; default: rtw89_warn(rtwdev, "unhandled band type %d\n", hal->current_band_type); return -1; @@ -194,8 +211,8 @@ static void rtw89_phy_ra_sta_update(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra = &rtwsta->ra; const u64 *high_rate_masks = rtw89_ra_mask_ht_rates; u8 rssi = ewma_rssi_read(&rtwsta->avg_rssi); - u64 high_rate_mask = 0; u64 ra_mask = 0; + u64 ra_mask_bak; u8 mode = 0; u8 csi_mode = RTW89_RA_RPT_MODE_LEGACY; u8 bw_mode = 0; @@ -243,37 +260,54 @@ static void rtw89_phy_ra_sta_update(struct rtw89_dev *rtwdev, ldpc_en = 1; } - if (rtwdev->hal.current_band_type == RTW89_BAND_2G) { + switch (rtwdev->hal.current_band_type) { + case RTW89_BAND_2G: + ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ]; if (sta->supp_rates[NL80211_BAND_2GHZ] <= 0xf) mode |= RTW89_RA_MODE_CCK; else mode |= RTW89_RA_MODE_CCK | RTW89_RA_MODE_OFDM; - } else { + break; + case RTW89_BAND_5G: + ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4; mode |= RTW89_RA_MODE_OFDM; + break; + case RTW89_BAND_6G: + ra_mask |= (u64)sta->supp_rates[NL80211_BAND_6GHZ] << 4; + mode |= RTW89_RA_MODE_OFDM; + break; + default: + rtw89_err(rtwdev, "Unknown band type\n"); + break; } + ra_mask_bak = ra_mask; + if (mode >= RTW89_RA_MODE_HT) { + u64 mask = 0; for (i = 0; i < rtwdev->hal.tx_nss; i++) - high_rate_mask |= high_rate_masks[i]; - ra_mask &= high_rate_mask; + mask |= high_rate_masks[i]; if (mode & RTW89_RA_MODE_OFDM) - ra_mask |= RA_MASK_SUBOFDM_RATES; + mask |= RA_MASK_SUBOFDM_RATES; if (mode & RTW89_RA_MODE_CCK) - ra_mask |= RA_MASK_SUBCCK_RATES; + mask |= RA_MASK_SUBCCK_RATES; + ra_mask &= mask; } else if (mode & RTW89_RA_MODE_OFDM) { - if (mode & RTW89_RA_MODE_CCK) - ra_mask |= RA_MASK_SUBCCK_RATES; - ra_mask |= RA_MASK_OFDM_RATES; - } else { - ra_mask = RA_MASK_CCK_RATES; + ra_mask &= (RA_MASK_OFDM_RATES | RA_MASK_SUBCCK_RATES); } - if (mode != RTW89_RA_MODE_CCK) { + if (mode != RTW89_RA_MODE_CCK) ra_mask &= rtw89_phy_ra_mask_rssi(rtwdev, rssi, 0); - ra_mask &= rtw89_phy_ra_mask_cfg(rtwdev, rtwsta); - } + + ra_mask = rtw89_phy_ra_mask_recover(ra_mask, ra_mask_bak); + ra_mask &= rtw89_phy_ra_mask_cfg(rtwdev, rtwsta); switch (sta->bandwidth) { + case IEEE80211_STA_RX_BW_160: + bw_mode = RTW89_CHANNEL_WIDTH_160; + sgi = sta->vht_cap.vht_supported && + (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160); + break; case IEEE80211_STA_RX_BW_80: bw_mode = RTW89_CHANNEL_WIDTH_80; sgi = sta->vht_cap.vht_supported && @@ -568,6 +602,13 @@ u8 rtw89_phy_get_txsc(struct rtw89_dev *rtwdev, return txsc_idx; } +EXPORT_SYMBOL(rtw89_phy_get_txsc); + +static bool rtw89_phy_check_swsi_busy(struct rtw89_dev *rtwdev) +{ + return !!rtw89_phy_read32_mask(rtwdev, R_SWSI_V1, B_SWSI_W_BUSY_V1) || + !!rtw89_phy_read32_mask(rtwdev, R_SWSI_V1, B_SWSI_R_BUSY_V1); +} u32 rtw89_phy_read_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, u32 addr, u32 mask) @@ -591,6 +632,56 @@ u32 rtw89_phy_read_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, } EXPORT_SYMBOL(rtw89_phy_read_rf); +static u32 rtw89_phy_read_rf_a(struct rtw89_dev *rtwdev, + enum rtw89_rf_path rf_path, u32 addr, u32 mask) +{ + bool busy; + bool done; + u32 val; + int ret; + + ret = read_poll_timeout_atomic(rtw89_phy_check_swsi_busy, busy, !busy, + 1, 30, false, rtwdev); + if (ret) { + rtw89_err(rtwdev, "read rf busy swsi\n"); + return INV_RF_DATA; + } + + mask &= RFREG_MASK; + + val = FIELD_PREP(B_SWSI_READ_ADDR_PATH_V1, rf_path) | + FIELD_PREP(B_SWSI_READ_ADDR_ADDR_V1, addr); + rtw89_phy_write32_mask(rtwdev, R_SWSI_READ_ADDR_V1, B_SWSI_READ_ADDR_V1, val); + udelay(2); + + ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, done, done, 1, + 30, false, rtwdev, R_SWSI_V1, + B_SWSI_R_DATA_DONE_V1); + if (ret) { + rtw89_err(rtwdev, "read swsi busy\n"); + return INV_RF_DATA; + } + + return rtw89_phy_read32_mask(rtwdev, R_SWSI_V1, mask); +} + +u32 rtw89_phy_read_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, + u32 addr, u32 mask) +{ + bool ad_sel = FIELD_GET(RTW89_RF_ADDR_ADSEL_MASK, addr); + + if (rf_path >= rtwdev->chip->rf_path_num) { + rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path); + return INV_RF_DATA; + } + + if (ad_sel) + return rtw89_phy_read_rf(rtwdev, rf_path, addr, mask); + else + return rtw89_phy_read_rf_a(rtwdev, rf_path, addr, mask); +} +EXPORT_SYMBOL(rtw89_phy_read_rf_v1); + bool rtw89_phy_write_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, u32 addr, u32 mask, u32 data) { @@ -616,6 +707,60 @@ bool rtw89_phy_write_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, } EXPORT_SYMBOL(rtw89_phy_write_rf); +static bool rtw89_phy_write_rf_a(struct rtw89_dev *rtwdev, + enum rtw89_rf_path rf_path, u32 addr, u32 mask, + u32 data) +{ + u8 bit_shift; + u32 val; + bool busy, b_msk_en = false; + int ret; + + ret = read_poll_timeout_atomic(rtw89_phy_check_swsi_busy, busy, !busy, + 1, 30, false, rtwdev); + if (ret) { + rtw89_err(rtwdev, "write rf busy swsi\n"); + return false; + } + + data &= RFREG_MASK; + mask &= RFREG_MASK; + + if (mask != RFREG_MASK) { + b_msk_en = true; + rtw89_phy_write32_mask(rtwdev, R_SWSI_BIT_MASK_V1, RFREG_MASK, + mask); + bit_shift = __ffs(mask); + data = (data << bit_shift) & RFREG_MASK; + } + + val = FIELD_PREP(B_SWSI_DATA_BIT_MASK_EN_V1, b_msk_en) | + FIELD_PREP(B_SWSI_DATA_PATH_V1, rf_path) | + FIELD_PREP(B_SWSI_DATA_ADDR_V1, addr) | + FIELD_PREP(B_SWSI_DATA_VAL_V1, data); + + rtw89_phy_write32_mask(rtwdev, R_SWSI_DATA_V1, MASKDWORD, val); + + return true; +} + +bool rtw89_phy_write_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, + u32 addr, u32 mask, u32 data) +{ + bool ad_sel = FIELD_GET(RTW89_RF_ADDR_ADSEL_MASK, addr); + + if (rf_path >= rtwdev->chip->rf_path_num) { + rtw89_err(rtwdev, "unsupported rf path (%d)\n", rf_path); + return false; + } + + if (ad_sel) + return rtw89_phy_write_rf(rtwdev, rf_path, addr, mask, data); + else + return rtw89_phy_write_rf_a(rtwdev, rf_path, addr, mask, data); +} +EXPORT_SYMBOL(rtw89_phy_write_rf_v1); + static void rtw89_phy_bb_reset(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) { @@ -717,6 +862,21 @@ static void rtw89_phy_config_rf_reg(struct rtw89_dev *rtwdev, } } +void rtw89_phy_config_rf_reg_v1(struct rtw89_dev *rtwdev, + const struct rtw89_reg2_def *reg, + enum rtw89_rf_path rf_path, + void *extra_data) +{ + rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data); + + if (reg->addr < 0x100) + return; + + rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path, + (struct rtw89_fw_h2c_rf_reg_info *)extra_data); +} +EXPORT_SYMBOL(rtw89_phy_config_rf_reg_v1); + static int rtw89_phy_sel_headline(struct rtw89_dev *rtwdev, const struct rtw89_phy_table *table, u32 *headline_size, u32 *headline_idx, @@ -888,6 +1048,8 @@ static u32 rtw89_phy_nctl_poll(struct rtw89_dev *rtwdev) void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev) { + void (*config)(struct rtw89_dev *rtwdev, const struct rtw89_reg2_def *reg, + enum rtw89_rf_path rf_path, void *data); const struct rtw89_chip_info *chip = rtwdev->chip; const struct rtw89_phy_table *rf_table; struct rtw89_fw_h2c_rf_reg_info *rf_reg_info; @@ -898,13 +1060,13 @@ void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev) return; for (path = RF_PATH_A; path < chip->rf_path_num; path++) { - rf_reg_info->rf_path = path; rf_table = chip->rf_table[path]; - rtw89_phy_init_reg(rtwdev, rf_table, rtw89_phy_config_rf_reg, - (void *)rf_reg_info); + rf_reg_info->rf_path = rf_table->rf_path; + config = rf_table->config ? rf_table->config : rtw89_phy_config_rf_reg; + rtw89_phy_init_reg(rtwdev, rf_table, config, (void *)rf_reg_info); if (rtw89_phy_config_rf_reg_fw(rtwdev, rf_reg_info)) rtw89_warn(rtwdev, "rf path %d reg h2c config failed\n", - path); + rf_reg_info->rf_path); } kfree(rf_reg_info); } @@ -972,6 +1134,7 @@ void rtw89_phy_write32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, addr += rtw89_phy0_phy1_offset(rtwdev, addr); rtw89_phy_write32_mask(rtwdev, addr, mask, data); } +EXPORT_SYMBOL(rtw89_phy_write32_idx); void rtw89_phy_set_phy_regs(struct rtw89_dev *rtwdev, u32 addr, u32 mask, u32 val) @@ -995,6 +1158,7 @@ void rtw89_phy_write_reg3_tbl(struct rtw89_dev *rtwdev, rtw89_phy_write32_mask(rtwdev, reg3->addr, reg3->mask, reg3->data); } } +EXPORT_SYMBOL(rtw89_phy_write_reg3_tbl); const u8 rtw89_rs_idx_max[] = { [RTW89_RS_CCK] = RTW89_RATE_CCK_MAX, @@ -1003,6 +1167,7 @@ const u8 rtw89_rs_idx_max[] = { [RTW89_RS_HEDCM] = RTW89_RATE_HEDCM_MAX, [RTW89_RS_OFFSET] = RTW89_RATE_OFFSET_MAX, }; +EXPORT_SYMBOL(rtw89_rs_idx_max); const u8 rtw89_rs_nss_max[] = { [RTW89_RS_CCK] = 1, @@ -1011,6 +1176,7 @@ const u8 rtw89_rs_nss_max[] = { [RTW89_RS_HEDCM] = RTW89_NSS_HEDCM_MAX, [RTW89_RS_OFFSET] = 1, }; +EXPORT_SYMBOL(rtw89_rs_nss_max); static const u8 _byr_of_rs[] = { [RTW89_RS_CCK] = offsetof(struct rtw89_txpwr_byrate, cck), @@ -1044,6 +1210,7 @@ void rtw89_phy_load_txpwr_byrate(struct rtw89_dev *rtwdev, } } } +EXPORT_SYMBOL(rtw89_phy_load_txpwr_byrate); #define _phy_txpwr_rf_to_mac(rtwdev, txpwr_rf) \ ({ \ @@ -1074,9 +1241,38 @@ s8 rtw89_phy_read_txpwr_byrate(struct rtw89_dev *rtwdev, return _phy_txpwr_rf_to_mac(rtwdev, byr[idx]); } +EXPORT_SYMBOL(rtw89_phy_read_txpwr_byrate); + +static u8 rtw89_channel_6g_to_idx(struct rtw89_dev *rtwdev, u8 channel_6g) +{ + switch (channel_6g) { + case 1 ... 29: + return (channel_6g - 1) / 2; + case 33 ... 61: + return (channel_6g - 3) / 2; + case 65 ... 93: + return (channel_6g - 5) / 2; + case 97 ... 125: + return (channel_6g - 7) / 2; + case 129 ... 157: + return (channel_6g - 9) / 2; + case 161 ... 189: + return (channel_6g - 11) / 2; + case 193 ... 221: + return (channel_6g - 13) / 2; + case 225 ... 253: + return (channel_6g - 15) / 2; + default: + rtw89_warn(rtwdev, "unknown 6g channel: %d\n", channel_6g); + return 0; + } +} -static u8 rtw89_channel_to_idx(struct rtw89_dev *rtwdev, u8 channel) +static u8 rtw89_channel_to_idx(struct rtw89_dev *rtwdev, u8 band, u8 channel) { + if (band == RTW89_BAND_6G) + return rtw89_channel_6g_to_idx(rtwdev, channel); + switch (channel) { case 1 ... 14: return channel - 1; @@ -1096,8 +1292,8 @@ s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, u8 bw, u8 ntx, u8 rs, u8 bf, u8 ch) { const struct rtw89_chip_info *chip = rtwdev->chip; - u8 ch_idx = rtw89_channel_to_idx(rtwdev, ch); u8 band = rtwdev->hal.current_band_type; + u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch); u8 regd = rtw89_regd_get(rtwdev, band); s8 lmt = 0, sar; @@ -1114,6 +1310,12 @@ s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, lmt = (*chip->txpwr_lmt_5g)[bw][ntx][rs][bf] [RTW89_WW][ch_idx]; break; + case RTW89_BAND_6G: + lmt = (*chip->txpwr_lmt_6g)[bw][ntx][rs][bf][regd][ch_idx]; + if (!lmt) + lmt = (*chip->txpwr_lmt_6g)[bw][ntx][rs][bf] + [RTW89_WW][ch_idx]; + break; default: rtw89_warn(rtwdev, "unknown band type: %d\n", band); return 0; @@ -1124,6 +1326,7 @@ s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, return min(lmt, sar); } +EXPORT_SYMBOL(rtw89_phy_read_txpwr_limit); #define __fill_txpwr_limit_nonbf_bf(ptr, bw, ntx, rs, ch) \ do { \ @@ -1151,14 +1354,14 @@ static void rtw89_phy_fill_txpwr_limit_20m(struct rtw89_dev *rtwdev, static void rtw89_phy_fill_txpwr_limit_40m(struct rtw89_dev *rtwdev, struct rtw89_txpwr_limit *lmt, - u8 ntx, u8 ch) + u8 ntx, u8 ch, u8 pri_ch) { __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, RTW89_CHANNEL_WIDTH_20, ntx, RTW89_RS_CCK, ch - 2); __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, RTW89_CHANNEL_WIDTH_40, ntx, RTW89_RS_CCK, ch); __fill_txpwr_limit_nonbf_bf(lmt->ofdm, RTW89_CHANNEL_WIDTH_20, - ntx, RTW89_RS_OFDM, ch - 2); + ntx, RTW89_RS_OFDM, pri_ch); __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], RTW89_CHANNEL_WIDTH_20, ntx, RTW89_RS_MCS, ch - 2); __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], RTW89_CHANNEL_WIDTH_20, @@ -1169,14 +1372,14 @@ static void rtw89_phy_fill_txpwr_limit_40m(struct rtw89_dev *rtwdev, static void rtw89_phy_fill_txpwr_limit_80m(struct rtw89_dev *rtwdev, struct rtw89_txpwr_limit *lmt, - u8 ntx, u8 ch) + u8 ntx, u8 ch, u8 pri_ch) { s8 val_0p5_n[RTW89_BF_NUM]; s8 val_0p5_p[RTW89_BF_NUM]; u8 i; __fill_txpwr_limit_nonbf_bf(lmt->ofdm, RTW89_CHANNEL_WIDTH_20, - ntx, RTW89_RS_OFDM, ch - 6); + ntx, RTW89_RS_OFDM, pri_ch); __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], RTW89_CHANNEL_WIDTH_20, ntx, RTW89_RS_MCS, ch - 6); __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], RTW89_CHANNEL_WIDTH_20, @@ -1201,10 +1404,82 @@ static void rtw89_phy_fill_txpwr_limit_80m(struct rtw89_dev *rtwdev, lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); } +static void rtw89_phy_fill_txpwr_limit_160m(struct rtw89_dev *rtwdev, + struct rtw89_txpwr_limit *lmt, + u8 ntx, u8 ch, u8 pri_ch) +{ + s8 val_0p5_n[RTW89_BF_NUM]; + s8 val_0p5_p[RTW89_BF_NUM]; + s8 val_2p5_n[RTW89_BF_NUM]; + s8 val_2p5_p[RTW89_BF_NUM]; + u8 i; + + /* fill ofdm section */ + __fill_txpwr_limit_nonbf_bf(lmt->ofdm, RTW89_CHANNEL_WIDTH_20, + ntx, RTW89_RS_OFDM, pri_ch); + + /* fill mcs 20m section */ + __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], RTW89_CHANNEL_WIDTH_20, + ntx, RTW89_RS_MCS, ch - 14); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], RTW89_CHANNEL_WIDTH_20, + ntx, RTW89_RS_MCS, ch - 10); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], RTW89_CHANNEL_WIDTH_20, + ntx, RTW89_RS_MCS, ch - 6); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], RTW89_CHANNEL_WIDTH_20, + ntx, RTW89_RS_MCS, ch - 2); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[4], RTW89_CHANNEL_WIDTH_20, + ntx, RTW89_RS_MCS, ch + 2); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[5], RTW89_CHANNEL_WIDTH_20, + ntx, RTW89_RS_MCS, ch + 6); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[6], RTW89_CHANNEL_WIDTH_20, + ntx, RTW89_RS_MCS, ch + 10); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[7], RTW89_CHANNEL_WIDTH_20, + ntx, RTW89_RS_MCS, ch + 14); + + /* fill mcs 40m section */ + __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], RTW89_CHANNEL_WIDTH_40, + ntx, RTW89_RS_MCS, ch - 12); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], RTW89_CHANNEL_WIDTH_40, + ntx, RTW89_RS_MCS, ch - 4); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[2], RTW89_CHANNEL_WIDTH_40, + ntx, RTW89_RS_MCS, ch + 4); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[3], RTW89_CHANNEL_WIDTH_40, + ntx, RTW89_RS_MCS, ch + 12); + + /* fill mcs 80m section */ + __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], RTW89_CHANNEL_WIDTH_80, + ntx, RTW89_RS_MCS, ch - 8); + __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[1], RTW89_CHANNEL_WIDTH_80, + ntx, RTW89_RS_MCS, ch + 8); + + /* fill mcs 160m section */ + __fill_txpwr_limit_nonbf_bf(lmt->mcs_160m, RTW89_CHANNEL_WIDTH_160, + ntx, RTW89_RS_MCS, ch); + + /* fill mcs 40m 0p5 section */ + __fill_txpwr_limit_nonbf_bf(val_0p5_n, RTW89_CHANNEL_WIDTH_40, + ntx, RTW89_RS_MCS, ch - 4); + __fill_txpwr_limit_nonbf_bf(val_0p5_p, RTW89_CHANNEL_WIDTH_40, + ntx, RTW89_RS_MCS, ch + 4); + + for (i = 0; i < RTW89_BF_NUM; i++) + lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); + + /* fill mcs 40m 2p5 section */ + __fill_txpwr_limit_nonbf_bf(val_2p5_n, RTW89_CHANNEL_WIDTH_40, + ntx, RTW89_RS_MCS, ch - 8); + __fill_txpwr_limit_nonbf_bf(val_2p5_p, RTW89_CHANNEL_WIDTH_40, + ntx, RTW89_RS_MCS, ch + 8); + + for (i = 0; i < RTW89_BF_NUM; i++) + lmt->mcs_40m_2p5[i] = min_t(s8, val_2p5_n[i], val_2p5_p[i]); +} + void rtw89_phy_fill_txpwr_limit(struct rtw89_dev *rtwdev, struct rtw89_txpwr_limit *lmt, u8 ntx) { + u8 pri_ch = rtwdev->hal.current_primary_channel; u8 ch = rtwdev->hal.current_channel; u8 bw = rtwdev->hal.current_band_width; @@ -1215,20 +1490,24 @@ void rtw89_phy_fill_txpwr_limit(struct rtw89_dev *rtwdev, rtw89_phy_fill_txpwr_limit_20m(rtwdev, lmt, ntx, ch); break; case RTW89_CHANNEL_WIDTH_40: - rtw89_phy_fill_txpwr_limit_40m(rtwdev, lmt, ntx, ch); + rtw89_phy_fill_txpwr_limit_40m(rtwdev, lmt, ntx, ch, pri_ch); break; case RTW89_CHANNEL_WIDTH_80: - rtw89_phy_fill_txpwr_limit_80m(rtwdev, lmt, ntx, ch); + rtw89_phy_fill_txpwr_limit_80m(rtwdev, lmt, ntx, ch, pri_ch); + break; + case RTW89_CHANNEL_WIDTH_160: + rtw89_phy_fill_txpwr_limit_160m(rtwdev, lmt, ntx, ch, pri_ch); break; } } +EXPORT_SYMBOL(rtw89_phy_fill_txpwr_limit); static s8 rtw89_phy_read_txpwr_limit_ru(struct rtw89_dev *rtwdev, u8 ru, u8 ntx, u8 ch) { const struct rtw89_chip_info *chip = rtwdev->chip; - u8 ch_idx = rtw89_channel_to_idx(rtwdev, ch); u8 band = rtwdev->hal.current_band_type; + u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch); u8 regd = rtw89_regd_get(rtwdev, band); s8 lmt_ru = 0, sar; @@ -1245,6 +1524,12 @@ static s8 rtw89_phy_read_txpwr_limit_ru(struct rtw89_dev *rtwdev, lmt_ru = (*chip->txpwr_lmt_ru_5g)[ru][ntx] [RTW89_WW][ch_idx]; break; + case RTW89_BAND_6G: + lmt_ru = (*chip->txpwr_lmt_ru_6g)[ru][ntx][regd][ch_idx]; + if (!lmt_ru) + lmt_ru = (*chip->txpwr_lmt_ru_6g)[ru][ntx] + [RTW89_WW][ch_idx]; + break; default: rtw89_warn(rtwdev, "unknown band type: %d\n", band); return 0; @@ -1319,6 +1604,31 @@ rtw89_phy_fill_txpwr_limit_ru_80m(struct rtw89_dev *rtwdev, ntx, ch + 6); } +static void +rtw89_phy_fill_txpwr_limit_ru_160m(struct rtw89_dev *rtwdev, + struct rtw89_txpwr_limit_ru *lmt_ru, + u8 ntx, u8 ch) +{ + static const int ofst[] = { -14, -10, -6, -2, 2, 6, 10, 14 }; + int i; + + static_assert(ARRAY_SIZE(ofst) == RTW89_RU_SEC_NUM); + for (i = 0; i < RTW89_RU_SEC_NUM; i++) { + lmt_ru->ru26[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, + RTW89_RU26, + ntx, + ch + ofst[i]); + lmt_ru->ru52[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, + RTW89_RU52, + ntx, + ch + ofst[i]); + lmt_ru->ru106[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, + RTW89_RU106, + ntx, + ch + ofst[i]); + } +} + void rtw89_phy_fill_txpwr_limit_ru(struct rtw89_dev *rtwdev, struct rtw89_txpwr_limit_ru *lmt_ru, u8 ntx) @@ -1338,8 +1648,12 @@ void rtw89_phy_fill_txpwr_limit_ru(struct rtw89_dev *rtwdev, case RTW89_CHANNEL_WIDTH_80: rtw89_phy_fill_txpwr_limit_ru_80m(rtwdev, lmt_ru, ntx, ch); break; + case RTW89_CHANNEL_WIDTH_160: + rtw89_phy_fill_txpwr_limit_ru_160m(rtwdev, lmt_ru, ntx, ch); + break; } } +EXPORT_SYMBOL(rtw89_phy_fill_txpwr_limit_ru); struct rtw89_phy_iter_ra_data { struct rtw89_dev *rtwdev; @@ -1401,13 +1715,7 @@ static void rtw89_phy_c2h_ra_rpt_iter(void *data, struct ieee80211_sta *sta) break; } - if (bw == RTW89_CHANNEL_WIDTH_80) - ra_report->txrate.bw = RATE_INFO_BW_80; - else if (bw == RTW89_CHANNEL_WIDTH_40) - ra_report->txrate.bw = RATE_INFO_BW_40; - else - ra_report->txrate.bw = RATE_INFO_BW_20; - + ra_report->txrate.bw = rtw89_hw_to_rate_info_bw(bw); ra_report->bit_rate = cfg80211_calculate_bitrate(&ra_report->txrate); ra_report->hw_rate = FIELD_PREP(RTW89_HW_RATE_MASK_MOD, mode) | FIELD_PREP(RTW89_HW_RATE_MASK_VAL, rate); @@ -1487,15 +1795,25 @@ static void rtw89_phy_cfo_set_crystal_cap(struct rtw89_dev *rtwdev, u8 crystal_cap, bool force) { struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; + const struct rtw89_chip_info *chip = rtwdev->chip; u8 sc_xi_val, sc_xo_val; if (!force && cfo->crystal_cap == crystal_cap) return; crystal_cap = clamp_t(u8, crystal_cap, 0, 127); - rtw89_phy_cfo_set_xcap_reg(rtwdev, true, crystal_cap); - rtw89_phy_cfo_set_xcap_reg(rtwdev, false, crystal_cap); - sc_xo_val = rtw89_phy_cfo_get_xcap_reg(rtwdev, true); - sc_xi_val = rtw89_phy_cfo_get_xcap_reg(rtwdev, false); + if (chip->chip_id == RTL8852A) { + rtw89_phy_cfo_set_xcap_reg(rtwdev, true, crystal_cap); + rtw89_phy_cfo_set_xcap_reg(rtwdev, false, crystal_cap); + sc_xo_val = rtw89_phy_cfo_get_xcap_reg(rtwdev, true); + sc_xi_val = rtw89_phy_cfo_get_xcap_reg(rtwdev, false); + } else { + rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_SC_XO, + crystal_cap, XTAL_SC_XO_MASK); + rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_SC_XI, + crystal_cap, XTAL_SC_XI_MASK); + rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_XTAL_SC_XO, &sc_xo_val); + rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_XTAL_SC_XI, &sc_xi_val); + } cfo->crystal_cap = sc_xi_val; cfo->x_cap_ofst = (s8)((int)cfo->crystal_cap - cfo->def_x_cap); @@ -1525,9 +1843,11 @@ static void rtw89_phy_cfo_reset(struct rtw89_dev *rtwdev) static void rtw89_dcfo_comp(struct rtw89_dev *rtwdev, s32 curr_cfo) { + const struct rtw89_reg_def *dcfo_comp = rtwdev->chip->dcfo_comp; bool is_linked = rtwdev->total_sta_assoc > 0; s32 cfo_avg_312; - s32 dcfo_comp; + s32 dcfo_comp_val; + u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft; int sign; if (!is_linked) { @@ -1538,13 +1858,13 @@ static void rtw89_dcfo_comp(struct rtw89_dev *rtwdev, s32 curr_cfo) rtw89_debug(rtwdev, RTW89_DBG_CFO, "DCFO: curr_cfo=%d\n", curr_cfo); if (curr_cfo == 0) return; - dcfo_comp = rtw89_phy_read32_mask(rtwdev, R_DCFO, B_DCFO); + dcfo_comp_val = rtw89_phy_read32_mask(rtwdev, R_DCFO, B_DCFO); sign = curr_cfo > 0 ? 1 : -1; - cfo_avg_312 = (curr_cfo << 3) / 5 + sign * dcfo_comp; + cfo_avg_312 = (curr_cfo << dcfo_comp_sft) / 5 + sign * dcfo_comp_val; rtw89_debug(rtwdev, RTW89_DBG_CFO, "DCFO: avg_cfo=%d\n", cfo_avg_312); if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) cfo_avg_312 = -cfo_avg_312; - rtw89_phy_set_phy_regs(rtwdev, R_DCFO_COMP_S0, B_DCFO_COMP_S0_MSK, + rtw89_phy_set_phy_regs(rtwdev, dcfo_comp->addr, dcfo_comp->mask, cfo_avg_312); } @@ -1563,8 +1883,12 @@ static void rtw89_phy_cfo_init(struct rtw89_dev *rtwdev) cfo->crystal_cap_default = efuse->xtal_cap & B_AX_XTAL_SC_MASK; cfo->crystal_cap = cfo->crystal_cap_default; cfo->def_x_cap = cfo->crystal_cap; + cfo->x_cap_ub = min_t(int, cfo->def_x_cap + CFO_BOUND, 0x7f); + cfo->x_cap_lb = max_t(int, cfo->def_x_cap - CFO_BOUND, 0x1); cfo->is_adjust = false; + cfo->divergence_lock_en = false; cfo->x_cap_ofst = 0; + cfo->lock_cnt = 0; cfo->rtw89_multi_cfo_mode = RTW89_TP_BASED_AVG_MODE; cfo->apply_compensation = false; cfo->residual_cfo_acc = 0; @@ -1782,6 +2106,23 @@ static void rtw89_phy_cfo_dm(struct rtw89_dev *rtwdev) rtw89_debug(rtwdev, RTW89_DBG_CFO, "curr_cfo=0\n"); return; } + if (cfo->divergence_lock_en) { + cfo->lock_cnt++; + if (cfo->lock_cnt > CFO_PERIOD_CNT) { + cfo->divergence_lock_en = false; + cfo->lock_cnt = 0; + } else { + rtw89_phy_cfo_reset(rtwdev); + } + return; + } + if (cfo->crystal_cap >= cfo->x_cap_ub || + cfo->crystal_cap <= cfo->x_cap_lb) { + cfo->divergence_lock_en = true; + rtw89_phy_cfo_reset(rtwdev); + return; + } + rtw89_phy_cfo_crystal_cap_adjust(rtwdev, new_cfo); cfo->cfo_avg_pre = new_cfo; x_cap_update = cfo->crystal_cap != pre_x_cap; @@ -2845,7 +3186,9 @@ static void rtw89_phy_dig_dyn_pd_th(struct rtw89_dev *rtwdev, u8 rssi, enum rtw89_bandwidth cbw = rtwdev->hal.current_band_width; struct rtw89_dig_info *dig = &rtwdev->dig; u8 final_rssi = 0, under_region = dig->pd_low_th_ofst; - u32 val = 0; + u8 ofdm_cca_th; + s8 cck_cca_th; + u32 pd_val = 0; under_region += PD_TH_SB_FLTR_CMP_VAL; @@ -2856,6 +3199,9 @@ static void rtw89_phy_dig_dyn_pd_th(struct rtw89_dev *rtwdev, u8 rssi, case RTW89_CHANNEL_WIDTH_80: under_region += PD_TH_BW80_CMP_VAL; break; + case RTW89_CHANNEL_WIDTH_160: + under_region += PD_TH_BW160_CMP_VAL; + break; case RTW89_CHANNEL_WIDTH_20: fallthrough; default: @@ -2866,23 +3212,38 @@ static void rtw89_phy_dig_dyn_pd_th(struct rtw89_dev *rtwdev, u8 rssi, dig->dyn_pd_th_max = dig->igi_rssi; final_rssi = min_t(u8, rssi, dig->igi_rssi); - final_rssi = clamp_t(u8, final_rssi, PD_TH_MIN_RSSI + under_region, - PD_TH_MAX_RSSI + under_region); + ofdm_cca_th = clamp_t(u8, final_rssi, PD_TH_MIN_RSSI + under_region, + PD_TH_MAX_RSSI + under_region); if (enable) { - val = (final_rssi - under_region - PD_TH_MIN_RSSI) >> 1; + pd_val = (ofdm_cca_th - under_region - PD_TH_MIN_RSSI) >> 1; rtw89_debug(rtwdev, RTW89_DBG_DIG, - "dyn_max=%d, final_rssi=%d, total=%d, PD_low=%d\n", - dig->igi_rssi, final_rssi, under_region, val); + "igi=%d, ofdm_ccaTH=%d, backoff=%d, PD_low=%d\n", + final_rssi, ofdm_cca_th, under_region, pd_val); } else { rtw89_debug(rtwdev, RTW89_DBG_DIG, "Dynamic PD th disabled, Set PD_low_bd=0\n"); } rtw89_phy_write32_mask(rtwdev, R_SEG0R_PD, B_SEG0R_PD_LOWER_BOUND_MSK, - val); + pd_val); rtw89_phy_write32_mask(rtwdev, R_SEG0R_PD, B_SEG0R_PD_SPATIAL_REUSE_EN_MSK, enable); + + if (!rtwdev->hal.support_cckpd) + return; + + cck_cca_th = max_t(s8, final_rssi - under_region, CCKPD_TH_MIN_RSSI); + pd_val = (u32)(cck_cca_th - IGI_RSSI_MAX); + + rtw89_debug(rtwdev, RTW89_DBG_DIG, + "igi=%d, cck_ccaTH=%d, backoff=%d, cck_PD_low=((%d))dB\n", + final_rssi, cck_cca_th, under_region, pd_val); + + rtw89_phy_write32_mask(rtwdev, R_BMODE_PDTH_EN_V1, + B_BMODE_PDTH_LIMIT_EN_MSK_V1, enable); + rtw89_phy_write32_mask(rtwdev, R_BMODE_PDTH_V1, + B_BMODE_PDTH_LOWER_BOUND_MSK_V1, pd_val); } void rtw89_phy_dig_reset(struct rtw89_dev *rtwdev) @@ -2994,3 +3355,55 @@ void rtw89_phy_set_bss_color(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif rtw89_phy_write32_idx(rtwdev, R_BSS_CLR_MAP, B_BSS_CLR_MAP_STAID, vif->bss_conf.aid, phy_idx); } + +static void +_rfk_write_rf(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) +{ + rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data); +} + +static void +_rfk_write32_mask(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) +{ + rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); +} + +static void +_rfk_write32_set(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) +{ + rtw89_phy_write32_set(rtwdev, def->addr, def->mask); +} + +static void +_rfk_write32_clr(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) +{ + rtw89_phy_write32_clr(rtwdev, def->addr, def->mask); +} + +static void +_rfk_delay(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) +{ + udelay(def->data); +} + +static void +(*_rfk_handler[])(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) = { + [RTW89_RFK_F_WRF] = _rfk_write_rf, + [RTW89_RFK_F_WM] = _rfk_write32_mask, + [RTW89_RFK_F_WS] = _rfk_write32_set, + [RTW89_RFK_F_WC] = _rfk_write32_clr, + [RTW89_RFK_F_DELAY] = _rfk_delay, +}; + +static_assert(ARRAY_SIZE(_rfk_handler) == RTW89_RFK_F_NUM); + +void +rtw89_rfk_parser(struct rtw89_dev *rtwdev, const struct rtw89_rfk_tbl *tbl) +{ + const struct rtw89_reg5_def *p = tbl->defs; + const struct rtw89_reg5_def *end = tbl->defs + tbl->size; + + for (; p < end; p++) + _rfk_handler[p->flag](rtwdev, p); +} +EXPORT_SYMBOL(rtw89_rfk_parser); diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h index b1f059b725a1..adcfcb4c2429 100644 --- a/drivers/net/wireless/realtek/rtw89/phy.h +++ b/drivers/net/wireless/realtek/rtw89/phy.h @@ -8,6 +8,7 @@ #include "core.h" #define RTW89_PHY_ADDR_OFFSET 0x10000 +#define RTW89_RF_ADDR_ADSEL_MASK BIT(16) #define get_phy_headline(addr) FIELD_GET(GENMASK(31, 28), addr) #define PHY_HEADLINE_VALID 0xf @@ -55,6 +56,7 @@ #define CFO_TRK_STOP_TH (2 << 2) #define CFO_SW_COMP_FINE_TUNE (2 << 2) #define CFO_PERIOD_CNT 15 +#define CFO_BOUND 32 #define CFO_TP_UPPER 100 #define CFO_TP_LOWER 50 #define CFO_COMP_PERIOD 250 @@ -87,8 +89,11 @@ #define RXB_IDX_MAX 31 #define RXB_IDX_MIN 0 +#define IGI_RSSI_MAX 110 #define PD_TH_MAX_RSSI 70 #define PD_TH_MIN_RSSI 8 +#define CCKPD_TH_MIN_RSSI (-18) +#define PD_TH_BW160_CMP_VAL 9 #define PD_TH_BW80_CMP_VAL 6 #define PD_TH_BW40_CMP_VAL 3 #define PD_TH_BW20_CMP_VAL 0 @@ -265,6 +270,9 @@ const struct rtw89_phy_reg3_tbl _name ## _tbl = { \ .size = ARRAY_SIZE(_name), \ } +extern const u8 rtw89_rs_idx_max[RTW89_RS_MAX]; +extern const u8 rtw89_rs_nss_max[RTW89_RS_MAX]; + static inline void rtw89_phy_write8(struct rtw89_dev *rtwdev, u32 addr, u8 data) { @@ -322,6 +330,65 @@ static inline u32 rtw89_phy_read32_mask(struct rtw89_dev *rtwdev, return rtw89_read32_mask(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, mask); } +enum rtw89_rfk_flag { + RTW89_RFK_F_WRF = 0, + RTW89_RFK_F_WM = 1, + RTW89_RFK_F_WS = 2, + RTW89_RFK_F_WC = 3, + RTW89_RFK_F_DELAY = 4, + RTW89_RFK_F_NUM, +}; + +struct rtw89_rfk_tbl { + const struct rtw89_reg5_def *defs; + u32 size; +}; + +#define RTW89_DECLARE_RFK_TBL(_name) \ +const struct rtw89_rfk_tbl _name ## _tbl = { \ + .defs = _name, \ + .size = ARRAY_SIZE(_name), \ +} + +#define RTW89_DECL_RFK_WRF(_path, _addr, _mask, _data) \ + {.flag = RTW89_RFK_F_WRF, \ + .path = _path, \ + .addr = _addr, \ + .mask = _mask, \ + .data = _data,} + +#define RTW89_DECL_RFK_WM(_addr, _mask, _data) \ + {.flag = RTW89_RFK_F_WM, \ + .addr = _addr, \ + .mask = _mask, \ + .data = _data,} + +#define RTW89_DECL_RFK_WS(_addr, _mask) \ + {.flag = RTW89_RFK_F_WS, \ + .addr = _addr, \ + .mask = _mask,} + +#define RTW89_DECL_RFK_WC(_addr, _mask) \ + {.flag = RTW89_RFK_F_WC, \ + .addr = _addr, \ + .mask = _mask,} + +#define RTW89_DECL_RFK_DELAY(_data) \ + {.flag = RTW89_RFK_F_DELAY, \ + .data = _data,} + +void +rtw89_rfk_parser(struct rtw89_dev *rtwdev, const struct rtw89_rfk_tbl *tbl); + +#define rtw89_rfk_parser_by_cond(dev, cond, tbl_t, tbl_f) \ + do { \ + typeof(dev) __dev = (dev); \ + if (cond) \ + rtw89_rfk_parser(__dev, (tbl_t)); \ + else \ + rtw89_rfk_parser(__dev, (tbl_f)); \ + } while (0) + void rtw89_phy_write_reg3_tbl(struct rtw89_dev *rtwdev, const struct rtw89_phy_reg3_tbl *tbl); u8 rtw89_phy_get_txsc(struct rtw89_dev *rtwdev, @@ -329,10 +396,18 @@ u8 rtw89_phy_get_txsc(struct rtw89_dev *rtwdev, enum rtw89_bandwidth dbw); u32 rtw89_phy_read_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, u32 addr, u32 mask); +u32 rtw89_phy_read_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, + u32 addr, u32 mask); bool rtw89_phy_write_rf(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, u32 addr, u32 mask, u32 data); +bool rtw89_phy_write_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, + u32 addr, u32 mask, u32 data); void rtw89_phy_init_bb_reg(struct rtw89_dev *rtwdev); void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev); +void rtw89_phy_config_rf_reg_v1(struct rtw89_dev *rtwdev, + const struct rtw89_reg2_def *reg, + enum rtw89_rf_path rf_path, + void *extra_data); void rtw89_phy_dm_init(struct rtw89_dev *rtwdev); void rtw89_phy_write32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, u32 data, enum rtw89_phy_idx phy_idx); diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index e0a416d37d0e..25b106788118 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -8,16 +8,36 @@ #define R_AX_SYS_WL_EFUSE_CTRL 0x000A #define B_AX_AUTOLOAD_SUS BIT(5) +#define R_AX_SYS_ISO_CTRL 0x0000 +#define B_AX_PWC_EV2EF_MASK GENMASK(15, 14) +#define B_AX_PWC_EV2EF_B15 BIT(15) +#define B_AX_PWC_EV2EF_B14 BIT(14) +#define B_AX_ISO_EB2CORE BIT(8) + #define R_AX_SYS_FUNC_EN 0x0002 #define B_AX_FEN_BB_GLB_RSTN BIT(1) #define B_AX_FEN_BBRSTB BIT(0) #define R_AX_SYS_PW_CTRL 0x0004 +#define B_AX_XTAL_OFF_A_DIE BIT(22) +#define B_AX_DIS_WLBT_PDNSUSEN_SOPC BIT(18) +#define B_AX_RDY_SYSPWR BIT(17) +#define B_AX_EN_WLON BIT(16) +#define B_AX_APDM_HPDN BIT(15) #define B_AX_PSUS_OFF_CAPC_EN BIT(14) +#define B_AX_AFSM_PCIE_SUS_EN BIT(12) +#define B_AX_AFSM_WLSUS_EN BIT(11) +#define B_AX_APFM_SWLPS BIT(10) +#define B_AX_APFM_OFFMAC BIT(9) +#define B_AX_APFN_ONMAC BIT(8) #define R_AX_SYS_CLK_CTRL 0x0008 #define B_AX_CPU_CLK_EN BIT(14) +#define R_AX_SYS_ADIE_PAD_PWR_CTRL 0x0018 +#define B_AX_SYM_PADPDN_WL_PTA_1P3 BIT(6) +#define B_AX_SYM_PADPDN_WL_RFC_1P3 BIT(5) + #define R_AX_RSV_CTRL 0x001C #define B_AX_R_DIS_PRST BIT(6) #define B_AX_WLOCK_1C_BIT6 BIT(5) @@ -41,6 +61,17 @@ #define B_AX_EF_ADDR_MASK GENMASK(26, 16) #define B_AX_EF_DATA_MASK GENMASK(15, 0) +#define R_AX_EFUSE_CTRL_1_V1 0x0038 +#define B_AX_EF_ENT BIT(31) +#define B_AX_EF_BURST BIT(19) +#define B_AX_EF_TEST_SEL_MASK GENMASK(18, 16) +#define B_AX_EF_TROW_EN BIT(15) +#define B_AX_EF_ERR_FLAG BIT(14) +#define B_AX_EF_DSB_EN BIT(11) +#define B_AX_PCIE_CALIB_EN_V1 BIT(12) +#define B_AX_WDT_WAKE_PCIE_EN BIT(10) +#define B_AX_WDT_WAKE_USB_EN BIT(9) + #define R_AX_GPIO_MUXCFG 0x0040 #define B_AX_BOOT_MODE BIT(19) #define B_AX_WL_EECS_EXT_32K_SEL BIT(18) @@ -72,11 +103,16 @@ #define R_AX_SYS_SDIO_CTRL 0x0070 #define B_AX_PCIE_DIS_L2_CTRL_LDO_HCI BIT(15) #define B_AX_PCIE_DIS_WLSUS_AFT_PDN BIT(14) +#define B_AX_PCIE_CALIB_EN_V1 BIT(12) #define B_AX_PCIE_AUXCLK_GATE BIT(11) #define B_AX_LTE_MUX_CTRL_PATH BIT(26) #define R_AX_PLATFORM_ENABLE 0x0088 #define B_AX_WCPU_EN BIT(1) +#define B_AX_PLATFORM_EN BIT(0) + +#define R_AX_WLLPS_CTRL 0x0090 +#define B_AX_DIS_WLBT_LPSEN_LOPC BIT(1) #define R_AX_SCOREBOARD 0x00AC #define B_AX_TOGGLE BIT(31) @@ -89,11 +125,20 @@ #define R_AX_DBG_PORT_SEL 0x00C0 #define B_AX_DEBUG_ST_MASK GENMASK(31, 0) +#define R_AX_PMC_DBG_CTRL2 0x00CC +#define B_AX_SYSON_DIS_PMCR_AX_WRMSK BIT(2) + #define R_AX_SYS_CFG1 0x00F0 #define B_AX_CHIP_VER_MASK GENMASK(15, 12) #define R_AX_SYS_STATUS1 0x00F4 #define B_AX_SEL_0XC0_MASK GENMASK(17, 16) +#define B_AX_PAD_HCI_SEL_V2_MASK GENMASK(5, 3) +#define MAC_AX_HCI_SEL_SDIO_UART 0 +#define MAC_AX_HCI_SEL_MULTI_USB 1 +#define MAC_AX_HCI_SEL_PCIE_UART 2 +#define MAC_AX_HCI_SEL_PCIE_USB 3 +#define MAC_AX_HCI_SEL_MULTI_SDIO 4 #define R_AX_HALT_H2C_CTRL 0x0160 #define R_AX_HALT_H2C 0x0168 @@ -112,6 +157,7 @@ #define PS_RPWM_TOGGLE BIT(15) #define PS_RPWM_ACK BIT(14) #define PS_RPWM_SEQ_NUM GENMASK(13, 12) +#define PS_RPWM_NOTIFY_WAKE BIT(8) #define PS_RPWM_STATE 0x7 #define RPWM_SEQ_NUM_MAX 3 #define PS_CPWM_SEQ_NUM GENMASK(13, 12) @@ -130,6 +176,21 @@ #define R_AX_UDM2 0x01F8 #define R_AX_UDM3 0x01FC +#define R_AX_LDO_AON_CTRL0 0x0218 +#define B_AX_PD_REGU_L BIT(16) + +#define R_AX_WLAN_XTAL_SI_CTRL 0x0270 +#define B_AX_WL_XTAL_SI_CMD_POLL BIT(31) +#define B_AX_BT_XTAL_SI_ERR_FLAG BIT(30) +#define B_AX_WL_XTAL_GNT BIT(29) +#define B_AX_BT_XTAL_GNT BIT(28) +#define B_AX_WL_XTAL_SI_MODE_MASK GENMASK(25, 24) +#define XTAL_SI_NORMAL_WRITE 0x00 +#define XTAL_SI_NORMAL_READ 0x01 +#define B_AX_WL_XTAL_SI_BITMASK_MASK GENMASK(23, 16) +#define B_AX_WL_XTAL_SI_DATA_MASK GENMASK(15, 8) +#define B_AX_WL_XTAL_SI_ADDR_MASK GENMASK(7, 0) + #define R_AX_XTAL_ON_CTRL0 0x0280 #define B_AX_XTAL_SC_LPS BIT(31) #define B_AX_XTAL_SC_XO_MASK GENMASK(23, 17) @@ -138,6 +199,11 @@ #define R_AX_GPIO0_7_FUNC_SEL 0x02D0 +#define R_AX_GPIO0_15_EECS_EESK_LED1_PULL_LOW_EN 0x02E4 +#define B_AX_LED1_PULL_LOW_EN BIT(18) +#define B_AX_EESK_PULL_LOW_EN BIT(17) +#define B_AX_EECS_PULL_LOW_EN BIT(16) + #define R_AX_WLRF_CTRL 0x02F0 #define B_AX_WLRF1_CTRL_7 BIT(15) #define B_AX_WLRF1_CTRL_1 BIT(9) @@ -162,6 +228,58 @@ #define B_AX_ASFF_FULL_NO_STK BIT(1) #define B_AX_EN_STUCK_DBG BIT(0) +#define R_AX_HCI_FC_CTRL_V1 0x1700 +#define R_AX_CH_PAGE_CTRL_V1 0x1704 + +#define R_AX_ACH0_PAGE_CTRL_V1 0x1710 +#define R_AX_ACH1_PAGE_CTRL_V1 0x1714 +#define R_AX_ACH2_PAGE_CTRL_V1 0x1718 +#define R_AX_ACH3_PAGE_CTRL_V1 0x171C +#define R_AX_ACH4_PAGE_CTRL_V1 0x1720 +#define R_AX_ACH5_PAGE_CTRL_V1 0x1724 +#define R_AX_ACH6_PAGE_CTRL_V1 0x1728 +#define R_AX_ACH7_PAGE_CTRL_V1 0x172C +#define R_AX_CH8_PAGE_CTRL_V1 0x1730 +#define R_AX_CH9_PAGE_CTRL_V1 0x1734 +#define R_AX_CH10_PAGE_CTRL_V1 0x1738 +#define R_AX_CH11_PAGE_CTRL_V1 0x173C + +#define R_AX_ACH0_PAGE_INFO_V1 0x1750 +#define R_AX_ACH1_PAGE_INFO_V1 0x1754 +#define R_AX_ACH2_PAGE_INFO_V1 0x1758 +#define R_AX_ACH3_PAGE_INFO_V1 0x175C +#define R_AX_ACH4_PAGE_INFO_V1 0x1760 +#define R_AX_ACH5_PAGE_INFO_V1 0x1764 +#define R_AX_ACH6_PAGE_INFO_V1 0x1768 +#define R_AX_ACH7_PAGE_INFO_V1 0x176C +#define R_AX_CH8_PAGE_INFO_V1 0x1770 +#define R_AX_CH9_PAGE_INFO_V1 0x1774 +#define R_AX_CH10_PAGE_INFO_V1 0x1778 +#define R_AX_CH11_PAGE_INFO_V1 0x177C +#define R_AX_CH12_PAGE_INFO_V1 0x1780 + +#define R_AX_PUB_PAGE_INFO3_V1 0x178C +#define R_AX_PUB_PAGE_CTRL1_V1 0x1790 +#define R_AX_PUB_PAGE_CTRL2_V1 0x1794 +#define R_AX_PUB_PAGE_INFO1_V1 0x1798 +#define R_AX_PUB_PAGE_INFO2_V1 0x179C +#define R_AX_WP_PAGE_CTRL1_V1 0x17A0 +#define R_AX_WP_PAGE_CTRL2_V1 0x17A4 +#define R_AX_WP_PAGE_INFO1_V1 0x17A8 + +#define R_AX_H2CREG_DATA0_V1 0x7140 +#define R_AX_H2CREG_DATA1_V1 0x7144 +#define R_AX_H2CREG_DATA2_V1 0x7148 +#define R_AX_H2CREG_DATA3_V1 0x714C +#define R_AX_C2HREG_DATA0_V1 0x7150 +#define R_AX_C2HREG_DATA1_V1 0x7154 +#define R_AX_C2HREG_DATA2_V1 0x7158 +#define R_AX_C2HREG_DATA3_V1 0x715C +#define R_AX_H2CREG_CTRL_V1 0x7160 +#define R_AX_C2HREG_CTRL_V1 0x7164 + +#define R_AX_HCI_FUNC_EN_V1 0x7880 + #define R_AX_PHYREG_SET 0x8040 #define PHYREG_SET_ALL_CYCLE 0x8 @@ -194,6 +312,7 @@ #define R_AX_BOOT_DBG 0x83F0 #define R_AX_DMAC_FUNC_EN 0x8400 +#define B_AX_DMAC_CRPRT BIT(31) #define B_AX_MAC_FUNC_EN BIT(30) #define B_AX_DMAC_FUNC_EN BIT(29) #define B_AX_MPDU_PROC_EN BIT(28) @@ -207,7 +326,10 @@ #define B_AX_PKT_IN_EN BIT(20) #define B_AX_DLE_CPUIO_EN BIT(19) #define B_AX_DISPATCHER_EN BIT(18) +#define B_AX_BBRPT_EN BIT(17) #define B_AX_MAC_SEC_EN BIT(16) +#define B_AX_MAC_UN_EN BIT(15) +#define B_AX_H_AXIDMA_EN BIT(14) #define R_AX_DMAC_CLK_EN 0x8404 #define B_AX_WD_RLS_CLK_EN BIT(27) @@ -218,6 +340,7 @@ #define B_AX_PKT_IN_CLK_EN BIT(20) #define B_AX_DLE_CPUIO_CLK_EN BIT(19) #define B_AX_DISPATCHER_CLK_EN BIT(18) +#define B_AX_BBRPT_CLK_EN BIT(17) #define B_AX_MAC_SEC_CLK_EN BIT(16) #define PCI_LTR_IDLE_TIMER_1US 0 @@ -444,6 +567,7 @@ #define R_AX_PLE_QTA8_CFG 0x9060 #define R_AX_PLE_QTA9_CFG 0x9064 #define R_AX_PLE_QTA10_CFG 0x9068 +#define R_AX_PLE_QTA11_CFG 0x906C #define R_AX_PLE_INI_STATUS 0x9100 #define B_AX_PLE_Q_MGN_INI_RDY BIT(1) @@ -618,6 +742,30 @@ #define R_AX_DBG_FUN_INTF_DATA 0x9F34 #define B_AX_DFI_DATA_MASK GENMASK(31, 0) +#define R_AX_TXPKTCTL_B0_PRELD_CFG0 0x9F48 +#define B_AX_B0_PRELD_FEN BIT(31) +#define B_AX_B0_PRELD_USEMAXSZ_MASK GENMASK(25, 16) +#define PRELD_B0_ENT_NUM 10 +#define PRELD_AMSDU_SIZE 52 +#define B_AX_B0_PRELD_CAM_G1ENTNUM_MASK GENMASK(12, 8) +#define B_AX_B0_PRELD_CAM_G0ENTNUM_MASK GENMASK(4, 0) + +#define R_AX_TXPKTCTL_B0_PRELD_CFG1 0x9F4C +#define B_AX_B0_PRELD_NXT_TXENDWIN_MASK GENMASK(11, 8) +#define PRELD_NEXT_WND 1 +#define B_AX_B0_PRELD_NXT_RSVMINSZ_MASK GENMASK(7, 0) + +#define R_AX_TXPKTCTL_B1_PRELD_CFG0 0x9F88 +#define B_AX_B1_PRELD_FEN BIT(31) +#define B_AX_B1_PRELD_USEMAXSZ_MASK GENMASK(25, 16) +#define PRELD_B1_ENT_NUM 4 +#define B_AX_B1_PRELD_CAM_G1ENTNUM_MASK GENMASK(12, 8) +#define B_AX_B1_PRELD_CAM_G0ENTNUM_MASK GENMASK(4, 0) + +#define R_AX_TXPKTCTL_B1_PRELD_CFG1 0x9F8C +#define B_AX_B1_PRELD_NXT_TXENDWIN_MASK GENMASK(11, 8) +#define B_AX_B1_PRELD_NXT_RSVMINSZ_MASK GENMASK(7, 0) + #define R_AX_AFE_CTRL1 0x0024 #define B_AX_R_SYM_WLCMAC1_P4_PC_EN BIT(4) @@ -745,6 +893,7 @@ #define B_AX_CTN_TXEN_VI_0 BIT(2) #define B_AX_CTN_TXEN_BK_0 BIT(1) #define B_AX_CTN_TXEN_BE_0 BIT(0) +#define B_AX_CTN_TXEN_ALL_MASK GENMASK(15, 0) #define R_AX_MUEDCA_BE_PARAM_0 0xC350 #define R_AX_MUEDCA_BE_PARAM_0_C1 0xE350 @@ -791,6 +940,12 @@ #define B_AX_CTN_CHK_CCA_S20 BIT(1) #define B_AX_CTN_CHK_CCA_P20 BIT(0) +#define R_AX_CTN_DRV_TXEN 0xC398 +#define R_AX_CTN_DRV_TXEN_C1 0xE398 +#define B_AX_CTN_TXEN_TWT_3 BIT(17) +#define B_AX_CTN_TXEN_TWT_2 BIT(16) +#define B_AX_CTN_TXEN_ALL_MASK_V1 GENMASK(17, 0) + #define R_AX_SCHEDULE_ERR_IMR 0xC3E8 #define R_AX_SCHEDULE_ERR_IMR_C1 0xE3E8 #define B_AX_SORT_NON_IDLE_ERR_INT_EN BIT(1) @@ -913,7 +1068,7 @@ #define R_AX_DTIM_CTRL_P2 0xC4A6 #define R_AX_DTIM_CTRL_P3 0xC4E6 #define R_AX_DTIM_CTRL_P4 0xC526 -#define B_AX_DTIM_NUM_MASK GENMASK(15, 0) +#define B_AX_DTIM_NUM_MASK GENMASK(15, 8) #define B_AX_DTIM_CURRCNT_MASK GENMASK(7, 0) #define R_AX_TBTT_SHIFT_P0 0xC428 @@ -964,6 +1119,11 @@ #define B_AX_P0MB2_EN BIT(2) #define B_AX_P0MB1_EN BIT(1) +#define R_AX_P0MB_HGQ_WINDOW_CFG_0 0xC590 +#define R_AX_P0MB_HGQ_WINDOW_CFG_0_C1 0xE590 +#define R_AX_PORT_HGQ_WINDOW_CFG 0xC5A0 +#define R_AX_PORT_HGQ_WINDOW_CFG_C1 0xE5A0 + #define R_AX_AMPDU_AGG_LIMIT 0xC610 #define B_AX_AMPDU_MAX_TIME_MASK GENMASK(31, 24) #define B_AX_RA_TRY_RATE_AGG_LMT_MASK GENMASK(23, 16) @@ -1080,6 +1240,13 @@ #define B_AX_TCR_ZLD_USTIME_AFTERPHYTXON GENMASK(11, 8) #define B_AX_TCR_TXTIMEOUT GENMASK(7, 0) +#define R_AX_MD_TSFT_STMP_CTL 0xCA08 +#define R_AX_MD_TSFT_STMP_CTL_C1 0xEA08 +#define B_AX_TSFT_OFS_MASK GENMASK(31, 16) +#define B_AX_STMP_THSD_MASK GENMASK(15, 8) +#define B_AX_UPD_HGQMD BIT(1) +#define B_AX_UPD_TIMIE BIT(0) + #define R_AX_PPWRBIT_SETTING 0xCA0C #define R_AX_PPWRBIT_SETTING_C1 0xEA0C @@ -1391,8 +1558,10 @@ #define B_AX_PWR_UL_TB_CTRL_EN BIT(31) #define R_AX_PWR_UL_TB_1T 0xD28C #define B_AX_PWR_UL_TB_1T_MASK GENMASK(4, 0) +#define B_AX_PWR_UL_TB_1T_V1_MASK GENMASK(7, 0) #define R_AX_PWR_UL_TB_2T 0xD290 #define B_AX_PWR_UL_TB_2T_MASK GENMASK(4, 0) +#define B_AX_PWR_UL_TB_2T_V1_MASK GENMASK(7, 0) #define R_AX_PWR_BY_RATE_TABLE0 0xD2C0 #define R_AX_PWR_BY_RATE_TABLE10 0xD2E8 #define R_AX_PWR_BY_RATE R_AX_PWR_BY_RATE_TABLE0 @@ -1458,6 +1627,31 @@ #define B_AX_STATIS_BT_LO_TX_1_MASK GENMASK(15, 0) #define B_AX_STATIS_BT_LO_RX_1_MASK GENMASK(31, 16) +#define R_AX_GNT_SW_CTRL 0xDA48 +#define R_AX_GNT_SW_CTRL_C1 0xFA48 +#define B_AX_WL_ACT2_VAL BIT(21) +#define B_AX_WL_ACT2_SWCTRL BIT(20) +#define B_AX_WL_ACT_VAL BIT(19) +#define B_AX_WL_ACT_SWCTRL BIT(18) +#define B_AX_GNT_BT_RX_VAL BIT(17) +#define B_AX_GNT_BT_RX_SWCTRL BIT(16) +#define B_AX_GNT_BT_TX_VAL BIT(15) +#define B_AX_GNT_BT_TX_SWCTRL BIT(14) +#define B_AX_GNT_WL_RX_VAL BIT(13) +#define B_AX_GNT_WL_RX_SWCTRL BIT(12) +#define B_AX_GNT_WL_TX_VAL BIT(11) +#define B_AX_GNT_WL_TX_SWCTRL BIT(10) +#define B_AX_GNT_BT_RFC_S1_VAL BIT(9) +#define B_AX_GNT_BT_RFC_S1_SWCTRL BIT(8) +#define B_AX_GNT_WL_RFC_S1_VAL BIT(7) +#define B_AX_GNT_WL_RFC_S1_SWCTRL BIT(6) +#define B_AX_GNT_BT_RFC_S0_VAL BIT(5) +#define B_AX_GNT_BT_RFC_S0_SWCTRL BIT(4) +#define B_AX_GNT_WL_RFC_S0_VAL BIT(3) +#define B_AX_GNT_WL_RFC_S0_SWCTRL BIT(2) +#define B_AX_GNT_WL_BB_VAL BIT(1) +#define B_AX_GNT_WL_BB_SWCTRL BIT(0) + #define R_AX_TDMA_MODE 0xDA4C #define R_AX_TDMA_MODE_C1 0xFA4C #define B_AX_R_BT_CMD_RPT_MASK GENMASK(31, 16) @@ -1669,6 +1863,17 @@ #define B_ANAPAR_FLTRST BIT(22) #define B_ANAPAR_CRXBB GENMASK(18, 16) #define B_ANAPAR_14 GENMASK(15, 0) +#define R_SWSI_DATA_V1 0x0370 +#define B_SWSI_DATA_VAL_V1 GENMASK(19, 0) +#define B_SWSI_DATA_ADDR_V1 GENMASK(27, 20) +#define B_SWSI_DATA_PATH_V1 GENMASK(30, 28) +#define B_SWSI_DATA_BIT_MASK_EN_V1 BIT(31) +#define R_SWSI_BIT_MASK_V1 0x0374 +#define B_SWSI_BIT_MASK_V1 GENMASK(19, 0) +#define R_SWSI_READ_ADDR_V1 0x0378 +#define B_SWSI_READ_ADDR_ADDR_V1 GENMASK(7, 0) +#define B_SWSI_READ_ADDR_PATH_V1 GENMASK(10, 8) +#define B_SWSI_READ_ADDR_V1 GENMASK(10, 0) #define R_UPD_CLK_ADC 0x0700 #define B_UPD_CLK_ADC_ON BIT(24) #define B_UPD_CLK_ADC_VAL GENMASK(26, 25) @@ -1776,6 +1981,10 @@ #define R_CFO_COMP_SEG0_H 0x1388 #define R_CFO_COMP_SEG0_CTRL 0x138C #define R_DBG32_D 0x1730 +#define R_SWSI_V1 0x174C +#define B_SWSI_W_BUSY_V1 BIT(24) +#define B_SWSI_R_BUSY_V1 BIT(25) +#define B_SWSI_R_DATA_DONE_V1 BIT(26) #define R_TX_COUNTER 0x1A40 #define R_IFS_CLM_TX_CNT 0x1ACC #define B_IFS_CLM_EDCCA_EXCLUDE_CCA_FA_MSK GENMASK(31, 16) @@ -1959,6 +2168,12 @@ #define R_CHBW_MOD 0x4978 #define B_CHBW_MOD_PRICH GENMASK(11, 8) #define B_CHBW_MOD_SBW GENMASK(13, 12) +#define R_DCFO_COMP_S0_V1 0x4A40 +#define B_DCFO_COMP_S0_V1_MSK GENMASK(13, 0) +#define R_BMODE_PDTH_V1 0x4B64 +#define B_BMODE_PDTH_LOWER_BOUND_MSK_V1 GENMASK(31, 24) +#define R_BMODE_PDTH_EN_V1 0x4B74 +#define B_BMODE_PDTH_LIMIT_EN_MSK_V1 BIT(30) #define R_CFO_COMP_SEG1_L 0x5384 #define R_CFO_COMP_SEG1_H 0x5388 #define R_CFO_COMP_SEG1_CTRL 0x538C diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a.c b/drivers/net/wireless/realtek/rtw89/rtw8852a.c index 6b75e4bc7352..41fc8db311ec 100644 --- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c +++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c @@ -3,6 +3,7 @@ */ #include "coex.h" +#include "fw.h" #include "mac.h" #include "phy.h" #include "reg.h" @@ -36,16 +37,19 @@ static const struct rtw89_hfc_pub_cfg rtw8852a_hfc_pubcfg_pcie = { static const struct rtw89_hfc_param_ini rtw8852a_hfc_param_ini_pcie[] = { [RTW89_QTA_SCC] = {rtw8852a_hfc_chcfg_pcie, &rtw8852a_hfc_pubcfg_pcie, - &rtw_hfc_preccfg_pcie, RTW89_HCIFC_POH}, - [RTW89_QTA_DLFW] = {NULL, NULL, &rtw_hfc_preccfg_pcie, RTW89_HCIFC_POH}, + &rtw89_hfc_preccfg_pcie, RTW89_HCIFC_POH}, + [RTW89_QTA_DLFW] = {NULL, NULL, &rtw89_hfc_preccfg_pcie, + RTW89_HCIFC_POH}, [RTW89_QTA_INVALID] = {NULL}, }; static const struct rtw89_dle_mem rtw8852a_dle_mem_pcie[] = { - [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &wde_size0, &ple_size0, &wde_qt0, - &wde_qt0, &ple_qt4, &ple_qt5}, - [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &wde_size4, &ple_size4, - &wde_qt4, &wde_qt4, &ple_qt13, &ple_qt13}, + [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_wde_size0, &rtw89_ple_size0, + &rtw89_wde_qt0, &rtw89_wde_qt0, &rtw89_ple_qt4, + &rtw89_ple_qt5}, + [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_wde_size4, &rtw89_ple_size4, + &rtw89_wde_qt4, &rtw89_wde_qt4, &rtw89_ple_qt13, + &rtw89_ple_qt13}, [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL, NULL}, }; @@ -373,6 +377,35 @@ static const struct rtw89_pwr_cfg * const pwr_off_seq_8852a[] = { rtw8852a_pwroff, NULL }; +static const u32 rtw8852a_h2c_regs[RTW89_H2CREG_MAX] = { + R_AX_H2CREG_DATA0, R_AX_H2CREG_DATA1, R_AX_H2CREG_DATA2, + R_AX_H2CREG_DATA3 +}; + +static const u32 rtw8852a_c2h_regs[RTW89_C2HREG_MAX] = { + R_AX_C2HREG_DATA0, R_AX_C2HREG_DATA1, R_AX_C2HREG_DATA2, + R_AX_C2HREG_DATA3 +}; + +static const struct rtw89_page_regs rtw8852a_page_regs = { + .hci_fc_ctrl = R_AX_HCI_FC_CTRL, + .ch_page_ctrl = R_AX_CH_PAGE_CTRL, + .ach_page_ctrl = R_AX_ACH0_PAGE_CTRL, + .ach_page_info = R_AX_ACH0_PAGE_INFO, + .pub_page_info3 = R_AX_PUB_PAGE_INFO3, + .pub_page_ctrl1 = R_AX_PUB_PAGE_CTRL1, + .pub_page_ctrl2 = R_AX_PUB_PAGE_CTRL2, + .pub_page_info1 = R_AX_PUB_PAGE_INFO1, + .pub_page_info2 = R_AX_PUB_PAGE_INFO2, + .wp_page_ctrl1 = R_AX_WP_PAGE_CTRL1, + .wp_page_ctrl2 = R_AX_WP_PAGE_CTRL2, + .wp_page_info1 = R_AX_WP_PAGE_INFO1, +}; + +static const struct rtw89_reg_def rtw8852a_dcfo_comp = { + R_DCFO_COMP_S0, B_DCFO_COMP_S0_MSK +}; + static void rtw8852ae_efuse_parsing(struct rtw89_efuse *efuse, struct rtw8852a_efuse *map) { @@ -1134,7 +1167,7 @@ static void rtw8852a_set_channel_help(struct rtw89_dev *rtwdev, bool enter, u8 phy_idx = RTW89_PHY_0; if (enter) { - rtw89_mac_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); + rtw89_chip_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); rtw8852a_dfs_en(rtwdev, false); rtw8852a_tssi_cont_en_phyidx(rtwdev, false, RTW89_PHY_0); @@ -1147,7 +1180,7 @@ static void rtw8852a_set_channel_help(struct rtw89_dev *rtwdev, bool enter, rtw8852a_dfs_en(rtwdev, true); rtw8852a_tssi_cont_en_phyidx(rtwdev, true, RTW89_PHY_0); rtw8852a_bb_reset_en(rtwdev, phy_idx, true); - rtw89_mac_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); + rtw89_chip_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); } } @@ -1242,10 +1275,10 @@ static u32 rtw8852a_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, static void rtw8852a_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, - s16 pw_ofst, enum rtw89_mac_idx mac_idx) + s8 pw_ofst, enum rtw89_mac_idx mac_idx) { - s32 val_1t = 0; - s32 val_2t = 0; + s8 val_1t = 0; + s8 val_2t = 0; u32 reg; if (pw_ofst < -16 || pw_ofst > 15) { @@ -1255,7 +1288,7 @@ void rtw8852a_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, } reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_CTRL, mac_idx); rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN); - val_1t = (s32)pw_ofst; + val_1t = pw_ofst; reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx); rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, val_1t); val_2t = max(val_1t - 3, -16); @@ -1984,6 +2017,12 @@ static const struct rtw89_chip_ops rtw8852a_chip_ops = { .query_ppdu = rtw8852a_query_ppdu, .bb_ctrl_btc_preagc = rtw8852a_bb_ctrl_btc_preagc, .set_txpwr_ul_tb_offset = rtw8852a_set_txpwr_ul_tb_offset, + .pwr_on_func = NULL, + .pwr_off_func = NULL, + .cfg_ctrl_path = rtw89_mac_cfg_ctrl_path, + .mac_cfg_gnt = rtw89_mac_cfg_gnt, + .stop_sch_tx = rtw89_mac_stop_sch_tx, + .resume_sch_tx = rtw89_mac_resume_sch_tx, .btc_set_rfe = rtw8852a_btc_set_rfe, .btc_init_cfg = rtw8852a_btc_init_cfg, @@ -2019,6 +2058,9 @@ const struct rtw89_chip_info rtw8852a_chip_info = { .txpwr_factor_rf = 2, .txpwr_factor_mac = 1, .dig_table = &rtw89_8852a_phy_dig_table, + .support_bands = BIT(NL80211_BAND_2GHZ) | + BIT(NL80211_BAND_5GHZ), + .support_bw160 = false, .rf_path_num = 2, .tx_nss = 2, .rx_nss = 2, @@ -2029,6 +2071,8 @@ const struct rtw89_chip_info rtw8852a_chip_info = { .physical_efuse_size = 1216, .logical_efuse_size = 1536, .limit_efuse_size = 1152, + .dav_phy_efuse_size = 0, + .dav_log_efuse_size = 0, .phycap_addr = 0x580, .phycap_size = 128, .para_ver = 0x05050864, @@ -2049,7 +2093,18 @@ const struct rtw89_chip_info rtw8852a_chip_info = { .ps_mode_supported = BIT(RTW89_PS_MODE_RFOFF) | BIT(RTW89_PS_MODE_CLK_GATED) | BIT(RTW89_PS_MODE_PWR_GATED), + .hci_func_en_addr = R_AX_HCI_FUNC_EN, + .h2c_ctrl_reg = R_AX_H2CREG_CTRL, + .h2c_regs = rtw8852a_h2c_regs, + .c2h_ctrl_reg = R_AX_C2HREG_CTRL, + .c2h_regs = rtw8852a_c2h_regs, + .page_regs = &rtw8852a_page_regs, + .dcfo_comp = &rtw8852a_dcfo_comp, + .dcfo_comp_sft = 3, }; EXPORT_SYMBOL(rtw8852a_chip_info); MODULE_FIRMWARE("rtw89/rtw8852a_fw.bin"); +MODULE_AUTHOR("Realtek Corporation"); +MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852A driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a.h b/drivers/net/wireless/realtek/rtw89/rtw8852a.h index 633384374de0..fcff1194c009 100644 --- a/drivers/net/wireless/realtek/rtw89/rtw8852a.h +++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.h @@ -93,6 +93,8 @@ struct rtw8852a_bb_pmac_info { u8 duty_cycle; }; +extern const struct rtw89_chip_info rtw8852a_chip_info; + void rtw8852a_bb_set_plcp_tx(struct rtw89_dev *rtwdev); void rtw8852a_bb_set_pmac_tx(struct rtw89_dev *rtwdev, struct rtw8852a_bb_pmac_info *tx_info, diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c index c021e93eb07b..ad272854c442 100644 --- a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c +++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c @@ -12,66 +12,6 @@ #include "rtw8852a_rfk_table.h" #include "rtw8852a_table.h" -static void -_rfk_write_rf(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -{ - rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data); -} - -static void -_rfk_write32_mask(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -{ - rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); -} - -static void -_rfk_write32_set(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -{ - rtw89_phy_write32_set(rtwdev, def->addr, def->mask); -} - -static void -_rfk_write32_clr(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -{ - rtw89_phy_write32_clr(rtwdev, def->addr, def->mask); -} - -static void -_rfk_delay(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) -{ - udelay(def->data); -} - -static void -(*_rfk_handler[])(struct rtw89_dev *rtwdev, const struct rtw89_reg5_def *def) = { - [RTW89_RFK_F_WRF] = _rfk_write_rf, - [RTW89_RFK_F_WM] = _rfk_write32_mask, - [RTW89_RFK_F_WS] = _rfk_write32_set, - [RTW89_RFK_F_WC] = _rfk_write32_clr, - [RTW89_RFK_F_DELAY] = _rfk_delay, -}; - -static_assert(ARRAY_SIZE(_rfk_handler) == RTW89_RFK_F_NUM); - -static void -rtw89_rfk_parser(struct rtw89_dev *rtwdev, const struct rtw89_rfk_tbl *tbl) -{ - const struct rtw89_reg5_def *p = tbl->defs; - const struct rtw89_reg5_def *end = tbl->defs + tbl->size; - - for (; p < end; p++) - _rfk_handler[p->flag](rtwdev, p); -} - -#define rtw89_rfk_parser_by_cond(rtwdev, cond, tbl_t, tbl_f) \ - do { \ - typeof(rtwdev) _dev = (rtwdev); \ - if (cond) \ - rtw89_rfk_parser(_dev, (tbl_t)); \ - else \ - rtw89_rfk_parser(_dev, (tbl_f)); \ - } while (0) - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) { rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]dbcc_en: %x, PHY%d\n", @@ -2977,6 +2917,7 @@ static void _tssi_set_tmeter_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx ph u8 i, j; switch (subband) { + default: case RTW89_CH_2G: thm_up_a = rtw89_8852a_trk_cfg.delta_swingidx_2ga_p; thm_down_a = rtw89_8852a_trk_cfg.delta_swingidx_2ga_n; @@ -3161,6 +3102,7 @@ static void _tssi_pak(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, u8 subband = rtwdev->hal.current_subband; switch (subband) { + default: case RTW89_CH_2G: rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, &rtw8852a_tssi_pak_defs_a_2g_tbl, @@ -3584,7 +3526,7 @@ static void _tssi_pre_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) const struct rtw89_chip_info *mac_reg = rtwdev->chip; u8 ch = rtwdev->hal.current_channel, ch_tmp; u8 bw = rtwdev->hal.current_band_width; - u16 tx_en; + u32 tx_en; u8 phy_map = rtw89_btc_phymap(rtwdev, phy, 0); s8 power; s16 xdbm; @@ -3612,7 +3554,7 @@ static void _tssi_pre_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) __func__, phy, power, xdbm); rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START); - rtw89_mac_stop_sch_tx(rtwdev, phy, &tx_en, RTW89_SCH_TX_SEL_ALL); + rtw89_chip_stop_sch_tx(rtwdev, phy, &tx_en, RTW89_SCH_TX_SEL_ALL); _wait_rx_mode(rtwdev, _kpath(rtwdev, phy)); tx_counter = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); @@ -3658,7 +3600,7 @@ static void _tssi_pre_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) rtw8852a_bb_tx_mode_switch(rtwdev, phy, 0); - rtw89_mac_resume_sch_tx(rtwdev, phy, tx_en); + rtw89_chip_resume_sch_tx(rtwdev, phy, tx_en); rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP); } @@ -3681,11 +3623,11 @@ void rtw8852a_dack(struct rtw89_dev *rtwdev) void rtw8852a_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) { - u16 tx_en; + u32 tx_en; u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_START); - rtw89_mac_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); + rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); _iqk_init(rtwdev); @@ -3694,7 +3636,7 @@ void rtw8852a_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) else _iqk(rtwdev, phy_idx, false); - rtw89_mac_resume_sch_tx(rtwdev, phy_idx, tx_en); + rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_STOP); } @@ -3706,33 +3648,33 @@ void rtw8852a_iqk_track(struct rtw89_dev *rtwdev) void rtw8852a_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, bool is_afe) { - u16 tx_en; + u32 tx_en; u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_START); - rtw89_mac_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); + rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); _rx_dck(rtwdev, phy_idx, is_afe); - rtw89_mac_resume_sch_tx(rtwdev, phy_idx, tx_en); + rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); } void rtw8852a_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) { - u16 tx_en; + u32 tx_en; u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START); - rtw89_mac_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); + rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); rtwdev->dpk.is_dpk_enable = true; rtwdev->dpk.is_dpk_reload_en = false; _dpk(rtwdev, phy_idx, false); - rtw89_mac_resume_sch_tx(rtwdev, phy_idx, tx_en); + rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP); } diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c index 510570090502..dd2a978b9bae 100644 --- a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c +++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.c @@ -5,1603 +5,1603 @@ #include "rtw8852a_rfk_table.h" static const struct rtw89_reg5_def rtw8852a_tssi_sys_defs[] = { - DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001), - DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002), - DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001), - DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002), - DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005), - DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005), - DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005), - DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005), - DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033), - DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033), - DECL_RFK_WM(0x32bc, 0x000000f0, 0x00000005), - DECL_RFK_WM(0x32bc, 0x00000f00, 0x00000005), - DECL_RFK_WM(0x32bc, 0x000f0000, 0x00000005), - DECL_RFK_WM(0x32bc, 0x0000f000, 0x00000005), - DECL_RFK_WM(0x320c, 0x000000ff, 0x00000033), - DECL_RFK_WM(0x32c0, 0x0ff00000, 0x00000033), - DECL_RFK_WM(0x0300, 0xff000000, 0x00000019), - DECL_RFK_WM(0x0304, 0x000000ff, 0x00000019), - DECL_RFK_WM(0x0304, 0x0000ff00, 0x0000001d), - DECL_RFK_WM(0x0314, 0xffff0000, 0x00002044), - DECL_RFK_WM(0x0318, 0x0000ffff, 0x00002042), - DECL_RFK_WM(0x0318, 0xffff0000, 0x00002002), - DECL_RFK_WM(0x0020, 0x00006000, 0x00000003), - DECL_RFK_WM(0x0024, 0x00006000, 0x00000003), - DECL_RFK_WM(0x0704, 0xffff0000, 0x0000601e), - DECL_RFK_WM(0x2704, 0xffff0000, 0x0000601e), - DECL_RFK_WM(0x0700, 0xf0000000, 0x00000004), - DECL_RFK_WM(0x2700, 0xf0000000, 0x00000004), - DECL_RFK_WM(0x0650, 0x3c000000, 0x00000000), - DECL_RFK_WM(0x2650, 0x3c000000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_sys_defs); + RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001), + RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002), + RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001), + RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002), + RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005), + RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005), + RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005), + RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005), + RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033), + RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033), + RTW89_DECL_RFK_WM(0x32bc, 0x000000f0, 0x00000005), + RTW89_DECL_RFK_WM(0x32bc, 0x00000f00, 0x00000005), + RTW89_DECL_RFK_WM(0x32bc, 0x000f0000, 0x00000005), + RTW89_DECL_RFK_WM(0x32bc, 0x0000f000, 0x00000005), + RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x00000033), + RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x00000033), + RTW89_DECL_RFK_WM(0x0300, 0xff000000, 0x00000019), + RTW89_DECL_RFK_WM(0x0304, 0x000000ff, 0x00000019), + RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x0000001d), + RTW89_DECL_RFK_WM(0x0314, 0xffff0000, 0x00002044), + RTW89_DECL_RFK_WM(0x0318, 0x0000ffff, 0x00002042), + RTW89_DECL_RFK_WM(0x0318, 0xffff0000, 0x00002002), + RTW89_DECL_RFK_WM(0x0020, 0x00006000, 0x00000003), + RTW89_DECL_RFK_WM(0x0024, 0x00006000, 0x00000003), + RTW89_DECL_RFK_WM(0x0704, 0xffff0000, 0x0000601e), + RTW89_DECL_RFK_WM(0x2704, 0xffff0000, 0x0000601e), + RTW89_DECL_RFK_WM(0x0700, 0xf0000000, 0x00000004), + RTW89_DECL_RFK_WM(0x2700, 0xf0000000, 0x00000004), + RTW89_DECL_RFK_WM(0x0650, 0x3c000000, 0x00000000), + RTW89_DECL_RFK_WM(0x2650, 0x3c000000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_sys_defs); static const struct rtw89_reg5_def rtw8852a_tssi_sys_defs_2g[] = { - DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033), - DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033), - DECL_RFK_WM(0x32c0, 0x0ff00000, 0x00000033), - DECL_RFK_WM(0x320c, 0x000000ff, 0x00000033), + RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033), + RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033), + RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x00000033), + RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x00000033), }; -DECLARE_RFK_TBL(rtw8852a_tssi_sys_defs_2g); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_sys_defs_2g); static const struct rtw89_reg5_def rtw8852a_tssi_sys_defs_5g[] = { - DECL_RFK_WM(0x120c, 0x000000ff, 0x00000044), - DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000044), - DECL_RFK_WM(0x32c0, 0x0ff00000, 0x00000044), - DECL_RFK_WM(0x320c, 0x000000ff, 0x00000044), + RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000044), + RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000044), + RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x00000044), + RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x00000044), }; -DECLARE_RFK_TBL(rtw8852a_tssi_sys_defs_5g); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_sys_defs_5g); static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_a[] = { - DECL_RFK_WM(0x5800, 0x000000ff, 0x0000007f), - DECL_RFK_WM(0x5800, 0x0000ff00, 0x00000080), - DECL_RFK_WM(0x5800, 0x003f0000, 0x0000003f), - DECL_RFK_WM(0x5800, 0x10000000, 0x00000000), - DECL_RFK_WM(0x5800, 0x20000000, 0x00000000), - DECL_RFK_WM(0x5800, 0xc0000000, 0x00000000), - DECL_RFK_WM(0x5804, 0xf8000000, 0x00000000), - DECL_RFK_WM(0x580c, 0x0000007f, 0x00000040), - DECL_RFK_WM(0x580c, 0x00007f00, 0x00000040), - DECL_RFK_WM(0x580c, 0x00008000, 0x00000000), - DECL_RFK_WM(0x580c, 0x0fff0000, 0x00000000), - DECL_RFK_WM(0x5810, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x5810, 0x00000200, 0x00000000), - DECL_RFK_WM(0x5810, 0x0000fc00, 0x00000000), - DECL_RFK_WM(0x5810, 0x00010000, 0x00000001), - DECL_RFK_WM(0x5810, 0x00fe0000, 0x00000000), - DECL_RFK_WM(0x5810, 0x01000000, 0x00000001), - DECL_RFK_WM(0x5810, 0x06000000, 0x00000000), - DECL_RFK_WM(0x5810, 0x38000000, 0x00000003), - DECL_RFK_WM(0x5810, 0x40000000, 0x00000001), - DECL_RFK_WM(0x5810, 0x80000000, 0x00000000), - DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x5814, 0x00000c00, 0x00000000), - DECL_RFK_WM(0x5814, 0x00001000, 0x00000001), - DECL_RFK_WM(0x5814, 0x00002000, 0x00000000), - DECL_RFK_WM(0x5814, 0x00004000, 0x00000001), - DECL_RFK_WM(0x5814, 0x00038000, 0x00000005), - DECL_RFK_WM(0x5814, 0x003c0000, 0x00000000), - DECL_RFK_WM(0x5814, 0x01c00000, 0x00000000), - DECL_RFK_WM(0x5814, 0x18000000, 0x00000000), - DECL_RFK_WM(0x5814, 0xe0000000, 0x00000000), - DECL_RFK_WM(0x5818, 0x000000ff, 0x00000000), - DECL_RFK_WM(0x5818, 0x0001ff00, 0x00000018), - DECL_RFK_WM(0x5818, 0x03fe0000, 0x00000016), - DECL_RFK_WM(0x5818, 0xfc000000, 0x00000000), - DECL_RFK_WM(0x581c, 0x000003ff, 0x00000280), - DECL_RFK_WM(0x581c, 0x000ffc00, 0x00000200), - DECL_RFK_WM(0x581c, 0x00100000, 0x00000000), - DECL_RFK_WM(0x581c, 0x01e00000, 0x00000008), - DECL_RFK_WM(0x581c, 0x01e00000, 0x0000000e), - DECL_RFK_WM(0x581c, 0x1e000000, 0x00000008), - DECL_RFK_WM(0x581c, 0x1e000000, 0x0000000e), - DECL_RFK_WM(0x581c, 0x20000000, 0x00000000), - DECL_RFK_WM(0x5820, 0x00000fff, 0x00000080), - DECL_RFK_WM(0x5820, 0x0000f000, 0x0000000f), - DECL_RFK_WM(0x5820, 0x001f0000, 0x00000000), - DECL_RFK_WM(0x5820, 0xffe00000, 0x00000000), - DECL_RFK_WM(0x5824, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x5824, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5828, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x582c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x582c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5830, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x5834, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x5834, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5838, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x583c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x583c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5840, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x5844, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x5844, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5848, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x584c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x584c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5850, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x5854, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x5854, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5858, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x585c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x585c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5860, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x5828, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5828, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x5830, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5830, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x5838, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5838, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x5840, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5840, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x5848, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5848, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x5850, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5850, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x5858, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5858, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x5860, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5860, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x5860, 0x80000000, 0x00000000), - DECL_RFK_WM(0x5864, 0x000003ff, 0x000001ff), - DECL_RFK_WM(0x5864, 0x000ffc00, 0x00000200), - DECL_RFK_WM(0x5864, 0x03f00000, 0x00000000), - DECL_RFK_WM(0x5864, 0x04000000, 0x00000000), - DECL_RFK_WM(0x5898, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x589c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x58a0, 0x000000ff, 0x000000fd), - DECL_RFK_WM(0x58a0, 0x0000ff00, 0x000000e5), - DECL_RFK_WM(0x58a0, 0x00ff0000, 0x000000cd), - DECL_RFK_WM(0x58a0, 0xff000000, 0x000000b5), - DECL_RFK_WM(0x58a4, 0x000000ff, 0x00000016), - DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x03fe0000, 0x00000000), - DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58a8, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x58b0, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x58b4, 0x0000001f, 0x00000000), - DECL_RFK_WM(0x58b4, 0x00000020, 0x00000000), - DECL_RFK_WM(0x58b4, 0x000001c0, 0x00000000), - DECL_RFK_WM(0x58b4, 0x00000200, 0x00000000), - DECL_RFK_WM(0x58b4, 0x0000f000, 0x00000002), - DECL_RFK_WM(0x58b4, 0x00ff0000, 0x00000000), - DECL_RFK_WM(0x58b4, 0x7f000000, 0x0000000a), - DECL_RFK_WM(0x58b8, 0x0000007f, 0x00000028), - DECL_RFK_WM(0x58b8, 0x00007f00, 0x00000076), - DECL_RFK_WM(0x58b8, 0x007f0000, 0x00000000), - DECL_RFK_WM(0x58b8, 0x7f000000, 0x00000000), - DECL_RFK_WM(0x58bc, 0x000000ff, 0x0000007f), - DECL_RFK_WM(0x58bc, 0x0000ff00, 0x00000080), - DECL_RFK_WM(0x58bc, 0x00030000, 0x00000003), - DECL_RFK_WM(0x58bc, 0x000c0000, 0x00000001), - DECL_RFK_WM(0x58bc, 0x00300000, 0x00000002), - DECL_RFK_WM(0x58bc, 0x00c00000, 0x00000002), - DECL_RFK_WM(0x58bc, 0x07000000, 0x00000007), - DECL_RFK_WM(0x58c0, 0x00fe0000, 0x0000003f), - DECL_RFK_WM(0x58c0, 0xff000000, 0x00000000), - DECL_RFK_WM(0x58c4, 0x0003ffff, 0x0003ffff), - DECL_RFK_WM(0x58c4, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x58c4, 0xc0000000, 0x00000000), - DECL_RFK_WM(0x58c8, 0x00ffffff, 0x00000000), - DECL_RFK_WM(0x58c8, 0xf0000000, 0x00000000), - DECL_RFK_WM(0x58cc, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x58d0, 0x00001fff, 0x00000101), - DECL_RFK_WM(0x58d0, 0x0001e000, 0x00000004), - DECL_RFK_WM(0x58d0, 0x03fe0000, 0x00000100), - DECL_RFK_WM(0x58d0, 0x04000000, 0x00000000), - DECL_RFK_WM(0x58d4, 0x000000ff, 0x00000000), - DECL_RFK_WM(0x58d4, 0x0003fe00, 0x000000ff), - DECL_RFK_WM(0x58d4, 0x07fc0000, 0x00000100), - DECL_RFK_WM(0x58d8, 0x000001ff, 0x0000016c), - DECL_RFK_WM(0x58d8, 0x0003fe00, 0x0000005c), - DECL_RFK_WM(0x58d8, 0x000c0000, 0x00000002), - DECL_RFK_WM(0x58d8, 0xfff00000, 0x00000800), - DECL_RFK_WM(0x58dc, 0x000000ff, 0x0000007f), - DECL_RFK_WM(0x58dc, 0x0000ff00, 0x00000080), - DECL_RFK_WM(0x58dc, 0x00010000, 0x00000000), - DECL_RFK_WM(0x58dc, 0x3ff00000, 0x00000000), - DECL_RFK_WM(0x58dc, 0x80000000, 0x00000001), - DECL_RFK_WM(0x58f0, 0x000001ff, 0x000001ff), - DECL_RFK_WM(0x58f0, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_a); + RTW89_DECL_RFK_WM(0x5800, 0x000000ff, 0x0000007f), + RTW89_DECL_RFK_WM(0x5800, 0x0000ff00, 0x00000080), + RTW89_DECL_RFK_WM(0x5800, 0x003f0000, 0x0000003f), + RTW89_DECL_RFK_WM(0x5800, 0x10000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5800, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5800, 0xc0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5804, 0xf8000000, 0x00000000), + RTW89_DECL_RFK_WM(0x580c, 0x0000007f, 0x00000040), + RTW89_DECL_RFK_WM(0x580c, 0x00007f00, 0x00000040), + RTW89_DECL_RFK_WM(0x580c, 0x00008000, 0x00000000), + RTW89_DECL_RFK_WM(0x580c, 0x0fff0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5810, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x5810, 0x00000200, 0x00000000), + RTW89_DECL_RFK_WM(0x5810, 0x0000fc00, 0x00000000), + RTW89_DECL_RFK_WM(0x5810, 0x00010000, 0x00000001), + RTW89_DECL_RFK_WM(0x5810, 0x00fe0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5810, 0x01000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5810, 0x06000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5810, 0x38000000, 0x00000003), + RTW89_DECL_RFK_WM(0x5810, 0x40000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5810, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x00000c00, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x00001000, 0x00000001), + RTW89_DECL_RFK_WM(0x5814, 0x00002000, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x00004000, 0x00000001), + RTW89_DECL_RFK_WM(0x5814, 0x00038000, 0x00000005), + RTW89_DECL_RFK_WM(0x5814, 0x003c0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x01c00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x18000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0xe0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5818, 0x000000ff, 0x00000000), + RTW89_DECL_RFK_WM(0x5818, 0x0001ff00, 0x00000018), + RTW89_DECL_RFK_WM(0x5818, 0x03fe0000, 0x00000016), + RTW89_DECL_RFK_WM(0x5818, 0xfc000000, 0x00000000), + RTW89_DECL_RFK_WM(0x581c, 0x000003ff, 0x00000280), + RTW89_DECL_RFK_WM(0x581c, 0x000ffc00, 0x00000200), + RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x00000000), + RTW89_DECL_RFK_WM(0x581c, 0x01e00000, 0x00000008), + RTW89_DECL_RFK_WM(0x581c, 0x01e00000, 0x0000000e), + RTW89_DECL_RFK_WM(0x581c, 0x1e000000, 0x00000008), + RTW89_DECL_RFK_WM(0x581c, 0x1e000000, 0x0000000e), + RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5820, 0x00000fff, 0x00000080), + RTW89_DECL_RFK_WM(0x5820, 0x0000f000, 0x0000000f), + RTW89_DECL_RFK_WM(0x5820, 0x001f0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5820, 0xffe00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5824, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x5824, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5828, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x582c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x582c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5830, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x5834, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x5834, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5838, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x583c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x583c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5840, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x5844, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x5844, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5848, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x584c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x584c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5850, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x5854, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x5854, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5858, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x585c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x585c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5860, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x5828, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5828, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5830, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5830, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5838, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5838, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5840, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5840, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5848, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5848, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5850, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5850, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5858, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5858, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5860, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5860, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5860, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5864, 0x000003ff, 0x000001ff), + RTW89_DECL_RFK_WM(0x5864, 0x000ffc00, 0x00000200), + RTW89_DECL_RFK_WM(0x5864, 0x03f00000, 0x00000000), + RTW89_DECL_RFK_WM(0x5864, 0x04000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5898, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x589c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x58a0, 0x000000ff, 0x000000fd), + RTW89_DECL_RFK_WM(0x58a0, 0x0000ff00, 0x000000e5), + RTW89_DECL_RFK_WM(0x58a0, 0x00ff0000, 0x000000cd), + RTW89_DECL_RFK_WM(0x58a0, 0xff000000, 0x000000b5), + RTW89_DECL_RFK_WM(0x58a4, 0x000000ff, 0x00000016), + RTW89_DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x03fe0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58b0, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x58b4, 0x0000001f, 0x00000000), + RTW89_DECL_RFK_WM(0x58b4, 0x00000020, 0x00000000), + RTW89_DECL_RFK_WM(0x58b4, 0x000001c0, 0x00000000), + RTW89_DECL_RFK_WM(0x58b4, 0x00000200, 0x00000000), + RTW89_DECL_RFK_WM(0x58b4, 0x0000f000, 0x00000002), + RTW89_DECL_RFK_WM(0x58b4, 0x00ff0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58b4, 0x7f000000, 0x0000000a), + RTW89_DECL_RFK_WM(0x58b8, 0x0000007f, 0x00000028), + RTW89_DECL_RFK_WM(0x58b8, 0x00007f00, 0x00000076), + RTW89_DECL_RFK_WM(0x58b8, 0x007f0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58b8, 0x7f000000, 0x00000000), + RTW89_DECL_RFK_WM(0x58bc, 0x000000ff, 0x0000007f), + RTW89_DECL_RFK_WM(0x58bc, 0x0000ff00, 0x00000080), + RTW89_DECL_RFK_WM(0x58bc, 0x00030000, 0x00000003), + RTW89_DECL_RFK_WM(0x58bc, 0x000c0000, 0x00000001), + RTW89_DECL_RFK_WM(0x58bc, 0x00300000, 0x00000002), + RTW89_DECL_RFK_WM(0x58bc, 0x00c00000, 0x00000002), + RTW89_DECL_RFK_WM(0x58bc, 0x07000000, 0x00000007), + RTW89_DECL_RFK_WM(0x58c0, 0x00fe0000, 0x0000003f), + RTW89_DECL_RFK_WM(0x58c0, 0xff000000, 0x00000000), + RTW89_DECL_RFK_WM(0x58c4, 0x0003ffff, 0x0003ffff), + RTW89_DECL_RFK_WM(0x58c4, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58c4, 0xc0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x58c8, 0x00ffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x58c8, 0xf0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x58cc, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x58d0, 0x00001fff, 0x00000101), + RTW89_DECL_RFK_WM(0x58d0, 0x0001e000, 0x00000004), + RTW89_DECL_RFK_WM(0x58d0, 0x03fe0000, 0x00000100), + RTW89_DECL_RFK_WM(0x58d0, 0x04000000, 0x00000000), + RTW89_DECL_RFK_WM(0x58d4, 0x000000ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58d4, 0x0003fe00, 0x000000ff), + RTW89_DECL_RFK_WM(0x58d4, 0x07fc0000, 0x00000100), + RTW89_DECL_RFK_WM(0x58d8, 0x000001ff, 0x0000016c), + RTW89_DECL_RFK_WM(0x58d8, 0x0003fe00, 0x0000005c), + RTW89_DECL_RFK_WM(0x58d8, 0x000c0000, 0x00000002), + RTW89_DECL_RFK_WM(0x58d8, 0xfff00000, 0x00000800), + RTW89_DECL_RFK_WM(0x58dc, 0x000000ff, 0x0000007f), + RTW89_DECL_RFK_WM(0x58dc, 0x0000ff00, 0x00000080), + RTW89_DECL_RFK_WM(0x58dc, 0x00010000, 0x00000000), + RTW89_DECL_RFK_WM(0x58dc, 0x3ff00000, 0x00000000), + RTW89_DECL_RFK_WM(0x58dc, 0x80000000, 0x00000001), + RTW89_DECL_RFK_WM(0x58f0, 0x000001ff, 0x000001ff), + RTW89_DECL_RFK_WM(0x58f0, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_b[] = { - DECL_RFK_WM(0x7800, 0x000000ff, 0x0000007f), - DECL_RFK_WM(0x7800, 0x0000ff00, 0x00000080), - DECL_RFK_WM(0x7800, 0x003f0000, 0x0000003f), - DECL_RFK_WM(0x7800, 0x10000000, 0x00000000), - DECL_RFK_WM(0x7800, 0x20000000, 0x00000000), - DECL_RFK_WM(0x7800, 0xc0000000, 0x00000000), - DECL_RFK_WM(0x7804, 0xf8000000, 0x00000000), - DECL_RFK_WM(0x780c, 0x0000007f, 0x00000040), - DECL_RFK_WM(0x780c, 0x00007f00, 0x00000040), - DECL_RFK_WM(0x780c, 0x00008000, 0x00000000), - DECL_RFK_WM(0x780c, 0x0fff0000, 0x00000000), - DECL_RFK_WM(0x7810, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x7810, 0x00000200, 0x00000000), - DECL_RFK_WM(0x7810, 0x0000fc00, 0x00000000), - DECL_RFK_WM(0x7810, 0x00010000, 0x00000001), - DECL_RFK_WM(0x7810, 0x00fe0000, 0x00000000), - DECL_RFK_WM(0x7810, 0x01000000, 0x00000001), - DECL_RFK_WM(0x7810, 0x06000000, 0x00000000), - DECL_RFK_WM(0x7810, 0x38000000, 0x00000003), - DECL_RFK_WM(0x7810, 0x40000000, 0x00000001), - DECL_RFK_WM(0x7810, 0x80000000, 0x00000000), - DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x7814, 0x00000c00, 0x00000000), - DECL_RFK_WM(0x7814, 0x00001000, 0x00000001), - DECL_RFK_WM(0x7814, 0x00002000, 0x00000000), - DECL_RFK_WM(0x7814, 0x00004000, 0x00000001), - DECL_RFK_WM(0x7814, 0x00038000, 0x00000005), - DECL_RFK_WM(0x7814, 0x003c0000, 0x00000000), - DECL_RFK_WM(0x7814, 0x01c00000, 0x00000000), - DECL_RFK_WM(0x7814, 0x18000000, 0x00000000), - DECL_RFK_WM(0x7814, 0xe0000000, 0x00000000), - DECL_RFK_WM(0x7818, 0x000000ff, 0x00000000), - DECL_RFK_WM(0x7818, 0x0001ff00, 0x00000018), - DECL_RFK_WM(0x7818, 0x03fe0000, 0x00000016), - DECL_RFK_WM(0x7818, 0xfc000000, 0x00000000), - DECL_RFK_WM(0x781c, 0x000003ff, 0x00000280), - DECL_RFK_WM(0x781c, 0x000ffc00, 0x00000200), - DECL_RFK_WM(0x781c, 0x00100000, 0x00000000), - DECL_RFK_WM(0x781c, 0x01e00000, 0x00000008), - DECL_RFK_WM(0x781c, 0x01e00000, 0x0000000e), - DECL_RFK_WM(0x781c, 0x1e000000, 0x00000008), - DECL_RFK_WM(0x781c, 0x1e000000, 0x0000000e), - DECL_RFK_WM(0x781c, 0x20000000, 0x00000000), - DECL_RFK_WM(0x7820, 0x00000fff, 0x00000080), - DECL_RFK_WM(0x7820, 0x0000f000, 0x00000000), - DECL_RFK_WM(0x7820, 0x001f0000, 0x00000000), - DECL_RFK_WM(0x7820, 0xffe00000, 0x00000000), - DECL_RFK_WM(0x7824, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x7824, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7828, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x782c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x782c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7830, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x7834, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x7834, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7838, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x783c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x783c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7840, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x7844, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x7844, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7848, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x784c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x784c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7850, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x7854, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x7854, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7858, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x785c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x785c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7860, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x7828, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7828, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x7830, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7830, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x7838, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7838, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x7840, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7840, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x7848, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7848, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x7850, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7850, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x7858, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7858, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x7860, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7860, 0x7fc00000, 0x00000000), - DECL_RFK_WM(0x7860, 0x80000000, 0x00000000), - DECL_RFK_WM(0x7864, 0x000003ff, 0x000001ff), - DECL_RFK_WM(0x7864, 0x000ffc00, 0x00000200), - DECL_RFK_WM(0x7864, 0x03f00000, 0x00000000), - DECL_RFK_WM(0x7864, 0x04000000, 0x00000000), - DECL_RFK_WM(0x7898, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x789c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x78a0, 0x000000ff, 0x000000fd), - DECL_RFK_WM(0x78a0, 0x0000ff00, 0x000000e5), - DECL_RFK_WM(0x78a0, 0x00ff0000, 0x000000cd), - DECL_RFK_WM(0x78a0, 0xff000000, 0x000000b5), - DECL_RFK_WM(0x78a4, 0x000000ff, 0x00000016), - DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x03fe0000, 0x00000000), - DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x78b0, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x78b4, 0x0000001f, 0x00000000), - DECL_RFK_WM(0x78b4, 0x00000020, 0x00000000), - DECL_RFK_WM(0x78b4, 0x000001c0, 0x00000000), - DECL_RFK_WM(0x78b4, 0x00000200, 0x00000000), - DECL_RFK_WM(0x78b4, 0x0000f000, 0x00000002), - DECL_RFK_WM(0x78b4, 0x00ff0000, 0x00000000), - DECL_RFK_WM(0x78b4, 0x7f000000, 0x0000000a), - DECL_RFK_WM(0x78b8, 0x0000007f, 0x00000028), - DECL_RFK_WM(0x78b8, 0x00007f00, 0x00000076), - DECL_RFK_WM(0x78b8, 0x007f0000, 0x00000000), - DECL_RFK_WM(0x78b8, 0x7f000000, 0x00000000), - DECL_RFK_WM(0x78bc, 0x000000ff, 0x0000007f), - DECL_RFK_WM(0x78bc, 0x0000ff00, 0x00000080), - DECL_RFK_WM(0x78bc, 0x00030000, 0x00000003), - DECL_RFK_WM(0x78bc, 0x000c0000, 0x00000001), - DECL_RFK_WM(0x78bc, 0x00300000, 0x00000002), - DECL_RFK_WM(0x78bc, 0x00c00000, 0x00000002), - DECL_RFK_WM(0x78bc, 0x07000000, 0x00000007), - DECL_RFK_WM(0x78c0, 0x00fe0000, 0x0000003f), - DECL_RFK_WM(0x78c0, 0xff000000, 0x00000000), - DECL_RFK_WM(0x78c4, 0x0003ffff, 0x0003ffff), - DECL_RFK_WM(0x78c4, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x78c4, 0xc0000000, 0x00000000), - DECL_RFK_WM(0x78c8, 0x00ffffff, 0x00000000), - DECL_RFK_WM(0x78c8, 0xf0000000, 0x00000000), - DECL_RFK_WM(0x78cc, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x78d0, 0x00001fff, 0x00000101), - DECL_RFK_WM(0x78d0, 0x0001e000, 0x00000004), - DECL_RFK_WM(0x78d0, 0x03fe0000, 0x00000100), - DECL_RFK_WM(0x78d0, 0x04000000, 0x00000000), - DECL_RFK_WM(0x78d4, 0x000000ff, 0x00000000), - DECL_RFK_WM(0x78d4, 0x0003fe00, 0x000000ff), - DECL_RFK_WM(0x78d4, 0x07fc0000, 0x00000100), - DECL_RFK_WM(0x78d8, 0x000001ff, 0x0000016c), - DECL_RFK_WM(0x78d8, 0x0003fe00, 0x0000005c), - DECL_RFK_WM(0x78d8, 0x000c0000, 0x00000002), - DECL_RFK_WM(0x78d8, 0xfff00000, 0x00000800), - DECL_RFK_WM(0x78dc, 0x000000ff, 0x0000007f), - DECL_RFK_WM(0x78dc, 0x0000ff00, 0x00000080), - DECL_RFK_WM(0x78dc, 0x00010000, 0x00000000), - DECL_RFK_WM(0x78dc, 0x3ff00000, 0x00000000), - DECL_RFK_WM(0x78dc, 0x80000000, 0x00000001), - DECL_RFK_WM(0x78f0, 0x000001ff, 0x000001ff), - DECL_RFK_WM(0x78f0, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_b); + RTW89_DECL_RFK_WM(0x7800, 0x000000ff, 0x0000007f), + RTW89_DECL_RFK_WM(0x7800, 0x0000ff00, 0x00000080), + RTW89_DECL_RFK_WM(0x7800, 0x003f0000, 0x0000003f), + RTW89_DECL_RFK_WM(0x7800, 0x10000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7800, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7800, 0xc0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7804, 0xf8000000, 0x00000000), + RTW89_DECL_RFK_WM(0x780c, 0x0000007f, 0x00000040), + RTW89_DECL_RFK_WM(0x780c, 0x00007f00, 0x00000040), + RTW89_DECL_RFK_WM(0x780c, 0x00008000, 0x00000000), + RTW89_DECL_RFK_WM(0x780c, 0x0fff0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7810, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x7810, 0x00000200, 0x00000000), + RTW89_DECL_RFK_WM(0x7810, 0x0000fc00, 0x00000000), + RTW89_DECL_RFK_WM(0x7810, 0x00010000, 0x00000001), + RTW89_DECL_RFK_WM(0x7810, 0x00fe0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7810, 0x01000000, 0x00000001), + RTW89_DECL_RFK_WM(0x7810, 0x06000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7810, 0x38000000, 0x00000003), + RTW89_DECL_RFK_WM(0x7810, 0x40000000, 0x00000001), + RTW89_DECL_RFK_WM(0x7810, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x00000c00, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x00001000, 0x00000001), + RTW89_DECL_RFK_WM(0x7814, 0x00002000, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x00004000, 0x00000001), + RTW89_DECL_RFK_WM(0x7814, 0x00038000, 0x00000005), + RTW89_DECL_RFK_WM(0x7814, 0x003c0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x01c00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x18000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0xe0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7818, 0x000000ff, 0x00000000), + RTW89_DECL_RFK_WM(0x7818, 0x0001ff00, 0x00000018), + RTW89_DECL_RFK_WM(0x7818, 0x03fe0000, 0x00000016), + RTW89_DECL_RFK_WM(0x7818, 0xfc000000, 0x00000000), + RTW89_DECL_RFK_WM(0x781c, 0x000003ff, 0x00000280), + RTW89_DECL_RFK_WM(0x781c, 0x000ffc00, 0x00000200), + RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x00000000), + RTW89_DECL_RFK_WM(0x781c, 0x01e00000, 0x00000008), + RTW89_DECL_RFK_WM(0x781c, 0x01e00000, 0x0000000e), + RTW89_DECL_RFK_WM(0x781c, 0x1e000000, 0x00000008), + RTW89_DECL_RFK_WM(0x781c, 0x1e000000, 0x0000000e), + RTW89_DECL_RFK_WM(0x781c, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7820, 0x00000fff, 0x00000080), + RTW89_DECL_RFK_WM(0x7820, 0x0000f000, 0x00000000), + RTW89_DECL_RFK_WM(0x7820, 0x001f0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7820, 0xffe00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7824, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x7824, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7828, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x782c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x782c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7830, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x7834, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x7834, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7838, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x783c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x783c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7840, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x7844, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x7844, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7848, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x784c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x784c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7850, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x7854, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x7854, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7858, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x785c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x785c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7860, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x7828, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7828, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7830, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7830, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7838, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7838, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7840, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7840, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7848, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7848, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7850, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7850, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7858, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7858, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7860, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7860, 0x7fc00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7860, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7864, 0x000003ff, 0x000001ff), + RTW89_DECL_RFK_WM(0x7864, 0x000ffc00, 0x00000200), + RTW89_DECL_RFK_WM(0x7864, 0x03f00000, 0x00000000), + RTW89_DECL_RFK_WM(0x7864, 0x04000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7898, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x789c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x78a0, 0x000000ff, 0x000000fd), + RTW89_DECL_RFK_WM(0x78a0, 0x0000ff00, 0x000000e5), + RTW89_DECL_RFK_WM(0x78a0, 0x00ff0000, 0x000000cd), + RTW89_DECL_RFK_WM(0x78a0, 0xff000000, 0x000000b5), + RTW89_DECL_RFK_WM(0x78a4, 0x000000ff, 0x00000016), + RTW89_DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x03fe0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78b0, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x78b4, 0x0000001f, 0x00000000), + RTW89_DECL_RFK_WM(0x78b4, 0x00000020, 0x00000000), + RTW89_DECL_RFK_WM(0x78b4, 0x000001c0, 0x00000000), + RTW89_DECL_RFK_WM(0x78b4, 0x00000200, 0x00000000), + RTW89_DECL_RFK_WM(0x78b4, 0x0000f000, 0x00000002), + RTW89_DECL_RFK_WM(0x78b4, 0x00ff0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78b4, 0x7f000000, 0x0000000a), + RTW89_DECL_RFK_WM(0x78b8, 0x0000007f, 0x00000028), + RTW89_DECL_RFK_WM(0x78b8, 0x00007f00, 0x00000076), + RTW89_DECL_RFK_WM(0x78b8, 0x007f0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78b8, 0x7f000000, 0x00000000), + RTW89_DECL_RFK_WM(0x78bc, 0x000000ff, 0x0000007f), + RTW89_DECL_RFK_WM(0x78bc, 0x0000ff00, 0x00000080), + RTW89_DECL_RFK_WM(0x78bc, 0x00030000, 0x00000003), + RTW89_DECL_RFK_WM(0x78bc, 0x000c0000, 0x00000001), + RTW89_DECL_RFK_WM(0x78bc, 0x00300000, 0x00000002), + RTW89_DECL_RFK_WM(0x78bc, 0x00c00000, 0x00000002), + RTW89_DECL_RFK_WM(0x78bc, 0x07000000, 0x00000007), + RTW89_DECL_RFK_WM(0x78c0, 0x00fe0000, 0x0000003f), + RTW89_DECL_RFK_WM(0x78c0, 0xff000000, 0x00000000), + RTW89_DECL_RFK_WM(0x78c4, 0x0003ffff, 0x0003ffff), + RTW89_DECL_RFK_WM(0x78c4, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78c4, 0xc0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x78c8, 0x00ffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x78c8, 0xf0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x78cc, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x78d0, 0x00001fff, 0x00000101), + RTW89_DECL_RFK_WM(0x78d0, 0x0001e000, 0x00000004), + RTW89_DECL_RFK_WM(0x78d0, 0x03fe0000, 0x00000100), + RTW89_DECL_RFK_WM(0x78d0, 0x04000000, 0x00000000), + RTW89_DECL_RFK_WM(0x78d4, 0x000000ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78d4, 0x0003fe00, 0x000000ff), + RTW89_DECL_RFK_WM(0x78d4, 0x07fc0000, 0x00000100), + RTW89_DECL_RFK_WM(0x78d8, 0x000001ff, 0x0000016c), + RTW89_DECL_RFK_WM(0x78d8, 0x0003fe00, 0x0000005c), + RTW89_DECL_RFK_WM(0x78d8, 0x000c0000, 0x00000002), + RTW89_DECL_RFK_WM(0x78d8, 0xfff00000, 0x00000800), + RTW89_DECL_RFK_WM(0x78dc, 0x000000ff, 0x0000007f), + RTW89_DECL_RFK_WM(0x78dc, 0x0000ff00, 0x00000080), + RTW89_DECL_RFK_WM(0x78dc, 0x00010000, 0x00000000), + RTW89_DECL_RFK_WM(0x78dc, 0x3ff00000, 0x00000000), + RTW89_DECL_RFK_WM(0x78dc, 0x80000000, 0x00000001), + RTW89_DECL_RFK_WM(0x78f0, 0x000001ff, 0x000001ff), + RTW89_DECL_RFK_WM(0x78f0, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_2g[] = { - DECL_RFK_WM(0x58d8, 0x000001ff, 0x0000013c), - DECL_RFK_WM(0x78d8, 0x000001ff, 0x0000013c), + RTW89_DECL_RFK_WM(0x58d8, 0x000001ff, 0x0000013c), + RTW89_DECL_RFK_WM(0x78d8, 0x000001ff, 0x0000013c), }; -DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_2g); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_2g); static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_defs_5g[] = { - DECL_RFK_WM(0x58d8, 0x000001ff, 0x0000016c), - DECL_RFK_WM(0x78d8, 0x000001ff, 0x0000016c), + RTW89_DECL_RFK_WM(0x58d8, 0x000001ff, 0x0000016c), + RTW89_DECL_RFK_WM(0x78d8, 0x000001ff, 0x0000016c), }; -DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_5g); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_defs_5g); static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_a[] = { - DECL_RFK_WM(0x58a0, 0xffffffff, 0x000000fc), - DECL_RFK_WM(0x58e4, 0x0000007f, 0x00000020), + RTW89_DECL_RFK_WM(0x58a0, 0xffffffff, 0x000000fc), + RTW89_DECL_RFK_WM(0x58e4, 0x0000007f, 0x00000020), }; -DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_b[] = { - DECL_RFK_WM(0x78a0, 0xffffffff, 0x000000fc), - DECL_RFK_WM(0x78e4, 0x0000007f, 0x00000020), + RTW89_DECL_RFK_WM(0x78a0, 0xffffffff, 0x000000fc), + RTW89_DECL_RFK_WM(0x78e4, 0x0000007f, 0x00000020), }; -DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_txpwr_ctrl_bb_he_tb_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_dck_defs_a[] = { - DECL_RFK_WM(0x580c, 0x0fff0000, 0x00000000), - DECL_RFK_WM(0x5814, 0x00001000, 0x00000001), - DECL_RFK_WM(0x5814, 0x00002000, 0x00000001), - DECL_RFK_WM(0x5814, 0x00004000, 0x00000001), - DECL_RFK_WM(0x5814, 0x00038000, 0x00000005), - DECL_RFK_WM(0x5814, 0x003c0000, 0x00000003), - DECL_RFK_WM(0x5814, 0x18000000, 0x00000000), + RTW89_DECL_RFK_WM(0x580c, 0x0fff0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x00001000, 0x00000001), + RTW89_DECL_RFK_WM(0x5814, 0x00002000, 0x00000001), + RTW89_DECL_RFK_WM(0x5814, 0x00004000, 0x00000001), + RTW89_DECL_RFK_WM(0x5814, 0x00038000, 0x00000005), + RTW89_DECL_RFK_WM(0x5814, 0x003c0000, 0x00000003), + RTW89_DECL_RFK_WM(0x5814, 0x18000000, 0x00000000), }; -DECLARE_RFK_TBL(rtw8852a_tssi_dck_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_dck_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_dck_defs_b[] = { - DECL_RFK_WM(0x780c, 0x0fff0000, 0x00000000), - DECL_RFK_WM(0x7814, 0x00001000, 0x00000001), - DECL_RFK_WM(0x7814, 0x00002000, 0x00000001), - DECL_RFK_WM(0x7814, 0x00004000, 0x00000001), - DECL_RFK_WM(0x7814, 0x00038000, 0x00000005), - DECL_RFK_WM(0x7814, 0x003c0000, 0x00000003), - DECL_RFK_WM(0x7814, 0x18000000, 0x00000000), + RTW89_DECL_RFK_WM(0x780c, 0x0fff0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x00001000, 0x00000001), + RTW89_DECL_RFK_WM(0x7814, 0x00002000, 0x00000001), + RTW89_DECL_RFK_WM(0x7814, 0x00004000, 0x00000001), + RTW89_DECL_RFK_WM(0x7814, 0x00038000, 0x00000005), + RTW89_DECL_RFK_WM(0x7814, 0x003c0000, 0x00000003), + RTW89_DECL_RFK_WM(0x7814, 0x18000000, 0x00000000), }; -DECLARE_RFK_TBL(rtw8852a_tssi_dck_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_dck_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_dac_gain_tbl_defs_a[] = { - DECL_RFK_WM(0x58b0, 0x00000fff, 0x00000000), - DECL_RFK_WM(0x58b0, 0x00000800, 0x00000001), - DECL_RFK_WM(0x5a00, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a04, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a08, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a0c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a10, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a14, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a18, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a1c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a20, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a24, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a28, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a2c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a30, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a34, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a38, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a3c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a40, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a44, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a48, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a4c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a50, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a54, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a58, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a5c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a60, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a64, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a68, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a6c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a70, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a74, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a78, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a7c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a80, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a84, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a88, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a8c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a90, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a94, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a98, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5a9c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5aa0, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5aa4, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5aa8, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5aac, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5ab0, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5ab4, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5ab8, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5abc, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x5ac0, 0xffffffff, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_dac_gain_tbl_defs_a); + RTW89_DECL_RFK_WM(0x58b0, 0x00000fff, 0x00000000), + RTW89_DECL_RFK_WM(0x58b0, 0x00000800, 0x00000001), + RTW89_DECL_RFK_WM(0x5a00, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a04, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a08, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a0c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a10, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a14, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a18, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a1c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a20, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a24, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a28, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a2c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a30, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a34, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a38, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a3c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a40, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a44, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a48, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a4c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a50, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a54, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a58, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a5c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a60, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a64, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a68, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a6c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a70, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a74, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a78, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a7c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a80, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a84, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a88, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a8c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a90, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a94, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a98, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5a9c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5aa0, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5aa4, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5aa8, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5aac, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5ab0, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5ab4, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5ab8, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5abc, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x5ac0, 0xffffffff, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_dac_gain_tbl_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_dac_gain_tbl_defs_b[] = { - DECL_RFK_WM(0x78b0, 0x00000fff, 0x00000000), - DECL_RFK_WM(0x78b0, 0x00000800, 0x00000001), - DECL_RFK_WM(0x7a00, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a04, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a08, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a0c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a10, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a14, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a18, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a1c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a20, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a24, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a28, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a2c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a30, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a34, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a38, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a3c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a40, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a44, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a48, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a4c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a50, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a54, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a58, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a5c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a60, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a64, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a68, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a6c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a70, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a74, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a78, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a7c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a80, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a84, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a88, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a8c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a90, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a94, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a98, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7a9c, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7aa0, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7aa4, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7aa8, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7aac, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7ab0, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7ab4, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7ab8, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7abc, 0xffffffff, 0x00000000), - DECL_RFK_WM(0x7ac0, 0xffffffff, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_dac_gain_tbl_defs_b); + RTW89_DECL_RFK_WM(0x78b0, 0x00000fff, 0x00000000), + RTW89_DECL_RFK_WM(0x78b0, 0x00000800, 0x00000001), + RTW89_DECL_RFK_WM(0x7a00, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a04, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a08, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a0c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a10, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a14, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a18, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a1c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a20, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a24, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a28, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a2c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a30, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a34, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a38, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a3c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a40, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a44, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a48, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a4c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a50, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a54, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a58, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a5c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a60, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a64, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a68, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a6c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a70, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a74, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a78, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a7c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a80, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a84, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a88, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a8c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a90, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a94, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a98, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7a9c, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7aa0, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7aa4, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7aa8, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7aac, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7ab0, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7ab4, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7ab8, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7abc, 0xffffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x7ac0, 0xffffffff, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_dac_gain_tbl_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_slope_cal_org_defs_a[] = { - DECL_RFK_WM(0x581c, 0x00100000, 0x00000000), - DECL_RFK_WM(0x58cc, 0x00001000, 0x00000001), - DECL_RFK_WM(0x58cc, 0x00000007, 0x00000000), - DECL_RFK_WM(0x58cc, 0x00000038, 0x00000001), - DECL_RFK_WM(0x58cc, 0x000001c0, 0x00000002), - DECL_RFK_WM(0x58cc, 0x00000e00, 0x00000003), - DECL_RFK_WM(0x5828, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x5898, 0x000000ff, 0x00000040), - DECL_RFK_WM(0x5830, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x5898, 0x0000ff00, 0x00000040), - DECL_RFK_WM(0x5838, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x5898, 0x00ff0000, 0x00000040), - DECL_RFK_WM(0x5840, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x5898, 0xff000000, 0x00000040), - DECL_RFK_WM(0x5848, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x589c, 0x000000ff, 0x00000040), - DECL_RFK_WM(0x5850, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x589c, 0x0000ff00, 0x00000040), - DECL_RFK_WM(0x5858, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x589c, 0x00ff0000, 0x00000040), - DECL_RFK_WM(0x5860, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x589c, 0xff000000, 0x00000040), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_slope_cal_org_defs_a); + RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x00000000), + RTW89_DECL_RFK_WM(0x58cc, 0x00001000, 0x00000001), + RTW89_DECL_RFK_WM(0x58cc, 0x00000007, 0x00000000), + RTW89_DECL_RFK_WM(0x58cc, 0x00000038, 0x00000001), + RTW89_DECL_RFK_WM(0x58cc, 0x000001c0, 0x00000002), + RTW89_DECL_RFK_WM(0x58cc, 0x00000e00, 0x00000003), + RTW89_DECL_RFK_WM(0x5828, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x5898, 0x000000ff, 0x00000040), + RTW89_DECL_RFK_WM(0x5830, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x5898, 0x0000ff00, 0x00000040), + RTW89_DECL_RFK_WM(0x5838, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x5898, 0x00ff0000, 0x00000040), + RTW89_DECL_RFK_WM(0x5840, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x5898, 0xff000000, 0x00000040), + RTW89_DECL_RFK_WM(0x5848, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x589c, 0x000000ff, 0x00000040), + RTW89_DECL_RFK_WM(0x5850, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x589c, 0x0000ff00, 0x00000040), + RTW89_DECL_RFK_WM(0x5858, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x589c, 0x00ff0000, 0x00000040), + RTW89_DECL_RFK_WM(0x5860, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x589c, 0xff000000, 0x00000040), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_slope_cal_org_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_slope_cal_org_defs_b[] = { - DECL_RFK_WM(0x781c, 0x00100000, 0x00000000), - DECL_RFK_WM(0x78cc, 0x00001000, 0x00000001), - DECL_RFK_WM(0x78cc, 0x00000007, 0x00000000), - DECL_RFK_WM(0x78cc, 0x00000038, 0x00000001), - DECL_RFK_WM(0x78cc, 0x000001c0, 0x00000002), - DECL_RFK_WM(0x78cc, 0x00000e00, 0x00000003), - DECL_RFK_WM(0x7828, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x7898, 0x000000ff, 0x00000040), - DECL_RFK_WM(0x7830, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x7898, 0x0000ff00, 0x00000040), - DECL_RFK_WM(0x7838, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x7898, 0x00ff0000, 0x00000040), - DECL_RFK_WM(0x7840, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x7898, 0xff000000, 0x00000040), - DECL_RFK_WM(0x7848, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x789c, 0x000000ff, 0x00000040), - DECL_RFK_WM(0x7850, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x789c, 0x0000ff00, 0x00000040), - DECL_RFK_WM(0x7878, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x789c, 0x00ff0000, 0x00000040), - DECL_RFK_WM(0x7860, 0x7fc00000, 0x00000040), - DECL_RFK_WM(0x789c, 0xff000000, 0x00000040), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_slope_cal_org_defs_b); + RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x00000000), + RTW89_DECL_RFK_WM(0x78cc, 0x00001000, 0x00000001), + RTW89_DECL_RFK_WM(0x78cc, 0x00000007, 0x00000000), + RTW89_DECL_RFK_WM(0x78cc, 0x00000038, 0x00000001), + RTW89_DECL_RFK_WM(0x78cc, 0x000001c0, 0x00000002), + RTW89_DECL_RFK_WM(0x78cc, 0x00000e00, 0x00000003), + RTW89_DECL_RFK_WM(0x7828, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x7898, 0x000000ff, 0x00000040), + RTW89_DECL_RFK_WM(0x7830, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x7898, 0x0000ff00, 0x00000040), + RTW89_DECL_RFK_WM(0x7838, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x7898, 0x00ff0000, 0x00000040), + RTW89_DECL_RFK_WM(0x7840, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x7898, 0xff000000, 0x00000040), + RTW89_DECL_RFK_WM(0x7848, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x789c, 0x000000ff, 0x00000040), + RTW89_DECL_RFK_WM(0x7850, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x789c, 0x0000ff00, 0x00000040), + RTW89_DECL_RFK_WM(0x7878, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x789c, 0x00ff0000, 0x00000040), + RTW89_DECL_RFK_WM(0x7860, 0x7fc00000, 0x00000040), + RTW89_DECL_RFK_WM(0x789c, 0xff000000, 0x00000040), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_slope_cal_org_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_rf_gap_tbl_defs_a[] = { - DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x03fe0000, 0x00000000), - DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58a8, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_rf_gap_tbl_defs_a); + RTW89_DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x03fe0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_rf_gap_tbl_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_rf_gap_tbl_defs_b[] = { - DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x03fe0000, 0x00000000), - DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_rf_gap_tbl_defs_b); + RTW89_DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x03fe0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_rf_gap_tbl_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_slope_defs_a[] = { - DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), - DECL_RFK_WM(0x5818, 0x10000000, 0x00000000), - DECL_RFK_WM(0x5814, 0x00000800, 0x00000001), - DECL_RFK_WM(0x581c, 0x20000000, 0x00000001), - DECL_RFK_WM(0x5820, 0x0000f000, 0x00000001), - DECL_RFK_WM(0x581c, 0x000003ff, 0x00000280), - DECL_RFK_WM(0x581c, 0x000ffc00, 0x00000200), - DECL_RFK_WM(0x58b8, 0x007f0000, 0x00000000), - DECL_RFK_WM(0x58b8, 0x7f000000, 0x00000000), - DECL_RFK_WM(0x58b4, 0x7f000000, 0x0000000a), - DECL_RFK_WM(0x58b8, 0x0000007f, 0x00000028), - DECL_RFK_WM(0x58b8, 0x00007f00, 0x00000076), - DECL_RFK_WM(0x5810, 0x20000000, 0x00000000), - DECL_RFK_WM(0x5814, 0x20000000, 0x00000001), - DECL_RFK_WM(0x580c, 0x10000000, 0x00000001), - DECL_RFK_WM(0x580c, 0x40000000, 0x00000001), - DECL_RFK_WM(0x5838, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5858, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5834, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x5834, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5838, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x5854, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x5854, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5858, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x5824, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x5824, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5828, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x582c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x582c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5830, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x583c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x583c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5840, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x5844, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x5844, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5848, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x584c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x584c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5850, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x585c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x585c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x5860, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x5828, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5830, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5840, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5848, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5850, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x5860, 0x003ff000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_slope_defs_a); + RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5818, 0x10000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x00000001), + RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5820, 0x0000f000, 0x00000001), + RTW89_DECL_RFK_WM(0x581c, 0x000003ff, 0x00000280), + RTW89_DECL_RFK_WM(0x581c, 0x000ffc00, 0x00000200), + RTW89_DECL_RFK_WM(0x58b8, 0x007f0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58b8, 0x7f000000, 0x00000000), + RTW89_DECL_RFK_WM(0x58b4, 0x7f000000, 0x0000000a), + RTW89_DECL_RFK_WM(0x58b8, 0x0000007f, 0x00000028), + RTW89_DECL_RFK_WM(0x58b8, 0x00007f00, 0x00000076), + RTW89_DECL_RFK_WM(0x5810, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x20000000, 0x00000001), + RTW89_DECL_RFK_WM(0x580c, 0x10000000, 0x00000001), + RTW89_DECL_RFK_WM(0x580c, 0x40000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5838, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5858, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5834, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x5834, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5838, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x5854, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x5854, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5858, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x5824, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x5824, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5828, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x582c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x582c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5830, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x583c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x583c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5840, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x5844, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x5844, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5848, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x584c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x584c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5850, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x585c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x585c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x5860, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x5828, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5830, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5840, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5848, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5850, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x5860, 0x003ff000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_slope_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_slope_defs_b[] = { - DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), - DECL_RFK_WM(0x7818, 0x10000000, 0x00000000), - DECL_RFK_WM(0x7814, 0x00000800, 0x00000001), - DECL_RFK_WM(0x781c, 0x20000000, 0x00000001), - DECL_RFK_WM(0x7820, 0x0000f000, 0x00000001), - DECL_RFK_WM(0x781c, 0x000003ff, 0x00000280), - DECL_RFK_WM(0x781c, 0x000ffc00, 0x00000200), - DECL_RFK_WM(0x78b8, 0x007f0000, 0x00000000), - DECL_RFK_WM(0x78b8, 0x7f000000, 0x00000000), - DECL_RFK_WM(0x78b4, 0x7f000000, 0x0000000a), - DECL_RFK_WM(0x78b8, 0x0000007f, 0x00000028), - DECL_RFK_WM(0x78b8, 0x00007f00, 0x00000076), - DECL_RFK_WM(0x7810, 0x20000000, 0x00000000), - DECL_RFK_WM(0x7814, 0x20000000, 0x00000001), - DECL_RFK_WM(0x780c, 0x10000000, 0x00000001), - DECL_RFK_WM(0x780c, 0x40000000, 0x00000001), - DECL_RFK_WM(0x7838, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7858, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7834, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x7834, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7838, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x7854, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x7854, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7858, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x7824, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x7824, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7828, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x782c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x782c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7830, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x783c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x783c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7840, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x7844, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x7844, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7848, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x784c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x784c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7850, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x785c, 0x0003ffff, 0x000115f2), - DECL_RFK_WM(0x785c, 0x3ffc0000, 0x00000000), - DECL_RFK_WM(0x7860, 0x00000fff, 0x00000121), - DECL_RFK_WM(0x7828, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7830, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7840, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7848, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7850, 0x003ff000, 0x00000000), - DECL_RFK_WM(0x7860, 0x003ff000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_slope_defs_b); + RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7818, 0x10000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x00000800, 0x00000001), + RTW89_DECL_RFK_WM(0x781c, 0x20000000, 0x00000001), + RTW89_DECL_RFK_WM(0x7820, 0x0000f000, 0x00000001), + RTW89_DECL_RFK_WM(0x781c, 0x000003ff, 0x00000280), + RTW89_DECL_RFK_WM(0x781c, 0x000ffc00, 0x00000200), + RTW89_DECL_RFK_WM(0x78b8, 0x007f0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78b8, 0x7f000000, 0x00000000), + RTW89_DECL_RFK_WM(0x78b4, 0x7f000000, 0x0000000a), + RTW89_DECL_RFK_WM(0x78b8, 0x0000007f, 0x00000028), + RTW89_DECL_RFK_WM(0x78b8, 0x00007f00, 0x00000076), + RTW89_DECL_RFK_WM(0x7810, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x20000000, 0x00000001), + RTW89_DECL_RFK_WM(0x780c, 0x10000000, 0x00000001), + RTW89_DECL_RFK_WM(0x780c, 0x40000000, 0x00000001), + RTW89_DECL_RFK_WM(0x7838, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7858, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7834, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x7834, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7838, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x7854, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x7854, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7858, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x7824, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x7824, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7828, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x782c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x782c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7830, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x783c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x783c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7840, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x7844, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x7844, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7848, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x784c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x784c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7850, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x785c, 0x0003ffff, 0x000115f2), + RTW89_DECL_RFK_WM(0x785c, 0x3ffc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x7860, 0x00000fff, 0x00000121), + RTW89_DECL_RFK_WM(0x7828, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7830, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7840, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7848, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7850, 0x003ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x7860, 0x003ff000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_slope_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_track_defs_a[] = { - DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), - DECL_RFK_WM(0x5818, 0x18000000, 0x00000000), - DECL_RFK_WM(0x5814, 0x00000800, 0x00000000), - DECL_RFK_WM(0x581c, 0x20000000, 0x00000001), - DECL_RFK_WM(0x5864, 0x000003ff, 0x000001ff), - DECL_RFK_WM(0x5864, 0x000ffc00, 0x00000200), - DECL_RFK_WM(0x5820, 0x00000fff, 0x00000080), - DECL_RFK_WM(0x5814, 0x01000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5818, 0x18000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x00000000), + RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5864, 0x000003ff, 0x000001ff), + RTW89_DECL_RFK_WM(0x5864, 0x000ffc00, 0x00000200), + RTW89_DECL_RFK_WM(0x5820, 0x00000fff, 0x00000080), + RTW89_DECL_RFK_WM(0x5814, 0x01000000, 0x00000000), }; -DECLARE_RFK_TBL(rtw8852a_tssi_track_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_track_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_track_defs_b[] = { - DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), - DECL_RFK_WM(0x7818, 0x18000000, 0x00000000), - DECL_RFK_WM(0x7814, 0x00000800, 0x00000000), - DECL_RFK_WM(0x781c, 0x20000000, 0x00000001), - DECL_RFK_WM(0x7864, 0x000003ff, 0x000001ff), - DECL_RFK_WM(0x7864, 0x000ffc00, 0x00000200), - DECL_RFK_WM(0x7820, 0x00000fff, 0x00000080), - DECL_RFK_WM(0x7814, 0x01000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7818, 0x18000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7814, 0x00000800, 0x00000000), + RTW89_DECL_RFK_WM(0x781c, 0x20000000, 0x00000001), + RTW89_DECL_RFK_WM(0x7864, 0x000003ff, 0x000001ff), + RTW89_DECL_RFK_WM(0x7864, 0x000ffc00, 0x00000200), + RTW89_DECL_RFK_WM(0x7820, 0x00000fff, 0x00000080), + RTW89_DECL_RFK_WM(0x7814, 0x01000000, 0x00000000), }; -DECLARE_RFK_TBL(rtw8852a_tssi_track_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_track_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_txagc_ofst_mv_avg_defs_a[] = { - DECL_RFK_WM(0x58e4, 0x00004000, 0x00000000), - DECL_RFK_WM(0x58e4, 0x00004000, 0x00000001), - DECL_RFK_WM(0x58e4, 0x00004000, 0x00000000), - DECL_RFK_WM(0x58e4, 0x00008000, 0x00000000), - DECL_RFK_WM(0x58e4, 0x000f0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58e4, 0x00004000, 0x00000000), + RTW89_DECL_RFK_WM(0x58e4, 0x00004000, 0x00000001), + RTW89_DECL_RFK_WM(0x58e4, 0x00004000, 0x00000000), + RTW89_DECL_RFK_WM(0x58e4, 0x00008000, 0x00000000), + RTW89_DECL_RFK_WM(0x58e4, 0x000f0000, 0x00000000), }; -DECLARE_RFK_TBL(rtw8852a_tssi_txagc_ofst_mv_avg_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_txagc_ofst_mv_avg_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_txagc_ofst_mv_avg_defs_b[] = { - DECL_RFK_WM(0x78e4, 0x00004000, 0x00000000), - DECL_RFK_WM(0x78e4, 0x00004000, 0x00000001), - DECL_RFK_WM(0x78e4, 0x00004000, 0x00000000), - DECL_RFK_WM(0x78e4, 0x00008000, 0x00000000), - DECL_RFK_WM(0x78e4, 0x000f0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78e4, 0x00004000, 0x00000000), + RTW89_DECL_RFK_WM(0x78e4, 0x00004000, 0x00000001), + RTW89_DECL_RFK_WM(0x78e4, 0x00004000, 0x00000000), + RTW89_DECL_RFK_WM(0x78e4, 0x00008000, 0x00000000), + RTW89_DECL_RFK_WM(0x78e4, 0x000f0000, 0x00000000), }; -DECLARE_RFK_TBL(rtw8852a_tssi_txagc_ofst_mv_avg_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_txagc_ofst_mv_avg_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_2g[] = { - DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001d0), - DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58a8, 0x0003fe00, 0x000001e8), - DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x58ac, 0x000001ff, 0x0000000b), - DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000088), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_2g); + RTW89_DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001d0), + RTW89_DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x0003fe00, 0x000001e8), + RTW89_DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x000001ff, 0x0000000b), + RTW89_DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000088), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_2g); static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_5g_1[] = { - DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001d7), - DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58a8, 0x0003fe00, 0x000001fb), - DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000005), - DECL_RFK_WM(0x58ac, 0x07fc0000, 0x0000007c), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_5g_1); + RTW89_DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001d7), + RTW89_DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x0003fe00, 0x000001fb), + RTW89_DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000005), + RTW89_DECL_RFK_WM(0x58ac, 0x07fc0000, 0x0000007c), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_5g_1); static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_5g_3[] = { - DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001d8), - DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58a8, 0x0003fe00, 0x000001fc), - DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000006), - DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000078), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_5g_3); + RTW89_DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001d8), + RTW89_DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x0003fe00, 0x000001fc), + RTW89_DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000006), + RTW89_DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000078), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_5g_3); static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_a_5g_4[] = { - DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001e5), - DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58a8, 0x0003fe00, 0x0000000a), - DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000011), - DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000075), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_5g_4); + RTW89_DECL_RFK_WM(0x5814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x58a4, 0x03fe0000, 0x000001e5), + RTW89_DECL_RFK_WM(0x58a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58a8, 0x0003fe00, 0x0000000a), + RTW89_DECL_RFK_WM(0x58a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x58ac, 0x0003fe00, 0x00000011), + RTW89_DECL_RFK_WM(0x58ac, 0x07fc0000, 0x00000075), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_a_5g_4); static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_2g[] = { - DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001cc), - DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78a8, 0x0003fe00, 0x000001e2), - DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000005), - DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000000), - DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000089), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_2g); + RTW89_DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001cc), + RTW89_DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x0003fe00, 0x000001e2), + RTW89_DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000005), + RTW89_DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000089), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_2g); static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_5g_1[] = { - DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001d5), - DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78a8, 0x0003fe00, 0x000001fc), - DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000005), - DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000079), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_5g_1); + RTW89_DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001d5), + RTW89_DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x0003fe00, 0x000001fc), + RTW89_DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x0003fe00, 0x00000005), + RTW89_DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000079), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_5g_1); static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_5g_3[] = { - DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001dc), - DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000002), - DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78ac, 0x0003fe00, 0x0000000b), - DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000076), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_5g_3); + RTW89_DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001dc), + RTW89_DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000002), + RTW89_DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x0003fe00, 0x0000000b), + RTW89_DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000076), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_5g_3); static const struct rtw89_reg5_def rtw8852a_tssi_pak_defs_b_5g_4[] = { - DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), - DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), - DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001f0), - DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000016), - DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), - DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), - DECL_RFK_WM(0x78ac, 0x0003fe00, 0x0000001f), - DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000072), -}; - -DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_5g_4); + RTW89_DECL_RFK_WM(0x7814, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f4, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000003ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78f8, 0x000ffc00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x0001ff00, 0x00000000), + RTW89_DECL_RFK_WM(0x78a4, 0x03fe0000, 0x000001f0), + RTW89_DECL_RFK_WM(0x78a8, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78a8, 0x0003fe00, 0x00000016), + RTW89_DECL_RFK_WM(0x78a8, 0x07fc0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x000001ff, 0x00000000), + RTW89_DECL_RFK_WM(0x78ac, 0x0003fe00, 0x0000001f), + RTW89_DECL_RFK_WM(0x78ac, 0x07fc0000, 0x00000072), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_pak_defs_b_5g_4); static const struct rtw89_reg5_def rtw8852a_tssi_enable_defs_a[] = { - DECL_RFK_WRF(0x0, 0x55, 0x00080, 0x00001), - DECL_RFK_WM(0x5818, 0x000000ff, 0x000000c0), - DECL_RFK_WM(0x5818, 0x10000000, 0x00000000), - DECL_RFK_WM(0x5818, 0x10000000, 0x00000001), - DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), - DECL_RFK_WM(0x5820, 0x80000000, 0x00000001), - DECL_RFK_WM(0x5818, 0x18000000, 0x00000003), + RTW89_DECL_RFK_WRF(0x0, 0x55, 0x00080, 0x00001), + RTW89_DECL_RFK_WM(0x5818, 0x000000ff, 0x000000c0), + RTW89_DECL_RFK_WM(0x5818, 0x10000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5818, 0x10000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5818, 0x18000000, 0x00000003), }; -DECLARE_RFK_TBL(rtw8852a_tssi_enable_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_enable_defs_a); static const struct rtw89_reg5_def rtw8852a_tssi_enable_defs_b[] = { - DECL_RFK_WRF(0x1, 0x55, 0x00080, 0x00001), - DECL_RFK_WM(0x7818, 0x000000ff, 0x000000c0), - DECL_RFK_WM(0x7818, 0x10000000, 0x00000000), - DECL_RFK_WM(0x7818, 0x10000000, 0x00000001), - DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), - DECL_RFK_WM(0x7820, 0x80000000, 0x00000001), - DECL_RFK_WM(0x7818, 0x18000000, 0x00000003), + RTW89_DECL_RFK_WRF(0x1, 0x55, 0x00080, 0x00001), + RTW89_DECL_RFK_WM(0x7818, 0x000000ff, 0x000000c0), + RTW89_DECL_RFK_WM(0x7818, 0x10000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7818, 0x10000000, 0x00000001), + RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x00000001), + RTW89_DECL_RFK_WM(0x7818, 0x18000000, 0x00000003), }; -DECLARE_RFK_TBL(rtw8852a_tssi_enable_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_enable_defs_b); static const struct rtw89_reg5_def rtw8852a_tssi_disable_defs[] = { - DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), - DECL_RFK_WM(0x5818, 0x18000000, 0x00000001), - DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), - DECL_RFK_WM(0x7818, 0x18000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5818, 0x18000000, 0x00000001), + RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7818, 0x18000000, 0x00000001), }; -DECLARE_RFK_TBL(rtw8852a_tssi_disable_defs); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_disable_defs); static const struct rtw89_reg5_def rtw8852a_tssi_enable_defs_ab[] = { - DECL_RFK_WM(0x5820, 0x80000000, 0x0), - DECL_RFK_WM(0x5820, 0x80000000, 0x1), - DECL_RFK_WM(0x5818, 0x18000000, 0x3), - DECL_RFK_WM(0x7820, 0x80000000, 0x0), - DECL_RFK_WM(0x7820, 0x80000000, 0x1), - DECL_RFK_WM(0x7818, 0x18000000, 0x3), + RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x0), + RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x1), + RTW89_DECL_RFK_WM(0x5818, 0x18000000, 0x3), + RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x0), + RTW89_DECL_RFK_WM(0x7820, 0x80000000, 0x1), + RTW89_DECL_RFK_WM(0x7818, 0x18000000, 0x3), }; -DECLARE_RFK_TBL(rtw8852a_tssi_enable_defs_ab); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_enable_defs_ab); static const struct rtw89_reg5_def rtw8852a_tssi_tracking_defs[] = { - DECL_RFK_WM(0x5800, 0x10000000, 0x00000000), - DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), - DECL_RFK_WM(0x5804, 0xf8000000, 0x00000000), - DECL_RFK_WM(0x58f0, 0xfff00000, 0x00000400), - DECL_RFK_WM(0x7800, 0x10000000, 0x00000000), - DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), - DECL_RFK_WM(0x7804, 0xf8000000, 0x00000000), - DECL_RFK_WM(0x78f0, 0xfff00000, 0x00000400), + RTW89_DECL_RFK_WM(0x5800, 0x10000000, 0x00000000), + RTW89_DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), + RTW89_DECL_RFK_WM(0x5804, 0xf8000000, 0x00000000), + RTW89_DECL_RFK_WM(0x58f0, 0xfff00000, 0x00000400), + RTW89_DECL_RFK_WM(0x7800, 0x10000000, 0x00000000), + RTW89_DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), + RTW89_DECL_RFK_WM(0x7804, 0xf8000000, 0x00000000), + RTW89_DECL_RFK_WM(0x78f0, 0xfff00000, 0x00000400), }; -DECLARE_RFK_TBL(rtw8852a_tssi_tracking_defs); +RTW89_DECLARE_RFK_TBL(rtw8852a_tssi_tracking_defs); static const struct rtw89_reg5_def rtw8852a_rfk_afe_init_defs[] = { - DECL_RFK_WC(0x12ec, 0x00008000), - DECL_RFK_WS(0x12ec, 0x00008000), - DECL_RFK_WC(0x5e00, 0x00000001), - DECL_RFK_WS(0x5e00, 0x00000001), - DECL_RFK_WC(0x32ec, 0x00008000), - DECL_RFK_WS(0x32ec, 0x00008000), - DECL_RFK_WC(0x7e00, 0x00000001), - DECL_RFK_WS(0x7e00, 0x00000001), + RTW89_DECL_RFK_WC(0x12ec, 0x00008000), + RTW89_DECL_RFK_WS(0x12ec, 0x00008000), + RTW89_DECL_RFK_WC(0x5e00, 0x00000001), + RTW89_DECL_RFK_WS(0x5e00, 0x00000001), + RTW89_DECL_RFK_WC(0x32ec, 0x00008000), + RTW89_DECL_RFK_WS(0x32ec, 0x00008000), + RTW89_DECL_RFK_WC(0x7e00, 0x00000001), + RTW89_DECL_RFK_WS(0x7e00, 0x00000001), }; -DECLARE_RFK_TBL(rtw8852a_rfk_afe_init_defs); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_afe_init_defs); static const struct rtw89_reg5_def rtw8852a_rfk_dack_reload_defs_a[] = { - DECL_RFK_WS(0x5e00, 0x00000008), - DECL_RFK_WS(0x5e50, 0x00000008), - DECL_RFK_WS(0x5e10, 0x80000000), - DECL_RFK_WS(0x5e60, 0x80000000), - DECL_RFK_WC(0x5e00, 0x00000008), - DECL_RFK_WC(0x5e50, 0x00000008), + RTW89_DECL_RFK_WS(0x5e00, 0x00000008), + RTW89_DECL_RFK_WS(0x5e50, 0x00000008), + RTW89_DECL_RFK_WS(0x5e10, 0x80000000), + RTW89_DECL_RFK_WS(0x5e60, 0x80000000), + RTW89_DECL_RFK_WC(0x5e00, 0x00000008), + RTW89_DECL_RFK_WC(0x5e50, 0x00000008), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dack_reload_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dack_reload_defs_a); static const struct rtw89_reg5_def rtw8852a_rfk_dack_reload_defs_b[] = { - DECL_RFK_WS(0x7e00, 0x00000008), - DECL_RFK_WS(0x7e50, 0x00000008), - DECL_RFK_WS(0x7e10, 0x80000000), - DECL_RFK_WS(0x7e60, 0x80000000), - DECL_RFK_WC(0x7e00, 0x00000008), - DECL_RFK_WC(0x7e50, 0x00000008), + RTW89_DECL_RFK_WS(0x7e00, 0x00000008), + RTW89_DECL_RFK_WS(0x7e50, 0x00000008), + RTW89_DECL_RFK_WS(0x7e10, 0x80000000), + RTW89_DECL_RFK_WS(0x7e60, 0x80000000), + RTW89_DECL_RFK_WC(0x7e00, 0x00000008), + RTW89_DECL_RFK_WC(0x7e50, 0x00000008), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dack_reload_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dack_reload_defs_b); static const struct rtw89_reg5_def rtw8852a_rfk_check_addc_defs_a[] = { - DECL_RFK_WC(0x20f4, 0x01000000), - DECL_RFK_WS(0x20f8, 0x80000000), - DECL_RFK_WM(0x20f0, 0x00ff0000, 0x00000001), - DECL_RFK_WM(0x20f0, 0x00000f00, 0x00000002), - DECL_RFK_WC(0x20f0, 0x0000000f), - DECL_RFK_WM(0x20f0, 0x000000c0, 0x00000002), + RTW89_DECL_RFK_WC(0x20f4, 0x01000000), + RTW89_DECL_RFK_WS(0x20f8, 0x80000000), + RTW89_DECL_RFK_WM(0x20f0, 0x00ff0000, 0x00000001), + RTW89_DECL_RFK_WM(0x20f0, 0x00000f00, 0x00000002), + RTW89_DECL_RFK_WC(0x20f0, 0x0000000f), + RTW89_DECL_RFK_WM(0x20f0, 0x000000c0, 0x00000002), }; -DECLARE_RFK_TBL(rtw8852a_rfk_check_addc_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_check_addc_defs_a); static const struct rtw89_reg5_def rtw8852a_rfk_check_addc_defs_b[] = { - DECL_RFK_WC(0x20f4, 0x01000000), - DECL_RFK_WS(0x20f8, 0x80000000), - DECL_RFK_WM(0x20f0, 0x00ff0000, 0x00000001), - DECL_RFK_WM(0x20f0, 0x00000f00, 0x00000002), - DECL_RFK_WC(0x20f0, 0x0000000f), - DECL_RFK_WM(0x20f0, 0x000000c0, 0x00000003), + RTW89_DECL_RFK_WC(0x20f4, 0x01000000), + RTW89_DECL_RFK_WS(0x20f8, 0x80000000), + RTW89_DECL_RFK_WM(0x20f0, 0x00ff0000, 0x00000001), + RTW89_DECL_RFK_WM(0x20f0, 0x00000f00, 0x00000002), + RTW89_DECL_RFK_WC(0x20f0, 0x0000000f), + RTW89_DECL_RFK_WM(0x20f0, 0x000000c0, 0x00000003), }; -DECLARE_RFK_TBL(rtw8852a_rfk_check_addc_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_check_addc_defs_b); static const struct rtw89_reg5_def rtw8852a_rfk_addck_reset_defs_a[] = { - DECL_RFK_WC(0x12d8, 0x00000030), - DECL_RFK_WC(0x32d8, 0x00000030), - DECL_RFK_WS(0x12b8, 0x40000000), - DECL_RFK_WC(0x032c, 0x40000000), - DECL_RFK_WC(0x032c, 0x00400000), - DECL_RFK_WS(0x032c, 0x00400000), - DECL_RFK_WS(0x030c, 0x0f000000), - DECL_RFK_WC(0x032c, 0x00010000), - DECL_RFK_WS(0x12dc, 0x00000002), - DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), + RTW89_DECL_RFK_WC(0x12d8, 0x00000030), + RTW89_DECL_RFK_WC(0x32d8, 0x00000030), + RTW89_DECL_RFK_WS(0x12b8, 0x40000000), + RTW89_DECL_RFK_WC(0x032c, 0x40000000), + RTW89_DECL_RFK_WC(0x032c, 0x00400000), + RTW89_DECL_RFK_WS(0x032c, 0x00400000), + RTW89_DECL_RFK_WS(0x030c, 0x0f000000), + RTW89_DECL_RFK_WC(0x032c, 0x00010000), + RTW89_DECL_RFK_WS(0x12dc, 0x00000002), + RTW89_DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), }; -DECLARE_RFK_TBL(rtw8852a_rfk_addck_reset_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_addck_reset_defs_a); static const struct rtw89_reg5_def rtw8852a_rfk_addck_trigger_defs_a[] = { - DECL_RFK_WS(0x12d8, 0x000000c0), - DECL_RFK_WS(0x12d8, 0x00000800), - DECL_RFK_WC(0x12d8, 0x00000800), - DECL_RFK_DELAY(1), - DECL_RFK_WM(0x12d8, 0x00000300, 0x00000001), + RTW89_DECL_RFK_WS(0x12d8, 0x000000c0), + RTW89_DECL_RFK_WS(0x12d8, 0x00000800), + RTW89_DECL_RFK_WC(0x12d8, 0x00000800), + RTW89_DECL_RFK_DELAY(1), + RTW89_DECL_RFK_WM(0x12d8, 0x00000300, 0x00000001), }; -DECLARE_RFK_TBL(rtw8852a_rfk_addck_trigger_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_addck_trigger_defs_a); static const struct rtw89_reg5_def rtw8852a_rfk_addck_restore_defs_a[] = { - DECL_RFK_WC(0x12dc, 0x00000002), - DECL_RFK_WS(0x032c, 0x00010000), - DECL_RFK_WM(0x030c, 0x0f000000, 0x0000000c), - DECL_RFK_WS(0x032c, 0x40000000), - DECL_RFK_WC(0x12b8, 0x40000000), + RTW89_DECL_RFK_WC(0x12dc, 0x00000002), + RTW89_DECL_RFK_WS(0x032c, 0x00010000), + RTW89_DECL_RFK_WM(0x030c, 0x0f000000, 0x0000000c), + RTW89_DECL_RFK_WS(0x032c, 0x40000000), + RTW89_DECL_RFK_WC(0x12b8, 0x40000000), }; -DECLARE_RFK_TBL(rtw8852a_rfk_addck_restore_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_addck_restore_defs_a); static const struct rtw89_reg5_def rtw8852a_rfk_addck_reset_defs_b[] = { - DECL_RFK_WS(0x32b8, 0x40000000), - DECL_RFK_WC(0x032c, 0x40000000), - DECL_RFK_WC(0x032c, 0x00400000), - DECL_RFK_WS(0x032c, 0x00400000), - DECL_RFK_WS(0x030c, 0x0f000000), - DECL_RFK_WC(0x032c, 0x00010000), - DECL_RFK_WS(0x32dc, 0x00000002), - DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), + RTW89_DECL_RFK_WS(0x32b8, 0x40000000), + RTW89_DECL_RFK_WC(0x032c, 0x40000000), + RTW89_DECL_RFK_WC(0x032c, 0x00400000), + RTW89_DECL_RFK_WS(0x032c, 0x00400000), + RTW89_DECL_RFK_WS(0x030c, 0x0f000000), + RTW89_DECL_RFK_WC(0x032c, 0x00010000), + RTW89_DECL_RFK_WS(0x32dc, 0x00000002), + RTW89_DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), }; -DECLARE_RFK_TBL(rtw8852a_rfk_addck_reset_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_addck_reset_defs_b); static const struct rtw89_reg5_def rtw8852a_rfk_addck_trigger_defs_b[] = { - DECL_RFK_WS(0x32d8, 0x000000c0), - DECL_RFK_WS(0x32d8, 0x00000800), - DECL_RFK_WC(0x32d8, 0x00000800), - DECL_RFK_DELAY(1), - DECL_RFK_WM(0x32d8, 0x00000300, 0x00000001), + RTW89_DECL_RFK_WS(0x32d8, 0x000000c0), + RTW89_DECL_RFK_WS(0x32d8, 0x00000800), + RTW89_DECL_RFK_WC(0x32d8, 0x00000800), + RTW89_DECL_RFK_DELAY(1), + RTW89_DECL_RFK_WM(0x32d8, 0x00000300, 0x00000001), }; -DECLARE_RFK_TBL(rtw8852a_rfk_addck_trigger_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_addck_trigger_defs_b); static const struct rtw89_reg5_def rtw8852a_rfk_addck_restore_defs_b[] = { - DECL_RFK_WC(0x32dc, 0x00000002), - DECL_RFK_WS(0x032c, 0x00010000), - DECL_RFK_WM(0x030c, 0x0f000000, 0x0000000c), - DECL_RFK_WS(0x032c, 0x40000000), - DECL_RFK_WC(0x32b8, 0x40000000), + RTW89_DECL_RFK_WC(0x32dc, 0x00000002), + RTW89_DECL_RFK_WS(0x032c, 0x00010000), + RTW89_DECL_RFK_WM(0x030c, 0x0f000000, 0x0000000c), + RTW89_DECL_RFK_WS(0x032c, 0x40000000), + RTW89_DECL_RFK_WC(0x32b8, 0x40000000), }; -DECLARE_RFK_TBL(rtw8852a_rfk_addck_restore_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_addck_restore_defs_b); static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_f_a[] = { - DECL_RFK_WC(0x032c, 0x40000000), - DECL_RFK_WS(0x030c, 0x0f000000), - DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), - DECL_RFK_WC(0x032c, 0x00010000), - DECL_RFK_WS(0x12dc, 0x00000001), - DECL_RFK_WS(0x12e8, 0x00000004), - DECL_RFK_WRF(0x0, 0x8f, 0x02000, 0x00001), + RTW89_DECL_RFK_WC(0x032c, 0x40000000), + RTW89_DECL_RFK_WS(0x030c, 0x0f000000), + RTW89_DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), + RTW89_DECL_RFK_WC(0x032c, 0x00010000), + RTW89_DECL_RFK_WS(0x12dc, 0x00000001), + RTW89_DECL_RFK_WS(0x12e8, 0x00000004), + RTW89_DECL_RFK_WRF(0x0, 0x8f, 0x02000, 0x00001), }; -DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_f_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_f_a); static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_f_b[] = { - DECL_RFK_WC(0x032c, 0x40000000), - DECL_RFK_WS(0x030c, 0x0f000000), - DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), - DECL_RFK_WC(0x032c, 0x00010000), - DECL_RFK_WS(0x32dc, 0x00000001), - DECL_RFK_WS(0x32e8, 0x00000004), - DECL_RFK_WRF(0x1, 0x8f, 0x02000, 0x00001), + RTW89_DECL_RFK_WC(0x032c, 0x40000000), + RTW89_DECL_RFK_WS(0x030c, 0x0f000000), + RTW89_DECL_RFK_WM(0x030c, 0x0f000000, 0x00000003), + RTW89_DECL_RFK_WC(0x032c, 0x00010000), + RTW89_DECL_RFK_WS(0x32dc, 0x00000001), + RTW89_DECL_RFK_WS(0x32e8, 0x00000004), + RTW89_DECL_RFK_WRF(0x1, 0x8f, 0x02000, 0x00001), }; -DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_f_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_f_b); static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_r_a[] = { - DECL_RFK_WC(0x12dc, 0x00000001), - DECL_RFK_WC(0x12e8, 0x00000004), - DECL_RFK_WRF(0x0, 0x8f, 0x02000, 0x00000), - DECL_RFK_WM(0x032c, 0x00010000, 0x00000001), + RTW89_DECL_RFK_WC(0x12dc, 0x00000001), + RTW89_DECL_RFK_WC(0x12e8, 0x00000004), + RTW89_DECL_RFK_WRF(0x0, 0x8f, 0x02000, 0x00000), + RTW89_DECL_RFK_WM(0x032c, 0x00010000, 0x00000001), }; -DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_r_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_r_a); static const struct rtw89_reg5_def rtw8852a_rfk_check_dadc_defs_r_b[] = { - DECL_RFK_WC(0x32dc, 0x00000001), - DECL_RFK_WC(0x32e8, 0x00000004), - DECL_RFK_WRF(0x1, 0x8f, 0x02000, 0x00000), - DECL_RFK_WM(0x032c, 0x00010000, 0x00000001), + RTW89_DECL_RFK_WC(0x32dc, 0x00000001), + RTW89_DECL_RFK_WC(0x32e8, 0x00000004), + RTW89_DECL_RFK_WRF(0x1, 0x8f, 0x02000, 0x00000), + RTW89_DECL_RFK_WM(0x032c, 0x00010000, 0x00000001), }; -DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_r_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_check_dadc_defs_r_b); static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_f_a[] = { - DECL_RFK_WS(0x5e00, 0x00000008), - DECL_RFK_WC(0x5e10, 0x80000000), - DECL_RFK_WS(0x5e50, 0x00000008), - DECL_RFK_WC(0x5e60, 0x80000000), - DECL_RFK_WS(0x12a0, 0x00008000), - DECL_RFK_WM(0x12a0, 0x00007000, 0x00000003), - DECL_RFK_WS(0x12b8, 0x40000000), - DECL_RFK_WS(0x030c, 0x10000000), - DECL_RFK_WC(0x032c, 0x80000000), - DECL_RFK_WS(0x12e0, 0x00010000), - DECL_RFK_WS(0x12e4, 0x0c000000), - DECL_RFK_WM(0x5e00, 0x03ff0000, 0x00000030), - DECL_RFK_WM(0x5e50, 0x03ff0000, 0x00000030), - DECL_RFK_WC(0x5e00, 0x0c000000), - DECL_RFK_WC(0x5e50, 0x0c000000), - DECL_RFK_WC(0x5e0c, 0x00000008), - DECL_RFK_WC(0x5e5c, 0x00000008), - DECL_RFK_WS(0x5e0c, 0x00000001), - DECL_RFK_WS(0x5e5c, 0x00000001), - DECL_RFK_DELAY(1), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_f_a); + RTW89_DECL_RFK_WS(0x5e00, 0x00000008), + RTW89_DECL_RFK_WC(0x5e10, 0x80000000), + RTW89_DECL_RFK_WS(0x5e50, 0x00000008), + RTW89_DECL_RFK_WC(0x5e60, 0x80000000), + RTW89_DECL_RFK_WS(0x12a0, 0x00008000), + RTW89_DECL_RFK_WM(0x12a0, 0x00007000, 0x00000003), + RTW89_DECL_RFK_WS(0x12b8, 0x40000000), + RTW89_DECL_RFK_WS(0x030c, 0x10000000), + RTW89_DECL_RFK_WC(0x032c, 0x80000000), + RTW89_DECL_RFK_WS(0x12e0, 0x00010000), + RTW89_DECL_RFK_WS(0x12e4, 0x0c000000), + RTW89_DECL_RFK_WM(0x5e00, 0x03ff0000, 0x00000030), + RTW89_DECL_RFK_WM(0x5e50, 0x03ff0000, 0x00000030), + RTW89_DECL_RFK_WC(0x5e00, 0x0c000000), + RTW89_DECL_RFK_WC(0x5e50, 0x0c000000), + RTW89_DECL_RFK_WC(0x5e0c, 0x00000008), + RTW89_DECL_RFK_WC(0x5e5c, 0x00000008), + RTW89_DECL_RFK_WS(0x5e0c, 0x00000001), + RTW89_DECL_RFK_WS(0x5e5c, 0x00000001), + RTW89_DECL_RFK_DELAY(1), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_f_a); static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_m_a[] = { - DECL_RFK_WC(0x12e4, 0x0c000000), - DECL_RFK_WS(0x5e0c, 0x00000008), - DECL_RFK_WS(0x5e5c, 0x00000008), - DECL_RFK_DELAY(1), + RTW89_DECL_RFK_WC(0x12e4, 0x0c000000), + RTW89_DECL_RFK_WS(0x5e0c, 0x00000008), + RTW89_DECL_RFK_WS(0x5e5c, 0x00000008), + RTW89_DECL_RFK_DELAY(1), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_m_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_m_a); static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_r_a[] = { - DECL_RFK_WC(0x5e0c, 0x00000001), - DECL_RFK_WC(0x5e5c, 0x00000001), - DECL_RFK_WC(0x12e0, 0x00010000), - DECL_RFK_WC(0x12a0, 0x00008000), - DECL_RFK_WS(0x12a0, 0x00007000), + RTW89_DECL_RFK_WC(0x5e0c, 0x00000001), + RTW89_DECL_RFK_WC(0x5e5c, 0x00000001), + RTW89_DECL_RFK_WC(0x12e0, 0x00010000), + RTW89_DECL_RFK_WC(0x12a0, 0x00008000), + RTW89_DECL_RFK_WS(0x12a0, 0x00007000), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_r_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_r_a); static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_f_b[] = { - DECL_RFK_WS(0x7e00, 0x00000008), - DECL_RFK_WC(0x7e10, 0x80000000), - DECL_RFK_WS(0x7e50, 0x00000008), - DECL_RFK_WC(0x7e60, 0x80000000), - DECL_RFK_WS(0x32a0, 0x00008000), - DECL_RFK_WM(0x32a0, 0x00007000, 0x00000003), - DECL_RFK_WS(0x32b8, 0x40000000), - DECL_RFK_WS(0x030c, 0x10000000), - DECL_RFK_WC(0x032c, 0x80000000), - DECL_RFK_WS(0x32e0, 0x00010000), - DECL_RFK_WS(0x32e4, 0x0c000000), - DECL_RFK_WM(0x7e00, 0x03ff0000, 0x00000030), - DECL_RFK_WM(0x7e50, 0x03ff0000, 0x00000030), - DECL_RFK_WC(0x7e00, 0x0c000000), - DECL_RFK_WC(0x7e50, 0x0c000000), - DECL_RFK_WC(0x7e0c, 0x00000008), - DECL_RFK_WC(0x7e5c, 0x00000008), - DECL_RFK_WS(0x7e0c, 0x00000001), - DECL_RFK_WS(0x7e5c, 0x00000001), - DECL_RFK_DELAY(1), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_f_b); + RTW89_DECL_RFK_WS(0x7e00, 0x00000008), + RTW89_DECL_RFK_WC(0x7e10, 0x80000000), + RTW89_DECL_RFK_WS(0x7e50, 0x00000008), + RTW89_DECL_RFK_WC(0x7e60, 0x80000000), + RTW89_DECL_RFK_WS(0x32a0, 0x00008000), + RTW89_DECL_RFK_WM(0x32a0, 0x00007000, 0x00000003), + RTW89_DECL_RFK_WS(0x32b8, 0x40000000), + RTW89_DECL_RFK_WS(0x030c, 0x10000000), + RTW89_DECL_RFK_WC(0x032c, 0x80000000), + RTW89_DECL_RFK_WS(0x32e0, 0x00010000), + RTW89_DECL_RFK_WS(0x32e4, 0x0c000000), + RTW89_DECL_RFK_WM(0x7e00, 0x03ff0000, 0x00000030), + RTW89_DECL_RFK_WM(0x7e50, 0x03ff0000, 0x00000030), + RTW89_DECL_RFK_WC(0x7e00, 0x0c000000), + RTW89_DECL_RFK_WC(0x7e50, 0x0c000000), + RTW89_DECL_RFK_WC(0x7e0c, 0x00000008), + RTW89_DECL_RFK_WC(0x7e5c, 0x00000008), + RTW89_DECL_RFK_WS(0x7e0c, 0x00000001), + RTW89_DECL_RFK_WS(0x7e5c, 0x00000001), + RTW89_DECL_RFK_DELAY(1), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_f_b); static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_m_b[] = { - DECL_RFK_WC(0x32e4, 0x0c000000), - DECL_RFK_WM(0x7e0c, 0x00000008, 0x00000001), - DECL_RFK_WM(0x7e5c, 0x00000008, 0x00000001), - DECL_RFK_DELAY(1), + RTW89_DECL_RFK_WC(0x32e4, 0x0c000000), + RTW89_DECL_RFK_WM(0x7e0c, 0x00000008, 0x00000001), + RTW89_DECL_RFK_WM(0x7e5c, 0x00000008, 0x00000001), + RTW89_DECL_RFK_DELAY(1), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_m_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_m_b); static const struct rtw89_reg5_def rtw8852a_rfk_dack_defs_r_b[] = { - DECL_RFK_WC(0x7e0c, 0x00000001), - DECL_RFK_WC(0x7e5c, 0x00000001), - DECL_RFK_WC(0x32e0, 0x00010000), - DECL_RFK_WC(0x32a0, 0x00008000), - DECL_RFK_WS(0x32a0, 0x00007000), + RTW89_DECL_RFK_WC(0x7e0c, 0x00000001), + RTW89_DECL_RFK_WC(0x7e5c, 0x00000001), + RTW89_DECL_RFK_WC(0x32e0, 0x00010000), + RTW89_DECL_RFK_WC(0x32a0, 0x00008000), + RTW89_DECL_RFK_WS(0x32a0, 0x00007000), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_r_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dack_defs_r_b); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sf_defs_a[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), - DECL_RFK_WS(0x12b8, 0x40000000), - DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), - DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), - DECL_RFK_WS(0x12b8, 0x10000000), - DECL_RFK_WS(0x58c8, 0x01000000), - DECL_RFK_WS(0x5864, 0xc0000000), - DECL_RFK_WS(0x2008, 0x01ffffff), - DECL_RFK_WS(0x0c1c, 0x00000004), - DECL_RFK_WS(0x0700, 0x08000000), - DECL_RFK_WS(0x0c70, 0x000003ff), - DECL_RFK_WS(0x0c60, 0x00000003), - DECL_RFK_WS(0x0c6c, 0x00000001), - DECL_RFK_WS(0x58ac, 0x08000000), - DECL_RFK_WS(0x0c3c, 0x00000200), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sf_defs_a); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), + RTW89_DECL_RFK_WS(0x12b8, 0x40000000), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), + RTW89_DECL_RFK_WS(0x12b8, 0x10000000), + RTW89_DECL_RFK_WS(0x58c8, 0x01000000), + RTW89_DECL_RFK_WS(0x5864, 0xc0000000), + RTW89_DECL_RFK_WS(0x2008, 0x01ffffff), + RTW89_DECL_RFK_WS(0x0c1c, 0x00000004), + RTW89_DECL_RFK_WS(0x0700, 0x08000000), + RTW89_DECL_RFK_WS(0x0c70, 0x000003ff), + RTW89_DECL_RFK_WS(0x0c60, 0x00000003), + RTW89_DECL_RFK_WS(0x0c6c, 0x00000001), + RTW89_DECL_RFK_WS(0x58ac, 0x08000000), + RTW89_DECL_RFK_WS(0x0c3c, 0x00000200), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sf_defs_a); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sr_defs_a[] = { - DECL_RFK_WS(0x4490, 0x80000000), - DECL_RFK_WS(0x12a0, 0x00007000), - DECL_RFK_WS(0x12a0, 0x00008000), - DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), - DECL_RFK_WS(0x12a0, 0x00080000), - DECL_RFK_WS(0x0700, 0x01000000), - DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00001111), - DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), + RTW89_DECL_RFK_WS(0x4490, 0x80000000), + RTW89_DECL_RFK_WS(0x12a0, 0x00007000), + RTW89_DECL_RFK_WS(0x12a0, 0x00008000), + RTW89_DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), + RTW89_DECL_RFK_WS(0x12a0, 0x00080000), + RTW89_DECL_RFK_WS(0x0700, 0x01000000), + RTW89_DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00001111), + RTW89_DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sr_defs_a); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sr_defs_a); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sf_defs_b[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), - DECL_RFK_WS(0x32b8, 0x40000000), - DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), - DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), - DECL_RFK_WS(0x32b8, 0x10000000), - DECL_RFK_WS(0x78c8, 0x01000000), - DECL_RFK_WS(0x7864, 0xc0000000), - DECL_RFK_WS(0x2008, 0x01ffffff), - DECL_RFK_WS(0x2c1c, 0x00000004), - DECL_RFK_WS(0x2700, 0x08000000), - DECL_RFK_WS(0x0c70, 0x000003ff), - DECL_RFK_WS(0x0c60, 0x00000003), - DECL_RFK_WS(0x0c6c, 0x00000001), - DECL_RFK_WS(0x78ac, 0x08000000), - DECL_RFK_WS(0x2c3c, 0x00000200), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sf_defs_b); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), + RTW89_DECL_RFK_WS(0x32b8, 0x40000000), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), + RTW89_DECL_RFK_WS(0x32b8, 0x10000000), + RTW89_DECL_RFK_WS(0x78c8, 0x01000000), + RTW89_DECL_RFK_WS(0x7864, 0xc0000000), + RTW89_DECL_RFK_WS(0x2008, 0x01ffffff), + RTW89_DECL_RFK_WS(0x2c1c, 0x00000004), + RTW89_DECL_RFK_WS(0x2700, 0x08000000), + RTW89_DECL_RFK_WS(0x0c70, 0x000003ff), + RTW89_DECL_RFK_WS(0x0c60, 0x00000003), + RTW89_DECL_RFK_WS(0x0c6c, 0x00000001), + RTW89_DECL_RFK_WS(0x78ac, 0x08000000), + RTW89_DECL_RFK_WS(0x2c3c, 0x00000200), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sf_defs_b); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_sr_defs_b[] = { - DECL_RFK_WS(0x6490, 0x80000000), - DECL_RFK_WS(0x32a0, 0x00007000), - DECL_RFK_WS(0x32a0, 0x00008000), - DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), - DECL_RFK_WS(0x32a0, 0x00080000), - DECL_RFK_WS(0x2700, 0x01000000), - DECL_RFK_WM(0x2700, 0x06000000, 0x00000002), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00002222), - DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), + RTW89_DECL_RFK_WS(0x6490, 0x80000000), + RTW89_DECL_RFK_WS(0x32a0, 0x00007000), + RTW89_DECL_RFK_WS(0x32a0, 0x00008000), + RTW89_DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), + RTW89_DECL_RFK_WS(0x32a0, 0x00080000), + RTW89_DECL_RFK_WS(0x2700, 0x01000000), + RTW89_DECL_RFK_WM(0x2700, 0x06000000, 0x00000002), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00002222), + RTW89_DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sr_defs_b); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_sr_defs_b); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_s_defs_ab[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), - DECL_RFK_WS(0x12b8, 0x40000000), - DECL_RFK_WS(0x32b8, 0x40000000), - DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), - DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), - DECL_RFK_WS(0x12b8, 0x10000000), - DECL_RFK_WS(0x58c8, 0x01000000), - DECL_RFK_WS(0x78c8, 0x01000000), - DECL_RFK_WS(0x5864, 0xc0000000), - DECL_RFK_WS(0x7864, 0xc0000000), - DECL_RFK_WS(0x2008, 0x01ffffff), - DECL_RFK_WS(0x0c1c, 0x00000004), - DECL_RFK_WS(0x0700, 0x08000000), - DECL_RFK_WS(0x0c70, 0x000003ff), - DECL_RFK_WS(0x0c60, 0x00000003), - DECL_RFK_WS(0x0c6c, 0x00000001), - DECL_RFK_WS(0x58ac, 0x08000000), - DECL_RFK_WS(0x78ac, 0x08000000), - DECL_RFK_WS(0x0c3c, 0x00000200), - DECL_RFK_WS(0x2344, 0x80000000), - DECL_RFK_WS(0x4490, 0x80000000), - DECL_RFK_WS(0x12a0, 0x00007000), - DECL_RFK_WS(0x12a0, 0x00008000), - DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), - DECL_RFK_WS(0x12a0, 0x00080000), - DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), - DECL_RFK_WS(0x32a0, 0x00080000), - DECL_RFK_WS(0x0700, 0x01000000), - DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00003333), - DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), - DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_s_defs_ab); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), + RTW89_DECL_RFK_WS(0x12b8, 0x40000000), + RTW89_DECL_RFK_WS(0x32b8, 0x40000000), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), + RTW89_DECL_RFK_WS(0x12b8, 0x10000000), + RTW89_DECL_RFK_WS(0x58c8, 0x01000000), + RTW89_DECL_RFK_WS(0x78c8, 0x01000000), + RTW89_DECL_RFK_WS(0x5864, 0xc0000000), + RTW89_DECL_RFK_WS(0x7864, 0xc0000000), + RTW89_DECL_RFK_WS(0x2008, 0x01ffffff), + RTW89_DECL_RFK_WS(0x0c1c, 0x00000004), + RTW89_DECL_RFK_WS(0x0700, 0x08000000), + RTW89_DECL_RFK_WS(0x0c70, 0x000003ff), + RTW89_DECL_RFK_WS(0x0c60, 0x00000003), + RTW89_DECL_RFK_WS(0x0c6c, 0x00000001), + RTW89_DECL_RFK_WS(0x58ac, 0x08000000), + RTW89_DECL_RFK_WS(0x78ac, 0x08000000), + RTW89_DECL_RFK_WS(0x0c3c, 0x00000200), + RTW89_DECL_RFK_WS(0x2344, 0x80000000), + RTW89_DECL_RFK_WS(0x4490, 0x80000000), + RTW89_DECL_RFK_WS(0x12a0, 0x00007000), + RTW89_DECL_RFK_WS(0x12a0, 0x00008000), + RTW89_DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), + RTW89_DECL_RFK_WS(0x12a0, 0x00080000), + RTW89_DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), + RTW89_DECL_RFK_WS(0x32a0, 0x00080000), + RTW89_DECL_RFK_WS(0x0700, 0x01000000), + RTW89_DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00003333), + RTW89_DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), + RTW89_DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_s_defs_ab); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_r_defs_a[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), - DECL_RFK_WC(0x12b8, 0x40000000), - DECL_RFK_WC(0x5864, 0xc0000000), - DECL_RFK_WC(0x2008, 0x01ffffff), - DECL_RFK_WC(0x0c1c, 0x00000004), - DECL_RFK_WC(0x0700, 0x08000000), - DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), - DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), - DECL_RFK_WC(0x12a0, 0x000ff000), - DECL_RFK_WC(0x0700, 0x07000000), - DECL_RFK_WC(0x5864, 0x20000000), - DECL_RFK_WC(0x0c3c, 0x00000200), - DECL_RFK_WC(0x20fc, 0xffff0000), - DECL_RFK_WC(0x58c8, 0x01000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_r_defs_a); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), + RTW89_DECL_RFK_WC(0x12b8, 0x40000000), + RTW89_DECL_RFK_WC(0x5864, 0xc0000000), + RTW89_DECL_RFK_WC(0x2008, 0x01ffffff), + RTW89_DECL_RFK_WC(0x0c1c, 0x00000004), + RTW89_DECL_RFK_WC(0x0700, 0x08000000), + RTW89_DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), + RTW89_DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), + RTW89_DECL_RFK_WC(0x12a0, 0x000ff000), + RTW89_DECL_RFK_WC(0x0700, 0x07000000), + RTW89_DECL_RFK_WC(0x5864, 0x20000000), + RTW89_DECL_RFK_WC(0x0c3c, 0x00000200), + RTW89_DECL_RFK_WC(0x20fc, 0xffff0000), + RTW89_DECL_RFK_WC(0x58c8, 0x01000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_r_defs_a); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_r_defs_b[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), - DECL_RFK_WC(0x32b8, 0x40000000), - DECL_RFK_WC(0x7864, 0xc0000000), - DECL_RFK_WC(0x2008, 0x01ffffff), - DECL_RFK_WC(0x2c1c, 0x00000004), - DECL_RFK_WC(0x2700, 0x08000000), - DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), - DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), - DECL_RFK_WC(0x32a0, 0x000ff000), - DECL_RFK_WC(0x2700, 0x07000000), - DECL_RFK_WC(0x7864, 0x20000000), - DECL_RFK_WC(0x2c3c, 0x00000200), - DECL_RFK_WC(0x20fc, 0xffff0000), - DECL_RFK_WC(0x78c8, 0x01000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_r_defs_b); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), + RTW89_DECL_RFK_WC(0x32b8, 0x40000000), + RTW89_DECL_RFK_WC(0x7864, 0xc0000000), + RTW89_DECL_RFK_WC(0x2008, 0x01ffffff), + RTW89_DECL_RFK_WC(0x2c1c, 0x00000004), + RTW89_DECL_RFK_WC(0x2700, 0x08000000), + RTW89_DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), + RTW89_DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), + RTW89_DECL_RFK_WC(0x32a0, 0x000ff000), + RTW89_DECL_RFK_WC(0x2700, 0x07000000), + RTW89_DECL_RFK_WC(0x7864, 0x20000000), + RTW89_DECL_RFK_WC(0x2c3c, 0x00000200), + RTW89_DECL_RFK_WC(0x20fc, 0xffff0000), + RTW89_DECL_RFK_WC(0x78c8, 0x01000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_r_defs_b); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_bb_afe_r_defs_ab[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), - DECL_RFK_WC(0x12b8, 0x40000000), - DECL_RFK_WC(0x32b8, 0x40000000), - DECL_RFK_WC(0x5864, 0xc0000000), - DECL_RFK_WC(0x7864, 0xc0000000), - DECL_RFK_WC(0x2008, 0x01ffffff), - DECL_RFK_WC(0x0c1c, 0x00000004), - DECL_RFK_WC(0x0700, 0x08000000), - DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), - DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), - DECL_RFK_WC(0x12a0, 0x000ff000), - DECL_RFK_WC(0x32a0, 0x000ff000), - DECL_RFK_WC(0x0700, 0x07000000), - DECL_RFK_WC(0x5864, 0x20000000), - DECL_RFK_WC(0x7864, 0x20000000), - DECL_RFK_WC(0x0c3c, 0x00000200), - DECL_RFK_WC(0x20fc, 0xffff0000), - DECL_RFK_WC(0x58c8, 0x01000000), - DECL_RFK_WC(0x78c8, 0x01000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_r_defs_ab); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), + RTW89_DECL_RFK_WC(0x12b8, 0x40000000), + RTW89_DECL_RFK_WC(0x32b8, 0x40000000), + RTW89_DECL_RFK_WC(0x5864, 0xc0000000), + RTW89_DECL_RFK_WC(0x7864, 0xc0000000), + RTW89_DECL_RFK_WC(0x2008, 0x01ffffff), + RTW89_DECL_RFK_WC(0x0c1c, 0x00000004), + RTW89_DECL_RFK_WC(0x0700, 0x08000000), + RTW89_DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), + RTW89_DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), + RTW89_DECL_RFK_WC(0x12a0, 0x000ff000), + RTW89_DECL_RFK_WC(0x32a0, 0x000ff000), + RTW89_DECL_RFK_WC(0x0700, 0x07000000), + RTW89_DECL_RFK_WC(0x5864, 0x20000000), + RTW89_DECL_RFK_WC(0x7864, 0x20000000), + RTW89_DECL_RFK_WC(0x0c3c, 0x00000200), + RTW89_DECL_RFK_WC(0x20fc, 0xffff0000), + RTW89_DECL_RFK_WC(0x58c8, 0x01000000), + RTW89_DECL_RFK_WC(0x78c8, 0x01000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_bb_afe_r_defs_ab); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_lbk_rxiqk_defs_f[] = { - DECL_RFK_WM(0x030c, 0xff000000, 0x0000000f), - DECL_RFK_DELAY(1), - DECL_RFK_WM(0x030c, 0xff000000, 0x00000003), - DECL_RFK_WM(0x032c, 0xffff0000, 0x0000a001), - DECL_RFK_DELAY(1), - DECL_RFK_WM(0x032c, 0xffff0000, 0x0000a041), - DECL_RFK_WS(0x8074, 0x80000000), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x0000000f), + RTW89_DECL_RFK_DELAY(1), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x00000003), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0000a001), + RTW89_DECL_RFK_DELAY(1), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0000a041), + RTW89_DECL_RFK_WS(0x8074, 0x80000000), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_lbk_rxiqk_defs_f); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_lbk_rxiqk_defs_f); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_lbk_rxiqk_defs_r[] = { - DECL_RFK_WC(0x8074, 0x80000000), - DECL_RFK_WM(0x030c, 0xff000000, 0x0000001f), - DECL_RFK_DELAY(1), - DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), - DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), - DECL_RFK_DELAY(1), - DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00003333), + RTW89_DECL_RFK_WC(0x8074, 0x80000000), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x0000001f), + RTW89_DECL_RFK_DELAY(1), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), + RTW89_DECL_RFK_DELAY(1), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x00000041), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00003333), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_lbk_rxiqk_defs_r); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_lbk_rxiqk_defs_r); static const struct rtw89_reg5_def rtw8852a_rfk_dpk_pas_read_defs[] = { - DECL_RFK_WM(0x80d4, 0x00ff0000, 0x00000006), - DECL_RFK_WC(0x80bc, 0x00004000), - DECL_RFK_WM(0x80c0, 0x00ff0000, 0x00000008), + RTW89_DECL_RFK_WM(0x80d4, 0x00ff0000, 0x00000006), + RTW89_DECL_RFK_WC(0x80bc, 0x00004000), + RTW89_DECL_RFK_WM(0x80c0, 0x00ff0000, 0x00000008), }; -DECLARE_RFK_TBL(rtw8852a_rfk_dpk_pas_read_defs); +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_dpk_pas_read_defs); static const struct rtw89_reg5_def rtw8852a_rfk_iqk_set_defs_nondbcc_path01[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), - DECL_RFK_WM(0x5864, 0x18000000, 0x00000003), - DECL_RFK_WM(0x7864, 0x18000000, 0x00000003), - DECL_RFK_WM(0x12b8, 0x40000000, 0x00000001), - DECL_RFK_WM(0x32b8, 0x40000000, 0x00000001), - DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), - DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), - DECL_RFK_WM(0x12b8, 0x10000000, 0x00000001), - DECL_RFK_WM(0x58c8, 0x01000000, 0x00000001), - DECL_RFK_WM(0x78c8, 0x01000000, 0x00000001), - DECL_RFK_WM(0x5864, 0xc0000000, 0x00000003), - DECL_RFK_WM(0x7864, 0xc0000000, 0x00000003), - DECL_RFK_WM(0x2008, 0x01ffffff, 0x01ffffff), - DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000001), - DECL_RFK_WM(0x0700, 0x08000000, 0x00000001), - DECL_RFK_WM(0x0c70, 0x000003ff, 0x000003ff), - DECL_RFK_WM(0x0c60, 0x00000003, 0x00000003), - DECL_RFK_WM(0x0c6c, 0x00000001, 0x00000001), - DECL_RFK_WM(0x58ac, 0x08000000, 0x00000001), - DECL_RFK_WM(0x78ac, 0x08000000, 0x00000001), - DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000001), - DECL_RFK_WM(0x2344, 0x80000000, 0x00000001), - DECL_RFK_WM(0x4490, 0x80000000, 0x00000001), - DECL_RFK_WM(0x12a0, 0x00007000, 0x00000007), - DECL_RFK_WM(0x12a0, 0x00008000, 0x00000001), - DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), - DECL_RFK_WM(0x12a0, 0x00080000, 0x00000001), - DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), - DECL_RFK_WM(0x32a0, 0x00080000, 0x00000001), - DECL_RFK_WM(0x0700, 0x01000000, 0x00000001), - DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00003333), - DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), - DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_iqk_set_defs_nondbcc_path01); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), + RTW89_DECL_RFK_WM(0x5864, 0x18000000, 0x00000003), + RTW89_DECL_RFK_WM(0x7864, 0x18000000, 0x00000003), + RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x00000001), + RTW89_DECL_RFK_WM(0x32b8, 0x40000000, 0x00000001), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), + RTW89_DECL_RFK_WM(0x12b8, 0x10000000, 0x00000001), + RTW89_DECL_RFK_WM(0x58c8, 0x01000000, 0x00000001), + RTW89_DECL_RFK_WM(0x78c8, 0x01000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x00000003), + RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x00000003), + RTW89_DECL_RFK_WM(0x2008, 0x01ffffff, 0x01ffffff), + RTW89_DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000001), + RTW89_DECL_RFK_WM(0x0700, 0x08000000, 0x00000001), + RTW89_DECL_RFK_WM(0x0c70, 0x000003ff, 0x000003ff), + RTW89_DECL_RFK_WM(0x0c60, 0x00000003, 0x00000003), + RTW89_DECL_RFK_WM(0x0c6c, 0x00000001, 0x00000001), + RTW89_DECL_RFK_WM(0x58ac, 0x08000000, 0x00000001), + RTW89_DECL_RFK_WM(0x78ac, 0x08000000, 0x00000001), + RTW89_DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000001), + RTW89_DECL_RFK_WM(0x2344, 0x80000000, 0x00000001), + RTW89_DECL_RFK_WM(0x4490, 0x80000000, 0x00000001), + RTW89_DECL_RFK_WM(0x12a0, 0x00007000, 0x00000007), + RTW89_DECL_RFK_WM(0x12a0, 0x00008000, 0x00000001), + RTW89_DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), + RTW89_DECL_RFK_WM(0x12a0, 0x00080000, 0x00000001), + RTW89_DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), + RTW89_DECL_RFK_WM(0x32a0, 0x00080000, 0x00000001), + RTW89_DECL_RFK_WM(0x0700, 0x01000000, 0x00000001), + RTW89_DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00003333), + RTW89_DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), + RTW89_DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_iqk_set_defs_nondbcc_path01); static const struct rtw89_reg5_def rtw8852a_rfk_iqk_set_defs_dbcc_path0[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), - DECL_RFK_WM(0x5864, 0x18000000, 0x00000003), - DECL_RFK_WM(0x7864, 0x18000000, 0x00000003), - DECL_RFK_WM(0x12b8, 0x40000000, 0x00000001), - DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), - DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), - DECL_RFK_WM(0x12b8, 0x10000000, 0x00000001), - DECL_RFK_WM(0x58c8, 0x01000000, 0x00000001), - DECL_RFK_WM(0x5864, 0xc0000000, 0x00000003), - DECL_RFK_WM(0x2008, 0x01ffffff, 0x01ffffff), - DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000001), - DECL_RFK_WM(0x0700, 0x08000000, 0x00000001), - DECL_RFK_WM(0x0c70, 0x000003ff, 0x000003ff), - DECL_RFK_WM(0x0c60, 0x00000003, 0x00000003), - DECL_RFK_WM(0x0c6c, 0x00000001, 0x00000001), - DECL_RFK_WM(0x58ac, 0x08000000, 0x00000001), - DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000001), - DECL_RFK_WM(0x2320, 0x00000001, 0x00000001), - DECL_RFK_WM(0x4490, 0x80000000, 0x00000001), - DECL_RFK_WM(0x12a0, 0x00007000, 0x00000007), - DECL_RFK_WM(0x12a0, 0x00008000, 0x00000001), - DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), - DECL_RFK_WM(0x12a0, 0x00080000, 0x00000001), - DECL_RFK_WM(0x0700, 0x01000000, 0x00000001), - DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00001111), - DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_iqk_set_defs_dbcc_path0); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), + RTW89_DECL_RFK_WM(0x5864, 0x18000000, 0x00000003), + RTW89_DECL_RFK_WM(0x7864, 0x18000000, 0x00000003), + RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x00000001), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), + RTW89_DECL_RFK_WM(0x12b8, 0x10000000, 0x00000001), + RTW89_DECL_RFK_WM(0x58c8, 0x01000000, 0x00000001), + RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x00000003), + RTW89_DECL_RFK_WM(0x2008, 0x01ffffff, 0x01ffffff), + RTW89_DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000001), + RTW89_DECL_RFK_WM(0x0700, 0x08000000, 0x00000001), + RTW89_DECL_RFK_WM(0x0c70, 0x000003ff, 0x000003ff), + RTW89_DECL_RFK_WM(0x0c60, 0x00000003, 0x00000003), + RTW89_DECL_RFK_WM(0x0c6c, 0x00000001, 0x00000001), + RTW89_DECL_RFK_WM(0x58ac, 0x08000000, 0x00000001), + RTW89_DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000001), + RTW89_DECL_RFK_WM(0x2320, 0x00000001, 0x00000001), + RTW89_DECL_RFK_WM(0x4490, 0x80000000, 0x00000001), + RTW89_DECL_RFK_WM(0x12a0, 0x00007000, 0x00000007), + RTW89_DECL_RFK_WM(0x12a0, 0x00008000, 0x00000001), + RTW89_DECL_RFK_WM(0x12a0, 0x00070000, 0x00000003), + RTW89_DECL_RFK_WM(0x12a0, 0x00080000, 0x00000001), + RTW89_DECL_RFK_WM(0x0700, 0x01000000, 0x00000001), + RTW89_DECL_RFK_WM(0x0700, 0x06000000, 0x00000002), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00001111), + RTW89_DECL_RFK_WM(0x58f0, 0x00080000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_iqk_set_defs_dbcc_path0); static const struct rtw89_reg5_def rtw8852a_rfk_iqk_set_defs_dbcc_path1[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), - DECL_RFK_WM(0x7864, 0x18000000, 0x00000003), - DECL_RFK_WM(0x32b8, 0x40000000, 0x00000001), - DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), - DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), - DECL_RFK_WM(0x32b8, 0x10000000, 0x00000001), - DECL_RFK_WM(0x78c8, 0x01000000, 0x00000001), - DECL_RFK_WM(0x7864, 0xc0000000, 0x00000003), - DECL_RFK_WM(0x2008, 0x01ffffff, 0x01ffffff), - DECL_RFK_WM(0x2c1c, 0x00000004, 0x00000001), - DECL_RFK_WM(0x2700, 0x08000000, 0x00000001), - DECL_RFK_WM(0x0c70, 0x000003ff, 0x000003ff), - DECL_RFK_WM(0x0c60, 0x00000003, 0x00000003), - DECL_RFK_WM(0x0c6c, 0x00000001, 0x00000001), - DECL_RFK_WM(0x78ac, 0x08000000, 0x00000001), - DECL_RFK_WM(0x2c3c, 0x00000200, 0x00000001), - DECL_RFK_WM(0x6490, 0x80000000, 0x00000001), - DECL_RFK_WM(0x32a0, 0x00007000, 0x00000007), - DECL_RFK_WM(0x32a0, 0x00008000, 0x00000001), - DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), - DECL_RFK_WM(0x32a0, 0x00080000, 0x00000001), - DECL_RFK_WM(0x2700, 0x01000000, 0x00000001), - DECL_RFK_WM(0x2700, 0x06000000, 0x00000002), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00002222), - DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_iqk_set_defs_dbcc_path1); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), + RTW89_DECL_RFK_WM(0x7864, 0x18000000, 0x00000003), + RTW89_DECL_RFK_WM(0x32b8, 0x40000000, 0x00000001), + RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x00000013), + RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x00000001), + RTW89_DECL_RFK_WM(0x32b8, 0x10000000, 0x00000001), + RTW89_DECL_RFK_WM(0x78c8, 0x01000000, 0x00000001), + RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x00000003), + RTW89_DECL_RFK_WM(0x2008, 0x01ffffff, 0x01ffffff), + RTW89_DECL_RFK_WM(0x2c1c, 0x00000004, 0x00000001), + RTW89_DECL_RFK_WM(0x2700, 0x08000000, 0x00000001), + RTW89_DECL_RFK_WM(0x0c70, 0x000003ff, 0x000003ff), + RTW89_DECL_RFK_WM(0x0c60, 0x00000003, 0x00000003), + RTW89_DECL_RFK_WM(0x0c6c, 0x00000001, 0x00000001), + RTW89_DECL_RFK_WM(0x78ac, 0x08000000, 0x00000001), + RTW89_DECL_RFK_WM(0x2c3c, 0x00000200, 0x00000001), + RTW89_DECL_RFK_WM(0x6490, 0x80000000, 0x00000001), + RTW89_DECL_RFK_WM(0x32a0, 0x00007000, 0x00000007), + RTW89_DECL_RFK_WM(0x32a0, 0x00008000, 0x00000001), + RTW89_DECL_RFK_WM(0x32a0, 0x00070000, 0x00000003), + RTW89_DECL_RFK_WM(0x32a0, 0x00080000, 0x00000001), + RTW89_DECL_RFK_WM(0x2700, 0x01000000, 0x00000001), + RTW89_DECL_RFK_WM(0x2700, 0x06000000, 0x00000002), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00002222), + RTW89_DECL_RFK_WM(0x78f0, 0x00080000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_iqk_set_defs_dbcc_path1); static const struct rtw89_reg5_def rtw8852a_rfk_iqk_restore_defs_nondbcc_path01[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), - DECL_RFK_WM(0x12b8, 0x40000000, 0x00000000), - DECL_RFK_WM(0x32b8, 0x40000000, 0x00000000), - DECL_RFK_WM(0x5864, 0xc0000000, 0x00000000), - DECL_RFK_WM(0x7864, 0xc0000000, 0x00000000), - DECL_RFK_WM(0x2008, 0x01ffffff, 0x00000000), - DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000000), - DECL_RFK_WM(0x0700, 0x08000000, 0x00000000), - DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), - DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), - DECL_RFK_WM(0x12a0, 0x000ff000, 0x00000000), - DECL_RFK_WM(0x32a0, 0x000ff000, 0x00000000), - DECL_RFK_WM(0x0700, 0x07000000, 0x00000000), - DECL_RFK_WM(0x5864, 0x20000000, 0x00000000), - DECL_RFK_WM(0x7864, 0x20000000, 0x00000000), - DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000000), - DECL_RFK_WM(0x2320, 0x00000001, 0x00000000), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000000), - DECL_RFK_WM(0x58c8, 0x01000000, 0x00000000), - DECL_RFK_WM(0x78c8, 0x01000000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_iqk_restore_defs_nondbcc_path01); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000303), + RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x00000000), + RTW89_DECL_RFK_WM(0x32b8, 0x40000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x2008, 0x01ffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000000), + RTW89_DECL_RFK_WM(0x0700, 0x08000000, 0x00000000), + RTW89_DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), + RTW89_DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), + RTW89_DECL_RFK_WM(0x12a0, 0x000ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x32a0, 0x000ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x0700, 0x07000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5864, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7864, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000000), + RTW89_DECL_RFK_WM(0x2320, 0x00000001, 0x00000000), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58c8, 0x01000000, 0x00000000), + RTW89_DECL_RFK_WM(0x78c8, 0x01000000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_iqk_restore_defs_nondbcc_path01); static const struct rtw89_reg5_def rtw8852a_rfk_iqk_restore_defs_dbcc_path0[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), - DECL_RFK_WM(0x12b8, 0x40000000, 0x00000000), - DECL_RFK_WM(0x5864, 0xc0000000, 0x00000000), - DECL_RFK_WM(0x2008, 0x01ffffff, 0x00000000), - DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000000), - DECL_RFK_WM(0x0700, 0x08000000, 0x00000000), - DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), - DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), - DECL_RFK_WM(0x12a0, 0x000ff000, 0x00000000), - DECL_RFK_WM(0x0700, 0x07000000, 0x00000000), - DECL_RFK_WM(0x5864, 0x20000000, 0x00000000), - DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000000), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000000), - DECL_RFK_WM(0x58c8, 0x01000000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_iqk_restore_defs_dbcc_path0); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000101), + RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x2008, 0x01ffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x0c1c, 0x00000004, 0x00000000), + RTW89_DECL_RFK_WM(0x0700, 0x08000000, 0x00000000), + RTW89_DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), + RTW89_DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), + RTW89_DECL_RFK_WM(0x12a0, 0x000ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x0700, 0x07000000, 0x00000000), + RTW89_DECL_RFK_WM(0x5864, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x0c3c, 0x00000200, 0x00000000), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000000), + RTW89_DECL_RFK_WM(0x58c8, 0x01000000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_iqk_restore_defs_dbcc_path0); static const struct rtw89_reg5_def rtw8852a_rfk_iqk_restore_defs_dbcc_path1[] = { - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), - DECL_RFK_WM(0x32b8, 0x40000000, 0x00000000), - DECL_RFK_WM(0x7864, 0xc0000000, 0x00000000), - DECL_RFK_WM(0x2008, 0x01ffffff, 0x00000000), - DECL_RFK_WM(0x2c1c, 0x00000004, 0x00000000), - DECL_RFK_WM(0x2700, 0x08000000, 0x00000000), - DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), - DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), - DECL_RFK_WM(0x32a0, 0x000ff000, 0x00000000), - DECL_RFK_WM(0x2700, 0x07000000, 0x00000000), - DECL_RFK_WM(0x7864, 0x20000000, 0x00000000), - DECL_RFK_WM(0x2c3c, 0x00000200, 0x00000000), - DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000000), - DECL_RFK_WM(0x78c8, 0x01000000, 0x00000000), -}; - -DECLARE_RFK_TBL(rtw8852a_rfk_iqk_restore_defs_dbcc_path1); + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000202), + RTW89_DECL_RFK_WM(0x32b8, 0x40000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x00000000), + RTW89_DECL_RFK_WM(0x2008, 0x01ffffff, 0x00000000), + RTW89_DECL_RFK_WM(0x2c1c, 0x00000004, 0x00000000), + RTW89_DECL_RFK_WM(0x2700, 0x08000000, 0x00000000), + RTW89_DECL_RFK_WM(0x0c70, 0x0000001f, 0x00000003), + RTW89_DECL_RFK_WM(0x0c70, 0x000003e0, 0x00000003), + RTW89_DECL_RFK_WM(0x32a0, 0x000ff000, 0x00000000), + RTW89_DECL_RFK_WM(0x2700, 0x07000000, 0x00000000), + RTW89_DECL_RFK_WM(0x7864, 0x20000000, 0x00000000), + RTW89_DECL_RFK_WM(0x2c3c, 0x00000200, 0x00000000), + RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x00000000), + RTW89_DECL_RFK_WM(0x78c8, 0x01000000, 0x00000000), +}; + +RTW89_DECLARE_RFK_TBL(rtw8852a_rfk_iqk_restore_defs_dbcc_path1); diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h index 4a4a45d778ff..33e6c404ecf9 100644 --- a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h +++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk_table.h @@ -5,54 +5,7 @@ #ifndef __RTW89_8852A_RFK_TABLE_H__ #define __RTW89_8852A_RFK_TABLE_H__ -#include "core.h" - -enum rtw89_rfk_flag { - RTW89_RFK_F_WRF = 0, - RTW89_RFK_F_WM = 1, - RTW89_RFK_F_WS = 2, - RTW89_RFK_F_WC = 3, - RTW89_RFK_F_DELAY = 4, - RTW89_RFK_F_NUM, -}; - -struct rtw89_rfk_tbl { - const struct rtw89_reg5_def *defs; - u32 size; -}; - -#define DECLARE_RFK_TBL(_name) \ -const struct rtw89_rfk_tbl _name ## _tbl = { \ - .defs = _name, \ - .size = ARRAY_SIZE(_name), \ -} - -#define DECL_RFK_WRF(_path, _addr, _mask, _data) \ - {.flag = RTW89_RFK_F_WRF, \ - .path = _path, \ - .addr = _addr, \ - .mask = _mask, \ - .data = _data,} - -#define DECL_RFK_WM(_addr, _mask, _data) \ - {.flag = RTW89_RFK_F_WM, \ - .addr = _addr, \ - .mask = _mask, \ - .data = _data,} - -#define DECL_RFK_WS(_addr, _mask) \ - {.flag = RTW89_RFK_F_WS, \ - .addr = _addr, \ - .mask = _mask,} - -#define DECL_RFK_WC(_addr, _mask) \ - {.flag = RTW89_RFK_F_WC, \ - .addr = _addr, \ - .mask = _mask,} - -#define DECL_RFK_DELAY(_data) \ - {.flag = RTW89_RFK_F_DELAY, \ - .data = _data,} +#include "phy.h" extern const struct rtw89_rfk_tbl rtw8852a_tssi_sys_defs_tbl; extern const struct rtw89_rfk_tbl rtw8852a_tssi_sys_defs_2g_tbl; diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852ae.c b/drivers/net/wireless/realtek/rtw89/rtw8852ae.c new file mode 100644 index 000000000000..48459aba441d --- /dev/null +++ b/drivers/net/wireless/realtek/rtw89/rtw8852ae.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) 2020-2021 Realtek Corporation + */ + +#include <linux/module.h> +#include <linux/pci.h> + +#include "pci.h" +#include "rtw8852a.h" + +static const struct rtw89_pci_info rtw8852a_pci_info = { + .dma_addr_set = &rtw89_pci_ch_dma_addr_set, +}; + +static const struct rtw89_driver_info rtw89_8852ae_info = { + .chip = &rtw8852a_chip_info, + .bus = { + .pci = &rtw8852a_pci_info, + }, +}; + +static const struct pci_device_id rtw89_8852ae_id_table[] = { + { + PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8852), + .driver_data = (kernel_ulong_t)&rtw89_8852ae_info, + }, + { + PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xa85a), + .driver_data = (kernel_ulong_t)&rtw89_8852ae_info, + }, + {}, +}; +MODULE_DEVICE_TABLE(pci, rtw89_8852ae_id_table); + +static struct pci_driver rtw89_8852ae_driver = { + .name = "rtw89_8852ae", + .id_table = rtw89_8852ae_id_table, + .probe = rtw89_pci_probe, + .remove = rtw89_pci_remove, + .driver.pm = &rtw89_pm_ops, +}; +module_pci_driver(rtw89_8852ae_driver); + +MODULE_AUTHOR("Realtek Corporation"); +MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852AE driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852c.c b/drivers/net/wireless/realtek/rtw89/rtw8852c.c new file mode 100644 index 000000000000..58920e91765e --- /dev/null +++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c @@ -0,0 +1,529 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) 2019-2022 Realtek Corporation + */ + +#include "debug.h" +#include "fw.h" +#include "mac.h" +#include "phy.h" +#include "reg.h" +#include "rtw8852c.h" + +static const struct rtw89_dle_mem rtw8852c_dle_mem_pcie[] = { + [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_wde_size19, &rtw89_ple_size19, + &rtw89_wde_qt18, &rtw89_wde_qt18, &rtw89_ple_qt46, + &rtw89_ple_qt47}, + [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_wde_size18, + &rtw89_ple_size18, &rtw89_wde_qt17, &rtw89_wde_qt17, + &rtw89_ple_qt44, &rtw89_ple_qt45}, + [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL, + NULL}, +}; + +static const u32 rtw8852c_h2c_regs[RTW89_H2CREG_MAX] = { + R_AX_H2CREG_DATA0_V1, R_AX_H2CREG_DATA1_V1, R_AX_H2CREG_DATA2_V1, + R_AX_H2CREG_DATA3_V1 +}; + +static const u32 rtw8852c_c2h_regs[RTW89_H2CREG_MAX] = { + R_AX_C2HREG_DATA0_V1, R_AX_C2HREG_DATA1_V1, R_AX_C2HREG_DATA2_V1, + R_AX_C2HREG_DATA3_V1 +}; + +static const struct rtw89_page_regs rtw8852c_page_regs = { + .hci_fc_ctrl = R_AX_HCI_FC_CTRL_V1, + .ch_page_ctrl = R_AX_CH_PAGE_CTRL_V1, + .ach_page_ctrl = R_AX_ACH0_PAGE_CTRL_V1, + .ach_page_info = R_AX_ACH0_PAGE_INFO_V1, + .pub_page_info3 = R_AX_PUB_PAGE_INFO3_V1, + .pub_page_ctrl1 = R_AX_PUB_PAGE_CTRL1_V1, + .pub_page_ctrl2 = R_AX_PUB_PAGE_CTRL2_V1, + .pub_page_info1 = R_AX_PUB_PAGE_INFO1_V1, + .pub_page_info2 = R_AX_PUB_PAGE_INFO2_V1, + .wp_page_ctrl1 = R_AX_WP_PAGE_CTRL1_V1, + .wp_page_ctrl2 = R_AX_WP_PAGE_CTRL2_V1, + .wp_page_info1 = R_AX_WP_PAGE_INFO1_V1, +}; + +static const struct rtw89_reg_def rtw8852c_dcfo_comp = { + R_DCFO_COMP_S0_V1, B_DCFO_COMP_S0_V1_MSK +}; + +static int rtw8852c_pwr_on_func(struct rtw89_dev *rtwdev) +{ + u32 val32; + u32 ret; + + val32 = rtw89_read32_mask(rtwdev, R_AX_SYS_STATUS1, B_AX_PAD_HCI_SEL_V2_MASK); + if (val32 == MAC_AX_HCI_SEL_PCIE_USB) + rtw89_write32_set(rtwdev, R_AX_LDO_AON_CTRL0, B_AX_PD_REGU_L); + + rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_AFSM_WLSUS_EN | + B_AX_AFSM_PCIE_SUS_EN); + rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_DIS_WLBT_PDNSUSEN_SOPC); + rtw89_write32_set(rtwdev, R_AX_WLLPS_CTRL, B_AX_DIS_WLBT_LPSEN_LOPC); + rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APDM_HPDN); + rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); + + ret = read_poll_timeout(rtw89_read32, val32, val32 & B_AX_RDY_SYSPWR, + 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); + if (ret) + return ret; + + rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); + rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFN_ONMAC); + + ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_APFN_ONMAC), + 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); + if (ret) + return ret; + + rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); + rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); + rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); + rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); + + rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); + rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_CALIB_EN_V1); + + rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, B_AX_CMAC1_FEN); + rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, B_AX_R_SYM_ISO_CMAC12PP); + rtw89_write32_clr(rtwdev, R_AX_AFE_CTRL1, B_AX_R_SYM_WLCMAC1_P4_PC_EN | + B_AX_R_SYM_WLCMAC1_P3_PC_EN | + B_AX_R_SYM_WLCMAC1_P2_PC_EN | + B_AX_R_SYM_WLCMAC1_P1_PC_EN | + B_AX_R_SYM_WLCMAC1_PC_EN); + rtw89_write32_set(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_PTA_1P3); + + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, + XTAL_SI_GND_SHDN_WL, XTAL_SI_GND_SHDN_WL); + if (ret) + return ret; + + rtw89_write32_set(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_RFC_1P3); + + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, + XTAL_SI_SHDN_WL, XTAL_SI_SHDN_WL); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_WEI, + XTAL_SI_OFF_WEI); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_EI, + XTAL_SI_OFF_EI); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_RFC2RF); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_WEI, + XTAL_SI_PON_WEI); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_EI, + XTAL_SI_PON_EI); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SRAM2RFC); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_2, 0, XTAL_SI_LDO_LPS); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_4, 0, XTAL_SI_LPS_CAP); + if (ret) + return ret; + + rtw89_write32_set(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); + rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_ISO_EB2CORE); + rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B15); + + fsleep(1000); + + rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14); + rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); + rtw89_write32_set(rtwdev, R_AX_GPIO0_15_EECS_EESK_LED1_PULL_LOW_EN, + B_AX_EECS_PULL_LOW_EN | B_AX_EESK_PULL_LOW_EN | + B_AX_LED1_PULL_LOW_EN); + + rtw89_write32_set(rtwdev, R_AX_DMAC_FUNC_EN, + B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN | B_AX_MPDU_PROC_EN | + B_AX_WD_RLS_EN | B_AX_DLE_WDE_EN | B_AX_TXPKT_CTRL_EN | + B_AX_STA_SCH_EN | B_AX_DLE_PLE_EN | B_AX_PKT_BUF_EN | + B_AX_DMAC_TBL_EN | B_AX_PKT_IN_EN | B_AX_DLE_CPUIO_EN | + B_AX_DISPATCHER_EN | B_AX_BBRPT_EN | B_AX_MAC_SEC_EN | + B_AX_MAC_UN_EN | B_AX_H_AXIDMA_EN); + + rtw89_write32_set(rtwdev, R_AX_CMAC_FUNC_EN, + B_AX_CMAC_EN | B_AX_CMAC_TXEN | B_AX_CMAC_RXEN | + B_AX_FORCE_CMACREG_GCKEN | B_AX_PHYINTF_EN | + B_AX_CMAC_DMA_EN | B_AX_PTCLTOP_EN | B_AX_SCHEDULER_EN | + B_AX_TMAC_EN | B_AX_RMAC_EN); + + return 0; +} + +static int rtw8852c_pwr_off_func(struct rtw89_dev *rtwdev) +{ + u32 val32; + u32 ret; + + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_RFC2RF, + XTAL_SI_RFC2RF); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_EI); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_WEI); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0, XTAL_SI_RF00); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, 0, XTAL_SI_RF10); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_SRAM2RFC, + XTAL_SI_SRAM2RFC); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_EI); + if (ret) + return ret; + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_WEI); + if (ret) + return ret; + + rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); + rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, B_AX_FEN_BB_GLB_RSTN | B_AX_FEN_BBRSTB); + rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL_EXTEND, + B_AX_R_SYM_FEN_WLBBGLB_1 | B_AX_R_SYM_FEN_WLBBFUN_1); + rtw89_write32_clr(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_RFC_1P3); + + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SHDN_WL); + if (ret) + return ret; + + rtw89_write32_clr(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_PTA_1P3); + + ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_GND_SHDN_WL); + if (ret) + return ret; + + rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_OFFMAC); + + ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_APFM_OFFMAC), + 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); + if (ret) + return ret; + + rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, 0x0001A0B0); + rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_XTAL_OFF_A_DIE); + rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); + + return 0; +} + +static void rtw8852c_e_efuse_parsing(struct rtw89_efuse *efuse, + struct rtw8852c_efuse *map) +{ + ether_addr_copy(efuse->addr, map->e.mac_addr); + efuse->rfe_type = map->rfe_type; + efuse->xtal_cap = map->xtal_k; +} + +static void rtw8852c_efuse_parsing_tssi(struct rtw89_dev *rtwdev, + struct rtw8852c_efuse *map) +{ + struct rtw89_tssi_info *tssi = &rtwdev->tssi; + struct rtw8852c_tssi_offset *ofst[] = {&map->path_a_tssi, &map->path_b_tssi}; + u8 *bw40_1s_tssi_6g_ofst[] = {map->bw40_1s_tssi_6g_a, map->bw40_1s_tssi_6g_b}; + u8 i, j; + + tssi->thermal[RF_PATH_A] = map->path_a_therm; + tssi->thermal[RF_PATH_B] = map->path_b_therm; + + for (i = 0; i < RF_PATH_NUM_8852C; i++) { + memcpy(tssi->tssi_cck[i], ofst[i]->cck_tssi, + sizeof(ofst[i]->cck_tssi)); + + for (j = 0; j < TSSI_CCK_CH_GROUP_NUM; j++) + rtw89_debug(rtwdev, RTW89_DBG_TSSI, + "[TSSI][EFUSE] path=%d cck[%d]=0x%x\n", + i, j, tssi->tssi_cck[i][j]); + + memcpy(tssi->tssi_mcs[i], ofst[i]->bw40_tssi, + sizeof(ofst[i]->bw40_tssi)); + memcpy(tssi->tssi_mcs[i] + TSSI_MCS_2G_CH_GROUP_NUM, + ofst[i]->bw40_1s_tssi_5g, sizeof(ofst[i]->bw40_1s_tssi_5g)); + memcpy(tssi->tssi_6g_mcs[i], bw40_1s_tssi_6g_ofst[i], + sizeof(tssi->tssi_6g_mcs[i])); + + for (j = 0; j < TSSI_MCS_CH_GROUP_NUM; j++) + rtw89_debug(rtwdev, RTW89_DBG_TSSI, + "[TSSI][EFUSE] path=%d mcs[%d]=0x%x\n", + i, j, tssi->tssi_mcs[i][j]); + } +} + +static int rtw8852c_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map) +{ + struct rtw89_efuse *efuse = &rtwdev->efuse; + struct rtw8852c_efuse *map; + + map = (struct rtw8852c_efuse *)log_map; + + efuse->country_code[0] = map->country_code[0]; + efuse->country_code[1] = map->country_code[1]; + rtw8852c_efuse_parsing_tssi(rtwdev, map); + + switch (rtwdev->hci.type) { + case RTW89_HCI_TYPE_PCIE: + rtw8852c_e_efuse_parsing(efuse, map); + break; + default: + return -ENOTSUPP; + } + + rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type); + + return 0; +} + +static void rtw8852c_phycap_parsing_tssi(struct rtw89_dev *rtwdev, u8 *phycap_map) +{ + struct rtw89_tssi_info *tssi = &rtwdev->tssi; + static const u32 tssi_trim_addr[RF_PATH_NUM_8852C] = {0x5D6, 0x5AB}; + static const u32 tssi_trim_addr_6g[RF_PATH_NUM_8852C] = {0x5CE, 0x5A3}; + u32 addr = rtwdev->chip->phycap_addr; + bool pg = false; + u32 ofst; + u8 i, j; + + for (i = 0; i < RF_PATH_NUM_8852C; i++) { + for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) { + /* addrs are in decreasing order */ + ofst = tssi_trim_addr[i] - addr - j; + tssi->tssi_trim[i][j] = phycap_map[ofst]; + + if (phycap_map[ofst] != 0xff) + pg = true; + } + + for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM_6G; j++) { + /* addrs are in decreasing order */ + ofst = tssi_trim_addr_6g[i] - addr - j; + tssi->tssi_trim_6g[i][j] = phycap_map[ofst]; + + if (phycap_map[ofst] != 0xff) + pg = true; + } + } + + if (!pg) { + memset(tssi->tssi_trim, 0, sizeof(tssi->tssi_trim)); + memset(tssi->tssi_trim_6g, 0, sizeof(tssi->tssi_trim_6g)); + rtw89_debug(rtwdev, RTW89_DBG_TSSI, + "[TSSI][TRIM] no PG, set all trim info to 0\n"); + } + + for (i = 0; i < RF_PATH_NUM_8852C; i++) + for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) + rtw89_debug(rtwdev, RTW89_DBG_TSSI, + "[TSSI] path=%d idx=%d trim=0x%x addr=0x%x\n", + i, j, tssi->tssi_trim[i][j], + tssi_trim_addr[i] - j); +} + +static void rtw8852c_phycap_parsing_thermal_trim(struct rtw89_dev *rtwdev, + u8 *phycap_map) +{ + struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; + static const u32 thm_trim_addr[RF_PATH_NUM_8852C] = {0x5DF, 0x5DC}; + u32 addr = rtwdev->chip->phycap_addr; + u8 i; + + for (i = 0; i < RF_PATH_NUM_8852C; i++) { + info->thermal_trim[i] = phycap_map[thm_trim_addr[i] - addr]; + + rtw89_debug(rtwdev, RTW89_DBG_RFK, + "[THERMAL][TRIM] path=%d thermal_trim=0x%x\n", + i, info->thermal_trim[i]); + + if (info->thermal_trim[i] != 0xff) + info->pg_thermal_trim = true; + } +} + +static void rtw8852c_thermal_trim(struct rtw89_dev *rtwdev) +{ +#define __thm_setting(raw) \ +({ \ + u8 __v = (raw); \ + ((__v & 0x1) << 3) | ((__v & 0x1f) >> 1); \ +}) + struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; + u8 i, val; + + if (!info->pg_thermal_trim) { + rtw89_debug(rtwdev, RTW89_DBG_RFK, + "[THERMAL][TRIM] no PG, do nothing\n"); + + return; + } + + for (i = 0; i < RF_PATH_NUM_8852C; i++) { + val = __thm_setting(info->thermal_trim[i]); + rtw89_write_rf(rtwdev, i, RR_TM2, RR_TM2_OFF, val); + + rtw89_debug(rtwdev, RTW89_DBG_RFK, + "[THERMAL][TRIM] path=%d thermal_setting=0x%x\n", + i, val); + } +#undef __thm_setting +} + +static void rtw8852c_phycap_parsing_pa_bias_trim(struct rtw89_dev *rtwdev, + u8 *phycap_map) +{ + struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; + static const u32 pabias_trim_addr[RF_PATH_NUM_8852C] = {0x5DE, 0x5DB}; + u32 addr = rtwdev->chip->phycap_addr; + u8 i; + + for (i = 0; i < RF_PATH_NUM_8852C; i++) { + info->pa_bias_trim[i] = phycap_map[pabias_trim_addr[i] - addr]; + + rtw89_debug(rtwdev, RTW89_DBG_RFK, + "[PA_BIAS][TRIM] path=%d pa_bias_trim=0x%x\n", + i, info->pa_bias_trim[i]); + + if (info->pa_bias_trim[i] != 0xff) + info->pg_pa_bias_trim = true; + } +} + +static void rtw8852c_pa_bias_trim(struct rtw89_dev *rtwdev) +{ + struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; + u8 pabias_2g, pabias_5g; + u8 i; + + if (!info->pg_pa_bias_trim) { + rtw89_debug(rtwdev, RTW89_DBG_RFK, + "[PA_BIAS][TRIM] no PG, do nothing\n"); + + return; + } + + for (i = 0; i < RF_PATH_NUM_8852C; i++) { + pabias_2g = FIELD_GET(GENMASK(3, 0), info->pa_bias_trim[i]); + pabias_5g = FIELD_GET(GENMASK(7, 4), info->pa_bias_trim[i]); + + rtw89_debug(rtwdev, RTW89_DBG_RFK, + "[PA_BIAS][TRIM] path=%d 2G=0x%x 5G=0x%x\n", + i, pabias_2g, pabias_5g); + + rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXG, pabias_2g); + rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXA, pabias_5g); + } +} + +static int rtw8852c_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map) +{ + rtw8852c_phycap_parsing_tssi(rtwdev, phycap_map); + rtw8852c_phycap_parsing_thermal_trim(rtwdev, phycap_map); + rtw8852c_phycap_parsing_pa_bias_trim(rtwdev, phycap_map); + + return 0; +} + +static void rtw8852c_power_trim(struct rtw89_dev *rtwdev) +{ + rtw8852c_thermal_trim(rtwdev); + rtw8852c_pa_bias_trim(rtwdev); +} + +static +void rtw8852c_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, + s8 pw_ofst, enum rtw89_mac_idx mac_idx) +{ + s8 pw_ofst_2tx; + s8 val_1t; + s8 val_2t; + u32 reg; + u8 i; + + if (pw_ofst < -32 || pw_ofst > 31) { + rtw89_warn(rtwdev, "[ULTB] Err pwr_offset=%d\n", pw_ofst); + return; + } + val_1t = pw_ofst << 2; + pw_ofst_2tx = max(pw_ofst - 3, -32); + val_2t = pw_ofst_2tx << 2; + + rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] val_1tx=0x%x\n", val_1t); + rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[ULTB] val_2tx=0x%x\n", val_2t); + + for (i = 0; i < 4; i++) { + /* 1TX */ + reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx); + rtw89_write32_mask(rtwdev, reg, + B_AX_PWR_UL_TB_1T_V1_MASK << (8 * i), + val_1t); + /* 2TX */ + reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx); + rtw89_write32_mask(rtwdev, reg, + B_AX_PWR_UL_TB_2T_V1_MASK << (8 * i), + val_2t); + } +} + +static const struct rtw89_chip_ops rtw8852c_chip_ops = { + .read_efuse = rtw8852c_read_efuse, + .read_phycap = rtw8852c_read_phycap, + .power_trim = rtw8852c_power_trim, + .read_rf = rtw89_phy_read_rf_v1, + .write_rf = rtw89_phy_write_rf_v1, + .set_txpwr_ul_tb_offset = rtw8852c_set_txpwr_ul_tb_offset, + .pwr_on_func = rtw8852c_pwr_on_func, + .pwr_off_func = rtw8852c_pwr_off_func, + .cfg_ctrl_path = rtw89_mac_cfg_ctrl_path_v1, + .mac_cfg_gnt = rtw89_mac_cfg_gnt_v1, + .stop_sch_tx = rtw89_mac_stop_sch_tx_v1, + .resume_sch_tx = rtw89_mac_resume_sch_tx_v1, +}; + +const struct rtw89_chip_info rtw8852c_chip_info = { + .chip_id = RTL8852C, + .ops = &rtw8852c_chip_ops, + .fw_name = "rtw89/rtw8852c_fw.bin", + .dle_mem = rtw8852c_dle_mem_pcie, + .rf_base_addr = {0xe000, 0xf000}, + .pwr_on_seq = NULL, + .pwr_off_seq = NULL, + .sec_ctrl_efuse_size = 4, + .physical_efuse_size = 1216, + .logical_efuse_size = 2048, + .limit_efuse_size = 1280, + .dav_phy_efuse_size = 96, + .dav_log_efuse_size = 16, + .phycap_addr = 0x590, + .phycap_size = 0x60, + .hci_func_en_addr = R_AX_HCI_FUNC_EN_V1, + .h2c_ctrl_reg = R_AX_H2CREG_CTRL_V1, + .h2c_regs = rtw8852c_h2c_regs, + .c2h_ctrl_reg = R_AX_C2HREG_CTRL_V1, + .c2h_regs = rtw8852c_c2h_regs, + .page_regs = &rtw8852c_page_regs, + .dcfo_comp = &rtw8852c_dcfo_comp, + .dcfo_comp_sft = 5, +}; +EXPORT_SYMBOL(rtw8852c_chip_info); + +MODULE_FIRMWARE("rtw89/rtw8852c_fw.bin"); +MODULE_AUTHOR("Realtek Corporation"); +MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852C driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852c.h b/drivers/net/wireless/realtek/rtw89/rtw8852c.h new file mode 100644 index 000000000000..d0594716040b --- /dev/null +++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ +/* Copyright(c) 2019-2022 Realtek Corporation + */ + +#ifndef __RTW89_8852C_H__ +#define __RTW89_8852C_H__ + +#include "core.h" + +#define RF_PATH_NUM_8852C 2 + +struct rtw8852c_u_efuse { + u8 rsvd[0x38]; + u8 mac_addr[ETH_ALEN]; +}; + +struct rtw8852c_e_efuse { + u8 mac_addr[ETH_ALEN]; +}; + +struct rtw8852c_tssi_offset { + u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM]; + u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM]; + u8 rsvd[7]; + u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM]; +} __packed; + +struct rtw8852c_efuse { + u8 rsvd[0x210]; + struct rtw8852c_tssi_offset path_a_tssi; + u8 rsvd1[10]; + struct rtw8852c_tssi_offset path_b_tssi; + u8 rsvd2[94]; + u8 channel_plan; + u8 xtal_k; + u8 rsvd3; + u8 iqk_lck; + u8 rsvd4[5]; + u8 reg_setting:2; + u8 tx_diversity:1; + u8 rx_diversity:2; + u8 ac_mode:1; + u8 module_type:2; + u8 rsvd5; + u8 shared_ant:1; + u8 coex_type:3; + u8 ant_iso:1; + u8 radio_on_off:1; + u8 rsvd6:2; + u8 eeprom_version; + u8 customer_id; + u8 tx_bb_swing_2g; + u8 tx_bb_swing_5g; + u8 tx_cali_pwr_trk_mode; + u8 trx_path_selection; + u8 rfe_type; + u8 country_code[2]; + u8 rsvd7[3]; + u8 path_a_therm; + u8 path_b_therm; + u8 rsvd8[46]; + u8 bw40_1s_tssi_6g_a[TSSI_MCS_6G_CH_GROUP_NUM]; + u8 rsvd9[10]; + u8 bw40_1s_tssi_6g_b[TSSI_MCS_6G_CH_GROUP_NUM]; + u8 rsvd10[110]; + u8 channel_plan_6g; + u8 rsvd11[71]; + union { + struct rtw8852c_u_efuse u; + struct rtw8852c_e_efuse e; + }; +} __packed; + +extern const struct rtw89_chip_info rtw8852c_chip_info; + +#endif diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852ce.c b/drivers/net/wireless/realtek/rtw89/rtw8852ce.c new file mode 100644 index 000000000000..e71370585b4d --- /dev/null +++ b/drivers/net/wireless/realtek/rtw89/rtw8852ce.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause +/* Copyright(c) 2020-2022 Realtek Corporation + */ + +#include <linux/module.h> +#include <linux/pci.h> + +#include "pci.h" +#include "reg.h" +#include "rtw8852c.h" + +static const struct rtw89_pci_info rtw8852c_pci_info = { + .dma_addr_set = &rtw89_pci_ch_dma_addr_set_v1, +}; + +static const struct rtw89_driver_info rtw89_8852ce_info = { + .chip = &rtw8852c_chip_info, + .bus = { + .pci = &rtw8852c_pci_info, + }, +}; + +static const struct pci_device_id rtw89_8852ce_id_table[] = { + { + PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xc852), + .driver_data = (kernel_ulong_t)&rtw89_8852ce_info, + }, + {}, +}; +MODULE_DEVICE_TABLE(pci, rtw89_8852ce_id_table); + +static struct pci_driver rtw89_8852ce_driver = { + .name = "rtw89_8852ce", + .id_table = rtw89_8852ce_id_table, + .probe = rtw89_pci_probe, + .remove = rtw89_pci_remove, + .driver.pm = &rtw89_pm_ops, +}; +module_pci_driver(rtw89_8852ce_driver); + +MODULE_AUTHOR("Realtek Corporation"); +MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852CE driver"); +MODULE_LICENSE("Dual BSD/GPL"); diff --git a/drivers/net/wireless/realtek/rtw89/txrx.h b/drivers/net/wireless/realtek/rtw89/txrx.h index 75b11249f306..86e3d8b400d6 100644 --- a/drivers/net/wireless/realtek/rtw89/txrx.h +++ b/drivers/net/wireless/realtek/rtw89/txrx.h @@ -31,6 +31,8 @@ #define RTW89_TXWD_BODY0_HDR_LLC_LEN GENMASK(15, 11) #define RTW89_TXWD_BODY0_WD_PAGE BIT(7) #define RTW89_TXWD_BODY0_HW_AMSDU BIT(5) +#define RTW89_TXWD_BODY0_HW_SSN_SEL GENMASK(3, 2) +#define RTW89_TXWD_BODY0_HW_SSN_MODE GENMASK(1, 0) /* TX WD BODY DWORD 1 */ #define RTW89_TXWD_BODY1_PAYLOAD_ID GENMASK(31, 16) @@ -56,6 +58,7 @@ #define RTW89_TXWD_INFO0_GI_LTF GENMASK(27, 25) #define RTW89_TXWD_INFO0_DATA_RATE GENMASK(24, 16) #define RTW89_TXWD_INFO0_DISDATAFB BIT(10) +#define RTW89_TXWD_INFO0_MULTIPORT_ID GENMASK(6, 4) /* TX WD INFO DWORD 1 */ #define RTW89_TXWD_INFO1_DATA_RTY_LOWEST_RATE GENMASK(24, 16) diff --git a/drivers/net/wireless/st/cw1200/queue.c b/drivers/net/wireless/st/cw1200/queue.c index 12952b1c29df..e06da4b3b0d4 100644 --- a/drivers/net/wireless/st/cw1200/queue.c +++ b/drivers/net/wireless/st/cw1200/queue.c @@ -8,6 +8,7 @@ #include <net/mac80211.h> #include <linux/sched.h> +#include <linux/jiffies.h> #include "queue.h" #include "cw1200.h" #include "debug.h" @@ -94,7 +95,7 @@ static void __cw1200_queue_gc(struct cw1200_queue *queue, bool wakeup_stats = false; list_for_each_entry_safe(item, tmp, &queue->queue, head) { - if (jiffies - item->queue_timestamp < queue->ttl) + if (time_is_after_jiffies(item->queue_timestamp + queue->ttl)) break; --queue->num_queued; --queue->link_map_cache[item->txpriv.link_id]; diff --git a/drivers/net/wireless/st/cw1200/wsm.c b/drivers/net/wireless/st/cw1200/wsm.c index 99624dd34886..5a3e7a626702 100644 --- a/drivers/net/wireless/st/cw1200/wsm.c +++ b/drivers/net/wireless/st/cw1200/wsm.c @@ -537,7 +537,7 @@ int wsm_set_tx_queue_params(struct cw1200_common *priv, { int ret; struct wsm_buf *buf = &priv->wsm_cmd_buf; - u8 queue_id_to_wmm_aci[] = {3, 2, 0, 1}; + static const u8 queue_id_to_wmm_aci[] = { 3, 2, 0, 1 }; wsm_cmd_lock(priv); diff --git a/drivers/net/wireless/zydas/zd1201.c b/drivers/net/wireless/zydas/zd1201.c index e64e4e579518..82bc0d44212e 100644 --- a/drivers/net/wireless/zydas/zd1201.c +++ b/drivers/net/wireless/zydas/zd1201.c @@ -521,7 +521,7 @@ static int zd1201_setconfig(struct zd1201 *zd, int rid, const void *buf, int len zd->rxdatas = 0; zd->rxlen = 0; for (seq=0; len > 0; seq++) { - request = kmalloc(16, gfp_mask); + request = kzalloc(16, gfp_mask); if (!request) return -ENOMEM; urb = usb_alloc_urb(0, gfp_mask); @@ -529,7 +529,6 @@ static int zd1201_setconfig(struct zd1201 *zd, int rid, const void *buf, int len kfree(request); return -ENOMEM; } - memset(request, 0, 16); reqlen = len>12 ? 12 : len; request[0] = ZD1201_USB_RESREQ; request[1] = seq; |