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authorMichael Turquette <mturquette@baylibre.com>2017-04-12 18:50:34 +0200
committerMichael Turquette <mturquette@baylibre.com>2017-04-12 18:50:34 +0200
commit557983602649af6e6f02fc233bdd12dfed19c9e2 (patch)
tree2fc8f3a927ea5d588bc4efa3877a7989268a26f0 /lib/lru_cache.c
parent0d4ae360629fa4d199ac4e6ccfc97c8c367fd503 (diff)
parent9be83448951a404a6fd5cf43ee0245a9bccc02c1 (diff)
downloadlinux-557983602649af6e6f02fc233bdd12dfed19c9e2.tar.bz2
Merge tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-next
Pull rockchip clk driver updates from Heiko Stuebner: General rockchip clock changes for 4.12. Contains some new clock-ids as well as fixups of the clock-ids on rk3368 timers, which were unused and completely wrong (more and differently named timers). Also there is one new clock on rk3328 using the muxgrf type, a fix for pll enablement which should wait for the pll to lock before continuing, some more critical clocks and the rename of the rk1108 to rv1108, as the soc seems to have been using a preliminary name before its actual release. The plan is to have the driver changes (pinctrl, clk) go through the respective maintainer trees and once everything landed in mainline do the rename of the devicetree files. With the dts-include change in the clock rename, we also keep everything compiling and thus bisectability. * tag 'v4.12-rockchip-clk1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: add pll_wait_lock for pll_enable clk: rockchip: rename RK1108 to RV1108 dt-bindings: rk1108-cru: rename RK1108 to RV1108 clk: rockchip: mark some rk3368 core-clks as critical clk: rockchip: export SCLK_TIMERXX id for timers on rk3368 clk: rockchip: describe clk_gmac using the new muxgrf type on rk3328 clk: rockchip: add clock ids for timer10-15 of RK3368 SoCs clk: rockchip: fix up rk3368 timer-ids clk: rockchip: add rk3328 clk_mac2io_ext ID clk: rockchip: Set "ignore unused" for PMU M0 clocks on rk3399
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