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author | Thomas Gleixner <tglx@linutronix.de> | 2018-08-06 12:45:42 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2018-08-06 12:45:42 +0200 |
commit | 9e90c7985229430428dc9ba0ec7fe422901b456d (patch) | |
tree | cae2072feba8cc433a32d96568bbcf36070bd6e5 /kernel/irq | |
parent | 4f7799d96e6621ce584df60739e1480a6fd89f0a (diff) | |
parent | a8db74564b0c634667e1722264bde303d296f566 (diff) | |
download | linux-9e90c7985229430428dc9ba0ec7fe422901b456d.tar.bz2 |
Merge tag 'irqchip-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier:
- GICv3 ITS LPI allocation revamp
- GICv3 support for hypervisor-enforced LPI range
- GICv3 ITS conversion to raw spinlock
Diffstat (limited to 'kernel/irq')
-rw-r--r-- | kernel/irq/debugfs.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/kernel/irq/debugfs.c b/kernel/irq/debugfs.c index 4dadeb3d6666..6f636136cccc 100644 --- a/kernel/irq/debugfs.c +++ b/kernel/irq/debugfs.c @@ -55,6 +55,7 @@ static const struct irq_bit_descr irqchip_flags[] = { BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE), BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE), BIT_MASK_DESCR(IRQCHIP_EOI_THREADED), + BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI), }; static void |