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authorGeert Uytterhoeven <geert+renesas@glider.be>2017-02-28 17:18:08 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2017-03-21 11:12:21 +0100
commit89aa58a3951bcf242c7755075a7429d0ed6640de (patch)
treea3e192b08e57f1173e33424dbdcce84ec8dac3fa /drivers
parent2122b56d30e4fb25b383f137e83e6b901e5b05ae (diff)
downloadlinux-89aa58a3951bcf242c7755075a7429d0ed6640de.tar.bz2
clk: renesas: r8a7796: Correct name of watchdog clock
There's only a single watchdog clock, and it's named "rwdt". Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/renesas/r8a7796-cpg-mssr.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c
index 12a23c18bc1e..55003194a256 100644
--- a/drivers/clk/renesas/r8a7796-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c
@@ -135,7 +135,7 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
DEF_MOD("sdif2", 312, R8A7796_CLK_SD2),
DEF_MOD("sdif1", 313, R8A7796_CLK_SD1),
DEF_MOD("sdif0", 314, R8A7796_CLK_SD0),
- DEF_MOD("rwdt0", 402, R8A7796_CLK_R),
+ DEF_MOD("rwdt", 402, R8A7796_CLK_R),
DEF_MOD("intc-ap", 408, R8A7796_CLK_S3D1),
DEF_MOD("drif7", 508, R8A7796_CLK_S3D2),
DEF_MOD("drif6", 509, R8A7796_CLK_S3D2),