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author | Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> | 2018-05-02 15:20:35 +0200 |
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committer | Eduardo Valentin <edubezval@gmail.com> | 2018-07-27 14:43:01 -0700 |
commit | 9bebf3485c6a365ef0b7e83443a707eda2abc78b (patch) | |
tree | 417077bdb1ff507834575f3536169b5f20612ab6 /drivers/thermal/ti-soc-thermal/omap5xxx-bandgap.h | |
parent | be926ceeb4efc3bf44cb9b56f5c71aac9b1f8bbe (diff) | |
download | linux-9bebf3485c6a365ef0b7e83443a707eda2abc78b.tar.bz2 |
thermal: ti-soc-thermal: remove dead code
Majority of this code (i.e. functions from ti-bandgap.c) has been
introduced in May 2013 by commit eb982001dbd8 ("thermal: introduce TI
SoC thermal driver"). Just remove it altogether (in case it is needed
it can be easily resurrected from git repo).
While at it fix incorrect "not used" comments.
Tested-by: Keerthy <j-keerthy@ti.com>
Acked-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
Diffstat (limited to 'drivers/thermal/ti-soc-thermal/omap5xxx-bandgap.h')
-rw-r--r-- | drivers/thermal/ti-soc-thermal/omap5xxx-bandgap.h | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/drivers/thermal/ti-soc-thermal/omap5xxx-bandgap.h b/drivers/thermal/ti-soc-thermal/omap5xxx-bandgap.h index 400b55dffadd..9096403b74b0 100644 --- a/drivers/thermal/ti-soc-thermal/omap5xxx-bandgap.h +++ b/drivers/thermal/ti-soc-thermal/omap5xxx-bandgap.h @@ -44,36 +44,24 @@ #define OMAP5430_TEMP_SENSOR_GPU_OFFSET 0x150 #define OMAP5430_BGAP_THRESHOLD_GPU_OFFSET 0x1A8 #define OMAP5430_BGAP_TSHUT_GPU_OFFSET 0x1B4 -#define OMAP5430_BGAP_CUMUL_DTEMP_GPU_OFFSET 0x1C0 -#define OMAP5430_BGAP_DTEMP_GPU_0_OFFSET 0x1F4 #define OMAP5430_BGAP_DTEMP_GPU_1_OFFSET 0x1F8 #define OMAP5430_BGAP_DTEMP_GPU_2_OFFSET 0x1FC -#define OMAP5430_BGAP_DTEMP_GPU_3_OFFSET 0x200 -#define OMAP5430_BGAP_DTEMP_GPU_4_OFFSET 0x204 /* OMAP5430.MPU register offsets */ #define OMAP5430_FUSE_OPP_BGAP_MPU 0x4 #define OMAP5430_TEMP_SENSOR_MPU_OFFSET 0x14C #define OMAP5430_BGAP_THRESHOLD_MPU_OFFSET 0x1A4 #define OMAP5430_BGAP_TSHUT_MPU_OFFSET 0x1B0 -#define OMAP5430_BGAP_CUMUL_DTEMP_MPU_OFFSET 0x1BC -#define OMAP5430_BGAP_DTEMP_MPU_0_OFFSET 0x1E0 #define OMAP5430_BGAP_DTEMP_MPU_1_OFFSET 0x1E4 #define OMAP5430_BGAP_DTEMP_MPU_2_OFFSET 0x1E8 -#define OMAP5430_BGAP_DTEMP_MPU_3_OFFSET 0x1EC -#define OMAP5430_BGAP_DTEMP_MPU_4_OFFSET 0x1F0 /* OMAP5430.MPU register offsets */ #define OMAP5430_FUSE_OPP_BGAP_CORE 0x8 #define OMAP5430_TEMP_SENSOR_CORE_OFFSET 0x154 #define OMAP5430_BGAP_THRESHOLD_CORE_OFFSET 0x1AC #define OMAP5430_BGAP_TSHUT_CORE_OFFSET 0x1B8 -#define OMAP5430_BGAP_CUMUL_DTEMP_CORE_OFFSET 0x1C4 -#define OMAP5430_BGAP_DTEMP_CORE_0_OFFSET 0x208 #define OMAP5430_BGAP_DTEMP_CORE_1_OFFSET 0x20C #define OMAP5430_BGAP_DTEMP_CORE_2_OFFSET 0x210 -#define OMAP5430_BGAP_DTEMP_CORE_3_OFFSET 0x214 -#define OMAP5430_BGAP_DTEMP_CORE_4_OFFSET 0x218 /* OMAP5430.common register offsets */ #define OMAP5430_BGAP_CTRL_OFFSET 0x1A0 @@ -94,17 +82,10 @@ #define OMAP5430_BGAP_TEMP_SENSOR_DTEMP_MASK (0x3ff << 0) /* OMAP5430.BANDGAP_CTRL */ -#define OMAP5430_MASK_SIDLEMODE_MASK (0x3 << 30) #define OMAP5430_MASK_COUNTER_DELAY_MASK (0x7 << 27) #define OMAP5430_MASK_FREEZE_CORE_MASK BIT(23) #define OMAP5430_MASK_FREEZE_GPU_MASK BIT(22) #define OMAP5430_MASK_FREEZE_MPU_MASK BIT(21) -#define OMAP5430_MASK_CLEAR_CORE_MASK BIT(20) -#define OMAP5430_MASK_CLEAR_GPU_MASK BIT(19) -#define OMAP5430_MASK_CLEAR_MPU_MASK BIT(18) -#define OMAP5430_MASK_CLEAR_ACCUM_CORE_MASK BIT(17) -#define OMAP5430_MASK_CLEAR_ACCUM_GPU_MASK BIT(16) -#define OMAP5430_MASK_CLEAR_ACCUM_MPU_MASK BIT(15) #define OMAP5430_MASK_HOT_CORE_MASK BIT(5) #define OMAP5430_MASK_COLD_CORE_MASK BIT(4) #define OMAP5430_MASK_HOT_GPU_MASK BIT(3) @@ -123,17 +104,7 @@ #define OMAP5430_TSHUT_HOT_MASK (0x3ff << 16) #define OMAP5430_TSHUT_COLD_MASK (0x3ff << 0) -/* OMAP5430.BANDGAP_CUMUL_DTEMP_MPU */ -#define OMAP5430_CUMUL_DTEMP_MPU_MASK (0xffffffff << 0) - -/* OMAP5430.BANDGAP_CUMUL_DTEMP_GPU */ -#define OMAP5430_CUMUL_DTEMP_GPU_MASK (0xffffffff << 0) - -/* OMAP5430.BANDGAP_CUMUL_DTEMP_CORE */ -#define OMAP5430_CUMUL_DTEMP_CORE_MASK (0xffffffff << 0) - /* OMAP5430.BANDGAP_STATUS */ -#define OMAP5430_BGAP_ALERT_MASK BIT(31) #define OMAP5430_HOT_CORE_FLAG_MASK BIT(5) #define OMAP5430_COLD_CORE_FLAG_MASK BIT(4) #define OMAP5430_HOT_GPU_FLAG_MASK BIT(3) @@ -159,10 +130,6 @@ /* bandgap clock limits */ #define OMAP5430_GPU_MAX_FREQ 1500000 #define OMAP5430_GPU_MIN_FREQ 1000000 -/* sensor limits */ -#define OMAP5430_GPU_MIN_TEMP -40000 -#define OMAP5430_GPU_MAX_TEMP 125000 -#define OMAP5430_GPU_HYST_VAL 5000 /* interrupts thresholds */ #define OMAP5430_GPU_TSHUT_HOT 915 #define OMAP5430_GPU_TSHUT_COLD 900 @@ -173,10 +140,6 @@ /* bandgap clock limits */ #define OMAP5430_MPU_MAX_FREQ 1500000 #define OMAP5430_MPU_MIN_FREQ 1000000 -/* sensor limits */ -#define OMAP5430_MPU_MIN_TEMP -40000 -#define OMAP5430_MPU_MAX_TEMP 125000 -#define OMAP5430_MPU_HYST_VAL 5000 /* interrupts thresholds */ #define OMAP5430_MPU_TSHUT_HOT 915 #define OMAP5430_MPU_TSHUT_COLD 900 @@ -187,10 +150,6 @@ /* bandgap clock limits */ #define OMAP5430_CORE_MAX_FREQ 1500000 #define OMAP5430_CORE_MIN_FREQ 1000000 -/* sensor limits */ -#define OMAP5430_CORE_MIN_TEMP -40000 -#define OMAP5430_CORE_MAX_TEMP 125000 -#define OMAP5430_CORE_HYST_VAL 5000 /* interrupts thresholds */ #define OMAP5430_CORE_TSHUT_HOT 915 #define OMAP5430_CORE_TSHUT_COLD 900 |