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| author | Bjorn Helgaas <bhelgaas@google.com> | 2018-08-15 14:58:52 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2018-08-15 14:58:52 -0500 |
| commit | a8bcb5e5966ccbd99a6d06cf69ada7f95416aabc (patch) | |
| tree | e907b0f723700e6901c278dde6f1bc7fc3044449 /drivers/pci/pci.h | |
| parent | 1ca358a8e3ffa123a2e655b1b3569f7868597c59 (diff) | |
| parent | 9f0e89359775ee21fe1ea732e34edb52aef5addf (diff) | |
| download | linux-a8bcb5e5966ccbd99a6d06cf69ada7f95416aabc.tar.bz2 | |
Merge branch 'pci/enumeration'
- Work around IDT switch ACS Source Validation erratum (James
Puthukattukaran)
- Emit diagnostics for all cases of PCIe Link downtraining (Links
operating slower than they're capable of) (Alexandru Gagniuc)
- Skip VFs when configuring Max Payload Size (Myron Stowe)
- Reduce Root Port Max Payload Size if necessary when hot-adding a device
below it (Myron Stowe)
* pci/enumeration:
PCI: Match Root Port's MPS to endpoint's MPSS as necessary
PCI: Skip MPS logic for Virtual Functions (VFs)
PCI: Check for PCIe Link downtraining
PCI: Workaround IDT switch ACS Source Validation erratum
Diffstat (limited to 'drivers/pci/pci.h')
| -rw-r--r-- | drivers/pci/pci.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 3ac0d99afe67..ccb0537d5d89 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -225,6 +225,10 @@ enum pci_bar_type { int pci_configure_extended_tags(struct pci_dev *dev, void *ign); bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, int crs_timeout); +bool pci_bus_generic_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl, + int crs_timeout); +int pci_idt_bus_quirk(struct pci_bus *bus, int devfn, u32 *pl, int crs_timeout); + int pci_setup_device(struct pci_dev *dev); int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, struct resource *res, unsigned int reg); @@ -259,6 +263,7 @@ enum pci_bus_speed pcie_get_speed_cap(struct pci_dev *dev); enum pcie_link_width pcie_get_width_cap(struct pci_dev *dev); u32 pcie_bandwidth_capable(struct pci_dev *dev, enum pci_bus_speed *speed, enum pcie_link_width *width); +void __pcie_print_link_status(struct pci_dev *dev, bool verbose); /* Single Root I/O Virtualization */ struct pci_sriov { |