drm/msm/hdmi: Manage HDMI PLL through PHY driver

Add a helper to initialize PLL in the PHY driver. HDMI PLLs are going to
have their own mmio base different from that of PHY.

For the clock code in hdmi_phy_8960.c, some changes were needed for it to
work with the updated register offsets. Create a copy of the updated clock
code in hdmi_pll_8960.c, instead of rewriting it in hdmi_phy_8960.c
itself. This removes the need to place CONFIG_COMMON_CLOCK checks all
around, makes the code more legible, and also removes some old checkpatch
warnings with the original code.

The older hdmi pll clock ops in hdmi_phy_8960.c will be removed later. The
driver will use these until the HDMI PHY/PLL register offsets aren't
considered as separate domains (i.e. their offsets start from 0).

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>

1 files changed, 9 insertions, 0 deletions

diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h
index 3404235bb24d..1beace8bcb4b 100644
--- a/drivers/gpu/drm/msm/hdmi/hdmi.h
+++ b/drivers/gpu/drm/msm/hdmi/hdmi.h
@@ -198,6 +198,15 @@ void hdmi_phy_powerdown(struct hdmi_phy *phy);
 void __init hdmi_phy_driver_register(void);
 void __exit hdmi_phy_driver_unregister(void);
 
+#ifdef CONFIG_COMMON_CLK
+int hdmi_pll_8960_init(struct platform_device *pdev);
+#else
+int hdmi_pll_8960_init(struct platform_device *pdev);
+{
+	return -ENODEV;
+}
+#endif
+
 /*
  * audio:
  */