diff options
author | Alex Hung <alex.hung@amd.com> | 2022-04-25 14:02:25 -0600 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2022-05-10 17:53:13 -0400 |
commit | e91241c0306dba4b04cc84b6b4748d5a1279285f (patch) | |
tree | 7eb98c7db672ed8db9d1bcdaaec1a4b695d7ec8b /drivers/gpu/drm/amd/display/dc/core | |
parent | 47f7d80715704a6c4f071ab2fa38dd2e3ae4a184 (diff) | |
download | linux-e91241c0306dba4b04cc84b6b4748d5a1279285f.tar.bz2 |
drm/amd/display: remove redundant CONFIG_DRM_AMD_DC_DCN for z10
[Why & How]
CONFIG_DRM_AMD_DC_DCN is used by pass the compilation failures, but DC
code should be OS-agnostic.
This patch fixes it by removing unnecessasry CONFIG_DRM_AMD_DC_DCN
for enabling z10.
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/core')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 4 |
3 files changed, 2 insertions, 16 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 1eeea7c184ae..e41a48f596a3 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -1674,7 +1674,6 @@ static uint8_t get_stream_mask(struct dc *dc, struct dc_state *context) return stream_mask; } -#if defined(CONFIG_DRM_AMD_DC_DCN) void dc_z10_restore(const struct dc *dc) { if (dc->hwss.z10_restore) @@ -1686,7 +1685,7 @@ void dc_z10_save_init(struct dc *dc) if (dc->hwss.z10_save_init) dc->hwss.z10_save_init(dc); } -#endif + /* * Applies given context to HW and copy it into current context. * It's up to the user to release the src context afterwards. @@ -1700,10 +1699,8 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c struct dc_stream_state *dc_streams[MAX_STREAMS] = {0}; struct dc_state *old_state; -#if defined(CONFIG_DRM_AMD_DC_DCN) dc_z10_restore(dc); dc_allow_idle_optimizations(dc, false); -#endif for (i = 0; i < context->stream_count; i++) dc_streams[i] = context->streams[i]; @@ -2839,9 +2836,7 @@ static void commit_planes_for_stream(struct dc *dc, struct pipe_ctx *top_pipe_to_program = NULL; bool should_lock_all_pipes = (update_type != UPDATE_TYPE_FAST); -#if defined(CONFIG_DRM_AMD_DC_DCN) dc_z10_restore(dc); -#endif if (get_seamless_boot_stream_count(context) > 0 && surface_count > 0) { /* Optimize seamless boot flag keeps clocks and watermarks high until @@ -3298,9 +3293,8 @@ void dc_set_power_state( case DC_ACPI_CM_POWER_STATE_D0: dc_resource_state_construct(dc, dc->current_state); -#if defined(CONFIG_DRM_AMD_DC_DCN) dc_z10_restore(dc); -#endif + if (dc->ctx->dmub_srv) dc_dmub_srv_wait_phy_init(dc->ctx->dmub_srv); diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index 9529b924742e..67ef357e5798 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c @@ -879,9 +879,7 @@ static bool should_prepare_phy_clocks_for_link_verification(const struct dc *dc, static void prepare_phy_clocks_for_destructive_link_verification(const struct dc *dc) { -#if defined(CONFIG_DRM_AMD_DC_DCN) dc_z10_restore(dc); -#endif clk_mgr_exit_optimized_pwr_state(dc, dc->clk_mgr); } @@ -3098,10 +3096,8 @@ bool dc_link_set_psr_allow_active(struct dc_link *link, const bool *allow_active if (allow_active && link->psr_settings.psr_allow_active != *allow_active) { link->psr_settings.psr_allow_active = *allow_active; -#if defined(CONFIG_DRM_AMD_DC_DCN) if (!link->psr_settings.psr_allow_active) dc_z10_restore(dc); -#endif if (psr != NULL && link->psr_settings.psr_feature_enabled) { psr->funcs->psr_enable(psr, link->psr_settings.psr_allow_active, wait, panel_inst); diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c index acca35d86c10..de8b214132a2 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_stream.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_stream.c @@ -333,7 +333,6 @@ bool dc_stream_set_cursor_attributes( dc = stream->ctx->dc; stream->cursor_attributes = *attributes; -#if defined(CONFIG_DRM_AMD_DC_DCN) dc_z10_restore(dc); /* disable idle optimizations while updating cursor */ if (dc->idle_optimizations_allowed) { @@ -341,7 +340,6 @@ bool dc_stream_set_cursor_attributes( reset_idle_optimizations = true; } -#endif program_cursor_attributes(dc, stream, attributes); /* re-enable idle optimizations if necessary */ @@ -405,7 +403,6 @@ bool dc_stream_set_cursor_position( } dc = stream->ctx->dc; -#if defined(CONFIG_DRM_AMD_DC_DCN) dc_z10_restore(dc); /* disable idle optimizations if enabling cursor */ @@ -414,7 +411,6 @@ bool dc_stream_set_cursor_position( reset_idle_optimizations = true; } -#endif stream->cursor_position = *position; program_cursor_position(dc, stream, position); |