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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-11-22 18:16:37 +0100
committerThomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-11-22 18:16:37 +0100
commitc4b4b732b2e99e6e302d90d57f2a4f5c9516d9a3 (patch)
tree158c098eac7c67375e037578e3f17e689efe03ae /drivers/dma/mv_xor.c
parent9f3410ff217f55c2a30bd1b2eb1032806d17c80e (diff)
downloadlinux-c4b4b732b2e99e6e302d90d57f2a4f5c9516d9a3.tar.bz2
dma: mv_xor: clear the window override control registers
The XOR channels on Marvell SoCs have a Window Override Control register that allow to do some fancy things with addresses. Those features are not used by the driver, but some U-Boot versions anyway modify those registers. For some reason, the U-Boot on OpenBlocks AX3-4 was setting an invalid value in those registers when the addition 2 GB DRAM chip was plugged into the board, causing the XOR driver to fail in using the XOR engines. By setting those registers to 0 during the driver initialization, we ensure that the registers are configured according with the driver operation model. Thanks to Lior Amsalem <alior@marvell.com> for his help in debugging this problem. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'drivers/dma/mv_xor.c')
-rw-r--r--drivers/dma/mv_xor.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index f450fe8cbd61..2c69b89eac4f 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -1240,6 +1240,8 @@ mv_xor_conf_mbus_windows(struct mv_xor_device *xordev,
writel(win_enable, base + WINDOW_BAR_ENABLE(0));
writel(win_enable, base + WINDOW_BAR_ENABLE(1));
+ writel(0, base + WINDOW_OVERRIDE_CTRL(0));
+ writel(0, base + WINDOW_OVERRIDE_CTRL(1));
}
static int __devinit mv_xor_probe(struct platform_device *pdev)