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| author | Lars-Peter Clausen <lars@metafoo.de> | 2010-07-17 11:07:51 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-08-05 13:26:12 +0100 |
| commit | 83ccf69d8f118306e90af703f32109edb6c1e4a1 (patch) | |
| tree | 4fbbfdf6e9f57eeafd2b79d11b2208ba915c5f29 /arch/mips/mm | |
| parent | babba4f11379fb3804de802a3d0bc6b96c59d547 (diff) | |
| download | linux-83ccf69d8f118306e90af703f32109edb6c1e4a1.tar.bz2 | |
MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-Chip
Adds a new cpu type for the JZ4740 to the Linux MIPS architecture code.
It also adds the iomem addresses for the different components found on
a JZ4740 SoC.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1464/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/tlbex.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 86f004dc8355..4510e61883eb 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -409,6 +409,11 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l, tlbw(p); break; + case CPU_JZRISC: + tlbw(p); + uasm_i_nop(p); + break; + default: panic("No TLB refill handler yet (CPU type: %d)", current_cpu_data.cputype); |