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authorSteven King <sfking@fdwdc.com>2010-01-22 12:43:03 -0800
committerGreg Ungerer <gerg@uclinux.org>2010-05-17 11:04:19 +1000
commit91d60417212fa6b100107384c5e4f5663ab69c8f (patch)
tree2e751a2df6a8e873b46d800d430d9cf617b9d399 /arch/m68k/include/asm/m5249sim.h
parente40152ee1e1c7a63f4777791863215e3faa37a86 (diff)
downloadlinux-91d60417212fa6b100107384c5e4f5663ab69c8f.tar.bz2
m68knommu: Coldfire QSPI platform support
Since Grant has added the coldfire-qspi driver to next-spi, here is the platform support for the parts that have qspi hardware. This sets up gpio to do the spi chip select using the default chip select pins; it should be trivial for boards that require different or additional spi chip selects to use other gpios as needed. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m5249sim.h')
-rw-r--r--arch/m68k/include/asm/m5249sim.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m5249sim.h b/arch/m68k/include/asm/m5249sim.h
index 14bce877ed88..79b7b402f3c9 100644
--- a/arch/m68k/include/asm/m5249sim.h
+++ b/arch/m68k/include/asm/m5249sim.h
@@ -69,10 +69,12 @@
#define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */
#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */
+#define MCFSIM_QSPIICR MCFSIM_ICR10 /* QSPI ICR */
/*
* Define system peripheral IRQ usage.
*/
+#define MCF_IRQ_QSPI 28 /* QSPI, Level 4 */
#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */