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authorLinus Torvalds <torvalds@g5.osdl.org>2006-01-31 15:09:20 -0800
committerLinus Torvalds <torvalds@g5.osdl.org>2006-01-31 15:09:20 -0800
commit28e0cf22c1221650b4bfba48808d966160c42320 (patch)
tree79e530ac09f62000c1d0ec998a1bfa5404a2577a /arch/i386
parent9aef3b7c208b216b54a2e6614c6287ca8a09cf6f (diff)
parentc0672860199ac009af7cf198a134ee7a4c3a9bb3 (diff)
downloadlinux-28e0cf22c1221650b4bfba48808d966160c42320.tar.bz2
Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq
Diffstat (limited to 'arch/i386')
-rw-r--r--arch/i386/kernel/cpu/cpufreq/Kconfig1
-rw-r--r--arch/i386/kernel/cpu/cpufreq/p4-clockmod.c9
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/i386/kernel/cpu/cpufreq/Kconfig b/arch/i386/kernel/cpu/cpufreq/Kconfig
index 0f1eb507233b..26892d2099b0 100644
--- a/arch/i386/kernel/cpu/cpufreq/Kconfig
+++ b/arch/i386/kernel/cpu/cpufreq/Kconfig
@@ -96,6 +96,7 @@ config X86_POWERNOW_K8_ACPI
config X86_GX_SUSPMOD
tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
+ depends on PCI
help
This add the CPUFreq driver for NatSemi Geode processors which
support suspend modulation.
diff --git a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
index 270f2188d68b..cc73a7ae34bc 100644
--- a/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
+++ b/arch/i386/kernel/cpu/cpufreq/p4-clockmod.c
@@ -52,6 +52,7 @@ enum {
static int has_N44_O17_errata[NR_CPUS];
+static int has_N60_errata[NR_CPUS];
static unsigned int stock_freq;
static struct cpufreq_driver p4clockmod_driver;
static unsigned int cpufreq_p4_get(unsigned int cpu);
@@ -226,6 +227,12 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
case 0x0f12:
has_N44_O17_errata[policy->cpu] = 1;
dprintk("has errata -- disabling low frequencies\n");
+ break;
+
+ case 0x0f29:
+ has_N60_errata[policy->cpu] = 1;
+ dprintk("has errata -- disabling frequencies lower than 2ghz\n");
+ break;
}
/* get max frequency */
@@ -237,6 +244,8 @@ static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
if ((i<2) && (has_N44_O17_errata[policy->cpu]))
p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
+ else if (has_N60_errata[policy->cpu] && p4clockmod_table[i].frequency < 2000000)
+ p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
else
p4clockmod_table[i].frequency = (stock_freq * i)/8;
}