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authorSrinidhi Kasagar <srinidhi.kasagar@stericsson.com>2010-04-03 19:10:45 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-04-14 16:08:10 +0100
commit8e797a7e4f588fb3b9cfe9860b00dcd3b14f8b60 (patch)
tree57ac8c456499c5438274a99617e50ea4e46ac8a1 /arch/arm/mm
parentb102c01faed5e0083a4e6d29a2d61f6b57716e94 (diff)
downloadlinux-8e797a7e4f588fb3b9cfe9860b00dcd3b14f8b60.tar.bz2
ARM: 6027/1: ux500: enable l2x0 support
This enables the l2x0 support and ensures that the secondary CPU can see the page table and secondary data at this point. Signed-off-by: srinidhi kasagar <srinidhi.kasagar@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r--arch/arm/mm/Kconfig3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c4ed9f93f646..22c1c839306a 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -754,7 +754,8 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
config CACHE_L2X0
bool "Enable the L2x0 outer cache controller"
depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || \
- REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || ARCH_NOMADIK || ARCH_OMAP4
+ REALVIEW_EB_A9MP || ARCH_MX35 || ARCH_MX31 || MACH_REALVIEW_PBX || \
+ ARCH_NOMADIK || ARCH_OMAP4 || ARCH_U8500
default y
select OUTER_CACHE
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