summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/omap_hwmod_common_data.c
diff options
context:
space:
mode:
authorArchit Taneja <archit@ti.com>2011-10-06 18:04:08 -0600
committerPaul Walmsley <paul@pwsan.com>2011-11-08 03:16:46 -0700
commitb923d40dd4211c4ef7d4efa2bd81b7ca1d8744c1 (patch)
treed6814d77e420e4b1fa1e089378c331c9b9f60580 /arch/arm/mach-omap2/omap_hwmod_common_data.c
parent13662dc5b177d68885695ef513dd4ae0e4d2a099 (diff)
downloadlinux-b923d40dd4211c4ef7d4efa2bd81b7ca1d8744c1.tar.bz2
ARM: OMAP2PLUS: DSS: Ensure DSS works correctly if display is enabled in bootloader
Resetting DISPC when a DISPC output is enabled causes the DSS to go into an inconsistent state. Thus if the bootloader has enabled a display, the hwmod code cannot reset the DISPC module just like that, but the outputs need to be disabled first. Add function dispc_disable_outputs() which disables all active overlay manager and ensure all frame transfers are completed. Modify omap_dss_reset() to call this function and clear DSS_CONTROL, DSS_SDI_CONTROL and DSS_PLL_CONTROL so that DSS is in a clean state when the DSS2 driver starts. This resolves the hang issue(caused by a L3 error during boot) seen on the beagle board C3, which has a factory bootloader that enables display. The issue is resolved with this patch. Thanks to Tomi and Sricharan for some additional testing. Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Tested-by: R, Sricharan <r.sricharan@ti.com> Signed-off-by: Archit Taneja <archit@ti.com> [paul@pwsan.com: restructured code, removed omap_{read,write}l(), removed cpu_is_omap*() calls and converted to dev_attr] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_common_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_common_data.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c
index de832ebc93a9..51e5418899fb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_common_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c
@@ -49,3 +49,7 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = {
.srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT,
};
+struct omap_dss_dispc_dev_attr omap2_3_dss_dispc_dev_attr = {
+ .manager_count = 2,
+ .has_framedonetv_irq = 0
+};