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| author | Arnd Bergmann <arnd@arndb.de> | 2019-07-31 21:56:55 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2019-08-14 19:24:58 +0200 |
| commit | 3584be9ec3bfe2c12bcb40da13fa185d237bff7d (patch) | |
| tree | b6aedbac190e324bb1faf65e5fc9c94531df78df /arch/arm/mach-dove | |
| parent | ce78179ea6e042e2d3af0a1c71c105431ead483a (diff) | |
| download | linux-3584be9ec3bfe2c12bcb40da13fa185d237bff7d.tar.bz2 | |
ARM: orion/mvebu: unify debug-ll virtual addresses
In a multiplatform configuration, enabling DEBUG_LL breaks booting
on all platforms with incompatible settings. In case of the Marvell
platforms of the Orion/MVEBU family, the physical addresses are
all the same, we just map them at different virtual addresses,
which makes it impossible to run a kernel with DEBUG_LL enabled on
a combination of the merged mvebu and the legacy boardfile based
platforms.
This is easily solved by using the same virtual address everywhere.
I picked the address that is already used by mach-mvebu for UART0:
0xfec12000. All these platforms have a 1MB region with their internal
registers, almost always at physical address 0xf1000000, so I'm
updating the iotable for that entry.
In case of mach-dove, this is slightly trickier, as the existing
mapping is 8MB and a second 8MB mapping is already at the 0xfec00000
address. I have verified from the datasheet that the last 7MB of the
physical mapping are "reserved" and nothing in Linux tries to use
it either. I'm putting this 1MB mapping at the same address as the
others, and the second 8MB register area immediately before that.
Link: https://lore.kernel.org/r/20190731195713.3150463-14-arnd@arndb.de
Link: https://lore.kernel.org/linux-arm-kernel/87si3eb1z8.fsf@free-electrons.com/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-dove')
| -rw-r--r-- | arch/arm/mach-dove/dove.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-dove/dove.h b/arch/arm/mach-dove/dove.h index 539e735f968d..320ed1696abd 100644 --- a/arch/arm/mach-dove/dove.h +++ b/arch/arm/mach-dove/dove.h @@ -18,8 +18,8 @@ * c8000000 fdb00000 1M Cryptographic SRAM * e0000000 @runtime 128M PCIe-0 Memory space * e8000000 @runtime 128M PCIe-1 Memory space - * f1000000 fde00000 8M on-chip south-bridge registers - * f1800000 fe600000 8M on-chip north-bridge registers + * f1000000 fec00000 1M on-chip south-bridge registers + * f1800000 fe400000 8M on-chip north-bridge registers * f2000000 fee00000 1M PCIe-0 I/O space * f2100000 fef00000 1M PCIe-1 I/O space */ @@ -42,11 +42,11 @@ #define DOVE_SCRATCHPAD_SIZE SZ_1M #define DOVE_SB_REGS_PHYS_BASE 0xf1000000 -#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfde00000) -#define DOVE_SB_REGS_SIZE SZ_8M +#define DOVE_SB_REGS_VIRT_BASE IOMEM(0xfec00000) +#define DOVE_SB_REGS_SIZE SZ_1M #define DOVE_NB_REGS_PHYS_BASE 0xf1800000 -#define DOVE_NB_REGS_VIRT_BASE IOMEM(0xfe600000) +#define DOVE_NB_REGS_VIRT_BASE IOMEM(0xfe400000) #define DOVE_NB_REGS_SIZE SZ_8M #define DOVE_PCIE0_IO_PHYS_BASE 0xf2000000 |