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authorChris Brandt <chris.brandt@renesas.com>2017-02-14 11:08:05 -0500
committerStephen Boyd <sboyd@codeaurora.org>2017-02-16 10:36:05 -0800
commitf59de563358eb9351b7f8f0ba2d3be2ebb70b93d (patch)
tree0e008be6cd260a00e1d49f024345af0a1d4abfa9 /MAINTAINERS
parent6ff8ec98e12f984b9d62e43f83b0a3c44e2bdc12 (diff)
downloadlinux-f59de563358eb9351b7f8f0ba2d3be2ebb70b93d.tar.bz2
clk: renesas: mstp: ensure register writes complete
When there is no status bit, it is possible for the clock enable/disable operation to have not completed by the time the driver code resumes execution. This is due to the fact that write operations are sometimes queued and delayed internally. Doing a read ensures the write operations has completed. Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi") Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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