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| author | Dmitry Osipenko <digetx@gmail.com> | 2020-11-04 19:48:42 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <krzk@kernel.org> | 2020-11-06 19:30:07 +0100 |
| commit | 3ee81e021f2bd44b70312692b719995d398a84ee (patch) | |
| tree | f458b0da79a4a857ce2199373d58eb320e760ebe /Documentation/devicetree/bindings/memory-controllers | |
| parent | e51a59f079c546b8b5c31604ad98e86b06ec93e9 (diff) | |
| download | linux-3ee81e021f2bd44b70312692b719995d398a84ee.tar.bz2 | |
dt-bindings: memory: tegra20: mc: Document new interconnect property
Memory controller is interconnected with memory clients and with the
External Memory Controller. Document new interconnect property which
turns memory controller into interconnect provider.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201104164923.21238-7-digetx@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/memory-controllers')
| -rw-r--r-- | Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt index e55328237df4..739b7c6f2e26 100644 --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt @@ -16,6 +16,8 @@ Required properties: IOMMU specifier needed to encode an address. GART supports only a single address space that is shared by all devices, therefore no additional information needed for the address encoding. +- #interconnect-cells : Should be 1. This cell represents memory client. + The assignments may be found in header file <dt-bindings/memory/tegra20-mc.h>. Example: mc: memory-controller@7000f000 { @@ -27,6 +29,7 @@ Example: interrupts = <GIC_SPI 77 0x04>; #reset-cells = <1>; #iommu-cells = <0>; + #interconnect-cells = <1>; }; video-codec@6001a000 { |