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author | Tomasz Nowicki <tn@semihalf.com> | 2020-07-15 09:06:48 +0200 |
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committer | Will Deacon <will@kernel.org> | 2020-07-16 09:29:22 +0100 |
commit | e85e84d19b9dac3d3ac92c9f6a24d034691f1243 (patch) | |
tree | d53a8643a2b8e72c7ebf02d361536e917ae43023 /Documentation/devicetree/bindings/iommu | |
parent | f2d9848aeb9fa71523bbfb226203ffb7d50877d2 (diff) | |
download | linux-e85e84d19b9dac3d3ac92c9f6a24d034691f1243.tar.bz2 |
dt-bindings: arm-smmu: add compatible string for Marvell Armada-AP806 SMMU-500
Add specific compatible string for Marvell usage due to errata of
accessing 64bits registers of ARM SMMU, in AP806.
AP806 SoC uses the generic ARM-MMU500, and there's no specific
implementation of Marvell, this compatible is used for errata only.
Signed-off-by: Hanna Hawa <hannah@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20200715070649.18733-4-tn@semihalf.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/iommu')
-rw-r--r-- | Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index 3ac741236c8b..93fb9fe068b9 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -40,6 +40,10 @@ properties: - qcom,sm8150-smmu-500 - qcom,sm8250-smmu-500 - const: arm,mmu-500 + - description: Marvell SoCs implementing "arm,mmu-500" + items: + - const: marvell,ap806-smmu-500 + - const: arm,mmu-500 - items: - const: arm,mmu-500 - const: arm,smmu-v2 |