diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2013-06-20 23:01:41 +0200 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2013-06-20 23:01:41 +0200 |
| commit | 076919a6e0154f06221e02f9e58b14eb1ed9e019 (patch) | |
| tree | 501d1c9179999b2177c6305ef0dbdc4194235bd4 | |
| parent | 62274f8f938be0e99f4a2ce1a9917638e0fe8fa2 (diff) | |
| parent | 153030c22defea2f96546d0f1a74fe954551c4cd (diff) | |
| download | linux-076919a6e0154f06221e02f9e58b14eb1ed9e019.tar.bz2 | |
Merge branch 'for_3.11/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into next/dt
From Benoit Cousson:
omap devicetree changes for v3.11 merge window
- Add mandatory DT support for missing IPs, like USB host,
bandgap, LED, NAND, LAN, CPSW, PWM for OMAP and AMXX devices.
- Introduce new AM43x silicon.
* 'for_3.11/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt: (52 commits)
ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency
ARM: dts: omap4-panda: Fix DVI EDID reads
ARM: dts: omap4-panda: Add USB Host support
ARM: dts: AM43x EPOS EVM support
ARM: dts: OMAP5: Add bandgap DT entry
ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM
ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
ARM: dts: omap3-overo: Add default trigger for TWL4030 LED
ARM: dts: omap3-tobi: Correct polarity for GPIO LED
ARM: dts: omap3-tobi: Add SMSC911X node
ARM: dts: OMAP3: Include IRQ header
ARM: dts: Protect pinctrl headers against multiple inclusions
ARM: AM33XX: clock data: Enable clkout2 as part of init
ARM: AM33XX: clock: Add debugSS clock nodes
ARM: dts: OMAP5: Add Palmas MFD node and regulator nodes
ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evmsk
ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evm
ARM: dts: AM33XX: Add PWMSS device tree nodes
ARM: dts: OMAP4460: Add bandgap entry for OMAP4460 devices
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Tony Lindgren <tony@atomide.com>
44 files changed, 2172 insertions, 659 deletions
diff --git a/Documentation/devicetree/bindings/arm/omap/omap.txt b/Documentation/devicetree/bindings/arm/omap/omap.txt index f8288ea1b530..6d498c758b45 100644 --- a/Documentation/devicetree/bindings/arm/omap/omap.txt +++ b/Documentation/devicetree/bindings/arm/omap/omap.txt @@ -56,3 +56,6 @@ Boards: - OMAP5 EVM : Evaluation Module compatible = "ti,omap5-evm", "ti,omap5" + +- AM43x EPOS EVM + compatible = "ti,am43x-epos-evm", "ti,am4372", "ti,am43" diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 242a4937fe6f..049422b06f47 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -160,10 +160,14 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap4-panda-es.dtb \ omap4-var-som.dtb \ omap4-sdp.dtb \ - omap5-evm.dtb \ + omap4-sdp-es23plus.dtb \ + omap5-uevm.dtb \ am335x-evm.dtb \ am335x-evmsk.dtb \ - am335x-bone.dtb + am335x-bone.dtb \ + am3517-evm.dtb \ + am3517_mt_ventoux.dtb \ + am43x-epos-evm.dtb dtb-$(CONFIG_ARCH_ORION5X) += orion5x-lacie-ethernet-disk-mini-v2.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \ diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 5302f79c05b7..04feaf8f1420 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "am33xx.dtsi" +#include "am33xx.dtsi" / { model = "TI AM335x BeagleBone"; @@ -26,24 +26,104 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&user_leds_s0>; + pinctrl-0 = <&clkout2_pin>; user_leds_s0: user_leds_s0 { pinctrl-single,pins = < - 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ - 0x58 0x17 /* gpmc_a6.gpio1_22, OUTPUT_PULLUP | MODE7 */ - 0x5c 0x7 /* gpmc_a7.gpio1_23, OUTPUT | MODE7 */ - 0x60 0x17 /* gpmc_a8.gpio1_24, OUTPUT_PULLUP | MODE7 */ + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ + 0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a6.gpio1_22 */ + 0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a7.gpio1_23 */ + 0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a8.gpio1_24 */ + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ + 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ + 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ + 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ + 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ + 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ + 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ + 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; }; ocp { - uart1: serial@44e09000 { + uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; }; i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; clock-frequency = <400000>; @@ -55,31 +135,34 @@ }; leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; + compatible = "gpio-leds"; led@2 { label = "beaglebone:green:heartbeat"; - gpios = <&gpio1 21 0>; + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; default-state = "off"; }; led@3 { label = "beaglebone:green:mmc0"; - gpios = <&gpio1 22 0>; + gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; default-state = "off"; }; led@4 { label = "beaglebone:green:usr2"; - gpios = <&gpio1 23 0>; + gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led@5 { label = "beaglebone:green:usr3"; - gpios = <&gpio1 24 0>; + gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; default-state = "off"; }; }; @@ -136,3 +219,16 @@ &cpsw_emac1 { phy_id = <&davinci_mdio>, <1>; }; + +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; + +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; +}; diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts index 0423298a26fe..a16bb9691cc6 100644 --- a/arch/arm/boot/dts/am335x-evm.dts +++ b/arch/arm/boot/dts/am335x-evm.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "am33xx.dtsi" +#include "am33xx.dtsi" / { model = "TI AM335x EVM"; @@ -26,32 +26,143 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0>; + pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>; matrix_keypad_s0: matrix_keypad_s0 { pinctrl-single,pins = < - 0x54 0x7 /* gpmc_a5.gpio1_21, OUTPUT | MODE7 */ - 0x58 0x7 /* gpmc_a6.gpio1_22, OUTPUT | MODE7 */ - 0x64 0x27 /* gpmc_a9.gpio1_25, INPUT | MODE7 */ - 0x68 0x27 /* gpmc_a10.gpio1_26, INPUT | MODE7 */ - 0x6c 0x27 /* gpmc_a11.gpio1_27, INPUT | MODE7 */ + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */ + 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */ + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */ + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */ + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */ >; }; volume_keys_s0: volume_keys_s0 { pinctrl-single,pins = < - 0x150 0x27 /* spi0_sclk.gpio0_2, INPUT | MODE7 */ - 0x154 0x27 /* spi0_d0.gpio0_3, INPUT | MODE7 */ + 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */ + 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */ + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */ + 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; + }; + + nandflash_pins_s0: nandflash_pins_s0 { + pinctrl-single,pins = < + 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ + 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ + 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ + 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ + 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ + 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ + 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ + 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ + 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ + 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ + 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ + 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ + 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ + >; + }; + + ecap0_pins: backlight_pins { + pinctrl-single,pins = < + 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; }; ocp { - uart1: serial@44e09000 { + uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; }; i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; clock-frequency = <400000>; @@ -61,6 +172,9 @@ }; i2c1: i2c@4802a000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; clock-frequency = <100000>; @@ -102,6 +216,101 @@ reg = <0x48>; }; }; + + elm: elm@48080000 { + status = "okay"; + }; + + epwmss0: epwmss@48300000 { + status = "okay"; + + ecap0: ecap@48300100 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap0_pins>; + }; + }; + + gpmc: gpmc@50000000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&nandflash_pins_s0>; + ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ + nand@0,0 { + reg = <0 0 0>; /* CS0, offset 0 */ + nand-bus-width = <8>; + ti,nand-ecc-opt = "bch8"; + gpmc,device-nand = "true"; + gpmc,device-width = <1>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <40>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wait-on-read = "true"; + gpmc,wait-on-write = "true"; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + elm_id = <&elm>; + + /* MTD partition table */ + partition@0 { + label = "SPL1"; + reg = <0x00000000 0x000020000>; + }; + + partition@1 { + label = "SPL2"; + reg = <0x00020000 0x00020000>; + }; + + partition@2 { + label = "SPL3"; + reg = <0x00040000 0x00020000>; + }; + + partition@3 { + label = "SPL4"; + reg = <0x00060000 0x00020000>; + }; + + partition@4 { + label = "U-boot"; + reg = <0x00080000 0x001e0000>; + }; + + partition@5 { + label = "environment"; + reg = <0x00260000 0x00020000>; + }; + + partition@6 { + label = "Kernel"; + reg = <0x00280000 0x00500000>; + }; + + partition@7 { + label = "File-System"; + reg = <0x00780000 0x0F880000>; + }; + }; + }; }; vbat: fixedregulator@0 { @@ -123,12 +332,12 @@ debounce-delay-ms = <5>; col-scan-delay-us = <2>; - row-gpios = <&gpio1 25 0 /* Bank1, pin25 */ - &gpio1 26 0 /* Bank1, pin26 */ - &gpio1 27 0>; /* Bank1, pin27 */ + row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */ + &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */ + &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */ - col-gpios = <&gpio1 21 0 /* Bank1, pin21 */ - &gpio1 22 0>; /* Bank1, pin22 */ + col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */ + &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */ linux,keymap = <0x0000008b /* MENU */ 0x0100009e /* BACK */ @@ -147,20 +356,27 @@ switch@9 { label = "volume-up"; linux,code = <115>; - gpios = <&gpio0 2 1>; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; gpio-key,wakeup; }; switch@10 { label = "volume-down"; linux,code = <114>; - gpios = <&gpio0 3 1>; + gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; gpio-key,wakeup; }; }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&ecap0 0 50000 0>; + brightness-levels = <0 51 53 56 62 75 101 152 255>; + default-brightness-level = <8>; + }; }; -/include/ "tps65910.dtsi" +#include "tps65910.dtsi" &tps { vcc1-supply = <&vbat>; @@ -237,6 +453,18 @@ }; }; +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; +}; + &cpsw_emac0 { phy_id = <&davinci_mdio>, <0>; }; diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts index f67c360844f4..9e00eef9b74b 100644 --- a/arch/arm/boot/dts/am335x-evmsk.dts +++ b/arch/arm/boot/dts/am335x-evmsk.dts @@ -13,7 +13,7 @@ /dts-v1/; -/include/ "am33xx.dtsi" +#include "am33xx.dtsi" / { model = "TI AM335x EVM-SK"; @@ -32,33 +32,145 @@ am33xx_pinmux: pinmux@44e10800 { pinctrl-names = "default"; - pinctrl-0 = <&user_leds_s0 &gpio_keys_s0>; + pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; user_leds_s0: user_leds_s0 { pinctrl-single,pins = < - 0x10 0x7 /* gpmc_ad4.gpio1_4, OUTPUT | MODE7 */ - 0x14 0x7 /* gpmc_ad5.gpio1_5, OUTPUT | MODE7 */ - 0x18 0x7 /* gpmc_ad6.gpio1_6, OUTPUT | MODE7 */ - 0x1c 0x7 /* gpmc_ad7.gpio1_7, OUTPUT | MODE7 */ + 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ + 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ + 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ + 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ >; }; gpio_keys_s0: gpio_keys_s0 { pinctrl-single,pins = < - 0x94 0x27 /* gpmc_oen_ren.gpio2_3, INPUT | MODE7 */ - 0x90 0x27 /* gpmc_advn_ale.gpio2_2, INPUT | MODE7 */ - 0x70 0x27 /* gpmc_wait0.gpio0_30, INPUT | MODE7 */ - 0x9c 0x27 /* gpmc_ben0_cle.gpio2_5, INPUT | MODE7 */ + 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ + 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ + 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ + 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ + >; + }; + + ecap2_pins: backlight_pins { + pinctrl-single,pins = < + 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ + 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ + + /* Slave 2 */ + 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ + 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ + 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ + 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ + 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ + 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + + /* Slave 2 reset value*/ + 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) >; }; }; ocp { - uart1: serial@44e09000 { + uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; }; i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; clock-frequency = <400000>; @@ -94,6 +206,16 @@ st,max-limit-z = <750>; }; }; + + epwmss2: epwmss@48304000 { + status = "okay"; + + ecap2: ecap@48304100 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&ecap2_pins>; + }; + }; }; vbat: fixedregulator@0 { @@ -111,30 +233,33 @@ }; leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; + compatible = "gpio-leds"; led@1 { label = "evmsk:green:usr0"; - gpios = <&gpio1 4 0>; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led@2 { label = "evmsk:green:usr1"; - gpios = <&gpio1 5 0>; + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led@3 { label = "evmsk:green:mmc0"; - gpios = <&gpio1 6 0>; + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; default-state = "off"; }; led@4 { label = "evmsk:green:heartbeat"; - gpios = <&gpio1 7 0>; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; default-state = "off"; }; @@ -148,31 +273,38 @@ switch@1 { label = "button0"; linux,code = <0x100>; - gpios = <&gpio2 3 0>; + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; }; switch@2 { label = "button1"; linux,code = <0x101>; - gpios = <&gpio2 2 0>; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; }; switch@3 { label = "button2"; linux,code = <0x102>; - gpios = <&gpio0 30 0>; + gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; gpio-key,wakeup; }; switch@4 { label = "button3"; linux,code = <0x103>; - gpios = <&gpio2 5 0>; + gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; }; }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&ecap2 0 50000 1>; + brightness-levels = <0 58 61 66 75 90 125 170 255>; + default-brightness-level = <8>; + }; }; -/include/ "tps65910.dtsi" +#include "tps65910.dtsi" &tps { vcc1-supply = <&vbat>; @@ -248,3 +380,15 @@ }; }; }; + +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; +}; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 27c99c106620..d1e4929231d6 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -8,19 +8,22 @@ * kind, whether express or implied. */ -/include/ "skeleton.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/am33xx.h> + +#include "skeleton.dtsi" / { compatible = "ti,am33xx"; interrupt-parent = <&intc>; aliases { - serial0 = &uart1; - serial1 = &uart2; - serial2 = &uart3; - serial3 = &uart4; - serial4 = &uart5; - serial5 = &uart6; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; d_can0 = &dcan0; d_can1 = &dcan1; }; @@ -137,7 +140,7 @@ interrupts = <62>; }; - uart1: serial@44e09000 { + uart0: serial@44e09000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart1"; clock-frequency = <48000000>; @@ -146,7 +149,7 @@ status = "disabled"; }; - uart2: serial@48022000 { + uart1: serial@48022000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart2"; clock-frequency = <48000000>; @@ -155,7 +158,7 @@ status = "disabled"; }; - uart3: serial@48024000 { + uart2: serial@48024000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart3"; clock-frequency = <48000000>; @@ -164,7 +167,7 @@ status = "disabled"; }; - uart4: serial@481a6000 { + uart3: serial@481a6000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart4"; clock-frequency = <48000000>; @@ -173,7 +176,7 @@ status = "disabled"; }; - uart5: serial@481a8000 { + uart4: serial@481a8000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart5"; clock-frequency = <48000000>; @@ -182,7 +185,7 @@ status = "disabled"; }; - uart6: serial@481aa000 { + uart5: serial@481aa000 { compatible = "ti,omap3-uart"; ti,hwmods = "uart6"; clock-frequency = <48000000>; @@ -347,6 +350,90 @@ ti,hwmods = "usb_otg_hs"; }; + epwmss0: epwmss@48300000 { + compatible = "ti,am33xx-pwmss"; + reg = <0x48300000 0x10>; + ti,hwmods = "epwmss0"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x48300100 0x48300100 0x80 /* ECAP */ + 0x48300180 0x48300180 0x80 /* EQEP */ + 0x48300200 0x48300200 0x80>; /* EHRPWM */ + + ecap0: ecap@48300100 { + compatible = "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x48300100 0x80>; + ti,hwmods = "ecap0"; + status = "disabled"; + }; + + ehrpwm0: ehrpwm@48300200 { + compatible = "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48300200 0x80>; + ti,hwmods = "ehrpwm0"; + status = "disabled"; + }; + }; + + epwmss1: epwmss@48302000 { + compatible = "ti,am33xx-pwmss"; + reg = <0x48302000 0x10>; + ti,hwmods = "epwmss1"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x48302100 0x48302100 0x80 /* ECAP */ + 0x48302180 0x48302180 0x80 /* EQEP */ + 0x48302200 0x48302200 0x80>; /* EHRPWM */ + + ecap1: ecap@48302100 { + compatible = "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x48302100 0x80>; + ti,hwmods = "ecap1"; + status = "disabled"; + }; + + ehrpwm1: ehrpwm@48302200 { + compatible = "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48302200 0x80>; + ti,hwmods = "ehrpwm1"; + status = "disabled"; + }; + }; + + epwmss2: epwmss@48304000 { + compatible = "ti,am33xx-pwmss"; + reg = <0x48304000 0x10>; + ti,hwmods = "epwmss2"; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + ranges = <0x48304100 0x48304100 0x80 /* ECAP */ + 0x48304180 0x48304180 0x80 /* EQEP */ + 0x48304200 0x48304200 0x80>; /* EHRPWM */ + + ecap2: ecap@48304100 { + compatible = "ti,am33xx-ecap"; + #pwm-cells = <3>; + reg = <0x48304100 0x80>; + ti,hwmods = "ecap2"; + status = "disabled"; + }; + + ehrpwm2: ehrpwm@48304200 { + compatible = "ti,am33xx-ehrpwm"; + #pwm-cells = <3>; + reg = <0x48304200 0x80>; + ti,hwmods = "ehrpwm2"; + status = "disabled"; + }; + }; + mac: ethernet@4a100000 { compatible = "ti,cpsw"; ti,hwmods = "cpgmac0"; @@ -408,6 +495,14 @@ ti,hwmods = "wkup_m3"; }; + elm: elm@48080000 { + compatible = "ti,am3352-elm"; + reg = <0x48080000 0x2000>; + interrupts = <4>; + ti,hwmods = "elm"; + status = "disabled"; + }; + gpmc: gpmc@50000000 { compatible = "ti,am3352-gpmc"; ti,hwmods = "gpmc"; diff --git a/arch/arm/boot/dts/am3517-evm.dts b/arch/arm/boot/dts/am3517-evm.dts index e9b5bdae4908..e99dfaf70052 100644 --- a/arch/arm/boot/dts/am3517-evm.dts +++ b/arch/arm/boot/dts/am3517-evm.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TI AM3517 EVM (AM3517/05)"; diff --git a/arch/arm/boot/dts/am3517_mt_ventoux.dts b/arch/arm/boot/dts/am3517_mt_ventoux.dts index 556868388a23..fdf5ce63c8e6 100644 --- a/arch/arm/boot/dts/am3517_mt_ventoux.dts +++ b/arch/arm/boot/dts/am3517_mt_ventoux.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TeeJet Mt.Ventoux"; diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi new file mode 100644 index 000000000000..ddc1df77ac52 --- /dev/null +++ b/arch/arm/boot/dts/am4372.dtsi @@ -0,0 +1,68 @@ +/* + * Device Tree Source for AM4372 SoC + * + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +#include "skeleton.dtsi" + +/ { + compatible = "ti,am4372", "ti,am43"; + interrupt-parent = <&gic>; + + + aliases { + serial0 = &uart0; + }; + + cpus { + cpu@0 { + compatible = "arm,cortex-a9"; + }; + }; + + gic: interrupt-controller@48241000 { + compatible = "arm,cortex-a9-gic"; + interrupt-controller; + #interrupt-cells = <3>; + reg = <0x48241000 0x1000>, + <0x48240100 0x0100>; + }; + + ocp { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + uart0: serial@44e09000 { + compatible = "ti,am4372-uart","ti,omap2-uart"; + reg = <0x44e09000 0x2000>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + }; + + timer1: timer@44e31000 { + compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; + reg = <0x44e31000 0x400>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; + ti,timer-alwon; + }; + + timer2: timer@48040000 { + compatible = "ti,am4372-timer","ti,am335x-timer"; + reg = <0x48040000 0x400>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; + }; + + counter32k: counter@44e86000 { + compatible = "ti,am4372-counter32k","ti,omap-counter32k"; + reg = <0x44e86000 0x40>; + }; + }; +}; diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts new file mode 100644 index 000000000000..74174d48f476 --- /dev/null +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -0,0 +1,18 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* AM43x EPOS EVM */ + +/dts-v1/; + +#include "am4372.dtsi" + +/ { + model = "TI AM43x EPOS EVM"; + compatible = "ti,am43x-epos-evm","ti,am4372","ti,am43"; +}; diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi index 4aac404608cb..a2bfcde858a6 100644 --- a/arch/arm/boot/dts/omap2.dtsi +++ b/arch/arm/boot/dts/omap2.dtsi @@ -8,7 +8,10 @@ * kind, whether express or implied. */ -/include/ "skeleton.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/omap.h> + +#include "skeleton.dtsi" / { compatible = "ti,omap2430", "ti,omap2420", "ti,omap2"; diff --git a/arch/arm/boot/dts/omap2420-h4.dts b/arch/arm/boot/dts/omap2420-h4.dts index 68282ee13e26..224c08f472f4 100644 --- a/arch/arm/boot/dts/omap2420-h4.dts +++ b/arch/arm/boot/dts/omap2420-h4.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap2420.dtsi" +#include "omap2420.dtsi" / { model = "TI OMAP2420 H4 board"; diff --git a/arch/arm/boot/dts/omap2420.dtsi b/arch/arm/boot/dts/omap2420.dtsi index da5b285b73be..c8f9c55169ea 100644 --- a/arch/arm/boot/dts/omap2420.dtsi +++ b/arch/arm/boot/dts/omap2420.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap2.dtsi" +#include "omap2.dtsi" / { compatible = "ti,omap2420", "ti,omap2"; diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi index 054bc4439568..c535a5a2b27f 100644 --- a/arch/arm/boot/dts/omap2430.dtsi +++ b/arch/arm/boot/dts/omap2430.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap2.dtsi" +#include "omap2.dtsi" / { compatible = "ti,omap2430", "ti,omap2"; diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts index 3046d1f81be0..afdb16417d4e 100644 --- a/arch/arm/boot/dts/omap3-beagle-xm.dts +++ b/arch/arm/boot/dts/omap3-beagle-xm.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap36xx.dtsi" +#include "omap36xx.dtsi" / { model = "TI OMAP3 BeagleBoard xM"; @@ -29,13 +29,13 @@ heartbeat { label = "beagleboard::usr0"; - gpios = <&gpio5 22 0>; /* 150 -> D6 LED */ + gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ linux,default-trigger = "heartbeat"; }; mmc { label = "beagleboard::usr1"; - gpios = <&gpio5 21 0>; /* 149 -> D7 LED */ + gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */ linux,default-trigger = "mmc0"; }; }; @@ -57,6 +57,26 @@ ti,mcbsp = <&mcbsp2>; ti,codec = <&twl_audio>; }; + + gpio_keys { + compatible = "gpio-keys"; + + user { + label = "user"; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + linux,code = <0x114>; + gpio-key,wakeup; + }; + + }; +}; + +&omap3_pmx_wkup { + gpio1_pins: pinmux_gpio1_pins { + pinctrl-single,pins = < + 0x0e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot2.gpio_4 */ + >; + }; }; &i2c1 { @@ -75,7 +95,8 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &i2c2 { clock-frequency = <400000>; @@ -126,3 +147,22 @@ mode = <3>; power = <50>; }; + +&omap3_pmx_core { + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ + >; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; + +&gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_pins>; +}; diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts index 6eec69997607..dfd83103657a 100644 --- a/arch/arm/boot/dts/omap3-beagle.dts +++ b/arch/arm/boot/dts/omap3-beagle.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TI OMAP3 BeagleBoard"; @@ -28,18 +28,18 @@ compatible = "gpio-leds"; pmu_stat { label = "beagleboard::pmu_stat"; - gpios = <&twl_gpio 19 0>; /* LEDB */ + gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ }; heartbeat { label = "beagleboard::usr0"; - gpios = <&gpio5 22 0>; /* 150 -> D6 LED */ + gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ linux,default-trigger = "heartbeat"; }; mmc { label = "beagleboard::usr1"; - gpios = <&gpio5 21 0>; /* 149 -> D7 LED */ + gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */ linux,default-trigger = "mmc0"; }; }; @@ -71,6 +71,26 @@ reset-supply = <&hsusb2_reset>; vcc-supply = <&hsusb2_power>; }; + + gpio_keys { + compatible = "gpio-keys"; + + user { + label = "user"; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + linux,code = <0x114>; + gpio-key,wakeup; + }; + + }; +}; + +&omap3_pmx_wkup { + gpio1_pins: pinmux_gpio1_pins { + pinctrl-single,pins = < + 0x14 (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */ + >; + }; }; &omap3_pmx_core { @@ -81,18 +101,25 @@ hsusbb2_pins: pinmux_hsusbb2_pins { pinctrl-single,pins = < - 0x5c0 0x3 /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_clk OUTPUT */ - 0x5c2 0x3 /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_stp OUTPUT */ - 0x5c4 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dir INPUT | PULLDOWN */ - 0x5c6 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_nxt INPUT | PULLDOWN */ - 0x5c8 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat0 INPUT | PULLDOWN */ - 0x5cA 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat1 INPUT | PULLDOWN */ - 0x1a4 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat2 INPUT | PULLDOWN */ - 0x1a6 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat3 INPUT | PULLDOWN */ - 0x1a8 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat4 INPUT | PULLDOWN */ - 0x1aa 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat5 INPUT | PULLDOWN */ - 0x1ac 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat6 INPUT | PULLDOWN */ - 0x1ae 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat7 INPUT | PULLDOWN */ + 0x5c0 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_clk */ + 0x5c2 (PIN_OUTPUT | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_stp */ + 0x5c4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dir */ + 0x5c6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_nxt */ + 0x5c8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat0 */ + 0x5cA (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat1 */ + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat2 */ + 0x1a6 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat3 */ + 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat4 */ + 0x1aa (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat5 */ + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat6 */ + 0x1ae (PIN_INPUT_PULLDOWN | MUX_MODE3) /* usbb2_ulpitll_clk.usbb1_ulpiphy_dat7 */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ >; }; }; @@ -107,7 +134,8 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &mmc1 { vmmc-supply = <&vmmc1>; @@ -142,3 +170,13 @@ */ ti,pulldowns = <0x03a1c4>; }; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; + +&gpio1 { + pinctrl-names = "default"; + pinctrl-0 = <&gpio1_pins>; +}; diff --git a/arch/arm/boot/dts/omap3-devkit8000.dts b/arch/arm/boot/dts/omap3-devkit8000.dts index 8a5cdcc6debd..af32eff9f4b7 100644 --- a/arch/arm/boot/dts/omap3-devkit8000.dts +++ b/arch/arm/boot/dts/omap3-devkit8000.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TimLL OMAP3 Devkit8000"; compatible = "timll,omap3-devkit8000", "ti,omap3"; @@ -22,21 +22,21 @@ heartbeat { label = "devkit8000::led1"; - gpios = <&gpio6 26 0>; /* 186 -> LED1 */ + gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */ default-state = "on"; linux,default-trigger = "heartbeat"; }; mmc { label = "devkit8000::led2"; - gpios = <&gpio6 3 0>; /* 163 -> LED2 */ + gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */ default-state = "on"; linux,default-trigger = "none"; }; usr { label = "devkit8000::led3"; - gpios = <&gpio6 4 0>; /* 164 -> LED3 */ + gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* 164 -> LED3 */ default-state = "on"; linux,default-trigger = "usr"; }; @@ -80,7 +80,8 @@ status = "disabled"; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &mmc1 { vmmc-supply = <&vmmc1>; diff --git a/arch/arm/boot/dts/omap3-evm.dts b/arch/arm/boot/dts/omap3-evm.dts index 96d1c206a57b..7d4329d179c4 100644 --- a/arch/arm/boot/dts/omap3-evm.dts +++ b/arch/arm/boot/dts/omap3-evm.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TI OMAP3 EVM (OMAP3530, AM/DM37x)"; @@ -28,7 +28,7 @@ compatible = "gpio-leds"; ledb { label = "omap3evm::ledb"; - gpios = <&twl_gpio 19 0>; /* LEDB */ + gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */ linux,default-trigger = "default-on"; }; }; @@ -44,7 +44,8 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &i2c2 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index f8fe3b748c3e..bc48b114eae6 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -10,7 +10,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { memory { @@ -29,37 +29,43 @@ &omap3_pmx_core { uart1_pins: pinmux_uart1_pins { pinctrl-single,pins = < - 0x152 0x100 /* uart1_rx.uart1_rx INPUT | MODE0 */ - 0x14c 0 /* uart1_tx.uart1_tx OUTPUT | MODE0 */ + 0x152 (PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ + 0x14c (PIN_OUTPUT |MUX_MODE0) /* uart1_tx.uart1_tx */ >; }; uart2_pins: pinmux_uart2_pins { pinctrl-single,pins = < - 0x14a 0x100 /* uart2_rx.uart2_rx INPUT | MODE0 */ - 0x148 0 /* uart2_tx.uart2_tx OUTPUT | MODE0 */ + 0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ + 0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ >; }; uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < - 0x16e 0x100 /* uart3_rx.uart3_rx INPUT | MODE0 */ - 0x170 0 /* uart3_tx.uart3_tx OUTPUT | MODE0 */ + 0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */ >; }; mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < - 0x114 0x0118 /* sdmmc1_clk.sdmmc1_clk INPUT PULLUP | MODE 0 */ - 0x116 0x0118 /* sdmmc1_cmd.sdmmc1_cmd INPUT PULLUP | MODE 0 */ - 0x118 0x0118 /* sdmmc1_dat0.sdmmc1_dat0 INPUT PULLUP | MODE 0 */ - 0x11a 0x0118 /* sdmmc1_dat1.sdmmc1_dat1 INPUT PULLUP | MODE 0 */ - 0x11c 0x0118 /* sdmmc1_dat2.sdmmc1_dat2 INPUT PULLUP | MODE 0 */ - 0x11e 0x0118 /* sdmmc1_dat3.sdmmc1_dat3 INPUT PULLUP | MODE 0 */ - 0x120 0x0100 /* sdmmc1_dat4.sdmmc1_dat4 INPUT | MODE 0 */ - 0x122 0x0100 /* sdmmc1_dat5.sdmmc1_dat5 INPUT | MODE 0 */ - 0x124 0x0100 /* sdmmc1_dat6.sdmmc1_dat6 INPUT | MODE 0 */ - 0x126 0x0100 /* sdmmc1_dat7.sdmmc1_dat7 INPUT | MODE 0 */ + 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ + 0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ + 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ + 0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ + 0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ + 0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ + 0x120 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat4.sdmmc1_dat4 */ + 0x122 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat5.sdmmc1_dat5 */ + 0x124 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat6.sdmmc1_dat6 */ + 0x126 (PIN_INPUT | MUX_MODE0) /* sdmmc1_dat7.sdmmc1_dat7 */ + >; + }; + + smsc911x_pins: pinmux_smsc911x_pins { + pinctrl-single,pins = < + 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ >; }; }; @@ -80,7 +86,8 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &i2c2 { clock-frequency = <400000>; diff --git a/arch/arm/boot/dts/omap3-igep0020.dts b/arch/arm/boot/dts/omap3-igep0020.dts index e2b98490cc9a..e8c48284587c 100644 --- a/arch/arm/boot/dts/omap3-igep0020.dts +++ b/arch/arm/boot/dts/omap3-igep0020.dts @@ -9,7 +9,7 @@ * published by the Free Software Foundation. */ -/include/ "omap3-igep.dtsi" +#include "omap3-igep.dtsi" / { model = "IGEPv2"; @@ -19,27 +19,39 @@ compatible = "gpio-leds"; boot { label = "omap3:green:boot"; - gpios = <&gpio1 26 0>; + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; default-state = "on"; }; user0 { label = "omap3:red:user0"; - gpios = <&gpio1 27 0>; + gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>; default-state = "off"; }; user1 { label = "omap3:red:user1"; - gpios = <&gpio1 28 0>; + gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; default-state = "off"; }; user2 { label = "omap3:green:user1"; - gpios = <&twl_gpio 19 1>; + gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>; }; }; + + vddvario: regulator-vddvario { + compatible = "regulator-fixed"; + regulator-name = "vddvario"; + regulator-always-on; + }; + + vdd33a: regulator-vdd33a { + compatible = "regulator-fixed"; + regulator-name = "vdd33a"; + regulator-always-on; + }; }; &i2c3 { @@ -54,3 +66,92 @@ reg = <0x50>; }; }; + +&gpmc { + ranges = <0 0 0x00000000 0x20000000>, + <5 0 0x2c000000 0x01000000>; + + nand@0,0 { + linux,mtd-name= "micron,mt29c4g96maz"; + reg = <0 0 0>; + nand-bus-width = <16>; + ti,nand-ecc-opt = "bch8"; + + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-off-ns = <40>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SPL"; + reg = <0 0x100000>; + }; + partition@0x80000 { + label = "U-Boot"; + reg = <0x100000 0x180000>; + }; + partition@0x1c0000 { + label = "Environment"; + reg = <0x280000 0x100000>; + }; + partition@0x280000 { + label = "Kernel"; + reg = <0x380000 0x300000>; + }; + partition@0x780000 { + label = "Filesystem"; + reg = <0x680000 0x1f980000>; + }; + }; + + ethernet@5,0 { + pinctrl-names = "default"; + pinctrl-0 = <&smsc911x_pins>; + compatible = "smsc,lan9221", "smsc,lan9115"; + reg = <5 0 0xff>; + bank-width = <2>; + + gpmc,mux-add-data; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <186>; + gpmc,cs-wr-off-ns = <186>; + gpmc,adv-on-ns = <12>; + gpmc,adv-rd-off-ns = <48>; + gpmc,adv-wr-off-ns = <48>; + gpmc,oe-on-ns = <54>; + gpmc,oe-off-ns = <168>; + gpmc,we-on-ns = <54>; + gpmc,we-off-ns = <168>; + gpmc,rd-cycle-ns = <186>; + gpmc,wr-cycle-ns = <186>; + gpmc,access-ns = <114>; + gpmc,page-burst-access-ns = <6>; + gpmc,bus-turnaround-ns = <12>; + gpmc,cycle2cycle-delay-ns = <18>; + gpmc,wr-data-mux-bus-ns = <90>; + gpmc,wr-access-ns = <186>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-diffcsen; + + interrupt-parent = <&gpio6>; + interrupts = <16 8>; + vmmc-supply = <&vddvario>; + vmmc_aux-supply = <&vdd33a>; + reg-io-width = <4>; + + smsc,save-mac-address; + }; +}; diff --git a/arch/arm/boot/dts/omap3-igep0030.dts b/arch/arm/boot/dts/omap3-igep0030.dts index 9dc48d262ffb..644d05383836 100644 --- a/arch/arm/boot/dts/omap3-igep0030.dts +++ b/arch/arm/boot/dts/omap3-igep0030.dts @@ -9,7 +9,7 @@ * published by the Free Software Foundation. */ -/include/ "omap3-igep.dtsi" +#include "omap3-igep.dtsi" / { model = "IGEP COM Module"; @@ -19,26 +19,76 @@ compatible = "gpio-leds"; boot { label = "omap3:green:boot"; - gpios = <&twl_gpio 13 1>; + gpios = <&twl_gpio 13 GPIO_ACTIVE_LOW>; default-state = "on"; }; user0 { label = "omap3:red:user0"; - gpios = <&twl_gpio 18 1>; /* LEDA */ + gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */ default-state = "off"; }; user1 { label = "omap3:green:user1"; - gpios = <&twl_gpio 19 1>; /* LEDB */ + gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>; /* LEDB */ default-state = "off"; }; user2 { label = "omap3:red:user1"; - gpios = <&gpio1 16 1>; + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; default-state = "off"; }; }; }; + +&gpmc { + ranges = <0 0 0x00000000 0x20000000>; + + nand@0,0 { + linux,mtd-name= "micron,mt29c4g96maz"; + reg = <0 0 0>; + nand-bus-width = <16>; + ti,nand-ecc-opt = "bch8"; + + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <44>; + gpmc,cs-wr-off-ns = <44>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <34>; + gpmc,adv-wr-off-ns = <44>; + gpmc,we-off-ns = <40>; + gpmc,oe-off-ns = <54>; + gpmc,access-ns = <64>; + gpmc,rd-cycle-ns = <82>; + gpmc,wr-cycle-ns = <82>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SPL"; + reg = <0 0x100000>; + }; + partition@0x80000 { + label = "U-Boot"; + reg = <0x100000 0x180000>; + }; + partition@0x1c0000 { + label = "Environment"; + reg = <0x280000 0x100000>; + }; + partition@0x280000 { + label = "Kernel"; + reg = <0x380000 0x300000>; + }; + partition@0x780000 { + label = "Filesystem"; + reg = <0x680000 0x1f980000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/omap3-overo.dtsi b/arch/arm/boot/dts/omap3-overo.dtsi index a626c50041f6..8f1abec78275 100644 --- a/arch/arm/boot/dts/omap3-overo.dtsi +++ b/arch/arm/boot/dts/omap3-overo.dtsi @@ -11,7 +11,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { pwmleds { @@ -21,6 +21,7 @@ label = "overo:blue:COM"; pwms = <&twl_pwmled 1 7812500>; max-brightness = <127>; + linux,default-trigger = "mmc0"; }; }; @@ -49,7 +50,8 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" /* i2c2 pins are used for gpio */ &i2c2 { @@ -77,3 +79,17 @@ mode = <3>; power = <50>; }; + +&omap3_pmx_core { + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x16e (PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ + >; + }; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; diff --git a/arch/arm/boot/dts/omap3-tobi.dts b/arch/arm/boot/dts/omap3-tobi.dts index a13d12de77ff..7e4ad2aec37a 100644 --- a/arch/arm/boot/dts/omap3-tobi.dts +++ b/arch/arm/boot/dts/omap3-tobi.dts @@ -10,7 +10,7 @@ * Tobi expansion board is manufactured by Gumstix Inc. */ -/include/ "omap3-overo.dtsi" +#include "omap3-overo.dtsi" / { model = "TI OMAP3 Gumstix Overo on Tobi"; @@ -20,10 +20,58 @@ compatible = "gpio-leds"; heartbeat { label = "overo:red:gpio21"; - gpios = <&gpio1 21 0>; + gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; }; }; + + vddvario: regulator-vddvario { + compatible = "regulator-fixed"; + regulator-name = "vddvario"; + regulator-always-on; + }; + + vdd33a: regulator-vdd33a { + compatible = "regulator-fixed"; + regulator-name = "vdd33a"; + regulator-always-on; + }; +}; + +&gpmc { + ranges = <5 0 0x2c000000 0x1000000>; /* CS5 */ + + ethernet@5,0 { + compatible = "smsc,lan9221", "smsc,lan9115"; + reg = <5 0 0xff>; + bank-width = <2>; + + gpmc,mux-add-data; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <42>; + gpmc,cs-wr-off-ns = <36>; + gpmc,adv-on-ns = <6>; + gpmc,adv-rd-off-ns = <12>; + gpmc,adv-wr-off-ns = <12>; + gpmc,oe-on-ns = <0>; + gpmc,oe-off-ns = <42>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <36>; + gpmc,rd-cycle-ns = <60>; + gpmc,wr-cycle-ns = <54>; + gpmc,access-ns = <36>; + gpmc,page-burst-access-ns = <0>; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,wr-data-mux-bus-ns = <18>; + gpmc,wr-access-ns = <42>; + gpmc,cycle2cycle-samecsen; + gpmc,cycle2cycle-diffcsen; + + interrupt-parent = <&gpio6>; + interrupts = <16 IRQ_TYPE_LEVEL_LOW>; /* GPIO 176 */ + reg-io-width = <4>; + }; }; &i2c3 { diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 0bbeff2afd4d..7d95cda1fae4 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -8,7 +8,11 @@ * kind, whether express or implied. */ -/include/ "skeleton.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/pinctrl/omap.h> + +#include "skeleton.dtsi" / { compatible = "ti,omap3430", "ti,omap3"; diff --git a/arch/arm/boot/dts/omap3430-sdp.dts b/arch/arm/boot/dts/omap3430-sdp.dts index 144ae43453c4..c4a1c0a97728 100644 --- a/arch/arm/boot/dts/omap3430-sdp.dts +++ b/arch/arm/boot/dts/omap3430-sdp.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap34xx.dtsi" +#include "omap34xx.dtsi" / { model = "TI OMAP3430 SDP"; @@ -28,7 +28,8 @@ }; }; -/include/ "twl4030.dtsi" +#include "twl4030.dtsi" +#include "twl4030_omap3.dtsi" &mmc1 { vmmc-supply = <&vmmc1>; diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi index 75ed4ae2e631..5355d6173748 100644 --- a/arch/arm/boot/dts/omap34xx.dtsi +++ b/arch/arm/boot/dts/omap34xx.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap3.dtsi" +#include "omap3.dtsi" / { cpus { diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi index f3447bc1b032..f8b3765eb9be 100644 --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap3.dtsi" +#include "omap3.dtsi" / { aliases { diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts index e30cdf0f5ac1..133f1b74e8ae 100644 --- a/arch/arm/boot/dts/omap4-panda-a4.dts +++ b/arch/arm/boot/dts/omap4-panda-a4.dts @@ -7,14 +7,14 @@ */ /dts-v1/; -/include/ "omap443x.dtsi" -/include/ "omap4-panda-common.dtsi" +#include "omap443x.dtsi" +#include "omap4-panda-common.dtsi" /* Pandaboard Rev A4+ have external pullups on SCL & SDA */ &dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ - 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi index eeb734e25709..faa95b5b242e 100644 --- a/arch/arm/boot/dts/omap4-panda-common.dtsi +++ b/arch/arm/boot/dts/omap4-panda-common.dtsi @@ -5,7 +5,7 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -/include/ "elpida_ecb240abacn.dtsi" +#include "elpida_ecb240abacn.dtsi" / { model = "TI OMAP4 PandaBoard"; @@ -16,17 +16,22 @@ reg = <0x80000000 0x40000000>; /* 1 GB */ }; - leds { + leds: leds { compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = < + &led_wkgpio_pins + >; + heartbeat { label = "pandaboard::status1"; - gpios = <&gpio1 7 0>; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; mmc { label = "pandaboard::status2"; - gpios = <&gpio1 8 0>; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; linux,default-trigger = "mmc0"; }; }; @@ -54,6 +59,54 @@ "AFML", "Line In", "AFMR", "Line In"; }; + + /* + * Temp hack: Need to be replaced with the proper gpio-controlled + * reset driver as soon it will be merged. + * http://thread.gmane.org/gmane.linux.drivers.devicetree/36830 + */ + /* HS USB Port 1 RESET */ + hsusb1_reset: hsusb1_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb1_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 30 0>; /* gpio_62 */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Port 1 Power */ + hsusb1_power: hsusb1_power_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb1_vbus"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio1 1 0>; /* gpio_1 */ + startup-delay-us = <70000>; + enable-active-high; + /* + * boot-on is required along with always-on as the + * regulator framework doesn't enable the regulator + * if boot-on is not there. + */ + regulator-always-on; + regulator-boot-on; + }; + + /* HS USB Host PHY on PORT 1 */ + hsusb1_phy: hsusb1_phy { + compatible = "usb-nop-xceiv"; + reset-supply = <&hsusb1_reset>; + vcc-supply = <&hsusb1_power>; + /** + * FIXME: + * put the right clock phandle here when available + * clocks = <&auxclk3>; + * clock-names = "main_clk"; + */ + clock-frequency = <19200000>; + }; }; &omap4_pmx_wkup { @@ -64,7 +117,7 @@ twl6030_wkup_pins: pinmux_twl6030_wkup_pins { pinctrl-single,pins = < - 0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */ + 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ >; }; }; @@ -78,81 +131,108 @@ &mcbsp1_pins &dss_hdmi_pins &tpd12s015_pins + &hsusbb1_pins >; twl6030_pins: pinmux_twl6030_pins { pinctrl-single,pins = < - 0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */ + 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ >; }; twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < - 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ - 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */ + 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ + 0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */ >; }; mcpdm_pins: pinmux_mcpdm_pins { pinctrl-single,pins = < - 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */ - 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */ - 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */ - 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */ - 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */ + 0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */ + 0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */ + 0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */ + 0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */ + 0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */ >; }; mcbsp1_pins: pinmux_mcbsp1_pins { pinctrl-single,pins = < - 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */ - 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */ - 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */ - 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ + 0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */ + 0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */ + 0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */ + 0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */ >; }; dss_hdmi_pins: pinmux_dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ - 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; tpd12s015_pins: pinmux_tpd12s015_pins { pinctrl-single,pins = < - 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ - 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ - 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ + 0x22 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */ + 0x48 (PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */ + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */ + >; + }; + + hsusbb1_pins: pinmux_hsusbb1_pins { + pinctrl-single,pins = < + 0x82 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_clk.usbb1_ulpiphy_clk */ + 0x84 (PIN_OUTPUT | MUX_MODE4) /* usbb1_ulpitll_stp.usbb1_ulpiphy_stp */ + 0x86 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dir.usbb1_ulpiphy_dir */ + 0x88 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_nxt.usbb1_ulpiphy_nxt */ + 0x8a (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat0.usbb1_ulpiphy_dat0 */ + 0x8c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat1.usbb1_ulpiphy_dat1 */ + 0x8e (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat2.usbb1_ulpiphy_dat2 */ + 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat3.usbb1_ulpiphy_dat3 */ + 0x92 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat4.usbb1_ulpiphy_dat4 */ + 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat5.usbb1_ulpiphy_dat5 */ + 0x96 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat6.usbb1_ulpiphy_dat6 */ + 0x98 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* usbb1_ulpitll_dat7.usbb1_ulpiphy_dat7 */ >; }; i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < - 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ - 0xe4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ + 0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ + 0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ >; }; i2c2_pins: pinmux_i2c2_pins { pinctrl-single,pins = < - 0xe6 0x118 /* i2c2_scl PULLUP | INPUTENABLE | MODE0 */ - 0xe8 0x118 /* i2c2_sda PULLUP | INPUTENABLE | MODE0 */ + 0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ + 0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ >; }; i2c3_pins: pinmux_i2c3_pins { pinctrl-single,pins = < - 0xea 0x118 /* i2c3_scl PULLUP | INPUTENABLE | MODE0 */ - 0xec 0x118 /* i2c3_sda PULLUP | INPUTENABLE | MODE0 */ + 0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ + 0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ >; }; i2c4_pins: pinmux_i2c4_pins { pinctrl-single,pins = < - 0xee 0x118 /* i2c4_scl PULLUP | INPUTENABLE | MODE0 */ - 0xf0 0x118 /* i2c4_sda PULLUP | INPUTENABLE | MODE0 */ + 0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */ + 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ + >; + }; +}; + +&omap4_pmx_wkup { + led_wkgpio_pins: pinmux_leds_wkpins { + pinctrl-single,pins = < + 0x1a (PIN_OUTPUT | MUX_MODE3) /* gpio_wk7 */ + 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ >; }; }; @@ -165,18 +245,18 @@ twl: twl@48 { reg = <0x48>; - /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ - interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ + /* IRQ# = 7 */ + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ interrupt-parent = <&gic>; }; twl6040: twl@4b { compatible = "ti,twl6040"; reg = <0x4b>; - /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ - interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */ + /* IRQ# = 119 */ + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ interrupt-parent = <&gic>; - ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ + ti,audpwron-gpio = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio line 127 */ vio-supply = <&v1v8>; v2v1-supply = <&v2v1>; @@ -184,7 +264,7 @@ }; }; -/include/ "twl6030.dtsi" +#include "twl6030.dtsi" &i2c2 { pinctrl-names = "default"; @@ -269,3 +349,11 @@ mode = <3>; power = <50>; }; + +&usbhshost { + port1-mode = "ehci-phy"; +}; + +&usbhsehci { + phys = <&hsusb1_phy>; +}; diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts index f1d8c217ce12..56c435468e94 100644 --- a/arch/arm/boot/dts/omap4-panda-es.dts +++ b/arch/arm/boot/dts/omap4-panda-es.dts @@ -7,8 +7,8 @@ */ /dts-v1/; -/include/ "omap4460.dtsi" -/include/ "omap4-panda-common.dtsi" +#include "omap4460.dtsi" +#include "omap4-panda-common.dtsi" /* Audio routing is differnet between PandaBoard4430 and PandaBoardES */ &sound { @@ -29,8 +29,36 @@ /* PandaboardES has external pullups on SCL & SDA */ &dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ - 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; + +&omap4_pmx_core { + led_gpio_pins: gpio_led_pmx { + pinctrl-single,pins = < + 0xb6 (PIN_OUTPUT | MUX_MODE3) /* gpio_110 */ + >; + }; +}; + +&led_wkgpio_pins { + pinctrl-single,pins = < + 0x1c (PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */ + >; +}; + +&leds { + pinctrl-0 = < + &led_gpio_pins + &led_wkgpio_pins + >; + + heartbeat { + gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>; + }; + mmc { + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + }; +}; diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts index f8b221f0168e..6189a8b77d7f 100644 --- a/arch/arm/boot/dts/omap4-panda.dts +++ b/arch/arm/boot/dts/omap4-panda.dts @@ -7,5 +7,5 @@ */ /dts-v1/; -/include/ "omap443x.dtsi" -/include/ "omap4-panda-common.dtsi" +#include "omap443x.dtsi" +#include "omap4-panda-common.dtsi" diff --git a/arch/arm/boot/dts/omap4-sdp-es23plus.dts b/arch/arm/boot/dts/omap4-sdp-es23plus.dts index b4a40ffbce31..aad5dda0f469 100644 --- a/arch/arm/boot/dts/omap4-sdp-es23plus.dts +++ b/arch/arm/boot/dts/omap4-sdp-es23plus.dts @@ -5,13 +5,13 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -/include/ "omap4-sdp.dts" +#include "omap4-sdp.dts" /* SDP boards with 4430 ES2.3+ or 4460 have external pullups on SCL & SDA */ &dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x100 /* hdmi_scl.hdmi_scl INPUT | MODE 0 */ - 0x5e 0x100 /* hdmi_sda.hdmi_sda INPUT | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts index 98505a2ef162..7951b4ea500a 100644 --- a/arch/arm/boot/dts/omap4-sdp.dts +++ b/arch/arm/boot/dts/omap4-sdp.dts @@ -7,8 +7,8 @@ */ /dts-v1/; -/include/ "omap443x.dtsi" -/include/ "elpida_ecb240abacn.dtsi" +#include "omap443x.dtsi" +#include "elpida_ecb240abacn.dtsi" / { model = "TI OMAP4 SDP board"; @@ -41,42 +41,42 @@ compatible = "gpio-leds"; debug0 { label = "omap4:green:debug0"; - gpios = <&gpio2 29 0>; /* 61 */ + gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>; /* 61 */ }; debug1 { label = "omap4:green:debug1"; - gpios = <&gpio1 30 0>; /* 30 */ + gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>; /* 30 */ }; debug2 { label = "omap4:green:debug2"; - gpios = <&gpio1 7 0>; /* 7 */ + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; /* 7 */ }; debug3 { label = "omap4:green:debug3"; - gpios = <&gpio1 8 0>; /* 8 */ + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; /* 8 */ }; debug4 { label = "omap4:green:debug4"; - gpios = <&gpio2 18 0>; /* 50 */ + gpios = <&gpio2 18 GPIO_ACTIVE_HIGH>; /* 50 */ }; user1 { label = "omap4:blue:user"; - gpios = <&gpio6 9 0>; /* 169 */ + gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* 169 */ }; user2 { label = "omap4:red:user"; - gpios = <&gpio6 10 0>; /* 170 */ + gpios = <&gpio6 10 GPIO_ACTIVE_HIGH>; /* 170 */ }; user3 { label = "omap4:green:user"; - gpios = <&gpio5 11 0>; /* 139 */ + gpios = <&gpio5 11 GPIO_ACTIVE_HIGH>; /* 139 */ }; }; @@ -150,7 +150,7 @@ twl6030_wkup_pins: pinmux_twl6030_wkup_pins { pinctrl-single,pins = < - 0x14 0x2 /* fref_clk0_out.sys_drm_msecure OUTPUT | MODE2 */ + 0x14 (PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ >; }; }; @@ -170,129 +170,129 @@ uart2_pins: pinmux_uart2_pins { pinctrl-single,pins = < - 0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */ - 0xda 0 /* uart2_rts.uart2_rts OUTPUT | MODE0 */ - 0xdc 0x118 /* uart2_rx.uart2_rx INPUT_PULLUP | MODE0 */ - 0xde 0 /* uart2_tx.uart2_tx OUTPUT | MODE0 */ + 0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_cts.uart2_cts */ + 0xda (PIN_OUTPUT | MUX_MODE0) /* uart2_rts.uart2_rts */ + 0xdc (PIN_INPUT_PULLUP | MUX_MODE0) /* uart2_rx.uart2_rx */ + 0xde (PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */ >; }; uart3_pins: pinmux_uart3_pins { pinctrl-single,pins = < - 0x100 0x118 /* uart3_cts_rctx.uart3_cts_rctx INPUT_PULLUP | MODE0 */ - 0x102 0 /* uart3_rts_sd.uart3_rts_sd OUTPUT | MODE0 */ - 0x104 0x100 /* uart3_rx_irrx.uart3_rx_irrx INPUT | MODE0 */ - 0x106 0 /* uart3_tx_irtx.uart3_tx_irtx OUTPUT | MODE0 */ + 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */ + 0x102 (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */ + 0x104 (PIN_INPUT | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */ + 0x106 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */ >; }; uart4_pins: pinmux_uart4_pins { pinctrl-single,pins = < - 0x11c 0x100 /* uart4_rx.uart4_rx INPUT | MODE0 */ - 0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */ + 0x11c (PIN_INPUT | MUX_MODE0) /* uart4_rx.uart4_rx */ + 0x11e (PIN_OUTPUT | MUX_MODE0) /* uart4_tx.uart4_tx */ >; }; twl6030_pins: pinmux_twl6030_pins { pinctrl-single,pins = < - 0x15e 0x4118 /* sys_nirq1.sys_nirq1 OMAP_WAKEUP_EN | INPUT_PULLUP | MODE0 */ + 0x15e (WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ >; }; twl6040_pins: pinmux_twl6040_pins { pinctrl-single,pins = < - 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */ - 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */ + 0xe0 (PIN_OUTPUT | MUX_MODE3) /* hdq_sio.gpio_127 */ + 0x160 (PIN_INPUT | MUX_MODE0) /* sys_nirq2.sys_nirq2 */ >; }; mcpdm_pins: pinmux_mcpdm_pins { pinctrl-single,pins = < - 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */ - 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */ - 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */ - 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */ - 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */ + 0xc6 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_ul_data.abe_pdm_ul_data */ + 0xc8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_dl_data.abe_pdm_dl_data */ + 0xca (PIN_INPUT_PULLUP | MUX_MODE0) /* abe_pdm_frame.abe_pdm_frame */ + 0xcc (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_pdm_lb_clk.abe_pdm_lb_clk */ + 0xce (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */ >; }; dmic_pins: pinmux_dmic_pins { pinctrl-single,pins = < - 0xd0 0 /* abe_dmic_clk1.abe_dmic_clk1 OUTPUT | MODE0 */ - 0xd2 0x100 /* abe_dmic_din1.abe_dmic_din1 INPUT | MODE0 */ - 0xd4 0x100 /* abe_dmic_din2.abe_dmic_din2 INPUT | MODE0 */ - 0xd6 0x100 /* abe_dmic_din3.abe_dmic_din3 INPUT | MODE0 */ + 0xd0 (PIN_OUTPUT | MUX_MODE0) /* abe_dmic_clk1.abe_dmic_clk1 */ + 0xd2 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din1.abe_dmic_din1 */ + 0xd4 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din2.abe_dmic_din2 */ + 0xd6 (PIN_INPUT | MUX_MODE0) /* abe_dmic_din3.abe_dmic_din3 */ >; }; mcbsp1_pins: pinmux_mcbsp1_pins { pinctrl-single,pins = < - 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */ - 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */ - 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */ - 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */ + 0xbe (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_clkx.abe_mcbsp1_clkx */ + 0xc0 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dr.abe_mcbsp1_dr */ + 0xc2 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp1_dx.abe_mcbsp1_dx */ + 0xc4 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp1_fsx.abe_mcbsp1_fsx */ >; }; mcbsp2_pins: pinmux_mcbsp2_pins { pinctrl-single,pins = < - 0xb6 0x100 /* abe_mcbsp2_clkx.abe_mcbsp2_clkx INPUT | MODE0 */ - 0xb8 0x108 /* abe_mcbsp2_dr.abe_mcbsp2_dr INPUT PULLDOWN | MODE0 */ - 0xba 0x8 /* abe_mcbsp2_dx.abe_mcbsp2_dx OUTPUT PULLDOWN | MODE0 */ - 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */ + 0xb6 (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx.abe_mcbsp2_clkx */ + 0xb8 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dr.abe_mcbsp2_dr */ + 0xba (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abe_mcbsp2_dx.abe_mcbsp2_dx */ + 0xbc (PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx.abe_mcbsp2_fsx */ >; }; mcspi1_pins: pinmux_mcspi1_pins { pinctrl-single,pins = < - 0xf2 0x100 /* mcspi1_clk.mcspi1_clk INPUT | MODE0 */ - 0xf4 0x100 /* mcspi1_somi.mcspi1_somi INPUT | MODE0 */ - 0xf6 0x100 /* mcspi1_simo.mcspi1_simo INPUT | MODE0 */ - 0xf8 0x100 /* mcspi1_cs0.mcspi1_cs0 INPUT | MODE0*/ + 0xf2 (PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */ + 0xf4 (PIN_INPUT | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */ + 0xf6 (PIN_INPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */ + 0xf8 (PIN_INPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */ >; }; dss_hdmi_pins: pinmux_dss_hdmi_pins { pinctrl-single,pins = < - 0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */ - 0x5c 0x118 /* hdmi_scl.hdmi_scl INPUT PULLUP | MODE 0 */ - 0x5e 0x118 /* hdmi_sda.hdmi_sda INPUT PULLUP | MODE 0 */ + 0x5a (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ + 0x5c (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_scl.hdmi_scl */ + 0x5e (PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_sda.hdmi_sda */ >; }; tpd12s015_pins: pinmux_tpd12s015_pins { pinctrl-single,pins = < - 0x22 0x3 /* gpmc_a17.gpio_41 OUTPUT | MODE3 */ - 0x48 0x3 /* gpmc_nbe1.gpio_60 OUTPUT | MODE3 */ - 0x58 0x10b /* hdmi_hpd.gpio_63 INPUT PULLDOWN | MODE3 */ + 0x22 (PIN_OUTPUT | MUX_MODE3) /* gpmc_a17.gpio_41 */ + 0x48 (PIN_OUTPUT | MUX_MODE3) /* gpmc_nbe1.gpio_60 */ + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* hdmi_hpd.gpio_63 */ >; }; i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < - 0xe2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ - 0xe4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ + 0xe2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ + 0xe4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ >; }; i2c2_pins: pinmux_i2c2_pins { pinctrl-single,pins = < - 0xe6 0x118 /* i2c2_scl PULLUP | INPUTENABLE | MODE0 */ - 0xe8 0x118 /* i2c2_sda PULLUP | INPUTENABLE | MODE0 */ + 0xe6 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ + 0xe8 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ >; }; i2c3_pins: pinmux_i2c3_pins { pinctrl-single,pins = < - 0xea 0x118 /* i2c3_scl PULLUP | INPUTENABLE | MODE0 */ - 0xec 0x118 /* i2c3_sda PULLUP | INPUTENABLE | MODE0 */ + 0xea (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ + 0xec (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ >; }; i2c4_pins: pinmux_i2c4_pins { pinctrl-single,pins = < - 0xee 0x118 /* i2c4_scl PULLUP | INPUTENABLE | MODE0 */ - 0xf0 0x118 /* i2c4_sda PULLUP | INPUTENABLE | MODE0 */ + 0xee (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_scl */ + 0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c4_sda */ >; }; }; @@ -306,7 +306,7 @@ twl: twl@48 { reg = <0x48>; /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ - interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ interrupt-parent = <&gic>; }; @@ -314,7 +314,7 @@ compatible = "ti,twl6040"; reg = <0x4b>; /* SPI = 0, IRQ# = 119, 4 = active high level-sensitive */ - interrupts = <0 119 4>; /* IRQ_SYS_2N cascaded to gic */ + interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_2N cascaded to gic */ interrupt-parent = <&gic>; ti,audpwron-gpio = <&gpio4 31 0>; /* gpio line 127 */ @@ -336,7 +336,7 @@ }; }; -/include/ "twl6030.dtsi" +#include "twl6030.dtsi" &i2c2 { pinctrl-names = "default"; @@ -395,7 +395,7 @@ spi-max-frequency = <24000000>; reg = <0>; interrupt-parent = <&gpio2>; - interrupts = <2 8>; /* gpio line 34, low triggered */ + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; /* gpio line 34 */ vdd-supply = <&vdd_eth>; }; }; diff --git a/arch/arm/boot/dts/omap4-var-som.dts b/arch/arm/boot/dts/omap4-var-som.dts index 7e04103779c4..b41269e871dd 100644 --- a/arch/arm/boot/dts/omap4-var-som.dts +++ b/arch/arm/boot/dts/omap4-var-som.dts @@ -7,7 +7,7 @@ */ /dts-v1/; -/include/ "omap443x.dtsi" +#include "omap443x.dtsi" / { model = "Variscite OMAP4 SOM"; @@ -34,12 +34,12 @@ twl: twl@48 { reg = <0x48>; /* SPI = 0, IRQ# = 7, 4 = active high level-sensitive */ - interrupts = <0 7 4>; /* IRQ_SYS_1N cascaded to gic */ + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */ interrupt-parent = <&gic>; }; }; -/include/ "twl6030.dtsi" +#include "twl6030.dtsi" &i2c2 { clock-frequency = <400000>; @@ -68,7 +68,7 @@ spi-max-frequency = <24000000>; reg = <0>; interrupt-parent = <&gpio6>; - interrupts = <11 8>; /* gpio line 171, low triggered */ + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; /* gpio line 171 */ vdd-supply = <&vdd_eth>; }; }; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 33a94509a292..22d9f2b593d4 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -6,15 +6,11 @@ * published by the Free Software Foundation. */ -/* - * Carveout for multimedia usecases - * It should be the last 48MB of the first 512MB memory part - * In theory, it should not even exist. That zone should be reserved - * dynamically during the .reserve callback. - */ -/memreserve/ 0x9d000000 0x03000000; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/pinctrl/omap.h> -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { compatible = "ti,omap4430", "ti,omap4"; @@ -63,7 +59,7 @@ local-timer@0x48240600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x48240600 0x20>; - interrupts = <1 13 0x304>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>; }; /* @@ -104,8 +100,8 @@ reg = <0x44000000 0x1000>, <0x44800000 0x2000>, <0x45000000 0x1000>; - interrupts = <0 9 0x4>, - <0 10 0x4>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; counter32k: counter@4a304000 { compatible = "ti,omap-counter32k"; @@ -133,10 +129,10 @@ sdma: dma-controller@4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>; - interrupts = <0 12 0x4>, - <0 13 0x4>, - <0 14 0x4>, - <0 15 0x4>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; #dma-channels = <32>; #dma-requests = <127>; @@ -145,7 +141,7 @@ gpio1: gpio@4a310000 { compatible = "ti,omap4-gpio"; reg = <0x4a310000 0x200>; - interrupts = <0 29 0x4>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio1"; ti,gpio-always-on; gpio-controller; @@ -157,7 +153,7 @@ gpio2: gpio@48055000 { compatible = "ti,omap4-gpio"; reg = <0x48055000 0x200>; - interrupts = <0 30 0x4>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -168,7 +164,7 @@ gpio3: gpio@48057000 { compatible = "ti,omap4-gpio"; reg = <0x48057000 0x200>; - interrupts = <0 31 0x4>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -179,7 +175,7 @@ gpio4: gpio@48059000 { compatible = "ti,omap4-gpio"; reg = <0x48059000 0x200>; - interrupts = <0 32 0x4>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -190,7 +186,7 @@ gpio5: gpio@4805b000 { compatible = "ti,omap4-gpio"; reg = <0x4805b000 0x200>; - interrupts = <0 33 0x4>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -201,7 +197,7 @@ gpio6: gpio@4805d000 { compatible = "ti,omap4-gpio"; reg = <0x4805d000 0x200>; - interrupts = <0 34 0x4>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -214,7 +210,7 @@ reg = <0x50000000 0x1000>; #address-cells = <2>; #size-cells = <1>; - interrupts = <0 20 0x4>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; gpmc,num-cs = <8>; gpmc,num-waitpins = <4>; ti,hwmods = "gpmc"; @@ -223,7 +219,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = <0 72 0x4>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; clock-frequency = <48000000>; }; @@ -231,7 +227,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = <0 73 0x4>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; clock-frequency = <48000000>; }; @@ -239,7 +235,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = <0 74 0x4>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; clock-frequency = <48000000>; }; @@ -247,7 +243,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = <0 70 0x4>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; clock-frequency = <48000000>; }; @@ -255,7 +251,7 @@ i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; - interrupts = <0 56 0x4>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -264,7 +260,7 @@ i2c2: i2c@48072000 { compatible = "ti,omap4-i2c"; reg = <0x48072000 0x100>; - interrupts = <0 57 0x4>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -273,7 +269,7 @@ i2c3: i2c@48060000 { compatible = "ti,omap4-i2c"; reg = <0x48060000 0x100>; - interrupts = <0 61 0x4>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; @@ -282,7 +278,7 @@ i2c4: i2c@48350000 { compatible = "ti,omap4-i2c"; reg = <0x48350000 0x100>; - interrupts = <0 62 0x4>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; @@ -291,7 +287,7 @@ mcspi1: spi@48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; - interrupts = <0 65 0x4>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi1"; @@ -311,7 +307,7 @@ mcspi2: spi@4809a000 { compatible = "ti,omap4-mcspi"; reg = <0x4809a000 0x200>; - interrupts = <0 66 0x4>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi2"; @@ -326,7 +322,7 @@ mcspi3: spi@480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; - interrupts = <0 91 0x4>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi3"; @@ -338,7 +334,7 @@ mcspi4: spi@480ba000 { compatible = "ti,omap4-mcspi"; reg = <0x480ba000 0x200>; - interrupts = <0 48 0x4>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi4"; @@ -350,7 +346,7 @@ mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; - interrupts = <0 83 0x4>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -361,7 +357,7 @@ mmc2: mmc@480b4000 { compatible = "ti,omap4-hsmmc"; reg = <0x480b4000 0x400>; - interrupts = <0 86 0x4>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc2"; ti,needs-special-reset; dmas = <&sdma 47>, <&sdma 48>; @@ -371,7 +367,7 @@ mmc3: mmc@480ad000 { compatible = "ti,omap4-hsmmc"; reg = <0x480ad000 0x400>; - interrupts = <0 94 0x4>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc3"; ti,needs-special-reset; dmas = <&sdma 77>, <&sdma 78>; @@ -381,7 +377,7 @@ mmc4: mmc@480d1000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d1000 0x400>; - interrupts = <0 96 0x4>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc4"; ti,needs-special-reset; dmas = <&sdma 57>, <&sdma 58>; @@ -391,7 +387,7 @@ mmc5: mmc@480d5000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d5000 0x400>; - interrupts = <0 59 0x4>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc5"; ti,needs-special-reset; dmas = <&sdma 59>, <&sdma 60>; @@ -401,7 +397,7 @@ wdt2: wdt@4a314000 { compatible = "ti,omap4-wdt", "ti,omap3-wdt"; reg = <0x4a314000 0x80>; - interrupts = <0 80 0x4>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "wd_timer2"; }; @@ -410,7 +406,7 @@ reg = <0x40132000 0x7f>, /* MPU private access */ <0x49032000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 112 0x4>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mcpdm"; dmas = <&sdma 65>, <&sdma 66>; @@ -422,7 +418,7 @@ reg = <0x4012e000 0x7f>, /* MPU private access */ <0x4902e000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 114 0x4>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "dmic"; dmas = <&sdma 67>; dma-names = "up_link"; @@ -433,7 +429,7 @@ reg = <0x40122000 0xff>, /* MPU private access */ <0x49022000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 17 0x4>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; @@ -447,7 +443,7 @@ reg = <0x40124000 0xff>, /* MPU private access */ <0x49024000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 22 0x4>; + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; @@ -461,7 +457,7 @@ reg = <0x40126000 0xff>, /* MPU private access */ <0x49026000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 23 0x4>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; @@ -474,7 +470,7 @@ compatible = "ti,omap4-mcbsp"; reg = <0x48096000 0xff>; /* L4 Interconnect */ reg-names = "mpu"; - interrupts = <0 16 0x4>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp4"; @@ -486,7 +482,7 @@ keypad: keypad@4a31c000 { compatible = "ti,omap4-keypad"; reg = <0x4a31c000 0x80>; - interrupts = <0 120 0x4>; + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; reg-names = "mpu"; ti,hwmods = "kbd"; }; @@ -494,7 +490,7 @@ emif1: emif@4c000000 { compatible = "ti,emif-4d"; reg = <0x4c000000 0x100>; - interrupts = <0 110 0x4>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "emif1"; phy-type = <1>; hw-caps-read-idle-ctrl; @@ -505,7 +501,7 @@ emif2: emif@4d000000 { compatible = "ti,emif-4d"; reg = <0x4d000000 0x100>; - interrupts = <0 111 0x4>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "emif2"; phy-type = <1>; hw-caps-read-idle-ctrl; @@ -530,7 +526,7 @@ timer1: timer@4a318000 { compatible = "ti,omap3430-timer"; reg = <0x4a318000 0x80>; - interrupts = <0 37 0x4>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer1"; ti,timer-alwon; }; @@ -538,21 +534,21 @@ timer2: timer@48032000 { compatible = "ti,omap3430-timer"; reg = <0x48032000 0x80>; - interrupts = <0 38 0x4>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer2"; }; timer3: timer@48034000 { compatible = "ti,omap4430-timer"; reg = <0x48034000 0x80>; - interrupts = <0 39 0x4>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer3"; }; timer4: timer@48036000 { compatible = "ti,omap4430-timer"; reg = <0x48036000 0x80>; - interrupts = <0 40 0x4>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer4"; }; @@ -560,7 +556,7 @@ compatible = "ti,omap4430-timer"; reg = <0x40138000 0x80>, <0x49038000 0x80>; - interrupts = <0 41 0x4>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer5"; ti,timer-dsp; }; @@ -569,7 +565,7 @@ compatible = "ti,omap4430-timer"; reg = <0x4013a000 0x80>, <0x4903a000 0x80>; - interrupts = <0 42 0x4>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer6"; ti,timer-dsp; }; @@ -578,7 +574,7 @@ compatible = "ti,omap4430-timer"; reg = <0x4013c000 0x80>, <0x4903c000 0x80>; - interrupts = <0 43 0x4>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer7"; ti,timer-dsp; }; @@ -587,7 +583,7 @@ compatible = "ti,omap4430-timer"; reg = <0x4013e000 0x80>, <0x4903e000 0x80>; - interrupts = <0 44 0x4>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer8"; ti,timer-pwm; ti,timer-dsp; @@ -596,7 +592,7 @@ timer9: timer@4803e000 { compatible = "ti,omap4430-timer"; reg = <0x4803e000 0x80>; - interrupts = <0 45 0x4>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer9"; ti,timer-pwm; }; @@ -604,7 +600,7 @@ timer10: timer@48086000 { compatible = "ti,omap3430-timer"; reg = <0x48086000 0x80>; - interrupts = <0 46 0x4>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer10"; ti,timer-pwm; }; @@ -612,7 +608,7 @@ timer11: timer@48088000 { compatible = "ti,omap4430-timer"; reg = <0x48088000 0x80>; - interrupts = <0 47 0x4>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer11"; ti,timer-pwm; }; @@ -620,7 +616,7 @@ usbhstll: usbhstll@4a062000 { compatible = "ti,usbhs-tll"; reg = <0x4a062000 0x1000>; - interrupts = <0 78 0x4>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "usb_tll_hs"; }; @@ -636,14 +632,14 @@ compatible = "ti,ohci-omap3", "usb-ohci"; reg = <0x4a064800 0x400>; interrupt-parent = <&gic>; - interrupts = <0 76 0x4>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; }; usbhsehci: ehci@4a064c00 { compatible = "ti,ehci-omap", "usb-ehci"; reg = <0x4a064c00 0x400>; interrupt-parent = <&gic>; - interrupts = <0 77 0x4>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; }; }; @@ -658,7 +654,7 @@ usb_otg_hs: usb_otg_hs@4a0ab000 { compatible = "ti,omap4-musb"; reg = <0x4a0ab000 0x7ff>; - interrupts = <0 92 0x4>, <0 93 0x4>; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "mc", "dma"; ti,hwmods = "usb_otg_hs"; usb-phy = <&usb2_phy>; diff --git a/arch/arm/boot/dts/omap443x.dtsi b/arch/arm/boot/dts/omap443x.dtsi index cccf39af4925..bcf455efe18d 100644 --- a/arch/arm/boot/dts/omap443x.dtsi +++ b/arch/arm/boot/dts/omap443x.dtsi @@ -8,7 +8,7 @@ * kind, whether express or implied. */ -/include/ "omap4.dtsi" +#include "omap4.dtsi" / { cpus { @@ -24,4 +24,10 @@ clock-latency = <300000>; /* From legacy driver */ }; }; + + bandgap { + reg = <0x4a002260 0x4 + 0x4a00232C 0x4>; + compatible = "ti,omap4430-bandgap"; + }; }; diff --git a/arch/arm/boot/dts/omap4460.dtsi b/arch/arm/boot/dts/omap4460.dtsi index 2cf227c86099..c2f0f39b5a24 100644 --- a/arch/arm/boot/dts/omap4460.dtsi +++ b/arch/arm/boot/dts/omap4460.dtsi @@ -7,7 +7,7 @@ * version 2. This program is licensed "as is" without any warranty of any * kind, whether express or implied. */ -/include/ "omap4.dtsi" +#include "omap4.dtsi" / { cpus { @@ -25,8 +25,17 @@ pmu { compatible = "arm,cortex-a9-pmu"; - interrupts = <0 54 0x4>, - <0 55 0x4>; + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "debugss"; }; + + bandgap { + reg = <0x4a002260 0x4 + 0x4a00232C 0x4 + 0x4a002378 0x18>; + compatible = "ti,omap4460-bandgap"; + interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */ + gpios = <&gpio3 22 0>; /* tshut */ + }; }; diff --git a/arch/arm/boot/dts/omap5-evm.dts b/arch/arm/boot/dts/omap5-evm.dts deleted file mode 100644 index 982acd19477d..000000000000 --- a/arch/arm/boot/dts/omap5-evm.dts +++ /dev/null @@ -1,261 +0,0 @@ -/* - * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -/dts-v1/; - -/include/ "omap5.dtsi" -/include/ "samsung_k3pe0e000b.dtsi" - -/ { - model = "TI OMAP5 EVM board"; - compatible = "ti,omap5-evm", "ti,omap5"; - - memory { - device_type = "memory"; - reg = <0x80000000 0x7F000000>; /* 2032 MB */ - }; - - vmmcsd_fixed: fixedregulator-mmcsd { - compatible = "regulator-fixed"; - regulator-name = "vmmcsd_fixed"; - regulator-min-microvolt = <3000000>; - regulator-max-microvolt = <3000000>; - }; - -}; - -&omap5_pmx_core { - pinctrl-names = "default"; - pinctrl-0 = < - &twl6040_pins - &mcpdm_pins - &dmic_pins - &mcbsp1_pins - &mcbsp2_pins - >; - - twl6040_pins: pinmux_twl6040_pins { - pinctrl-single,pins = < - 0x18a 0x6 /* perslimbus2_clock.gpio5_145 OUTPUT | MODE6 */ - >; - }; - - mcpdm_pins: pinmux_mcpdm_pins { - pinctrl-single,pins = < - 0x142 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */ - 0x15c 0x108 /* abemcpdm_ul_data.abemcpdm_ul_data INPUT PULLDOWN | MODE0 */ - 0x15e 0x108 /* abemcpdm_dl_data.abemcpdm_dl_data INPUT PULLDOWN | MODE0 */ - 0x160 0x118 /* abemcpdm_frame.abemcpdm_frame INPUT PULLUP | MODE0 */ - 0x162 0x108 /* abemcpdm_lb_clk.abemcpdm_lb_clk INPUT PULLDOWN | MODE0 */ - >; - }; - - dmic_pins: pinmux_dmic_pins { - pinctrl-single,pins = < - 0x144 0x100 /* abedmic_din1.abedmic_din1 INPUT | MODE0 */ - 0x146 0x100 /* abedmic_din2.abedmic_din2 INPUT | MODE0 */ - 0x148 0x100 /* abedmic_din3.abedmic_din3 INPUT | MODE0 */ - 0x14a 0 /* abedmic_clk1.abedmic_clk1 OUTPUT | MODE0 */ - >; - }; - - mcbsp1_pins: pinmux_mcbsp1_pins { - pinctrl-single,pins = < - 0x14c 0x101 /* abedmic_clk2.abemcbsp1_fsx INPUT | MODE1 */ - 0x14e 0x9 /* abedmic_clk3.abemcbsp1_dx OUTPUT PULLDOWN | MODE1 */ - 0x150 0x101 /* abeslimbus1_clock.abemcbsp1_clkx INPUT | MODE0 */ - 0x152 0x109 /* abeslimbus1_data.abemcbsp1_dr INPUT PULLDOWN | MODE1 */ - >; - }; - - mcbsp2_pins: pinmux_mcbsp2_pins { - pinctrl-single,pins = < - 0x154 0x108 /* abemcbsp2_dr.abemcbsp2_dr INPUT PULLDOWN | MODE0 */ - 0x156 0x8 /* abemcbsp2_dx.abemcbsp2_dx OUTPUT PULLDOWN | MODE0 */ - 0x158 0x100 /* abemcbsp2_fsx.abemcbsp2_fsx INPUT | MODE0 */ - 0x15a 0x100 /* abemcbsp2_clkx.abemcbsp2_clkx INPUT | MODE0 */ - >; - }; - - i2c1_pins: pinmux_i2c1_pins { - pinctrl-single,pins = < - 0x1b2 0x118 /* i2c1_scl PULLUP | INPUTENABLE | MODE0 */ - 0x1b4 0x118 /* i2c1_sda PULLUP | INPUTENABLE | MODE0 */ - >; - }; - - i2c2_pins: pinmux_i2c2_pins { - pinctrl-single,pins = < - 0x178 0x100 /* i2c2_scl INPUTENABLE | MODE0 */ - 0x17a 0x100 /* i2c2_sda INPUTENABLE | MODE0 */ - >; - }; - - i2c3_pins: pinmux_i2c3_pins { - pinctrl-single,pins = < - 0x13a 0x100 /* i2c3_scl INPUTENABLE | MODE0 */ - 0x13c 0x100 /* i2c3_sda INPUTENABLE | MODE0 */ - >; - }; - - i2c4_pins: pinmux_i2c4_pins { - pinctrl-single,pins = < - 0xb8 0x100 /* i2c4_scl INPUTENABLE | MODE0 */ - 0xba 0x100 /* i2c4_sda INPUTENABLE | MODE0 */ - >; - }; - - i2c5_pins: pinmux_i2c5_pins { - pinctrl-single,pins = < - 0x184 0x100 /* i2c5_scl INPUTENABLE | MODE0 */ - 0x186 0x100 /* i2c5_sda INPUTENABLE | MODE0 */ - >; - }; - - mcspi2_pins: pinmux_mcspi2_pins { - pinctrl-single,pins = < - 0xbc 0x100 /* MCSPI2_CLK INPUTENABLE | MODE0 */ - 0xbe 0x100 /* MCSPI2_SIMO INPUTENABLE | MODE0 */ - 0xc0 0x118 /* MCSPI2_SOMI PULLUP | INPUTENABLE | MODE0*/ - 0xc2 0x0 /* MCSPI2_CS MODE0*/ - >; - }; - - mcspi3_pins: pinmux_mcspi3_pins { - pinctrl-single,pins = < - 0x78 0x101 /* MCSPI2_SOMI INPUTENABLE | MODE1 */ - 0x7a 0x101 /* MCSPI2_CS INPUTENABLE | MODE1 */ - 0x7c 0x101 /* MCSPI2_SIMO INPUTENABLE | MODE1 */ - 0x7e 0x101 /* MCSPI2_CLK INPUTENABLE | MODE1 */ - >; - }; - - mcspi4_pins: pinmux_mcspi4_pins { - pinctrl-single,pins = < - 0x164 0x101 /* MCSPI2_CLK INPUTENABLE | MODE1 */ - 0x168 0x101 /* MCSPI2_SIMO INPUTENABLE | MODE1 */ - 0x16a 0x101 /* MCSPI2_SOMI INPUTENABLE | MODE1 */ - 0x16c 0x101 /* MCSPI2_CS INPUTENABLE | MODE1 */ - >; - }; -}; - -&mmc1 { - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <4>; -}; - -&mmc2 { - vmmc-supply = <&vmmcsd_fixed>; - bus-width = <8>; - ti,non-removable; -}; - -&mmc3 { - bus-width = <4>; - ti,non-removable; -}; - -&mmc4 { - status = "disabled"; -}; - -&mmc5 { - status = "disabled"; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - - clock-frequency = <400000>; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - - clock-frequency = <400000>; - - /* Pressure Sensor */ - bmp085@77 { - compatible = "bosch,bmp085"; - reg = <0x77>; - }; -}; - -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; - - clock-frequency = <400000>; -}; - -&i2c4 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c4_pins>; - - clock-frequency = <400000>; - - /* Temperature Sensor */ - tmp102@48{ - compatible = "ti,tmp102"; - reg = <0x48>; - }; -}; - -&i2c5 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c5_pins>; - - clock-frequency = <400000>; -}; - -&keypad { - keypad,num-rows = <8>; - keypad,num-columns = <8>; - linux,keymap = <0x02020073 /* VOLUP */ - 0x02030072 /* VOLDOWM */ - 0x020400e7 /* SEND */ - 0x02050066 /* HOME */ - 0x0206006b /* END */ - 0x020700d9>; /* SEARCH */ - linux,input-no-autorepeat; -}; - -&mcbsp3 { - status = "disabled"; -}; - -&emif1 { - cs1-used; - device-handle = <&samsung_K3PE0E000B>; -}; - -&emif2 { - cs1-used; - device-handle = <&samsung_K3PE0E000B>; -}; - -&mcspi1 { - -}; - -&mcspi2 { - pinctrl-names = "default"; - pinctrl-0 = <&mcspi2_pins>; -}; - -&mcspi3 { - pinctrl-names = "default"; - pinctrl-0 = <&mcspi3_pins>; -}; - -&mcspi4 { - pinctrl-names = "default"; - pinctrl-0 = <&mcspi4_pins>; -}; diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts new file mode 100644 index 000000000000..08b72678abff --- /dev/null +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -0,0 +1,485 @@ +/* + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +#include "omap5.dtsi" +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + model = "TI OMAP5 uEVM board"; + compatible = "ti,omap5-uevm", "ti,omap5"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x7F000000>; /* 2032 MB */ + }; + + vmmcsd_fixed: fixedregulator-mmcsd { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + }; + + /* HS USB Port 2 RESET */ + hsusb2_reset: hsusb2_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb2_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Host PHY on PORT 2 */ + hsusb2_phy: hsusb2_phy { + compatible = "usb-nop-xceiv"; + reset-supply = <&hsusb2_reset>; + /** + * FIXME + * Put the right clock phandle here when available + * clocks = <&auxclk1>; + * clock-names = "main_clk"; + */ + clock-frequency = <19200000>; + }; + + /* HS USB Port 3 RESET */ + hsusb3_reset: hsusb3_reset_reg { + compatible = "regulator-fixed"; + regulator-name = "hsusb3_reset"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */ + startup-delay-us = <70000>; + enable-active-high; + }; + + /* HS USB Host PHY on PORT 3 */ + hsusb3_phy: hsusb3_phy { + compatible = "usb-nop-xceiv"; + reset-supply = <&hsusb3_reset>; + }; + + leds { + compatible = "gpio-leds"; + led@1 { + label = "omap5:blue:usr1"; + gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */ + linux,default-trigger = "heartbeat"; + default-state = "off"; + }; + }; +}; + +&omap5_pmx_core { + pinctrl-names = "default"; + pinctrl-0 = < + &twl6040_pins + &mcpdm_pins + &dmic_pins + &mcbsp1_pins + &mcbsp2_pins + &usbhost_pins + &led_gpio_pins + >; + + twl6040_pins: pinmux_twl6040_pins { + pinctrl-single,pins = < + 0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */ + >; + }; + + mcpdm_pins: pinmux_mcpdm_pins { + pinctrl-single,pins = < + 0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */ + 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */ + 0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */ + 0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */ + 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */ + >; + }; + + dmic_pins: pinmux_dmic_pins { + pinctrl-single,pins = < + 0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */ + 0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */ + 0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */ + 0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */ + >; + }; + + mcbsp1_pins: pinmux_mcbsp1_pins { + pinctrl-single,pins = < + 0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */ + 0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */ + 0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */ + 0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */ + >; + }; + + mcbsp2_pins: pinmux_mcbsp2_pins { + pinctrl-single,pins = < + 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */ + 0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */ + 0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */ + 0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */ + >; + }; + + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + 0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */ + 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */ + >; + }; + + i2c5_pins: pinmux_i2c5_pins { + pinctrl-single,pins = < + 0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */ + 0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */ + >; + }; + + mcspi2_pins: pinmux_mcspi2_pins { + pinctrl-single,pins = < + 0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */ + 0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */ + 0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */ + 0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */ + >; + }; + + mcspi3_pins: pinmux_mcspi3_pins { + pinctrl-single,pins = < + 0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ + 0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ + 0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ + 0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ + >; + }; + + mcspi4_pins: pinmux_mcspi4_pins { + pinctrl-single,pins = < + 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */ + 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */ + 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */ + 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */ + >; + }; + + usbhost_pins: pinmux_usbhost_pins { + pinctrl-single,pins = < + 0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */ + 0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */ + + 0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */ + 0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */ + + 0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */ + 0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */ + >; + }; + + led_gpio_pins: pinmux_led_gpio_pins { + pinctrl-single,pins = < + 0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */ + >; + }; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + 0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */ + 0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */ + 0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */ + 0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */ + >; + }; + + uart3_pins: pinmux_uart3_pins { + pinctrl-single,pins = < + 0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */ + 0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */ + >; + }; + + uart5_pins: pinmux_uart5_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */ + 0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */ + 0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */ + 0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */ + >; + }; + +}; + +&omap5_pmx_wkup { + pinctrl-names = "default"; + pinctrl-0 = < + &usbhost_wkup_pins + >; + + usbhost_wkup_pins: pinmux_usbhost_wkup_pins { + pinctrl-single,pins = < + 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */ + >; + }; +}; + +&mmc1 { + vmmc-supply = <&vmmcsd_fixed>; + bus-width = <4>; +}; + +&mmc2 { + vmmc-supply = <&vmmcsd_fixed>; + bus-width = <8>; + ti,non-removable; +}; + +&mmc3 { + bus-width = <4>; + ti,non-removable; +}; + +&mmc4 { + status = "disabled"; +}; + +&mmc5 { + status = "disabled"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + + clock-frequency = <400000>; + + palmas: palmas@48 { + compatible = "ti,palmas"; + interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ + interrupt-parent = <&gic>; + reg = <0x48>; + interrupt-controller; + #interrupt-cells = <2>; + + palmas_pmic { + compatible = "ti,palmas-pmic"; + interrupt-parent = <&palmas>; + interrupts = <14 IRQ_TYPE_NONE>; + interrupt-name = "short-irq"; + + ti,ldo6-vibrator; + + regulators { + smps123_reg: smps123 { + regulator-name = "smps123"; + regulator-min-microvolt = < 600000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + smps45_reg: smps45 { + regulator-name = "smps45"; + regulator-min-microvolt = < 600000>; + regulator-max-microvolt = <1310000>; + regulator-always-on; + regulator-boot-on; + }; + + smps6_reg: smps6 { + regulator-name = "smps6"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + regulator-boot-on; + }; + + smps7_reg: smps7 { + regulator-name = "smps7"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + smps8_reg: smps8 { + regulator-name = "smps8"; + regulator-min-microvolt = < 600000>; + regulator-max-microvolt = <1310000>; + regulator-always-on; + regulator-boot-on; + }; + + smps9_reg: smps9 { + regulator-name = "smps9"; + regulator-min-microvolt = <2100000>; + regulator-max-microvolt = <2100000>; + regulator-always-on; + regulator-boot-on; + ti,smps-range = <0x80>; + }; + + smps10_reg: smps10 { + regulator-name = "smps10"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "ldo1"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo2_reg: ldo2 { + regulator-name = "ldo2"; + regulator-min-microvolt = <2900000>; + regulator-max-microvolt = <2900000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo3_reg: ldo3 { + regulator-name = "ldo3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo4_reg: ldo4 { + regulator-name = "ldo4"; + regulator-min-microvolt = <2200000>; + regulator-max-microvolt = <2200000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo5_reg: ldo5 { + regulator-name = "ldo5"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo6_reg: ldo6 { + regulator-name = "ldo6"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo7_reg: ldo7 { + regulator-name = "ldo7"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo8_reg: ldo8 { + regulator-name = "ldo8"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo9_reg: ldo9 { + regulator-name = "ldo9"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldoln_reg: ldoln { + regulator-name = "ldoln"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldousb_reg: ldousb { + regulator-name = "ldousb"; + regulator-min-microvolt = <3250000>; + regulator-max-microvolt = <3250000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; +}; + +&i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_pins>; + + clock-frequency = <400000>; +}; + +&mcbsp3 { + status = "disabled"; +}; + +&usbhshost { + port2-mode = "ehci-hsic"; + port3-mode = "ehci-hsic"; +}; + +&usbhsehci { + phys = <0 &hsusb2_phy &hsusb3_phy>; +}; + +&mcspi1 { + +}; + +&mcspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&mcspi2_pins>; +}; + +&mcspi3 { + pinctrl-names = "default"; + pinctrl-0 = <&mcspi3_pins>; +}; + +&mcspi4 { + pinctrl-names = "default"; + pinctrl-0 = <&mcspi4_pins>; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; +}; + +&uart5 { + pinctrl-names = "default"; + pinctrl-0 = <&uart5_pins>; +}; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 9e8083ff6cd2..e643620417a9 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -7,15 +7,11 @@ * Based on "omap4.dtsi" */ -/* - * Carveout for multimedia usecases - * It should be the last 48MB of the first 512MB memory part - * In theory, it should not even exist. That zone should be reserved - * dynamically during the .reserve callback. - */ -/memreserve/ 0x9d000000 0x03000000; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/pinctrl/omap.h> -/include/ "skeleton.dtsi" +#include "skeleton.dtsi" / { #address-cells = <1>; @@ -51,11 +47,11 @@ timer { compatible = "arm,armv7-timer"; - /* PPI secure/nonsecure IRQ, active low level-sensitive */ - interrupts = <1 13 0x308>, - <1 14 0x308>, - <1 11 0x308>, - <1 10 0x308>; + /* PPI secure/nonsecure IRQ */ + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>; clock-frequency = <6144000>; }; @@ -97,8 +93,8 @@ reg = <0x44000000 0x2000>, <0x44800000 0x3000>, <0x45000000 0x4000>; - interrupts = <0 9 0x4>, - <0 10 0x4>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; counter32k: counter@4ae04000 { compatible = "ti,omap-counter32k"; @@ -126,10 +122,10 @@ sdma: dma-controller@4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>; - interrupts = <0 12 0x4>, - <0 13 0x4>, - <0 14 0x4>, - <0 15 0x4>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; #dma-channels = <32>; #dma-requests = <127>; @@ -138,7 +134,7 @@ gpio1: gpio@4ae10000 { compatible = "ti,omap4-gpio"; reg = <0x4ae10000 0x200>; - interrupts = <0 29 0x4>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio1"; ti,gpio-always-on; gpio-controller; @@ -150,7 +146,7 @@ gpio2: gpio@48055000 { compatible = "ti,omap4-gpio"; reg = <0x48055000 0x200>; - interrupts = <0 30 0x4>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -161,7 +157,7 @@ gpio3: gpio@48057000 { compatible = "ti,omap4-gpio"; reg = <0x48057000 0x200>; - interrupts = <0 31 0x4>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -172,7 +168,7 @@ gpio4: gpio@48059000 { compatible = "ti,omap4-gpio"; reg = <0x48059000 0x200>; - interrupts = <0 32 0x4>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -183,7 +179,7 @@ gpio5: gpio@4805b000 { compatible = "ti,omap4-gpio"; reg = <0x4805b000 0x200>; - interrupts = <0 33 0x4>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -194,7 +190,7 @@ gpio6: gpio@4805d000 { compatible = "ti,omap4-gpio"; reg = <0x4805d000 0x200>; - interrupts = <0 34 0x4>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -205,7 +201,7 @@ gpio7: gpio@48051000 { compatible = "ti,omap4-gpio"; reg = <0x48051000 0x200>; - interrupts = <0 35 0x4>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio7"; gpio-controller; #gpio-cells = <2>; @@ -216,7 +212,7 @@ gpio8: gpio@48053000 { compatible = "ti,omap4-gpio"; reg = <0x48053000 0x200>; - interrupts = <0 121 0x4>; + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio8"; gpio-controller; #gpio-cells = <2>; @@ -229,7 +225,7 @@ reg = <0x50000000 0x1000>; #address-cells = <2>; #size-cells = <1>; - interrupts = <0 20 0x4>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; gpmc,num-cs = <8>; gpmc,num-waitpins = <4>; ti,hwmods = "gpmc"; @@ -238,7 +234,7 @@ i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; - interrupts = <0 56 0x4>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -247,7 +243,7 @@ i2c2: i2c@48072000 { compatible = "ti,omap4-i2c"; reg = <0x48072000 0x100>; - interrupts = <0 57 0x4>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -256,7 +252,7 @@ i2c3: i2c@48060000 { compatible = "ti,omap4-i2c"; reg = <0x48060000 0x100>; - interrupts = <0 61 0x4>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; @@ -265,7 +261,7 @@ i2c4: i2c@4807a000 { compatible = "ti,omap4-i2c"; reg = <0x4807a000 0x100>; - interrupts = <0 62 0x4>; + interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; @@ -274,7 +270,7 @@ i2c5: i2c@4807c000 { compatible = "ti,omap4-i2c"; reg = <0x4807c000 0x100>; - interrupts = <0 60 0x4>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c5"; @@ -283,7 +279,7 @@ mcspi1: spi@48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; - interrupts = <0 65 0x4>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi1"; @@ -303,7 +299,7 @@ mcspi2: spi@4809a000 { compatible = "ti,omap4-mcspi"; reg = <0x4809a000 0x200>; - interrupts = <0 66 0x4>; + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi2"; @@ -318,7 +314,7 @@ mcspi3: spi@480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; - interrupts = <0 91 0x4>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi3"; @@ -330,7 +326,7 @@ mcspi4: spi@480ba000 { compatible = "ti,omap4-mcspi"; reg = <0x480ba000 0x200>; - interrupts = <0 48 0x4>; + interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi4"; @@ -342,7 +338,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = <0 72 0x4>; + interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; clock-frequency = <48000000>; }; @@ -350,7 +346,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = <0 73 0x4>; + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; clock-frequency = <48000000>; }; @@ -358,7 +354,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = <0 74 0x4>; + interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; clock-frequency = <48000000>; }; @@ -366,7 +362,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = <0 70 0x4>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; clock-frequency = <48000000>; }; @@ -374,7 +370,7 @@ uart5: serial@48066000 { compatible = "ti,omap4-uart"; reg = <0x48066000 0x100>; - interrupts = <0 105 0x4>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart5"; clock-frequency = <48000000>; }; @@ -382,7 +378,7 @@ uart6: serial@48068000 { compatible = "ti,omap4-uart"; reg = <0x48068000 0x100>; - interrupts = <0 106 0x4>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart6"; clock-frequency = <48000000>; }; @@ -390,7 +386,7 @@ mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; - interrupts = <0 83 0x4>; + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -401,7 +397,7 @@ mmc2: mmc@480b4000 { compatible = "ti,omap4-hsmmc"; reg = <0x480b4000 0x400>; - interrupts = <0 86 0x4>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc2"; ti,needs-special-reset; dmas = <&sdma 47>, <&sdma 48>; @@ -411,7 +407,7 @@ mmc3: mmc@480ad000 { compatible = "ti,omap4-hsmmc"; reg = <0x480ad000 0x400>; - interrupts = <0 94 0x4>; + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc3"; ti,needs-special-reset; dmas = <&sdma 77>, <&sdma 78>; @@ -421,7 +417,7 @@ mmc4: mmc@480d1000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d1000 0x400>; - interrupts = <0 96 0x4>; + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc4"; ti,needs-special-reset; dmas = <&sdma 57>, <&sdma 58>; @@ -431,7 +427,7 @@ mmc5: mmc@480d5000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d5000 0x400>; - interrupts = <0 59 0x4>; + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc5"; ti,needs-special-reset; dmas = <&sdma 59>, <&sdma 60>; @@ -449,7 +445,7 @@ reg = <0x40132000 0x7f>, /* MPU private access */ <0x49032000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 112 0x4>; + interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mcpdm"; dmas = <&sdma 65>, <&sdma 66>; @@ -461,7 +457,7 @@ reg = <0x4012e000 0x7f>, /* MPU private access */ <0x4902e000 0x7f>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 114 0x4>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "dmic"; dmas = <&sdma 67>; dma-names = "up_link"; @@ -472,7 +468,7 @@ reg = <0x40122000 0xff>, /* MPU private access */ <0x49022000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 17 0x4>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp1"; @@ -486,7 +482,7 @@ reg = <0x40124000 0xff>, /* MPU private access */ <0x49024000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 22 0x4>; + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp2"; @@ -500,7 +496,7 @@ reg = <0x40126000 0xff>, /* MPU private access */ <0x49026000 0xff>; /* L3 Interconnect */ reg-names = "mpu", "dma"; - interrupts = <0 23 0x4>; + interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "common"; ti,buffer-size = <128>; ti,hwmods = "mcbsp3"; @@ -512,7 +508,7 @@ timer1: timer@4ae18000 { compatible = "ti,omap5430-timer"; reg = <0x4ae18000 0x80>; - interrupts = <0 37 0x4>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer1"; ti,timer-alwon; }; @@ -520,21 +516,21 @@ timer2: timer@48032000 { compatible = "ti,omap5430-timer"; reg = <0x48032000 0x80>; - interrupts = <0 38 0x4>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer2"; }; timer3: timer@48034000 { compatible = "ti,omap5430-timer"; reg = <0x48034000 0x80>; - interrupts = <0 39 0x4>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer3"; }; timer4: timer@48036000 { compatible = "ti,omap5430-timer"; reg = <0x48036000 0x80>; - interrupts = <0 40 0x4>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer4"; }; @@ -542,7 +538,7 @@ compatible = "ti,omap5430-timer"; reg = <0x40138000 0x80>, <0x49038000 0x80>; - interrupts = <0 41 0x4>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer5"; ti,timer-dsp; ti,timer-pwm; @@ -552,7 +548,7 @@ compatible = "ti,omap5430-timer"; reg = <0x4013a000 0x80>, <0x4903a000 0x80>; - interrupts = <0 42 0x4>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer6"; ti,timer-dsp; ti,timer-pwm; @@ -562,7 +558,7 @@ compatible = "ti,omap5430-timer"; reg = <0x4013c000 0x80>, <0x4903c000 0x80>; - interrupts = <0 43 0x4>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer7"; ti,timer-dsp; }; @@ -571,7 +567,7 @@ compatible = "ti,omap5430-timer"; reg = <0x4013e000 0x80>, <0x4903e000 0x80>; - interrupts = <0 44 0x4>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer8"; ti,timer-dsp; ti,timer-pwm; @@ -580,7 +576,7 @@ timer9: timer@4803e000 { compatible = "ti,omap5430-timer"; reg = <0x4803e000 0x80>; - interrupts = <0 45 0x4>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer9"; ti,timer-pwm; }; @@ -588,7 +584,7 @@ timer10: timer@48086000 { compatible = "ti,omap5430-timer"; reg = <0x48086000 0x80>; - interrupts = <0 46 0x4>; + interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer10"; ti,timer-pwm; }; @@ -596,7 +592,7 @@ timer11: timer@48088000 { compatible = "ti,omap5430-timer"; reg = <0x48088000 0x80>; - interrupts = <0 47 0x4>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer11"; ti,timer-pwm; }; @@ -604,7 +600,7 @@ wdt2: wdt@4ae14000 { compatible = "ti,omap5-wdt", "ti,omap3-wdt"; reg = <0x4ae14000 0x80>; - interrupts = <0 80 0x4>; + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "wd_timer2"; }; @@ -613,7 +609,7 @@ ti,hwmods = "emif1"; phy-type = <2>; /* DDR PHY type: Intelli PHY */ reg = <0x4c000000 0x400>; - interrupts = <0 110 0x4>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; hw-caps-read-idle-ctrl; hw-caps-ll-interface; hw-caps-temp-alert; @@ -624,7 +620,7 @@ ti,hwmods = "emif2"; phy-type = <2>; /* DDR PHY type: Intelli PHY */ reg = <0x4d000000 0x400>; - interrupts = <0 111 0x4>; + interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; hw-caps-read-idle-ctrl; hw-caps-ll-interface; hw-caps-temp-alert; @@ -642,7 +638,7 @@ compatible = "ti,dwc3"; ti,hwmods = "usb_otg_ss"; reg = <0x4a020000 0x1000>; - interrupts = <0 93 4>; + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <1>; utmi-mode = <2>; @@ -650,7 +646,7 @@ dwc3@4a030000 { compatible = "synopsys,dwc3"; reg = <0x4a030000 0x1000>; - interrupts = <0 92 4>; + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; usb-phy = <&usb2_phy>, <&usb3_phy>; tx-fifo-resize; }; @@ -677,5 +673,44 @@ ctrl-module = <&omap_control_usb>; }; }; + + usbhstll: usbhstll@4a062000 { + compatible = "ti,usbhs-tll"; + reg = <0x4a062000 0x1000>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; + ti,hwmods = "usb_tll_hs"; + }; + + usbhshost: usbhshost@4a064000 { + compatible = "ti,usbhs-host"; + reg = <0x4a064000 0x800>; + ti,hwmods = "usb_host_hs"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + usbhsohci: ohci@4a064800 { + compatible = "ti,ohci-omap3", "usb-ohci"; + reg = <0x4a064800 0x400>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + }; + + usbhsehci: ehci@4a064c00 { + compatible = "ti,ehci-omap", "usb-ehci"; + reg = <0x4a064c00 0x400>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + bandgap@4a0021e0 { + reg = <0x4a0021e0 0xc + 0x4a00232c 0xc + 0x4a002380 0x2c + 0x4a0023C0 0x3c>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + compatible = "ti,omap5430-bandgap"; + }; }; }; diff --git a/arch/arm/boot/dts/twl4030_omap3.dtsi b/arch/arm/boot/dts/twl4030_omap3.dtsi new file mode 100644 index 000000000000..c353ef0a6ac7 --- /dev/null +++ b/arch/arm/boot/dts/twl4030_omap3.dtsi @@ -0,0 +1,25 @@ +/* + * Copyright (C) 2013 Linaro, Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&twl { + pinctrl-names = "default"; + pinctrl-0 = <&twl4030_pins>; +}; + +&omap3_pmx_core { + /* + * On most OMAP3 platforms, the twl4030 IRQ line is connected + * to the SYS_NIRQ line on OMAP. Therefore, configure the + * defaults for the SYS_NIRQ pin here. + */ + twl4030_pins: pinmux_twl4030_pins { + pinctrl-single,pins = < + 0x1b0 (PIN_INPUT_PULLUP | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* sys_nirq.sys_nirq */ + >; + }; +}; diff --git a/arch/arm/mach-omap2/cclock33xx_data.c b/arch/arm/mach-omap2/cclock33xx_data.c index af3544ce4f02..a8140b6885e3 100644 --- a/arch/arm/mach-omap2/cclock33xx_data.c +++ b/arch/arm/mach-omap2/cclock33xx_data.c @@ -431,15 +431,11 @@ DEFINE_STRUCT_CLK(aes0_fck, dpll_core_ck_parents, clk_ops_null); * - Driver code is not yet migrated to use hwmod/runtime pm * - Modules outside kernel access (to disable them by default) * - * - debugss * - mmu (gfx domain) * - cefuse * - usbotg_fck (its additional clock and not really a modulemode) * - ieee5000 */ -DEFINE_CLK_GATE(debugss_ick, "dpll_core_m4_ck", &dpll_core_m4_ck, 0x0, - AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, AM33XX_MODULEMODE_SWCTRL_SHIFT, - 0x0, NULL); DEFINE_CLK_GATE(mmu_fck, "dpll_core_m4_ck", &dpll_core_m4_ck, 0x0, AM33XX_CM_GFX_MMUDATA_CLKCTRL, AM33XX_MODULEMODE_SWCTRL_SHIFT, @@ -863,6 +859,42 @@ static struct clk_hw_omap wdt1_fck_hw = { DEFINE_STRUCT_CLK(wdt1_fck, wdt_ck_parents, gpio_fck_ops); /* + * debugss optional clocks + */ +DEFINE_CLK_GATE(dbg_sysclk_ck, "sys_clkin_ck", &sys_clkin_ck, + 0x0, AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_OPTFCLKEN_DBGSYSCLK_SHIFT, 0x0, NULL); + +DEFINE_CLK_GATE(dbg_clka_ck, "dpll_core_m4_ck", &dpll_core_m4_ck, + 0x0, AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_OPTCLK_DEBUG_CLKA_SHIFT, 0x0, NULL); + +static const char *stm_pmd_clock_mux_ck_parents[] = { + "dbg_sysclk_ck", "dbg_clka_ck", +}; + +DEFINE_CLK_MUX(stm_pmd_clock_mux_ck, stm_pmd_clock_mux_ck_parents, NULL, 0x0, + AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, AM33XX_STM_PMD_CLKSEL_SHIFT, + AM33XX_STM_PMD_CLKSEL_WIDTH, 0x0, NULL); + +DEFINE_CLK_MUX(trace_pmd_clk_mux_ck, stm_pmd_clock_mux_ck_parents, NULL, 0x0, + AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_TRC_PMD_CLKSEL_SHIFT, + AM33XX_TRC_PMD_CLKSEL_WIDTH, 0x0, NULL); + +DEFINE_CLK_DIVIDER(stm_clk_div_ck, "stm_pmd_clock_mux_ck", + &stm_pmd_clock_mux_ck, 0x0, AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_STM_PMD_CLKDIVSEL_SHIFT, + AM33XX_STM_PMD_CLKDIVSEL_WIDTH, CLK_DIVIDER_POWER_OF_TWO, + NULL); + +DEFINE_CLK_DIVIDER(trace_clk_div_ck, "trace_pmd_clk_mux_ck", + &trace_pmd_clk_mux_ck, 0x0, AM33XX_CM_WKUP_DEBUGSS_CLKCTRL, + AM33XX_TRC_PMD_CLKDIVSEL_SHIFT, + AM33XX_TRC_PMD_CLKDIVSEL_WIDTH, CLK_DIVIDER_POWER_OF_TWO, + NULL); + +/* * clkdev */ static struct omap_clk am33xx_clks[] = { @@ -899,7 +931,6 @@ static struct omap_clk am33xx_clks[] = { CLK("481cc000.d_can", NULL, &dcan0_fck), CLK(NULL, "dcan1_fck", &dcan1_fck), CLK("481d0000.d_can", NULL, &dcan1_fck), - CLK(NULL, "debugss_ick", &debugss_ick), CLK(NULL, "pruss_ocp_gclk", &pruss_ocp_gclk), CLK(NULL, "mcasp0_fck", &mcasp0_fck), CLK(NULL, "mcasp1_fck", &mcasp1_fck), @@ -942,6 +973,13 @@ static struct omap_clk am33xx_clks[] = { CLK(NULL, "clkout2_div_ck", &clkout2_div_ck), CLK(NULL, "timer_32k_ck", &clkdiv32k_ick), CLK(NULL, "timer_sys_ck", &sys_clkin_ck), + CLK(NULL, "dbg_sysclk_ck", &dbg_sysclk_ck), + CLK(NULL, "dbg_clka_ck", &dbg_clka_ck), + CLK(NULL, "stm_pmd_clock_mux_ck", &stm_pmd_clock_mux_ck), + CLK(NULL, "trace_pmd_clk_mux_ck", &trace_pmd_clk_mux_ck), + CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck), + CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck), + CLK(NULL, "clkout2_ck", &clkout2_ck), }; @@ -952,6 +990,7 @@ static const char *enable_init_clks[] = { "l4hs_gclk", "l4fw_gclk", "l4ls_gclk", + "clkout2_ck", /* Required for external peripherals like, Audio codecs */ }; int __init am33xx_clk_init(void) diff --git a/include/dt-bindings/pinctrl/am33xx.h b/include/dt-bindings/pinctrl/am33xx.h new file mode 100644 index 000000000000..469e0325e6f4 --- /dev/null +++ b/include/dt-bindings/pinctrl/am33xx.h @@ -0,0 +1,42 @@ +/* + * This header provides constants specific to AM33XX pinctrl bindings. + */ + +#ifndef _DT_BINDINGS_PINCTRL_AM33XX_H +#define _DT_BINDINGS_PINCTRL_AM33XX_H + +#include <include/dt-bindings/pinctrl/omap.h> + +/* am33xx specific mux bit defines */ +#undef PULL_ENA +#undef INPUT_EN + +#define PULL_DISABLE (1 << 3) +#define INPUT_EN (1 << 5) +#define SLEWCTRL_FAST (1 << 6) + +/* update macro depending on INPUT_EN and PULL_ENA */ +#undef PIN_OUTPUT +#undef PIN_OUTPUT_PULLUP +#undef PIN_OUTPUT_PULLDOWN +#undef PIN_INPUT +#undef PIN_INPUT_PULLUP +#undef PIN_INPUT_PULLDOWN + +#define PIN_OUTPUT (PULL_DISABLE) +#define PIN_OUTPUT_PULLUP (PULL_UP) +#define PIN_OUTPUT_PULLDOWN 0 +#define PIN_INPUT (INPUT_EN | PULL_DISABLE) +#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (INPUT_EN) + +/* undef non-existing modes */ +#undef PIN_OFF_NONE +#undef PIN_OFF_OUTPUT_HIGH +#undef PIN_OFF_OUTPUT_LOW +#undef PIN_OFF_INPUT_PULLUP +#undef PIN_OFF_INPUT_PULLDOWN +#undef PIN_OFF_WAKEUPENABLE + +#endif + diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h new file mode 100644 index 000000000000..edbd250809cb --- /dev/null +++ b/include/dt-bindings/pinctrl/omap.h @@ -0,0 +1,55 @@ +/* + * This header provides constants for OMAP pinctrl bindings. + * + * Copyright (C) 2009 Nokia + * Copyright (C) 2009-2010 Texas Instruments + */ + +#ifndef _DT_BINDINGS_PINCTRL_OMAP_H +#define _DT_BINDINGS_PINCTRL_OMAP_H + +/* 34xx mux mode options for each pin. See TRM for options */ +#define MUX_MODE0 0 +#define MUX_MODE1 1 +#define MUX_MODE2 2 +#define MUX_MODE3 3 +#define MUX_MODE4 4 +#define MUX_MODE5 5 +#define MUX_MODE6 6 +#define MUX_MODE7 7 + +/* 24xx/34xx mux bit defines */ +#define PULL_ENA (1 << 3) +#define PULL_UP (1 << 4) +#define ALTELECTRICALSEL (1 << 5) + +/* 34xx specific mux bit defines */ +#define INPUT_EN (1 << 8) +#define OFF_EN (1 << 9) +#define OFFOUT_EN (1 << 10) +#define OFFOUT_VAL (1 << 11) +#define OFF_PULL_EN (1 << 12) +#define OFF_PULL_UP (1 << 13) +#define WAKEUP_EN (1 << 14) + +/* 44xx specific mux bit defines */ +#define WAKEUP_EVENT (1 << 15) + +/* Active pin states */ +#define PIN_OUTPUT 0 +#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP) +#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA) +#define PIN_INPUT INPUT_EN +#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP) +#define PIN_INPUT_PULLDOWN (PULL_ENA | INPUT_EN) + +/* Off mode states */ +#define PIN_OFF_NONE 0 +#define PIN_OFF_OUTPUT_HIGH (OFF_EN | OFFOUT_EN | OFFOUT_VAL) +#define PIN_OFF_OUTPUT_LOW (OFF_EN | OFFOUT_EN) +#define PIN_OFF_INPUT_PULLUP (OFF_EN | OFF_PULL_EN | OFF_PULL_UP) +#define PIN_OFF_INPUT_PULLDOWN (OFF_EN | OFF_PULL_EN) +#define PIN_OFF_WAKEUPENABLE WAKEUP_EN + +#endif + |