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author | Olof Johansson <olof@lixom.net> | 2014-05-26 11:14:36 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2014-05-26 11:15:53 -0700 |
commit | e1dc566f43fe2540ad085b1410cc130a06f69557 (patch) | |
tree | f146a6f6515e692034911d134d9d239f94ee5c6a | |
parent | 26ab69cb4c1f77060bece483f2ec210163867782 (diff) | |
download | linux-e1dc566f43fe2540ad085b1410cc130a06f69557.tar.bz2 |
Documentation: devicetree: arm: sort enable-method entries
People have appended new entries instead of inserting them at
the right location, so sort them.
Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r-- | Documentation/devicetree/bindings/arm/cpus.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index dffcac81f841..1fe72a0778cd 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt @@ -178,18 +178,18 @@ nodes to be present and contain the properties described below. Usage and definition depend on ARM architecture version. # On ARM v8 64-bit this property is required and must be one of: - "spin-table" "psci" + "spin-table" # On ARM 32-bit systems this property is optional and can be one of: - "arm,psci" "allwinner,sun6i-a31" - "qcom,gcc-msm8660" - "qcom,kpss-acc-v1" - "qcom,kpss-acc-v2" + "arm,psci" "marvell,armada-375-smp" "marvell,armada-380-smp" "marvell,armada-xp-smp" + "qcom,gcc-msm8660" + "qcom,kpss-acc-v1" + "qcom,kpss-acc-v2" "rockchip,rk3066-smp" - cpu-release-addr |