diff options
| author | Qii Wang <qii.wang@mediatek.com> | 2020-10-30 19:58:01 +0800 |
|---|---|---|
| committer | Wolfram Sang <wsa@kernel.org> | 2020-11-03 22:13:10 +0100 |
| commit | aafced673c06b7c77040c1df42e2e965be5d0376 (patch) | |
| tree | bbbe81b97ed9cbbae60e13a82da46750380d9a28 | |
| parent | 3cea11cd5e3b00d91caf0b4730194039b45c5891 (diff) | |
| download | linux-aafced673c06b7c77040c1df42e2e965be5d0376.tar.bz2 | |
i2c: mediatek: move dma reset before i2c reset
The i2c driver default do dma reset after i2c reset, but sometimes
i2c reset will trigger dma tx2rx, then apdma write data to dram
which has been i2c_put_dma_safe_msg_buf(kfree). Move dma reset
before i2c reset in mtk_i2c_init_hw to fix it.
Signed-off-by: Qii Wang <qii.wang@mediatek.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
| -rw-r--r-- | drivers/i2c/busses/i2c-mt65xx.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/i2c/busses/i2c-mt65xx.c b/drivers/i2c/busses/i2c-mt65xx.c index 0cbdfbe605b5..33de99b7bc20 100644 --- a/drivers/i2c/busses/i2c-mt65xx.c +++ b/drivers/i2c/busses/i2c-mt65xx.c @@ -475,6 +475,10 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c) { u16 control_reg; + writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST); + udelay(50); + writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); + mtk_i2c_writew(i2c, I2C_SOFT_RST, OFFSET_SOFTRESET); /* Set ioconfig */ @@ -529,10 +533,6 @@ static void mtk_i2c_init_hw(struct mtk_i2c *i2c) mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL); mtk_i2c_writew(i2c, I2C_DELAY_LEN, OFFSET_DELAY_LEN); - - writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST); - udelay(50); - writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); } static const struct i2c_spec_values *mtk_i2c_get_spec(unsigned int speed) |