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<title>linux/drivers/phy, branch v6.2-rc4</title>
<subtitle>Linux Kernel (branches are rebased on master from time to time)</subtitle>
<id>https://sre.ring0.de/linux/atom?h=v6.2-rc4</id>
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<updated>2022-12-19T14:40:58Z</updated>
<entry>
<title>Merge tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy</title>
<updated>2022-12-19T14:40:58Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-12-19T14:40:58Z</published>
<link rel='alternate' type='text/html' href='https://sre.ring0.de/linux/commit/?id=e79041113b19b8c7b8410d862d4a3630debded58'/>
<id>urn:sha1:e79041113b19b8c7b8410d862d4a3630debded58</id>
<content type='text'>
Pull phy updates from Vinod Koul:
 "This tme we have again a big pile of qcom-qmp-* changes, one new
  driver and bunch of new hardware support.

  New hardware support:

   - Allwinner H616 USB PHY and A100 DPHY support

   - TI J721s2, J784s4 and J721e support

   - Freescale i.MX8MP PCIe PHY support

   - New driver for Renesas Ethernet SERDES supporting R-Car S4-8

   - Qualcomm SM8450 PCIe1 PHY support in EP mode

   - Qualcomm SC8280XP PCIe PHY support (including x4 mode)

   - Fixed Qualcomm SC8280XP USB4-USB3-DP PHY DT bindings

  Updates:

   - A big pile of updates on qcom-qmp-* drivers following the driver
     split and reorganization merged earlier

   - Phy order of API calls documentation update"

* tag 'phy-for-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (174 commits)
  phy: ti: phy-j721e-wiz: add j721s2-wiz-10g module support
  dt-bindings: phy-j721e-wiz: add j721s2 compatible string
  phy: use devm_platform_get_and_ioremap_resource()
  phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant
  phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hook
  phy: allwinner: phy-sun6i-mipi-dphy: Set the enable bit last
  phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optional
  dt-bindings: sun6i-a31-mipi-dphy: Add the A100 DPHY variant
  dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts property
  phy: qcom-qmp-pcie: drop redundant clock allocation
  phy: qcom-qmp-usb: drop redundant clock allocation
  phy: qcom-qmp: drop unused type header
  phy: qcom-qmp-usb: drop sc8280xp reference-clock source
  dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: drop reference-clock source
  phy: qcom-qmp-combo: add support for updated sc8280xp binding
  phy: qcom-qmp-combo: rename DP_PHY register pointer
  phy: qcom-qmp-combo: rename common-register pointers
  phy: qcom-qmp-combo: clean up DP clock callbacks
  phy: qcom-qmp-combo: separate clock and provider registration
  phy: qcom-qmp-combo: add clock registration helper
  ...
</content>
</entry>
<entry>
<title>Merge tag 'media/v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media</title>
<updated>2022-12-13T19:36:58Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2022-12-13T19:36:58Z</published>
<link rel='alternate' type='text/html' href='https://sre.ring0.de/linux/commit/?id=cdb9d3537711939e4d8fd0de2889c966f88346eb'/>
<id>urn:sha1:cdb9d3537711939e4d8fd0de2889c966f88346eb</id>
<content type='text'>
Pull media updates from Mauro Carvalho Chehab:

 - DVB core changes to avoid refcount troubles and UAF

 - DVB API/core has gained support for DVB-C2 and DVB-S2X

 - New sensor drivers: ov08x40, ov4689.c, st-vgxy61 and tc358746.c

 - Removal of an unused sensor driver: s5k4ecgx

 - Move microchip_csi2dc to a new directory, named after the
   manufacturer

 - Add media controller support to Microship drivers

 - Old Atmel/Microship drivers that don't use media controler got moved
   to staging

 - New drivers added for Renesas RZ/G2L CRU and MIPI CSI-2 support

 - Allwinner A31 camera sensor driver code was now split into a bridge
   and a separate processor driver

 - Added a virtual stateless decoder driver in order to test core
   support for stateless drivers and test userspace apps using it

 - removed platform-based support for ov9650, as this is not used
   anymore

 - atomisp now uses videobuf2 and supports normal mmap mode

 - the imx7-media-csi driver got promoted from staging

 - rcar-vin driver has gained support for gen3 UDS (Up Down Scaler)

 - most i2c drivers now use I2C .probe_new() kAPI

 - lots of drivers fixes, cleanups and improvements

* tag 'media/v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (544 commits)
  media: s5c73m3: Switch to GPIO descriptors
  media: i2c: s5k5baf: switch to using gpiod API
  media: i2c: s5k6a3: switch to using gpiod API
  media: imx: remove code for non-existing config IMX_GPT_ICAP
  media: si470x: Fix use-after-free in si470x_int_in_callback()
  media: staging: stkwebcam: Restore MEDIA_{USB,CAMERA}_SUPPORT dependencies
  media: coda: Add check for kmalloc
  media: coda: Add check for dcoda_iram_alloc
  dt-bindings: media: s5c73m3: Fix reset-gpio descriptor
  media: dt-bindings: allwinner: h6-vpu-g2: Add IOMMU reference property
  media: s5k4ecgx: Delete driver
  media: s5k4ecgx: Switch to GPIO descriptors
  media: Switch to use dev_err_probe() helper
  headers: Remove some left-over license text in include/uapi/linux/v4l2-*
  headers: Remove some left-over license text in include/uapi/linux/dvb/
  media: usb: pwc-uncompress: Use flex array destination for memcpy()
  media: s5p-mfc: Fix to handle reference queue during finishing
  media: s5p-mfc: Clear workbit to handle error condition
  media: s5p-mfc: Fix in register read and write for H264
  media: imx: Use get_mbus_config instead of parsing upstream DT endpoints
  ...
</content>
</entry>
<entry>
<title>phy: ti: phy-j721e-wiz: add j721s2-wiz-10g module support</title>
<updated>2022-11-24T18:11:41Z</updated>
<author>
<name>Matt Ranostay</name>
<email>mranostay@ti.com</email>
</author>
<published>2022-11-23T03:24:13Z</published>
<link rel='alternate' type='text/html' href='https://sre.ring0.de/linux/commit/?id=bea3ce759b4664f20f1f57c53fe018c3b67da147'/>
<id>urn:sha1:bea3ce759b4664f20f1f57c53fe018c3b67da147</id>
<content type='text'>
Add support for j721s2-wiz-10g device which is similar to j721e-wiz-10g but
uses clock-names interface versus explicitly defining clock nodes within
device tree node.

Signed-off-by: Matt Ranostay &lt;mranostay@ti.com&gt;
Reviewed-by: Roger Quadros &lt;rogerq@kernel.org&gt;
Link: https://lore.kernel.org/r/20221123032413.1193961-3-mranostay@ti.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: use devm_platform_get_and_ioremap_resource()</title>
<updated>2022-11-24T17:53:07Z</updated>
<author>
<name>Minghao Chi</name>
<email>chi.minghao@zte.com.cn</email>
</author>
<published>2022-11-17T06:11:43Z</published>
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<id>urn:sha1:b53e19799d45edf7ca7cfd0cf5d6fb2d5179edec</id>
<content type='text'>
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Minghao Chi &lt;chi.minghao@zte.com.cn&gt;
Signed-off-by: ye xingchen &lt;ye.xingchen@zte.com.cn&gt;
Link: https://lore.kernel.org/r/202211171411439883050@zte.com.cn
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant</title>
<updated>2022-11-24T17:34:24Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-11-14T02:21:13Z</published>
<link rel='alternate' type='text/html' href='https://sre.ring0.de/linux/commit/?id=4d0c2165e64eec00c19b68b1abc83e57e9633db9'/>
<id>urn:sha1:4d0c2165e64eec00c19b68b1abc83e57e9633db9</id>
<content type='text'>
A100 features an updated DPHY, which moves PLL control inside the DPHY
register space (previously the PLL was controlled from the CCU). It also
requires a modified analog power-on sequence. This "combo PHY" can also
be used as an LVDS PHY, but that is not yet supported by the driver.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Link: https://lore.kernel.org/r/20221114022113.31694-9-samuel@sholland.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: allwinner: phy-sun6i-mipi-dphy: Add a variant power-on hook</title>
<updated>2022-11-24T17:34:24Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-11-14T02:21:12Z</published>
<link rel='alternate' type='text/html' href='https://sre.ring0.de/linux/commit/?id=3fd490a7197857dc3aa409e56e31deaeab097c5f'/>
<id>urn:sha1:3fd490a7197857dc3aa409e56e31deaeab097c5f</id>
<content type='text'>
The A100 variant uses the same values for the timing registers, and it
uses the same final power-on sequence, but it needs a different analog
register configuration in the middle. Support this by moving the
variant-specific parts to a hook provided by the variant.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Link: https://lore.kernel.org/r/20221114022113.31694-8-samuel@sholland.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: allwinner: phy-sun6i-mipi-dphy: Set the enable bit last</title>
<updated>2022-11-24T17:34:23Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-11-14T02:21:11Z</published>
<link rel='alternate' type='text/html' href='https://sre.ring0.de/linux/commit/?id=cb7f49a31597066b25c9bc6a0bf0781454dd4d2b'/>
<id>urn:sha1:cb7f49a31597066b25c9bc6a0bf0781454dd4d2b</id>
<content type='text'>
The A100 variant of the DPHY requires configuring the analog registers
before setting the global enable bit. Since this order also works on the
other variants, always use it, to minimize the differences between them.

Reviewed-by: Paul Kocialkowski &lt;paul.kocialkowski@bootlin.com&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Link: https://lore.kernel.org/r/20221114022113.31694-7-samuel@sholland.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: allwinner: phy-sun6i-mipi-dphy: Make RX support optional</title>
<updated>2022-11-24T17:34:23Z</updated>
<author>
<name>Samuel Holland</name>
<email>samuel@sholland.org</email>
</author>
<published>2022-11-14T02:21:10Z</published>
<link rel='alternate' type='text/html' href='https://sre.ring0.de/linux/commit/?id=a709ae51e22802822de85ec7b672cf1cc5412fc0'/>
<id>urn:sha1:a709ae51e22802822de85ec7b672cf1cc5412fc0</id>
<content type='text'>
While all variants of the DPHY likely support RX mode, the new variant
in the A100 is not used in this direction by the BSP, and it has some
analog register changes, so its RX power-on sequence is unknown. To be
safe, limit RX support to variants where the power-on sequence is known.

Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Link: https://lore.kernel.org/r/20221114022113.31694-6-samuel@sholland.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp-pcie: drop redundant clock allocation</title>
<updated>2022-11-24T17:25:17Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-11-11T09:42:39Z</published>
<link rel='alternate' type='text/html' href='https://sre.ring0.de/linux/commit/?id=e8511f407b078330dfcca0c7200e72b7638b6e17'/>
<id>urn:sha1:e8511f407b078330dfcca0c7200e72b7638b6e17</id>
<content type='text'>
Since the QMP driver split, there is no reason to allocate the
fixed-rate pipe clock structure separately from the driver data.

Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Link: https://lore.kernel.org/r/20221111094239.11547-4-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: qcom-qmp-usb: drop redundant clock allocation</title>
<updated>2022-11-24T17:25:17Z</updated>
<author>
<name>Johan Hovold</name>
<email>johan+linaro@kernel.org</email>
</author>
<published>2022-11-11T09:42:38Z</published>
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<id>urn:sha1:64e1f12b2658c1abca55cffd9413f2d3c3bbfa8f</id>
<content type='text'>
Since the QMP driver split, there is no reason to allocate the
fixed-rate pipe clock structure separately from the driver data.

Signed-off-by: Johan Hovold &lt;johan+linaro@kernel.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Link: https://lore.kernel.org/r/20221111094239.11547-3-johan+linaro@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
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