linux/drivers/clk/socfpga/clk.c, branch v3.18

clk: socfpga: fix clock driver for 3.15

2014-04-30T18:44:01Z

commit [1771b10d6 clk: respect the clock dependencies in of_clk_init] exposed a flaw in the socfpga clock driver and prevents the platform from booting on 3.15-rc1. Because the "altr,clk-mgr" is not really a clock, it should not be using CLK_OF_DECLARE, instead we should be mapping the clk-mgr's base address one of the functional clock init function. Use the socfpga_pll_init function to map the clk_mgr_base_addr as this clock should always be initialized first. Signed-off-by: Dinh Nguyen Tested-by: Pavel Machek

clk: socfpga: Fix section mismatch warning

2014-03-19T06:42:35Z

WARNING: drivers/clk/socfpga/built-in.o(.data+0xc0): Section mismatch in reference from the variable socfpga_child_clocks to the function .init.text:socfpga_pll_init() The variable socfpga_child_clocks references the function __init socfpga_pll_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console WARNING: drivers/clk/socfpga/built-in.o(.data+0x184): Section mismatch in reference from the variable socfpga_child_clocks to the function .init.text:socfpga_periph_init() The variable socfpga_child_clocks references the function __init socfpga_periph_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console WARNING: drivers/clk/socfpga/built-in.o(.data+0x248): Section mismatch in reference from the variable socfpga_child_clocks to the function .init.text:socfpga_gate_init() The variable socfpga_child_clocks references the function __init socfpga_gate_init() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console Reported-by: Mike Turquette Signed-off-by: Dinh Nguyen Signed-off-by: Mike Turquette

clk: socfpga: split clk code

2014-02-18T22:08:13Z

Move the different kinds of clocks into their own files. The reason is to aid readability of the code. This also goes along with the other SoC-specific clock drivers. The split introduces new structs for the three types of clocks and uses them. Other changes are not done to the code. Signed-off-by: Steffen Trumtrar Signed-off-by: Dinh Nguyen

clk: socfpga: fix define typo

2014-02-18T22:08:12Z

It should be SOCFPGA instead of SOCFGPA. Signed-off-by: Steffen Trumtrar Signed-off-by: Dinh Nguyen

clk: socfpga: remove unused field

2014-02-18T22:08:10Z

The clk_name field from the socfpga_clk struct is unused. Remove it. Signed-off-by: Steffen Trumtrar Signed-off-by: Dinh Nguyen

clk: socfpga: Remove socfpga_init_clocks

2014-02-18T22:08:09Z

The only thing that socfpga_init_clocks was doing is setting up the smp_twd clk. Now that twd-timer's clock phandle is populated in the DTS, we can remove this function. Signed-off-by: Dinh Nguyen Acked-by: Arnd Bergmann

clk: socfpga: Look for the GPIO_DB_CLK by its offset

2014-02-18T22:08:08Z

After the patch: "clk: socfpga: Map the clk manager base address in the clock driver" The clk->name field in socfpga_clk_recalc_rate() was getting cleared. Replace looking for the GPIO_DB_CLK by its divider offset instead. Also rename the define SOCFPGA_DB_CLK_OFFSET -> SOCFPGA_GPIO_DB_CLK_OFFSET, as this represents the GPIO_DB_CLK. Signed-off-by: Dinh Nguyen

clk: socfpga: Map the clk manager base address in the clock driver

2014-02-18T22:08:07Z

The clk manager's base address was being mapped in SOCFPGA's arch code and being extern'ed out to the clock driver. This method is not correct, and the arch code was not really doing anything with that clk manager anyways. This patch moves the mapping of the clk manager's base address in the clock driver itself. Cleans up CLK_OF_DECLARE() into a single registration of all the clocks. Suggested-by: Arnd Bergmann Signed-off-by: Dinh Nguyen Acked-by: Arnd Bergmann --- v2: Use a static declaration for the clk_mgr_base_addr. Clean up the CLK_OF_DECLARE() as suggested by Arnd.

clk: socfpga: Use NULL instead of 0

2013-12-20T01:47:32Z

'div_reg' is a pointer. Assign NULL instead of 0. Signed-off-by: Sachin Kamat Acked-by: Dinh Nguyen Signed-off-by: Mike Turquette

clk: socfpga: Remove check for "reg" property in socfpga_clk_init

2013-11-27T20:48:51Z

The function socfpga_clk_init() can support clocks that do not have a divider register, but a fixed-divider that can be read from DTS. Therefore, the "reg" property is not a failing condition for socfpga_clk_init(). Signed-off-by: Dinh Nguyen Signed-off-by: Mike Turquette