linux/arch/powerpc/sysdev/indirect_pci.c, branch v5.3

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30T18:26:32Z

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman

powerpc/fsl_pci: Fix pci stack build bug with FRAME_WARN

2015-01-30T01:56:15Z

Fix this: CC arch/powerpc/sysdev/fsl_pci.o arch/powerpc/sysdev/fsl_pci.c: In function 'fsl_pcie_check_link': arch/powerpc/sysdev/fsl_pci.c:91:1: error: the frame size of 1360 bytes is larger than 1024 bytes [-Werror=frame-larger-than=] when configuring FRAME_WARN, by refactoring indirect_read_config() to take hose and bus number instead of the 1344-byte struct pci_bus. Signed-off-by: Kim Phillips Signed-off-by: Scott Wood

powerpc/sysdev: Fix a pci section mismatch for Book E

2014-01-08T01:23:31Z

Moved the following functions out of the __init section: arch/powerpc/sysdev/fsl_pci.c : fsl_add_bridge() arch/powerpc/sysdev/indirect_pci.c : setup_indirect_pci() Those are referenced by arch/powerpc/sysdev/fsl_pci.c : fsl_pci_probe() when compiling for Book E support. Signed-off-by: Christian Engelmayer Signed-off-by: Scott Wood

powerpc/fsl-pci Make PCIe hotplug work with Freescale PCIe controllers

2013-04-10T15:15:28Z

Up to now the PCIe link status on Freescale PCIe controllers was only checked once at boot time. So hotplug did not work. With this patch the link status is checked on every config read. PCIe devices not present at boot time are found after doing 'echo 1 >/sys/bus/pci/rescan'. Signed-off-by: Rojhalat Ibrahim Signed-off-by: Kumar Gala

Fix common misspellings

2011-03-31T14:26:23Z

Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi

powerpc/pci: Clean up direct access to sysdata by indirect ops

2009-05-21T05:44:22Z

We shouldn't directly access sysdata to get the pci_controller. Instead use pci_bus_to_host() for this purpose. In the future we might have sysdata be a device_node to match ppc64 and unify the code between ppc32 & ppc64. Signed-off-by: Kumar Gala Signed-off-by: Benjamin Herrenschmidt

powerpc/4xx: Workaround for PPC440EPx/GRx PCI_28 Errata

2008-06-17T23:01:38Z

The 440EPx/GRx chips don't support PCI MRM commands. Drivers determine this by looking for a zero value in the PCI cache line size register. However, some drivers write to this register upon initialization. This can cause MRMs to be used on these chips, which may cause deadlocks on PLB4. The workaround implemented here introduces a new indirect_type flag, called PPC_INDIRECT_TYPE_BROKEN_MRM. This is set in the pci_controller structure in the pci fixup function for 4xx PCI bridges by determining if the bridge is compatible with 440EPx/GRx. The flag is checked in the indirect_write_config function, and forces any writes to the PCI_CACHE_LINE_SIZE register to be zero, which will disable MRMs for these chips. A similar workaround has been tested by AMCC on various PCI cards, such as the Silicon Image ATA card and Intel E1000 GIGE card. Hangs were seen with the Silicon Image card, and MRMs were seen on the bus with a PCI analyzer. With the workaround in place, the card functioned properly and only Memory Reads were seen on the bus with the analyzer. Acked-by: Stefan Roese Signed-off-by: Josh Boyer

[POWERPC] PCI: Add 64-bit physical address support to setup_indirect_pci

2007-10-12T04:05:17Z

Add 64-bit physical address support to setup_indirect_pci(). Signed-off-by: Valentine Barshak Acked-by: Kumar Gala Signed-off-by: Paul Mackerras

[POWERPC] indirect_pci_ops: Use named structure member initializers

2007-08-17T01:01:54Z

Signed-off-by: Nathan Lynch Signed-off-by: Paul Mackerras

[POWERPC] Fix PCI indirect for big-endian cfg_addr

2007-07-25T05:29:53Z

We didn't actually propogate the flag we pass into setup_indirect_pci() to set indirect_type and thus were getting the wrong endianness if PPC_INDIRECT_TYPE_BIG_ENDIAN was set. Also, we need to or in additional flags rather than just doing a direct assignment. Signed-off-by: Kumar Gala