linux/arch/powerpc/sysdev/fsl_soc.c, branch v2.6.32

powerpc/85xx: issue fsl_soc reboot warning only when applicable

2009-08-25T01:48:13Z

Some CPU, like the MPC8560 don't have a RSTCR in the Global Utilities Block. These boards will implement their own reboot call, and not use this code, so we should only warn about the absence of the GUTS RSTCR when the default reboot code is used. Signed-off-by: Paul Gortmaker Signed-off-by: Kumar Gala

powerpc/fsl: use of_iomap() for rstcr mapping

2009-05-19T05:46:18Z

The rstcr register mapping code was written sometime ago before of_iomap() existed. We can use it and clean up the code a bit and get rid of one user of get_immrbase() in the process. Signed-off-by: Kumar Gala

powerpc/fsl_soc: Remove mpc83xx_wdt_init, again

2009-05-08T21:31:00Z

commit b31a1d8b41513b96e9c7ec2f68c5734cef0b26a4 ("gianfar: Convert gianfar to an of_platform_driver"), possibly due merge issues, reintroduced completely unneded mpc83xx_wdt_init call, which I removed some time ago in commit 20d38e01d48019c578ab0ec1464454c0 ("powerpc/fsl_soc: remove mpc83xx_wdt code"). Remove it once again. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala

powerpc/fsl_soc: isolate legacy fsl_spi support to mpc832x_rdb boards

2009-04-01T15:59:23Z

The advantages of this: - Don't encourage legacy support; - Less external symbols, less code to compile-in for !MPC832x_RDB platforms. Signed-off-by: Anton Vorontsov Cc: David Brownell Cc: Benjamin Herrenschmidt Cc: Kumar Gala Cc: Grant Likely Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

spi_mpc83xx: rework chip selects handling

2009-04-01T15:59:22Z

The main purpose of this patch is to pass 'struct spi_device' to the chip select handling routines. This is needed so that we could implement full-fledged OpenFirmware support for this driver. While at it, also: - Replace two {de,activate}_cs routines by single cs_contol(). - Don't duplicate platform data callbacks in mpc83xx_spi struct. Signed-off-by: Anton Vorontsov Cc: David Brownell Cc: Benjamin Herrenschmidt Cc: Kumar Gala Cc: Grant Likely Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

powerpc/83xx: Do not configure or probe disabled FSL DR USB controllers

2009-03-09T14:25:37Z

On MPC837X CPUs Dual-Role USB isn't always available (for example DR USB pins can be muxed away to eSDHC). U-Boot adds status = "disabled" property into the DR USB nodes to indicate that we must not try to configure or probe Dual-Role USB, otherwise we'll break eSDHC support on targets with MPC837X CPUs. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala

gianfar: Convert gianfar to an of_platform_driver

2008-12-16T23:29:15Z

Does the same for the accompanying MDIO driver, and then modifies the TBI configuration method. The old way used fields in einfo, which no longer exists. The new way is to create an MDIO device-tree node for each instance of gianfar, and create a tbi-handle property to associate ethernet controllers with the TBI PHYs they are connected to. Signed-off-by: Andy Fleming Signed-off-by: David S. Miller

gianfar: Fix race in TBI/SerDes configuration

2008-10-31T04:59:46Z

The init_phy() function attaches to the PHY, then configures the SerDes<->TBI link (in SGMII mode). The TBI is on the MDIO bus with the PHY (sort of) and is accessed via the gianfar's MDIO registers, using the functions gfar_local_mdio_read/write(), which don't do any locking. The previously attached PHY will start a work-queue on a timer, and probably an irq handler as well, which will talk to the PHY and thus use the MDIO bus. This uses phy_read/write(), which have locking, but not against the gfar_local_mdio versions. The result is that PHY code will try to use the MDIO bus at the same time as the SerDes setup code, corrupting the transfers. Setting up the SerDes before attaching to the PHY will insure that there is no race between the SerDes code and *our* PHY, but doesn't fix everything. Typically the PHYs for all gianfar devices are on the same MDIO bus, which is associated with the first gianfar device. This means that the first gianfar's SerDes code could corrupt the MDIO transfers for a different gianfar's PHY. The lock used by phy_read/write() is contained in the mii_bus structure, which is pointed to by the PHY. This is difficult to access from the gianfar drivers, as there is no link between a gianfar device and the mii_bus which shares the same MDIO registers. As far as the device layer and drivers are concerned they are two unrelated devices (which happen to share registers). Generally all gianfar devices' PHYs will be on the bus associated with the first gianfar. But this might not be the case, so simply locking the gianfar's PHY's mii bus might not lock the mii bus that the SerDes setup code is going to use. We solve this by having the code that creates the gianfar platform device look in the device tree for an mdio device that shares the gianfar's registers. If one is found the ID of its platform device is saved in the gianfar's platform data. A new function in the gianfar mii code, gfar_get_miibus(), can use the bus ID to search through the platform devices for a gianfar_mdio device with the right ID. The platform device's driver data is the mii_bus structure, which the SerDes setup code can use to lock the current bus. Signed-off-by: Trent Piepho CC: Andy Fleming Signed-off-by: Jeff Garzik

powerpc: remove support for bootmem-allocated memory for the DIU driver

2008-10-13T16:09:59Z

Early versions of the Freescale DIU framebuffer driver depended on a bootmem allocation of memory for the video buffer. The need for this feature was removed in commit 6b51d51a, so now we can remove the platform-specific code that allocated that memory. Signed-off-by: Timur Tabi Signed-off-by: Kumar Gala

powerpc/fsl_soc: remove mpc83xx_wdt code

2008-09-29T14:22:45Z

mpc83xx_wdt is the OF driver now, so we don't need fsl_soc constructor. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala