Merge tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/linux into nextnext

Pull clock framework updates from Mike Turquette:
 "The clock framework changes for 3.16 are pretty typical: mostly clock
  driver additions and fixes.  There are additions to the clock core
  code for some of the basic types (e.g. the common divider type has
  some fixes and featured added to it).

  One minor annoyance is a last-minute dependency that wasn't handled
  quite right.  Commit ba0fae3b06a6 ("clk: berlin: add core clock driver
  for BG2/BG2CD") in this pull request depends on
  include/dt-bindings/clock/berlin2.h, which is already in your tree via
  the arm-soc pull request.  Building for the berlin platform will break
  when the clk tree is built on it's own, but merged into your master
  branch everything should be fine"

* tag 'clk-for-linus-3.16' of git://git.linaro.org/people/mike.turquette/linux: (75 commits)
  mmc: sunxi: Add driver for SD/MMC hosts found on Allwinner sunxi SoCs
  clk: export __clk_round_rate for providers
  clk: versatile: free icst on error return
  clk: qcom: Return error pointers for unimplemented clocks
  clk: qcom: Support msm8974pro global clock control hardware
  clk: qcom: Properly support display clocks on msm8974
  clk: qcom: Support display RCG clocks
  clk: qcom: Return highest rate when round_rate() exceeds plan
  clk: qcom: Fix mmcc-8974's PLL configurations
  clk: qcom: Fix clk_rcg2_is_enabled() check
  clk: berlin: add core clock driver for BG2Q
  clk: berlin: add core clock driver for BG2/BG2CD
  clk: berlin: add driver for BG2x complex divider cells
  clk: berlin: add driver for BG2x simple PLLs
  clk: berlin: add driver for BG2x audio/video PLL
  clk: st: Terminate of match table
  clk/exynos4: Fix compilation warning
  ARM: shmobile: r8a7779: Add clock index macros for DT sources
  clk: divider: Fix overflow in clk_divider_bestdiv
  clk: u300: Terminate of match table
  ...

1 files changed, 3 insertions, 4 deletions

diff --git a/include/dt-bindings/clock/qcom,gcc-msm8960.h b/include/dt-bindings/clock/qcom,gcc-msm8960.h
index 03bbf49d43b7..f9f547146a15 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8960.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8960.h
@@ -51,7 +51,7 @@
 #define QDSS_TSCTR_CLK				34
 #define SFAB_ADM0_M0_A_CLK			35
 #define SFAB_ADM0_M1_A_CLK			36
-#define SFAB_ADM0_M2_A_CLK			37
+#define SFAB_ADM0_M2_H_CLK			37
 #define ADM0_CLK				38
 #define ADM0_PBUS_CLK				39
 #define MSS_XPU_CLK				40
@@ -99,7 +99,7 @@
 #define CFPB2_H_CLK				82
 #define SFAB_CFPB_M_H_CLK			83
 #define CFPB_MASTER_H_CLK			84
-#define SFAB_CFPB_S_HCLK			85
+#define SFAB_CFPB_S_H_CLK			85
 #define CFPB_SPLITTER_H_CLK			86
 #define TSIF_H_CLK				87
 #define TSIF_INACTIVITY_TIMERS_CLK		88
@@ -110,7 +110,6 @@
 #define CE1_SLEEP_CLK				93
 #define CE2_H_CLK				94
 #define CE2_CORE_CLK				95
-#define CE2_SLEEP_CLK				96
 #define SFPB_H_CLK_SRC				97
 #define SFPB_H_CLK				98
 #define SFAB_SFPB_M_H_CLK			99
@@ -252,7 +251,7 @@
 #define MSS_S_H_CLK				235
 #define MSS_CXO_SRC_CLK				236
 #define SATA_H_CLK				237
-#define SATA_SRC_CLK				238
+#define SATA_CLK_SRC				238
 #define SATA_RXOOB_CLK				239
 #define SATA_PMALIVE_CLK			240
 #define SATA_PHY_REF_CLK			241